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h1r9: MAX2839 driver updates

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This commit is contained in:
Michael Ossmann
2022-09-19 07:35:10 -04:00
committed by Mike Walters
parent a72f084ff0
commit f4817b60a3
2 changed files with 74 additions and 37 deletions
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76
firmware/common/max2839.c
View File

@ -36,17 +36,17 @@
/* Default register values. */ /* Default register values. */
static const uint16_t max2839_regs_default[MAX2839_NUM_REGS] = { static const uint16_t max2839_regs_default[MAX2839_NUM_REGS] = {
0x000, /* 0 */ 0x000, /* 0 */
0x00C, /* 1 */ 0x00c, /* 1: data sheet says 0x00c but read 0x22c */
0x080, /* 2 */ 0x080, /* 2 */
0x1b9, /* 3 */ 0x1b9, /* 3: data sheet says 0x1b9 but read 0x1b0 */
0x3e6, /* 4 */ 0x3e6, /* 4 */
0x100, /* 5 */ 0x100, /* 5 */
0x000, /* 6 */ 0x000, /* 6 */
0x208, /* 7 */ 0x208, /* 7 */
0x220, /* 8 */ 0x220, /* 8: data sheet says 0x220 but read 0x000 */
0x018, /* 9 */ 0x018, /* 9 */
0x00c, /* 10 */ 0x00c, /* 10 */
0x004, /* 11 */ 0x004, /* 11: data sheet says 0x004 but read 0x000 */
0x24f, /* 12 */ 0x24f, /* 12 */
0x150, /* 13 */ 0x150, /* 13 */
0x3c5, /* 14 */ 0x3c5, /* 14 */
@ -56,17 +56,24 @@ static const uint16_t max2839_regs_default[MAX2839_NUM_REGS] = {
0x155, /* 18 */ 0x155, /* 18 */
0x153, /* 19 */ 0x153, /* 19 */
0x249, /* 20 */ 0x249, /* 20 */
0x02d, /* 21 */ 0x02d, /* 21: data sheet says 0x02d but read 0x13d */
0x1a9, /* 22 */ 0x1a9, /* 22 */
0x24f, /* 23 */ 0x24f, /* 23 */
0x180, /* 24 */ 0x180, /* 24 */
0x000, /* 25 */ 0x000, /* 25: data sheet says 0x000 but read 0x00a */
0x3c0, /* 26 */ 0x3c0, /* 26 */
0x200, /* 27 */ 0x200, /* 27: data sheet says 0x200 but read 0x22a */
0x0c0, /* 28 */ 0x0c0, /* 28 */
0x03f, /* 29 */ 0x03f, /* 29: data sheet says 0x03f but read 0x07f */
0x380, /* 30 */ 0x300, /* 30: data sheet says 0x300 but read 0x398 */
0x340}; /* 31 */ 0x340}; /* 31: data sheet says 0x340 but read 0x359 */
/*
* All of the discrepancies listed above are in fields that either don't matter
* or are undocumented except "set to recommended value". We set them to the
* data sheet defaults even though the inital part we tested started up with
* different settings.
*/
/* Set up all registers according to defaults specified in docs. */ /* Set up all registers according to defaults specified in docs. */
static void max2839_init(max2839_driver_t* const drv) static void max2839_init(max2839_driver_t* const drv)
@ -88,7 +95,27 @@ static void max2839_init(max2839_driver_t* const drv)
void max2839_setup(max2839_driver_t* const drv) void max2839_setup(max2839_driver_t* const drv)
{ {
max2839_init(drv); max2839_init(drv);
// TODO
/* Use SPI control instead of B0-B7 pins for gain settings. */
set_MAX2839_LNAgain_SPI(drv, 1);
set_MAX2839_VGAgain_SPI(drv, 1);
set_MAX2839_TX_VGA_Gain_SPI(drv, 1);
/* enable RXINB */
set_MAX2839_MIMO_SELECT(drv, 1);
/* set gains for unused RXINA path to minimum */
set_MAX2839_LNA1gain(drv, MAX2839_LNA1gain_M32);
set_MAX2839_Rx1_VGAgain(drv, 0x3f);
//set_MAX2839_TX_VGA_GAIN(drv, 0x18);
/* maximum RX output common-mode voltage */
set_MAX2839_RX_VCM(drv, MAX2839_RX_VCM_1_35);
//FIXME do something with HPFSM/HPC?
//FIXME do something with LPF?
max2839_regs_commit(drv); max2839_regs_commit(drv);
} }
@ -107,9 +134,10 @@ static void max2839_write(max2839_driver_t* const drv, uint8_t r, uint16_t v)
uint16_t max2839_reg_read(max2839_driver_t* const drv, uint8_t r) uint16_t max2839_reg_read(max2839_driver_t* const drv, uint8_t r)
{ {
if ((drv->regs_dirty >> r) & 0x1) { // always read actual value from SPI for now
//if ((drv->regs_dirty >> r) & 0x1) {
drv->regs[r] = max2839_read(drv, r); drv->regs[r] = max2839_read(drv, r);
}; //};
return drv->regs[r]; return drv->regs[r];
} }
@ -154,14 +182,16 @@ void max2839_start(max2839_driver_t* const drv)
void max2839_tx(max2839_driver_t* const drv) void max2839_tx(max2839_driver_t* const drv)
{ {
set_MAX2839_LPFblock_MODE(drv, MAX2839_ModeCtrl_TxLPF); // FIXME does this do anything without LPFmode_SPI set?
// do we need it to?
set_MAX2839_LPFmode(drv, MAX2839_LPFmode_TxLPF);
max2839_regs_commit(drv); max2839_regs_commit(drv);
max2839_set_mode(drv, MAX2839_MODE_TX); max2839_set_mode(drv, MAX2839_MODE_TX);
} }
void max2839_rx(max2839_driver_t* const drv) void max2839_rx(max2839_driver_t* const drv)
{ {
set_MAX2839_LPFblock_MODE(drv, MAX2839_ModeCtrl_RxLPF); set_MAX2839_LPFmode(drv, MAX2839_LPFmode_RxLPF);
max2839_regs_commit(drv); max2839_regs_commit(drv);
max2839_set_mode(drv, MAX2839_MODE_RX); max2839_set_mode(drv, MAX2839_MODE_RX);
} }
@ -276,24 +306,24 @@ bool max2839_set_lna_gain(max2839_driver_t* const drv, const uint32_t gain_db) {
uint16_t val; uint16_t val;
switch(gain_db){ switch(gain_db){
case 40: case 40:
val = MAX2839_LNA1gain_MAX; val = MAX2839_LNA2gain_MAX;
break; break;
case 32: case 32:
val = MAX2839_LNA1gain_M8; val = MAX2839_LNA2gain_M8;
break; break;
case 24: case 24:
val = MAX2839_LNA1gain_M16; // FIXME correct missing settings with VGA adjustment?
case 16:
val = MAX2839_LNA2gain_M16;
break; break;
case 8: case 8:
val = MAX2839_LNA1gain_M32;
break;
case 0: case 0:
val = MAX2839_LNA1gain_M32; val = MAX2839_LNA2gain_M32;
break; break;
default: default:
return false; return false;
} }
set_MAX2839_LNA1gain(drv, val); set_MAX2839_LNA2gain(drv, val);
max2839_reg_commit(drv, 5); max2839_reg_commit(drv, 5);
return true; return true;
} }
@ -303,7 +333,7 @@ bool max2839_set_vga_gain(max2839_driver_t* const drv, const uint32_t gain_db) {
return false; return false;
} }
set_MAX2839_Rx1_VGAgain(drv, (63-gain_db)); set_MAX2839_Rx2_VGAgain(drv, (63-gain_db));
max2839_reg_commit(drv, 5); max2839_reg_commit(drv, 5);
return true; return true;
} }

33
firmware/common/max2839_regs.def
View File

@ -37,10 +37,9 @@ __MREG__(MAX2839_LNAband,1,1,2)
__MREG__(MAX2839_RESERVED_1_2,1,2,1) __MREG__(MAX2839_RESERVED_1_2,1,2,1)
__MREG__(MAX2839_MIMO_SELECT,1,3,1) __MREG__(MAX2839_MIMO_SELECT,1,3,1)
__MREG__(MAX2839_iqerr_trim,1,9,6) __MREG__(MAX2839_iqerr_trim,1,9,6)
// TODO: D9:D4 but shows only 5 bits for values? // 0b000000 = +4.0 degree phase error
// 0b00000 = +4.0 degree phase error // 0b011111 = 0.0
// 0b01111 = 0.0 // 0b111111 = -4.0
// 0b11111 = -4.0
/* REG 2 */ /* REG 2 */
__MREG__(MAX2839_LNAgain_SPI,2,0,1) __MREG__(MAX2839_LNAgain_SPI,2,0,1)
@ -80,16 +79,24 @@ __MREG__(MAX2839_LNA1gain,5,1,2)
#define MAX2839_LNA1gain_M16 0b010 #define MAX2839_LNA1gain_M16 0b010
#define MAX2839_LNA1gain_M32 0b011 #define MAX2839_LNA1gain_M32 0b011
__MREG__(MAX2839_Rx1_VGAgain,5,7,6) __MREG__(MAX2839_Rx1_VGAgain,5,7,6)
__MREG__(MAX2839_LPFblock_MODE,5,9,2) __MREG__(MAX2839_LPFmode,5,9,2)
#define MAX2839_ModeCtrl_RxCalibration 0 #define MAX2839_LPFmode_RxCalibration 0
#define MAX2839_ModeCtrl_RxLPF 1 #define MAX2839_LPFmode_RxLPF 1
#define MAX2839_ModeCtrl_TxLPF 2 #define MAX2839_LPFmode_TxLPF 2
#define MAX2839_ModeCtrl_LPFTrim 3 #define MAX2839_LPFmode_LPFTrim 3
/* REG 6 */ /* REG 6 */
__MREG__(MAX2839_LNA2gain_SPI,6,1,2) __MREG__(MAX2839_LNA2gain,6,1,2)
#define MAX2839_LNA2gain_MAX 0b000 // Pad in 8dB steps, bits reversed
#define MAX2839_LNA2gain_M8 0b001
#define MAX2839_LNA2gain_M16 0b010
#define MAX2839_LNA2gain_M32 0b011
__MREG__(MAX2839_Rx2_VGAgain,6,7,6) __MREG__(MAX2839_Rx2_VGAgain,6,7,6)
__MREG__(MAX2839_RX_VGAoutput,6,9,2) __MREG__(MAX2839_RX_VCM,6,9,2)
#define MAX2839_RX_VCM_1_0 0b00 // 1.0 V
#define MAX2839_RX_VCM_1_1 0b01 // 1.1 V
#define MAX2839_RX_VCM_1_2 0b10 // 1.2 V
#define MAX2839_RX_VCM_1_35 0b11 // 1.35 V
/* REG 7 */ /* REG 7 */
__MREG__(MAX2839_RESERVED_7_0,7,0,1) __MREG__(MAX2839_RESERVED_7_0,7,0,1)
@ -103,7 +110,7 @@ __MREG__(MAX2839_RSSIinput,7,9,1)
/* REG 8 */ /* REG 8 */
__MREG__(MAX2839_RESERVED_8_0,8,0,1) __MREG__(MAX2839_RESERVED_8_0,8,0,1)
__MREG__(MAX2839_VGAgain_SPI,8,1,1) __MREG__(MAX2839_VGAgain_SPI,8,1,1)
__MREG__(MAX2839_LPFmode,8,2,1) __MREG__(MAX2839_LPFmode_SPI,8,2,1)
__MREG__(MAX2839_RESERVED_8_9,8,9,7) __MREG__(MAX2839_RESERVED_8_9,8,9,7)
/* REG 9 */ /* REG 9 */
@ -214,7 +221,7 @@ __MREG__(MAX2839_VAS_Test_Signal_Select,26,9,4)
/* REG 27 */ /* REG 27 */
__MREG__(MAX2839_TX_LO_IQ_Phase_SPI_Adjust_Addr27,27,5,6) __MREG__(MAX2839_TX_LO_IQ_Phase_SPI_Adjust_Addr27,27,5,6)
__MREG__(MAX2839_TX_LO_IQ_Phase_SPI_Adjust_Enable,27,6,1) __MREG__(MAX2839_TX_LO_IQ_Phase_SPI_Adjust_Enable,27,6,1)
__MREG__(MAX2839_TX_VGA_Gain_SPI_Ctrl_Enable,27,7,1) __MREG__(MAX2839_TX_VGA_Gain_SPI,27,7,1)
__MREG__(MAX2839_TX_DC_Offset_SPI_Adjust_Enable,27,8,1) __MREG__(MAX2839_TX_DC_Offset_SPI_Adjust_Enable,27,8,1)
__MREG__(MAX2839_RESERVED_27_9,27,9,1) __MREG__(MAX2839_RESERVED_27_9,27,9,1)