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PortaPack: Add HackRF One gates for PortaPack JTAG and OperaCake code.

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I think these #defines might finally be the right shape...
This commit is contained in:
Jared Boone
2019-03-02 20:43:19 -08:00
parent 4fefd829ba
commit f259c9aad6
5 changed files with 18 additions and 0 deletions
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6
firmware/common/cpld_jtag.c
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@ -35,14 +35,18 @@ void cpld_jtag_take(jtag_t* const jtag) {
/* Set initial GPIO state to the voltages of the internal or external pull-ups/downs, /* Set initial GPIO state to the voltages of the internal or external pull-ups/downs,
* to avoid any glitches. * to avoid any glitches.
*/ */
#ifdef HACKRF_ONE
gpio_set(gpio->gpio_pp_tms); gpio_set(gpio->gpio_pp_tms);
#endif
gpio_set(gpio->gpio_tms); gpio_set(gpio->gpio_tms);
gpio_set(gpio->gpio_tdi); gpio_set(gpio->gpio_tdi);
gpio_clear(gpio->gpio_tck); gpio_clear(gpio->gpio_tck);
#ifdef HACKRF_ONE
/* Do not drive PortaPack-specific TMS pin initially, just to be cautious. */ /* Do not drive PortaPack-specific TMS pin initially, just to be cautious. */
gpio_input(gpio->gpio_pp_tms); gpio_input(gpio->gpio_pp_tms);
gpio_input(gpio->gpio_pp_tdo); gpio_input(gpio->gpio_pp_tdo);
#endif
gpio_output(gpio->gpio_tms); gpio_output(gpio->gpio_tms);
gpio_output(gpio->gpio_tdi); gpio_output(gpio->gpio_tdi);
gpio_output(gpio->gpio_tck); gpio_output(gpio->gpio_tck);
@ -55,9 +59,11 @@ void cpld_jtag_release(jtag_t* const jtag) {
/* Make all pins inputs when JTAG interface not active. /* Make all pins inputs when JTAG interface not active.
* Let the pull-ups/downs do the work. * Let the pull-ups/downs do the work.
*/ */
#ifdef HACKRF_ONE
/* Do not drive PortaPack-specific pins, initially, just to be cautious. */ /* Do not drive PortaPack-specific pins, initially, just to be cautious. */
gpio_input(gpio->gpio_pp_tms); gpio_input(gpio->gpio_pp_tms);
gpio_input(gpio->gpio_pp_tdo); gpio_input(gpio->gpio_pp_tdo);
#endif
gpio_input(gpio->gpio_tms); gpio_input(gpio->gpio_tms);
gpio_input(gpio->gpio_tdi); gpio_input(gpio->gpio_tdi);
gpio_input(gpio->gpio_tck); gpio_input(gpio->gpio_tck);

2
firmware/common/cpld_jtag.h
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@ -31,8 +31,10 @@ typedef struct jtag_gpio_t {
gpio_t gpio_tck; gpio_t gpio_tck;
gpio_t gpio_tdi; gpio_t gpio_tdi;
gpio_t gpio_tdo; gpio_t gpio_tdo;
#ifdef HACKRF_ONE
gpio_t gpio_pp_tms; gpio_t gpio_pp_tms;
gpio_t gpio_pp_tdo; gpio_t gpio_pp_tdo;
#endif
} jtag_gpio_t; } jtag_gpio_t;
typedef struct jtag_t { typedef struct jtag_t {

6
firmware/common/hackrf_core.c
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@ -124,8 +124,10 @@ static struct gpio_t gpio_cpld_tms = GPIO(3, 1);
static struct gpio_t gpio_cpld_tdi = GPIO(3, 4); static struct gpio_t gpio_cpld_tdi = GPIO(3, 4);
#endif #endif
#ifdef HACKRF_ONE
static struct gpio_t gpio_cpld_pp_tms = GPIO(1, 1); static struct gpio_t gpio_cpld_pp_tms = GPIO(1, 1);
static struct gpio_t gpio_cpld_pp_tdo = GPIO(1, 8); static struct gpio_t gpio_cpld_pp_tdo = GPIO(1, 8);
#endif
static struct gpio_t gpio_hw_sync_enable = GPIO(5,12); static struct gpio_t gpio_hw_sync_enable = GPIO(5,12);
static struct gpio_t gpio_rx_q_invert = GPIO(0, 13); static struct gpio_t gpio_rx_q_invert = GPIO(0, 13);
@ -274,8 +276,10 @@ jtag_gpio_t jtag_gpio_cpld = {
.gpio_tck = &gpio_cpld_tck, .gpio_tck = &gpio_cpld_tck,
.gpio_tdi = &gpio_cpld_tdi, .gpio_tdi = &gpio_cpld_tdi,
.gpio_tdo = &gpio_cpld_tdo, .gpio_tdo = &gpio_cpld_tdo,
#ifdef HACKRF_ONE
.gpio_pp_tms = &gpio_cpld_pp_tms, .gpio_pp_tms = &gpio_cpld_pp_tms,
.gpio_pp_tdo = &gpio_cpld_pp_tdo, .gpio_pp_tdo = &gpio_cpld_pp_tdo,
#endif
}; };
jtag_t jtag_cpld = { jtag_t jtag_cpld = {
@ -773,8 +777,10 @@ void pin_setup(void) {
* *
* LPC43xx pull-up and pull-down resistors are approximately 53K. * LPC43xx pull-up and pull-down resistors are approximately 53K.
*/ */
#ifdef HACKRF_ONE
scu_pinmux(SCU_PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0); scu_pinmux(SCU_PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); scu_pinmux(SCU_PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0);
#endif
scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4); scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4);

2
firmware/common/hackrf_core.h
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@ -77,8 +77,10 @@ extern "C"
/* GPIO Input PinMux */ /* GPIO Input PinMux */
#define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */ #define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */
#define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */ #define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */
#ifndef HACKRF_ONE
#define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */ #define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */
#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */ #define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
#endif
#define SCU_PINMUX_PP_LCD_TE (P2_3) /* GPIO5[3] on P2_3 */ #define SCU_PINMUX_PP_LCD_TE (P2_3) /* GPIO5[3] on P2_3 */
#define SCU_PINMUX_PP_LCD_RDX (P2_4) /* GPIO5[4] on P2_4 */ #define SCU_PINMUX_PP_LCD_RDX (P2_4) /* GPIO5[4] on P2_4 */
#define SCU_PINMUX_PP_UNUSED (P2_8) /* GPIO5[7] on P2_8 */ #define SCU_PINMUX_PP_UNUSED (P2_8) /* GPIO5[7] on P2_8 */

2
firmware/common/tuning.c
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@ -116,7 +116,9 @@ bool set_freq(const uint64_t freq)
if( success ) { if( success ) {
freq_cache = freq; freq_cache = freq;
hackrf_ui()->set_frequency(freq); hackrf_ui()->set_frequency(freq);
#ifdef HACKRF_ONE
operacake_set_range(freq_mhz); operacake_set_range(freq_mhz);
#endif
} }
return success; return success;
} }