diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index aa45816f..5ec3921c 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -205,6 +205,17 @@ void ssp1_set_mode_max5864(void)
 }
 
 void pin_setup(void) {
+	/* Release CPLD JTAG pins */
+	scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
+	scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+	scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+	scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
+
+	GPIO_DIR(PORT_CPLD_TDO) &= ~PIN_CPLD_TDO;
+	GPIO_DIR(PORT_CPLD_TCK) &= ~PIN_CPLD_TCK;
+	GPIO_DIR(PORT_CPLD_TMS) &= ~PIN_CPLD_TMS;
+	GPIO_DIR(PORT_CPLD_TDI) &= ~PIN_CPLD_TDI;
+
 	/* Configure SCU Pin Mux as GPIO */
 	scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_FAST);
 	scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_FAST);
@@ -244,16 +255,4 @@ void enable_1v8_power(void) {
 	gpio_set(PORT_EN1V8, PIN_EN1V8);
 }
 
-void release_cpld_jtag_pins(void) {
-	scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
-	scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-	scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
-
-	GPIO_DIR(PORT_CPLD_TDO) &= ~PIN_CPLD_TDO;
-	GPIO_DIR(PORT_CPLD_TCK) &= ~PIN_CPLD_TCK;
-	GPIO_DIR(PORT_CPLD_TMS) &= ~PIN_CPLD_TMS;
-	GPIO_DIR(PORT_CPLD_TDI) &= ~PIN_CPLD_TDI;
-}
-
 #endif
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index 85aa2c11..18575759 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -161,8 +161,6 @@ void ssp1_set_mode_max5864(void);
 
 void pin_setup(void);
 
-void release_cpld_jtag_pins(void);
-
 void enable_1v8_power(void);
 
 #ifdef __cplusplus