diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index ee991b27..e4bde534 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -24,6 +24,9 @@ #include "si5351c.h" #include #include +#include +#include +#include #ifdef JELLYBEAN @@ -147,4 +150,58 @@ void cpu_clock_init(void) | (CGU_SRC_PLL0USB << CGU_BASE_CLK_SEL_SHIFT)); } +void ssp1_init(void) +{ + /* + * Configure CS_AD pin to keep the MAX5864 SPI disabled while we use the + * SPI bus for the MAX2837. FIXME: this should probably be somewhere else. + */ + scu_pinmux(SCU_AD_CS, SCU_GPIO_FAST); + GPIO_SET(PORT_AD_CS) = PIN_AD_CS; + GPIO_DIR(PORT_AD_CS) |= PIN_AD_CS; + + scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST); + GPIO_SET(PORT_XCVR_CS) = PIN_XCVR_CS; + GPIO_DIR(PORT_XCVR_CS) |= PIN_XCVR_CS; + + /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ + scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); +} + +void ssp1_set_mode_max2837(void) +{ + /* FIXME speed up once everything is working reliably */ + const uint8_t serial_clock_rate = 32; + const uint8_t clock_prescale_rate = 128; + + ssp_init(SSP1_NUM, + SSP_DATA_16BITS, + SSP_FRAME_SPI, + SSP_CPOL_0_CPHA_0, + serial_clock_rate, + clock_prescale_rate, + SSP_MODE_NORMAL, + SSP_MASTER, + SSP_SLAVE_OUT_ENABLE); +} + +void ssp1_set_mode_max5864(void) +{ + /* FIXME speed up once everything is working reliably */ + const uint8_t serial_clock_rate = 32; + const uint8_t clock_prescale_rate = 128; + + ssp_init(SSP1_NUM, + SSP_DATA_8BITS, + SSP_FRAME_SPI, + SSP_CPOL_0_CPHA_0, + serial_clock_rate, + clock_prescale_rate, + SSP_MODE_NORMAL, + SSP_MASTER, + SSP_SLAVE_OUT_ENABLE); +} + #endif diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h index 7b4c7fde..58e277f2 100644 --- a/firmware/common/hackrf_core.h +++ b/firmware/common/hackrf_core.h @@ -88,9 +88,10 @@ extern "C" #define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */ #define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */ #define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */ +#define SCU_XCVR_CS (P1_20) /* GPIO0[15] on P1_20 */ -/* MAX5864 SPI chip select (CS_AD) GPIO PinMux */ -#define SCU_CS_AD (P5_7) /* GPIO2[7] on P5_7 */ +/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */ +#define SCU_AD_CS (P5_7) /* GPIO2[7] on P5_7 */ /* RFFC5071 GPIO serial interface PinMux */ #define SCU_MIXER_ENX (P7_0) /* GPIO3[8] on P7_0 */ @@ -112,13 +113,15 @@ extern "C" #define PIN_EN1V8 (BIT6) /* GPIO3[6] on P6_10 */ #define PORT_EN1V8 (GPIO3) +#define PIN_XCVR_CS (BIT15) /* GPIO0[15] on P1_20 */ +#define PORT_XCVR_CS (GPIO0) /* PORT for CS */ #define PIN_XCVR_ENABLE (BIT6) /* GPIO2[6] on P4_6 */ #define PIN_XCVR_RXENABLE (BIT5) /* GPIO2[5] on P4_5 */ #define PIN_XCVR_TXENABLE (BIT4) /* GPIO2[4] on P4_4 */ #define PORT_XCVR_ENABLE (GPIO2) /* PORT for ENABLE, TXENABLE, RXENABLE */ -#define PIN_CS_AD (BIT7) /* GPIO2[7] on P5_7 */ -#define PORT_CS_AD (GPIO2) /* PORT for CS_AD */ +#define PIN_AD_CS (BIT7) /* GPIO2[7] on P5_7 */ +#define PORT_AD_CS (GPIO2) /* PORT for AD_CS */ #define PIN_MIXER_ENX (BIT8) /* GPIO3[8] on P7_0 */ #define PIN_MIXER_SCLK (BIT9) /* GPIO3[9] on P7_1 */ @@ -152,6 +155,9 @@ extern "C" #endif void cpu_clock_init(void); +void ssp1_init(void); +void ssp1_set_mode_max2837(void); +void ssp1_set_mode_max5864(void); #ifdef __cplusplus } diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c index f5e709b7..96561b41 100644 --- a/firmware/common/max2837.c +++ b/firmware/common/max2837.c @@ -86,10 +86,6 @@ void max2837_setup(void) { LOG("# max2837_setup\n"); #if !defined TEST - /* FIXME speed up once everything is working reliably */ - const uint8_t serial_clock_rate = 32; - const uint8_t clock_prescale_rate = 128; - /* Configure XCVR_CTL GPIO pins. */ scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST); scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST); @@ -101,30 +97,6 @@ void max2837_setup(void) /* disable everything */ gpio_clear(PORT_XCVR_ENABLE, (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); - - /* - * Configure CS_AD pin to keep the MAX5864 SPI disabled while we use the - * SPI bus for the MAX2837. FIXME: this should probably be somewhere else. - */ - scu_pinmux(SCU_CS_AD, SCU_GPIO_FAST); - GPIO2_DIR |= PIN_CS_AD; - gpio_set(PORT_CS_AD, PIN_CS_AD); - - /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ - scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); - scu_pinmux(SCU_SSP1_SSEL, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); - - ssp_init(SSP1_NUM, - SSP_DATA_16BITS, - SSP_FRAME_SPI, - SSP_CPOL_0_CPHA_0, - serial_clock_rate, - clock_prescale_rate, - SSP_MODE_NORMAL, - SSP_MASTER, - SSP_SLAVE_OUT_ENABLE); #endif max2837_init(); @@ -145,6 +117,9 @@ void max2837_setup(void) /* SPI register read. */ uint16_t max2837_spi_read(uint8_t r) { + gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS); + // FIXME: Unimplemented. + gpio_set(PORT_XCVR_CS, PIN_XCVR_CS); return 0; } @@ -157,7 +132,9 @@ void max2837_spi_write(uint8_t r, uint16_t v) { #elif DEBUG LOG("0x%03x -> reg%d\n", v, r); #else + gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS); ssp_write(SSP1_NUM, (uint16_t)((r << 10) | (v & 0x3ff))); + gpio_set(PORT_XCVR_CS, PIN_XCVR_CS); #endif } diff --git a/firmware/simpletx/simpletx.c b/firmware/simpletx/simpletx.c index f57c7b0c..7d61cb6a 100644 --- a/firmware/simpletx/simpletx.c +++ b/firmware/simpletx/simpletx.c @@ -60,9 +60,11 @@ int main(void) pin_setup(); gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */ cpu_clock_init(); - + ssp1_init(); + gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */ + ssp1_set_mode_max2837(); max2837_setup(); gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */ max2837_set_frequency(freq);