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Merge pull request #25 from jboone/master

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Fix for TX DAC sample vs. clock skew.
This commit is contained in:
Michael Ossmann
2012-11-02 22:44:55 -07:00
parent 92474c4228 cc5f1c61c7
commit edd6846da6
2 changed files with 4 additions and 1 deletions
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3
firmware/common/sgpio.c
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@ -167,6 +167,7 @@ void sgpio_configure(
const bool input_slice = (i == 0) && (transceiver_mode == TRANSCEIVER_MODE_RX); const bool input_slice = (i == 0) && (transceiver_mode == TRANSCEIVER_MODE_RX);
const uint_fast8_t concat_order = (input_slice || single_slice) ? 0 : 3; const uint_fast8_t concat_order = (input_slice || single_slice) ? 0 : 3;
const uint_fast8_t concat_enable = (input_slice || single_slice) ? 0 : 1; const uint_fast8_t concat_enable = (input_slice || single_slice) ? 0 : 1;
const uint_fast8_t clk_capture_mode = (transceiver_mode == TRANSCEIVER_MODE_RX) ? 1 : 0;
SGPIO_MUX_CFG(slice_index) = SGPIO_MUX_CFG(slice_index) =
SGPIO_MUX_CFG_CONCAT_ORDER(concat_order) SGPIO_MUX_CFG_CONCAT_ORDER(concat_order)
@ -185,7 +186,7 @@ void sgpio_configure(
| SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0)
| SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0)
| SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1)
| SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(1) | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(clk_capture_mode)
| SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0)
; ;

2
host/libhackrf/examples/hackrf_transfer.c
View File

@ -27,6 +27,8 @@
#include <string.h> #include <string.h>
#include <getopt.h> #include <getopt.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h> #include <fcntl.h>
#include <errno.h> #include <errno.h>
#include <unistd.h> #include <unistd.h>