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SPI: Rename spi_t to spi_bus_t to match I2C naming.

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This commit is contained in:
Jared Boone
2014-11-13 10:16:39 -08:00
parent 05b8c4c153
commit ea136038a9
24 changed files with 166 additions and 166 deletions
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22
firmware/common/hackrf_core.c
View File

@ -72,7 +72,7 @@ const ssp_config_t ssp_config_max5864 = {
.unselect = max5864_target_spi_unselect,
};
spi_t spi_ssp1 = {
spi_bus_t spi_bus_ssp1 = {
.obj = (void*)SSP1_BASE,
.config = &ssp_config_max2837,
.start = spi_ssp_start,
@ -82,17 +82,17 @@ spi_t spi_ssp1 = {
};
max2837_driver_t max2837 = {
.spi = &spi_ssp1,
.bus = &spi_bus_ssp1,
.target_init = max2837_target_init,
.set_mode = max2837_target_set_mode,
};
max5864_driver_t max5864 = {
.spi = &spi_ssp1,
.bus = &spi_bus_ssp1,
.target_init = max5864_target_init,
};
spi_t rffc5071_spi = {
spi_bus_t spi_bus_rffc5071 = {
.config = NULL,
.start = rffc5071_spi_start,
.stop = rffc5071_spi_stop,
@ -101,7 +101,7 @@ spi_t rffc5071_spi = {
};
rffc5071_driver_t rffc5072 = {
.spi = &rffc5071_spi,
.bus = &spi_bus_rffc5071,
};
const ssp_config_t ssp_config_w25q80bv = {
@ -112,7 +112,7 @@ const ssp_config_t ssp_config_w25q80bv = {
.unselect = w25q80bv_target_spi_unselect,
};
spi_t spi_ssp0 = {
spi_bus_t spi_bus_ssp0 = {
.obj = (void*)SSP0_BASE,
.config = &ssp_config_w25q80bv,
.start = spi_ssp_start,
@ -122,7 +122,7 @@ spi_t spi_ssp0 = {
};
w25q80bv_driver_t spi_flash = {
.spi = &spi_ssp0,
.bus = &spi_bus_ssp0,
.target_init = w25q80bv_target_init,
};
@ -603,12 +603,12 @@ void cpu_clock_pll1_max_speed(void)
void ssp1_set_mode_max2837(void)
{
spi_start(max2837.spi, &ssp_config_max2837);
spi_bus_start(max2837.bus, &ssp_config_max2837);
}
void ssp1_set_mode_max5864(void)
{
spi_start(max5864.spi, &ssp_config_max5864);
spi_bus_start(max5864.bus, &ssp_config_max5864);
}
void pin_setup(void) {
@ -652,8 +652,8 @@ void pin_setup(void) {
/* GPIO3[6] on P6_10 as output. */
GPIO3_DIR |= PIN_EN1V8;
spi_start(&spi_ssp1, &ssp_config_max2837);
spi_start(&rffc5071_spi, NULL);
spi_bus_start(&spi_bus_ssp1, &ssp_config_max2837);
spi_bus_start(&spi_bus_rffc5071, NULL);
rf_path_pin_setup();

4
firmware/common/max2837.c
View File

@ -121,13 +121,13 @@ void max2837_setup(max2837_driver_t* const drv)
static uint16_t max2837_read(max2837_driver_t* const drv, uint8_t r) {
uint16_t value = (1 << 15) | (r << 10);
spi_transfer(drv->spi, &value, 1);
spi_bus_transfer(drv->bus, &value, 1);
return value & 0x3ff;
}
static void max2837_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) {
uint16_t value = (r << 10) | (v & 0x3ff);
spi_transfer(drv->spi, &value, 1);
spi_bus_transfer(drv->bus, &value, 1);
}
uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r)

4
firmware/common/max2837.h
View File

@ -26,7 +26,7 @@
#include <stdint.h>
#include <stdbool.h>
#include "spi.h"
#include "spi_bus.h"
/* 32 registers, each containing 10 bits of data. */
#define MAX2837_NUM_REGS 32
@ -43,7 +43,7 @@ struct max2837_driver_t;
typedef struct max2837_driver_t max2837_driver_t;
struct max2837_driver_t {
spi_t* const spi;
spi_bus_t* const bus;
void (*target_init)(max2837_driver_t* const drv);
void (*set_mode)(max2837_driver_t* const drv, const max2837_mode_t new_mode);
max2837_mode_t mode;

8
firmware/common/max2837_target.c
View File

@ -82,13 +82,13 @@ void max2837_target_init(max2837_driver_t* const drv) {
#endif
}
void max2837_target_spi_select(spi_t* const spi) {
(void)spi;
void max2837_target_spi_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
}
void max2837_target_spi_unselect(spi_t* const spi) {
(void)spi;
void max2837_target_spi_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
}

6
firmware/common/max2837_target.h
View File

@ -24,12 +24,12 @@
#define __MAX2837_TARGET_H
#include "max2837.h"
#include "spi.h"
#include "spi_bus.h"
void max2837_target_init(max2837_driver_t* const drv);
void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode);
void max2837_target_spi_select(spi_t* const spi);
void max2837_target_spi_unselect(spi_t* const spi);
void max2837_target_spi_select(spi_bus_t* const bus);
void max2837_target_spi_unselect(spi_bus_t* const bus);
#endif // __MAX2837_TARGET_H

2
firmware/common/max5864.c
View File

@ -24,7 +24,7 @@
#include "max5864.h"
static void max5864_write(max5864_driver_t* const drv, uint8_t value) {
spi_transfer(drv->spi, &value, 1);
spi_bus_transfer(drv->bus, &value, 1);
}
static void max5864_init(max5864_driver_t* const drv) {

4
firmware/common/max5864.h
View File

@ -22,13 +22,13 @@
#ifndef __MAX5864_H
#define __MAX5864_H
#include "spi.h"
#include "spi_bus.h"
struct max5864_driver_t;
typedef struct max5864_driver_t max5864_driver_t;
struct max5864_driver_t {
spi_t* const spi;
spi_bus_t* const bus;
void (*target_init)(max5864_driver_t* const drv);
};

8
firmware/common/max5864_target.c
View File

@ -42,12 +42,12 @@ void max5864_target_init(max5864_driver_t* const drv) {
GPIO_DIR(PORT_AD_CS) |= PIN_AD_CS;
}
void max5864_target_spi_select(spi_t* const spi) {
(void)spi;
void max5864_target_spi_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_AD_CS, PIN_AD_CS);
}
void max5864_target_spi_unselect(spi_t* const spi) {
(void)spi;
void max5864_target_spi_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_AD_CS, PIN_AD_CS);
}

6
firmware/common/max5864_target.h
View File

@ -23,10 +23,10 @@
#define __MAX5864_TARGET_H__
#include "max5864.h"
#include "spi.h"
#include "spi_bus.h"
void max5864_target_init(max5864_driver_t* const drv);
void max5864_target_spi_select(spi_t* const spi);
void max5864_target_spi_unselect(spi_t* const spi);
void max5864_target_spi_select(spi_bus_t* const bus);
void max5864_target_spi_unselect(spi_bus_t* const bus);
#endif/*__MAX5864_TARGET_H__*/

4
firmware/common/rffc5071.c
View File

@ -121,7 +121,7 @@ static uint16_t rffc5071_spi_read(rffc5071_driver_t* const drv, uint8_t r) {
(void)drv;
uint16_t data[] = { 0x80 | (r & 0x7f), 0xffff };
spi_transfer(drv->spi, data, 2);
spi_bus_transfer(drv->bus, data, 2);
return data[1];
}
@ -129,7 +129,7 @@ static void rffc5071_spi_write(rffc5071_driver_t* const drv, uint8_t r, uint16_t
(void)drv;
uint16_t data[] = { 0x00 | (r & 0x7f), v };
spi_transfer(drv->spi, data, 2);
spi_bus_transfer(drv->bus, data, 2);
}
uint16_t rffc5071_reg_read(rffc5071_driver_t* const drv, uint8_t r)

4
firmware/common/rffc5071.h
View File

@ -25,13 +25,13 @@
#include <stdint.h>
#include "spi.h"
#include "spi_bus.h"
/* 31 registers, each containing 16 bits of data. */
#define RFFC5071_NUM_REGS 31
typedef struct {
spi_t* const spi;
spi_bus_t* const bus;
uint16_t regs[RFFC5071_NUM_REGS];
uint32_t regs_dirty;
} rffc5071_driver_t;

92
firmware/common/rffc5071_spi.c
View File

@ -24,51 +24,51 @@
#include <libopencm3/lpc43xx/gpio.h>
#include "hackrf_core.h"
static void rffc5071_spi_target_select(spi_t* const spi) {
(void)spi;
static void rffc5071_spi_target_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_MIXER_ENX, PIN_MIXER_ENX);
}
static void rffc5071_spi_target_unselect(spi_t* const spi) {
(void)spi;
static void rffc5071_spi_target_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_MIXER_ENX, PIN_MIXER_ENX);
}
static void rffc5071_spi_direction_out(spi_t* const spi) {
(void)spi;
static void rffc5071_spi_direction_out(spi_bus_t* const bus) {
(void)bus;
GPIO_DIR(PORT_MIXER_SDATA) |= PIN_MIXER_SDATA;
}
static void rffc5071_spi_direction_in(spi_t* const spi) {
(void)spi;
static void rffc5071_spi_direction_in(spi_bus_t* const bus) {
(void)bus;
GPIO_DIR(PORT_MIXER_SDATA) &= ~PIN_MIXER_SDATA;
}
static void rffc5071_spi_data_out(spi_t* const spi, const bool bit) {
(void)spi;
static void rffc5071_spi_data_out(spi_bus_t* const bus, const bool bit) {
(void)bus;
if (bit)
gpio_set(PORT_MIXER_SDATA, PIN_MIXER_SDATA);
else
gpio_clear(PORT_MIXER_SDATA, PIN_MIXER_SDATA);
}
static bool rffc5071_spi_data_in(spi_t* const spi) {
(void)spi;
static bool rffc5071_spi_data_in(spi_bus_t* const bus) {
(void)bus;
return MIXER_SDATA_STATE;
}
static void rffc5071_spi_bus_init(spi_t* const spi) {
static void rffc5071_spi_bus_init(spi_bus_t* const bus) {
scu_pinmux(SCU_MIXER_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_MIXER_SDATA, SCU_GPIO_FAST);
GPIO_DIR(PORT_MIXER_SCLK) |= PIN_MIXER_SCLK;
rffc5071_spi_direction_out(spi);
rffc5071_spi_direction_out(bus);
gpio_clear(PORT_MIXER_SCLK, PIN_MIXER_SCLK);
gpio_clear(PORT_MIXER_SDATA, PIN_MIXER_SDATA);
}
static void rffc5071_spi_target_init(spi_t* const spi) {
static void rffc5071_spi_target_init(spi_bus_t* const bus) {
/* Configure GPIO pins. */
scu_pinmux(SCU_MIXER_ENX, SCU_GPIO_FAST);
scu_pinmux(SCU_MIXER_RESETX, SCU_GPIO_FAST);
@ -78,49 +78,49 @@ static void rffc5071_spi_target_init(spi_t* const spi) {
GPIO_DIR(PORT_MIXER_RESETX) |= PIN_MIXER_RESETX;
/* set to known state */
rffc5071_spi_target_unselect(spi);
rffc5071_spi_target_unselect(bus);
gpio_set(PORT_MIXER_RESETX, PIN_MIXER_RESETX); /* active low */
}
void rffc5071_spi_start(spi_t* const spi, const void* const config) {
void rffc5071_spi_start(spi_bus_t* const bus, const void* const config) {
(void)config;
rffc5071_spi_bus_init(spi);
rffc5071_spi_target_init(spi);
rffc5071_spi_bus_init(bus);
rffc5071_spi_target_init(bus);
}
void rffc5071_spi_stop(spi_t* const spi) {
(void)spi;
void rffc5071_spi_stop(spi_bus_t* const bus) {
(void)bus;
}
static void rffc5071_spi_serial_delay(spi_t* const spi) {
(void)spi;
static void rffc5071_spi_serial_delay(spi_bus_t* const bus) {
(void)bus;
volatile uint32_t i;
for (i = 0; i < 2; i++)
__asm__("nop");
}
static void rffc5071_spi_sck(spi_t* const spi) {
rffc5071_spi_serial_delay(spi);
static void rffc5071_spi_sck(spi_bus_t* const bus) {
rffc5071_spi_serial_delay(bus);
gpio_set(PORT_MIXER_SCLK, PIN_MIXER_SCLK);
rffc5071_spi_serial_delay(spi);
rffc5071_spi_serial_delay(bus);
gpio_clear(PORT_MIXER_SCLK, PIN_MIXER_SCLK);
}
static uint32_t rffc5071_spi_exchange_bit(spi_t* const spi, const uint32_t bit) {
rffc5071_spi_data_out(spi, bit);
rffc5071_spi_sck(spi);
return rffc5071_spi_data_in(spi) ? 1 : 0;
static uint32_t rffc5071_spi_exchange_bit(spi_bus_t* const bus, const uint32_t bit) {
rffc5071_spi_data_out(bus, bit);
rffc5071_spi_sck(bus);
return rffc5071_spi_data_in(bus) ? 1 : 0;
}
static uint32_t rffc5071_spi_exchange_word(spi_t* const spi, const uint32_t data, const size_t count) {
static uint32_t rffc5071_spi_exchange_word(spi_bus_t* const bus, const uint32_t data, const size_t count) {
size_t bits = count;
const uint32_t msb = 1UL << (count - 1);
uint32_t t = data;
while (bits--) {
t = (t << 1) | rffc5071_spi_exchange_bit(spi, t & msb);
t = (t << 1) | rffc5071_spi_exchange_bit(bus, t & msb);
}
return t & ((1UL << count) - 1);
@ -142,7 +142,7 @@ static uint32_t rffc5071_spi_exchange_word(spi_t* const spi, const uint32_t data
* next 7 bits are register address,
* next 16 bits are register value.
*/
void rffc5071_spi_transfer(spi_t* const spi, void* const _data, const size_t count) {
void rffc5071_spi_transfer(spi_bus_t* const bus, void* const _data, const size_t count) {
if( count != 2 ) {
return;
}
@ -155,31 +155,31 @@ void rffc5071_spi_transfer(spi_t* const spi, void* const _data, const size_t cou
* The device requires two clocks while ENX is high before a serial
* transaction. This is not clearly documented.
*/
rffc5071_spi_sck(spi);
rffc5071_spi_sck(spi);
rffc5071_spi_sck(bus);
rffc5071_spi_sck(bus);
rffc5071_spi_target_select(spi);
data[0] = rffc5071_spi_exchange_word(spi, data[0], 9);
rffc5071_spi_target_select(bus);
data[0] = rffc5071_spi_exchange_word(bus, data[0], 9);
if( direction_read ) {
rffc5071_spi_direction_in(spi);
rffc5071_spi_sck(spi);
rffc5071_spi_direction_in(bus);
rffc5071_spi_sck(bus);
}
data[1] = rffc5071_spi_exchange_word(spi, data[1], 16);
data[1] = rffc5071_spi_exchange_word(bus, data[1], 16);
rffc5071_spi_serial_delay(spi);
rffc5071_spi_target_unselect(spi);
rffc5071_spi_direction_out(spi);
rffc5071_spi_serial_delay(bus);
rffc5071_spi_target_unselect(bus);
rffc5071_spi_direction_out(bus);
/*
* The device requires a clock while ENX is high after a serial
* transaction. This is not clearly documented.
*/
rffc5071_spi_sck(spi);
rffc5071_spi_sck(bus);
}
void rffc5071_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfer, const size_t count) {
void rffc5071_spi_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfer, const size_t count) {
if( count == 1 ) {
rffc5071_spi_transfer(spi, transfer[0].data, transfer[0].count);
rffc5071_spi_transfer(bus, transfer[0].data, transfer[0].count);
}
}

10
firmware/common/rffc5071_spi.h
View File

@ -23,11 +23,11 @@
#ifndef __RFFC5071_SPI_H
#define __RFFC5071_SPI_H
#include "spi.h"
#include "spi_bus.h"
void rffc5071_spi_start(spi_t* const spi, const void* const config);
void rffc5071_spi_stop(spi_t* const spi);
void rffc5071_spi_transfer(spi_t* const spi, void* const data, const size_t count);
void rffc5071_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfer, const size_t count);
void rffc5071_spi_start(spi_bus_t* const bus, const void* const config);
void rffc5071_spi_stop(spi_bus_t* const bus);
void rffc5071_spi_transfer(spi_bus_t* const bus, void* const data, const size_t count);
void rffc5071_spi_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfer, const size_t count);
#endif // __RFFC5071_SPI_H

2
firmware/common/rom_iap.c
View File

@ -77,7 +77,7 @@ isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res)
Alternative way to retrieve Part Id on MCU with no IAP
Read Serial No => Read Unique ID in SPIFI (only compatible with W25Q80BV
*/
spi_start(spi_flash.spi, &ssp_config_w25q80bv);
spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv);
w25q80bv_setup(&spi_flash);
switch(iap_cmd_res->cmd_param.command_code)

18
firmware/common/spi.c → firmware/common/spi_bus.c
View File

@ -19,20 +19,20 @@
* Boston, MA 02110-1301, USA.
*/
#include "spi.h"
#include "spi_bus.h"
void spi_start(spi_t* const spi, const void* const config) {
spi->start(spi, config);
void spi_bus_start(spi_bus_t* const bus, const void* const config) {
bus->start(bus, config);
}
void spi_stop(spi_t* const spi) {
spi->stop(spi);
void spi_bus_stop(spi_bus_t* const bus) {
bus->stop(bus);
}
void spi_transfer(spi_t* const spi, void* const data, const size_t count) {
spi->transfer(spi, data, count);
void spi_bus_transfer(spi_bus_t* const bus, void* const data, const size_t count) {
bus->transfer(bus, data, count);
}
void spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
spi->transfer_gather(spi, transfers, count);
void spi_bus_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count) {
bus->transfer_gather(bus, transfers, count);
}

28
firmware/common/spi.h → firmware/common/spi_bus.h
View File

@ -19,8 +19,8 @@
* Boston, MA 02110-1301, USA.
*/
#ifndef __SPI_H__
#define __SPI_H__
#ifndef __SPI_BUS_H__
#define __SPI_BUS_H__
#include <stddef.h>
@ -29,21 +29,21 @@ typedef struct {
const size_t count;
} spi_transfer_t;
struct spi_t;
typedef struct spi_t spi_t;
struct spi_bus_t;
typedef struct spi_bus_t spi_bus_t;
struct spi_t {
struct spi_bus_t {
void* const obj;
const void* config;
void (*start)(spi_t* const spi, const void* const config);
void (*stop)(spi_t* const spi);
void (*transfer)(spi_t* const spi, void* const data, const size_t count);
void (*transfer_gather)(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
void (*start)(spi_bus_t* const bus, const void* const config);
void (*stop)(spi_bus_t* const bus);
void (*transfer)(spi_bus_t* const bus, void* const data, const size_t count);
void (*transfer_gather)(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count);
};
void spi_start(spi_t* const spi, const void* const config);
void spi_stop(spi_t* const spi);
void spi_transfer(spi_t* const spi, void* const data, const size_t count);
void spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
void spi_bus_start(spi_bus_t* const bus, const void* const config);
void spi_bus_stop(spi_bus_t* const bus);
void spi_bus_transfer(spi_bus_t* const bus, void* const data, const size_t count);
void spi_bus_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count);
#endif/*__SPI_H__*/
#endif/*__SPI_BUS_H__*/

60
firmware/common/spi_ssp.c
View File

@ -24,83 +24,83 @@
#include <libopencm3/lpc43xx/rgu.h>
#include <libopencm3/lpc43xx/ssp.h>
void spi_ssp_start(spi_t* const spi, const void* const _config) {
void spi_ssp_start(spi_bus_t* const bus, const void* const _config) {
const ssp_config_t* const config = _config;
if( spi->obj == (void*)SSP0_BASE ) {
if( bus->obj == (void*)SSP0_BASE ) {
/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
}
SSP_CR1(spi->obj) = 0;
SSP_CPSR(spi->obj) = config->clock_prescale_rate;
SSP_CR0(spi->obj) =
SSP_CR1(bus->obj) = 0;
SSP_CPSR(bus->obj) = config->clock_prescale_rate;
SSP_CR0(bus->obj) =
(config->serial_clock_rate << 8)
| SSP_CPOL_0_CPHA_0
| SSP_FRAME_SPI
| config->data_bits
;
SSP_CR1(spi->obj) =
SSP_CR1(bus->obj) =
SSP_SLAVE_OUT_ENABLE
| SSP_MASTER
| SSP_ENABLE
| SSP_MODE_NORMAL
;
spi->config = config;
bus->config = config;
}
void spi_ssp_stop(spi_t* const spi) {
SSP_CR1(spi->obj) = 0;
void spi_ssp_stop(spi_bus_t* const bus) {
SSP_CR1(bus->obj) = 0;
}
static void spi_ssp_wait_for_tx_fifo_not_full(spi_t* const spi) {
while( (SSP_SR(spi->obj) & SSP_SR_TNF) == 0 );
static void spi_ssp_wait_for_tx_fifo_not_full(spi_bus_t* const bus) {
while( (SSP_SR(bus->obj) & SSP_SR_TNF) == 0 );
}
static void spi_ssp_wait_for_rx_fifo_not_empty(spi_t* const spi) {
while( (SSP_SR(spi->obj) & SSP_SR_RNE) == 0 );
static void spi_ssp_wait_for_rx_fifo_not_empty(spi_bus_t* const bus) {
while( (SSP_SR(bus->obj) & SSP_SR_RNE) == 0 );
}
static void spi_ssp_wait_for_not_busy(spi_t* const spi) {
while( SSP_SR(spi->obj) & SSP_SR_BSY );
static void spi_ssp_wait_for_not_busy(spi_bus_t* const bus) {
while( SSP_SR(bus->obj) & SSP_SR_BSY );
}
static uint32_t spi_ssp_transfer_word(spi_t* const spi, const uint32_t data) {
spi_ssp_wait_for_tx_fifo_not_full(spi);
SSP_DR(spi->obj) = data;
spi_ssp_wait_for_not_busy(spi);
spi_ssp_wait_for_rx_fifo_not_empty(spi);
return SSP_DR(spi->obj);
static uint32_t spi_ssp_transfer_word(spi_bus_t* const bus, const uint32_t data) {
spi_ssp_wait_for_tx_fifo_not_full(bus);
SSP_DR(bus->obj) = data;
spi_ssp_wait_for_not_busy(bus);
spi_ssp_wait_for_rx_fifo_not_empty(bus);
return SSP_DR(bus->obj);
}
void spi_ssp_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
const ssp_config_t* const config = spi->config;
void spi_ssp_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count) {
const ssp_config_t* const config = bus->config;
const bool word_size_u16 = (SSP_CR0(spi->obj) & 0xf) > SSP_DATA_8BITS;
const bool word_size_u16 = (SSP_CR0(bus->obj) & 0xf) > SSP_DATA_8BITS;
config->select(spi);
config->select(bus);
for(size_t i=0; i<count; i++) {
const size_t data_count = transfers[i].count;
if( word_size_u16 ) {
uint16_t* const data = transfers[i].data;
for(size_t j=0; j<data_count; j++) {
data[j] = spi_ssp_transfer_word(spi, data[j]);
data[j] = spi_ssp_transfer_word(bus, data[j]);
}
} else {
uint8_t* const data = transfers[i].data;
for(size_t j=0; j<data_count; j++) {
data[j] = spi_ssp_transfer_word(spi, data[j]);
data[j] = spi_ssp_transfer_word(bus, data[j]);
}
}
}
config->unselect(spi);
config->unselect(bus);
}
void spi_ssp_transfer(spi_t* const spi, void* const data, const size_t count) {
void spi_ssp_transfer(spi_bus_t* const bus, void* const data, const size_t count) {
const spi_transfer_t transfers[] = {
{ data, count },
};
spi_ssp_transfer_gather(spi, transfers, 1);
spi_ssp_transfer_gather(bus, transfers, 1);
}

14
firmware/common/spi_ssp.h
View File

@ -25,7 +25,7 @@
#include <stdint.h>
#include <stddef.h>
#include "spi.h"
#include "spi_bus.h"
#include <libopencm3/lpc43xx/ssp.h>
@ -33,13 +33,13 @@ typedef struct ssp_config_t {
ssp_datasize_t data_bits;
uint8_t serial_clock_rate;
uint8_t clock_prescale_rate;
void (*select)(spi_t* const spi);
void (*unselect)(spi_t* const spi);
void (*select)(spi_bus_t* const bus);
void (*unselect)(spi_bus_t* const bus);
} ssp_config_t;
void spi_ssp_start(spi_t* const spi, const void* const config);
void spi_ssp_stop(spi_t* const spi);
void spi_ssp_transfer(spi_t* const spi, void* const data, const size_t count);
void spi_ssp_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
void spi_ssp_start(spi_bus_t* const bus, const void* const config);
void spi_ssp_stop(spi_bus_t* const bus);
void spi_ssp_transfer(spi_bus_t* const bus, void* const data, const size_t count);
void spi_ssp_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count);
#endif/*__SPI_SSP_H__*/

12
firmware/common/w25q80bv.c
View File

@ -69,7 +69,7 @@ void w25q80bv_setup(w25q80bv_driver_t* const drv)
uint8_t w25q80bv_get_status(w25q80bv_driver_t* const drv)
{
uint8_t data[] = { W25Q80BV_READ_STATUS1, 0xFF };
spi_transfer(drv->spi, data, ARRAY_SIZE(data));
spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
return data[1];
}
@ -80,7 +80,7 @@ uint8_t w25q80bv_get_device_id(w25q80bv_driver_t* const drv)
W25Q80BV_DEVICE_ID,
0xFF, 0xFF, 0xFF, 0xFF
};
spi_transfer(drv->spi, data, ARRAY_SIZE(data));
spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
return data[4];
}
@ -91,7 +91,7 @@ void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t*
0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
};
spi_transfer(drv->spi, data, ARRAY_SIZE(data));
spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
for(size_t i=0; i<8; i++) {
unique_id->id_8b[i] = data[5+i];
@ -108,7 +108,7 @@ void w25q80bv_write_enable(w25q80bv_driver_t* const drv)
w25q80bv_wait_while_busy(drv);
uint8_t data[] = { W25Q80BV_WRITE_ENABLE };
spi_transfer(drv->spi, data, ARRAY_SIZE(data));
spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
}
void w25q80bv_chip_erase(w25q80bv_driver_t* const drv)
@ -125,7 +125,7 @@ void w25q80bv_chip_erase(w25q80bv_driver_t* const drv)
w25q80bv_wait_while_busy(drv);
uint8_t data[] = { W25Q80BV_CHIP_ERASE };
spi_transfer(drv->spi, data, ARRAY_SIZE(data));
spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data));
}
/* write up a 256 byte page or partial page */
@ -154,7 +154,7 @@ static void w25q80bv_page_program(w25q80bv_driver_t* const drv, const uint32_t a
{ data, len }
};
spi_transfer_gather(drv->spi, transfers, ARRAY_SIZE(transfers));
spi_bus_transfer_gather(drv->bus, transfers, ARRAY_SIZE(transfers));
}
/* write an arbitrary number of bytes */

4
firmware/common/w25q80bv.h
View File

@ -27,7 +27,7 @@
#include <stdint.h>
#include <stddef.h>
#include "spi.h"
#include "spi_bus.h"
typedef union
{
@ -40,7 +40,7 @@ struct w25q80bv_driver_t;
typedef struct w25q80bv_driver_t w25q80bv_driver_t;
struct w25q80bv_driver_t {
spi_t* spi;
spi_bus_t* bus;
void (*target_init)(w25q80bv_driver_t* const drv);
size_t page_len;
size_t num_pages;

8
firmware/common/w25q80bv_target.c
View File

@ -59,12 +59,12 @@ void w25q80bv_target_init(w25q80bv_driver_t* const drv) {
GPIO5_DIR |= PIN_SSP0_SSEL;
}
void w25q80bv_target_spi_select(spi_t* const spi) {
(void)spi;
void w25q80bv_target_spi_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
}
void w25q80bv_target_spi_unselect(spi_t* const spi) {
(void)spi;
void w25q80bv_target_spi_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
}

6
firmware/common/w25q80bv_target.h
View File

@ -23,10 +23,10 @@
#define __W25Q80BV_TARGET_H__
#include "w25q80bv.h"
#include "spi.h"
#include "spi_bus.h"
void w25q80bv_target_init(w25q80bv_driver_t* const drv);
void w25q80bv_target_spi_select(spi_t* const spi);
void w25q80bv_target_spi_unselect(spi_t* const spi);
void w25q80bv_target_spi_select(spi_bus_t* const bus);
void w25q80bv_target_spi_unselect(spi_bus_t* const bus);
#endif/*__W25Q80BV_TARGET_H__*/

2
firmware/hackrf-common.cmake
View File

@ -142,7 +142,7 @@ macro(DeclareTargets)
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv.c
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_target.c
${PATH_HACKRF_FIRMWARE_COMMON}/spi.c
${PATH_HACKRF_FIRMWARE_COMMON}/spi_bus.c
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp.c
m0_bin.s
)

4
firmware/hackrf_usb/usb_api_spiflash.c
View File

@ -39,7 +39,7 @@ usb_request_status_t usb_vendor_request_erase_spiflash(
//FIXME This should refuse to run if executing from SPI flash.
if (stage == USB_TRANSFER_STAGE_SETUP) {
spi_start(spi_flash.spi, &ssp_config_w25q80bv);
spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv);
w25q80bv_setup(&spi_flash);
/* only chip erase is implemented */
w25q80bv_chip_erase(&spi_flash);
@ -66,7 +66,7 @@ usb_request_status_t usb_vendor_request_write_spiflash(
} else {
usb_transfer_schedule_block(endpoint->out, &spiflash_buffer[0], len,
NULL, NULL);
spi_start(spi_flash.spi, &ssp_config_w25q80bv);
spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv);
w25q80bv_setup(&spi_flash);
return USB_REQUEST_STATUS_OK;
}