From e9236e50c2f6d5fb699e289ff95d1b264de4133d Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Wed, 11 Sep 2013 16:21:16 -0700 Subject: [PATCH] Fix CPLD constraint to assume SGPIO frequency of 40MHz, not 20MHz. --- firmware/cpld/sgpio_if/top.ucf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/cpld/sgpio_if/top.ucf b/firmware/cpld/sgpio_if/top.ucf index b446469d..f3b7b65b 100755 --- a/firmware/cpld/sgpio_if/top.ucf +++ b/firmware/cpld/sgpio_if/top.ucf @@ -23,7 +23,7 @@ NET "CODEC_X2_CLK" LOC="27" |IOSTANDARD=LVCMOS33; #NET "GCLK0" LOC="22" |IOSTANDARD=LVCMOS33; NET "CODEC_X2_CLK" TNM_NET = CODEC_X2_CLK; -TIMESPEC TS_codec_x2_data = PERIOD "CODEC_X2_CLK" 50 ns; +TIMESPEC TS_codec_x2_data = PERIOD "CODEC_X2_CLK" 25 ns; NET "DA<7>" LOC="35" |IOSTANDARD=LVCMOS33; NET "DA<6>" LOC="36" |IOSTANDARD=LVCMOS33;