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Merge pull request #43 from TitanMKD/master

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HackRF IQ fix for CPLD and LPC4330 usb_performance
This commit is contained in:
Michael Ossmann
2013-04-04 11:16:41 -07:00
parent 978663d707 b8590db02a
commit e900252d28
15 changed files with 5109 additions and 3413 deletions
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97
firmware/common/sgpio.c
View File

@ -1,5 +1,6 @@
/* /*
* Copyright 2012 Jared Boone <jared@sharebrained.com> * Copyright 2012 Jared Boone <jared@sharebrained.com>
* Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
* *
* This file is part of HackRF. * This file is part of HackRF.
* *
@ -89,6 +90,19 @@ void sgpio_test_interface() {
} }
} }
/*
SGPIO0 to 7 = DAC/ADC data bits 0 to 7 (Nota: DAC is 10bits but only bit9 to bit2 are used bit1 & 0 are forced to 0 by CPLD)
ADC=> CLK x 2=CLKx2 with CLKx2(0)rising=D0Q, CLKx2(1)rising=D1I (corresponds to CLK(0)falling+tD0Q=>D0Q, CLK(1)rising+tDOI=>D1I, CLK(1)falling+tD0Q=>D1Q, CLK(1)rising+tDOI=>D2I ...)
tDOI(CLK Rise to I-ADC Channel-I Output Data Valid)=7.4 to 9ns, tD0Q(CLK Fall to Q-ADC Channel-Q Output Data Valid)=6.9 to 9ns
DAC=> CLK x 2=CLKx2 with CLKx2(0)rising=Q:N-2, CLKx2(1)rising=I:N-1(corresponds to CLK(0)rising=>Q:N-2, CLK(0)falling I:N-1, CLK(1)rising=>Q:N-1, CLK(1)falling I:N ...)
tDSI(I-DAC Data to CLK Fall Setup Time)=min 10ns, tDSQ(Q-DAC Data to CLK Rise Setup Time)=min 10ns
SGPIO8 Clock Input (External Clock)
SGPIO9 Capture Input (Capture/ChipSelect, 1=Enable Capture, 0=Disable capture)
SGPIO10 Disable Output (1/High=Disable codec data stream, 0/Low=Enable codec data stream)
SGPIO11 Direction Output (1/High=TX mode LPC43xx=>CPLD=>DAC, 0/Low=RX mode LPC43xx<=CPLD<=ADC)
*/
void sgpio_configure( void sgpio_configure(
const transceiver_mode_t transceiver_mode, const transceiver_mode_t transceiver_mode,
const bool multi_slice const bool multi_slice
@ -102,8 +116,8 @@ void sgpio_configure(
const uint_fast8_t cpld_direction = const uint_fast8_t cpld_direction =
(transceiver_mode == TRANSCEIVER_MODE_TX) ? 1 : 0; (transceiver_mode == TRANSCEIVER_MODE_TX) ? 1 : 0;
SGPIO_GPIO_OUTREG = SGPIO_GPIO_OUTREG =
(cpld_direction << 11) (cpld_direction << 11) /* 1=Output SGPIO11 High(TX mode), 0=Output SGPIO11 Low(RX mode)*/
| (1L << 10) // disable | (1L << 10) // disable codec data stream during configuration (Output SGPIO10 High)
; ;
// Enable SGPIO pin outputs. // Enable SGPIO pin outputs.
@ -112,37 +126,38 @@ void sgpio_configure(
? (0xFF << 0) ? (0xFF << 0)
: (0x00 << 0); : (0x00 << 0);
SGPIO_GPIO_OENREG = SGPIO_GPIO_OENREG =
(1L << 11) // direction (1L << 11) // direction output SGPIO11 active
| (1L << 10) // disable | (1L << 10) // disable output SGPIO10 active
| (0L << 9) // capture | (0L << 9) // capture input SGPIO9 (output i is tri-stated)
| (0L << 8) // clock | (0L << 8) // clock input SGPIO8 (output i is tri-stated)
| sgpio_gpio_data_direction | sgpio_gpio_data_direction // 0xFF=Output all SGPIO High(TX mode), 0x00=Output all SPGIO Low(RX mode)
; ;
SGPIO_OUT_MUX_CFG( 8) = // SGPIO: Input: clock SGPIO_OUT_MUX_CFG( 8) = // SGPIO8: Input: clock
SGPIO_OUT_MUX_CFG_P_OE_CFG(0) SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
| SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) /* 0x0 dout_doutm1 (1-bit mode) */
; ;
SGPIO_OUT_MUX_CFG( 9) = // SGPIO: Input: qualifier SGPIO_OUT_MUX_CFG( 9) = // SGPIO9: Input: qualifier
SGPIO_OUT_MUX_CFG_P_OE_CFG(0) SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
| SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) /* 0x0 dout_doutm1 (1-bit mode) */
; ;
SGPIO_OUT_MUX_CFG(10) = // GPIO: Output: disable SGPIO_OUT_MUX_CFG(10) = // GPIO10: Output: disable
SGPIO_OUT_MUX_CFG_P_OE_CFG(0) SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) | SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) /* 0x4=gpio_out (level set by GPIO_OUTREG) */
; ;
SGPIO_OUT_MUX_CFG(11) = // GPIO: Output: direction SGPIO_OUT_MUX_CFG(11) = // GPIO11: Output: direction
SGPIO_OUT_MUX_CFG_P_OE_CFG(0) SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) | SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) /* 0x4=gpio_out (level set by GPIO_OUTREG) */
; ;
const uint_fast8_t output_multiplexing_mode = const uint_fast8_t output_multiplexing_mode =
multi_slice ? 11 : 9; multi_slice ? 11 : 9;
/* SGPIO0 to SGPIO7 */
for(uint_fast8_t i=0; i<8; i++) { for(uint_fast8_t i=0; i<8; i++) {
// SGPIO pin 0 outputs slice A bit "i". // SGPIO pin 0 outputs slice A bit "i".
SGPIO_OUT_MUX_CFG(i) = SGPIO_OUT_MUX_CFG(i) =
SGPIO_OUT_MUX_CFG_P_OE_CFG(0) SGPIO_OUT_MUX_CFG_P_OE_CFG(0)
| SGPIO_OUT_MUX_CFG_P_OUT_CFG(output_multiplexing_mode) | SGPIO_OUT_MUX_CFG_P_OUT_CFG(output_multiplexing_mode) /* 11/0xB=dout_doutm8c (8-bit mode 8c)(multislice L0/7, N0/7), 9=dout_doutm8a (8-bit mode 8a)(A0/7,B0/7) */
; ;
} }
@ -162,32 +177,34 @@ void sgpio_configure(
const uint_fast8_t slice_count = multi_slice ? 8 : 1; const uint_fast8_t slice_count = multi_slice ? 8 : 1;
uint32_t slice_enable_mask = 0; uint32_t slice_enable_mask = 0;
for(uint_fast8_t i=0; i<slice_count; i++) { /* Configure Slice A, I, E, J, C, K, F, L (multi_slice mode) */
for(uint_fast8_t i=0; i<slice_count; i++)
{
const uint_fast8_t slice_index = slice_indices[i]; const uint_fast8_t slice_index = slice_indices[i];
const bool input_slice = (i == 0) && (transceiver_mode == TRANSCEIVER_MODE_RX); const bool input_slice = (i == 0) && (transceiver_mode == TRANSCEIVER_MODE_RX); /* Only for slice0/A and RX mode set input_slice to 1 */
const uint_fast8_t concat_order = (input_slice || single_slice) ? 0 : 3; const uint_fast8_t concat_order = (input_slice || single_slice) ? 0 : 3; /* 0x0=Self-loop(slice0/A RX mode), 0x3=8 slices */
const uint_fast8_t concat_enable = (input_slice || single_slice) ? 0 : 1; const uint_fast8_t concat_enable = (input_slice || single_slice) ? 0 : 1; /* 0x0=External data pin(slice0/A RX mode), 0x1=Concatenate data */
const uint_fast8_t clk_capture_mode = (transceiver_mode == TRANSCEIVER_MODE_RX) ? 1 : 0; const uint_fast8_t clk_capture_mode = (transceiver_mode == TRANSCEIVER_MODE_RX) ? 1 : 0;
SGPIO_MUX_CFG(slice_index) = SGPIO_MUX_CFG(slice_index) =
SGPIO_MUX_CFG_CONCAT_ORDER(concat_order) SGPIO_MUX_CFG_CONCAT_ORDER(concat_order)
| SGPIO_MUX_CFG_CONCAT_ENABLE(concat_enable) | SGPIO_MUX_CFG_CONCAT_ENABLE(concat_enable)
| SGPIO_MUX_CFG_QUALIFIER_SLICE_MODE(0) | SGPIO_MUX_CFG_QUALIFIER_SLICE_MODE(0) /* Select qualifier slice A(0x0) */
| SGPIO_MUX_CFG_QUALIFIER_PIN_MODE(1) | SGPIO_MUX_CFG_QUALIFIER_PIN_MODE(1) /* Select qualifier pin SGPIO9(0x1) */
| SGPIO_MUX_CFG_QUALIFIER_MODE(3) | SGPIO_MUX_CFG_QUALIFIER_MODE(3) /* External SGPIO */
| SGPIO_MUX_CFG_CLK_SOURCE_SLICE_MODE(0) | SGPIO_MUX_CFG_CLK_SOURCE_SLICE_MODE(0) /* Select clock source slice D(0x0) */
| SGPIO_MUX_CFG_CLK_SOURCE_PIN_MODE(0) | SGPIO_MUX_CFG_CLK_SOURCE_PIN_MODE(0) /* Source Clock Pin 0x0 = SGPIO8 */
| SGPIO_MUX_CFG_EXT_CLK_ENABLE(1) | SGPIO_MUX_CFG_EXT_CLK_ENABLE(1) /* External clock signal(pin) selected */
; ;
SGPIO_SLICE_MUX_CFG(slice_index) = SGPIO_SLICE_MUX_CFG(slice_index) =
SGPIO_SLICE_MUX_CFG_INV_QUALIFIER(0) SGPIO_SLICE_MUX_CFG_INV_QUALIFIER(0) /* 0x0=Use normal qualifier. */
| SGPIO_SLICE_MUX_CFG_PARALLEL_MODE(3) | SGPIO_SLICE_MUX_CFG_PARALLEL_MODE(3) /* 0x3=Shift 1 byte(8bits) per clock. */
| SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) /* 0x0=Detect rising edge. (Condition for input bit match interrupt) */
| SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) /* 0x0=Normal clock. */
| SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) /* 0x1=Use external clock from a pin or other slice */
| SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(clk_capture_mode) | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(clk_capture_mode) /* 0x0=Use rising clock edge, 0x1=Use falling clock edge */
| SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) /* 0x0=Do not match data */
; ;
SGPIO_PRESET(slice_index) = 0; // External clock, don't care SGPIO_PRESET(slice_index) = 0; // External clock, don't care
@ -208,14 +225,14 @@ void sgpio_configure(
void sgpio_cpld_stream_enable() { void sgpio_cpld_stream_enable() {
// Enable codec data stream. // Enable codec data stream.
SGPIO_GPIO_OUTREG &= ~(1L << 10); SGPIO_GPIO_OUTREG &= ~(1L << 10); /* SGPIO10 */
} }
void sgpio_cpld_stream_disable() { void sgpio_cpld_stream_disable() {
// Disable codec data stream. // Disable codec data stream.
SGPIO_GPIO_OUTREG |= (1L << 10); SGPIO_GPIO_OUTREG |= (1L << 10); /* SGPIO10 */
} }
bool sgpio_cpld_stream_is_enabled() { bool sgpio_cpld_stream_is_enabled() {
return (SGPIO_GPIO_OUTREG & (1L << 10)) == 0; return (SGPIO_GPIO_OUTREG & (1L << 10)) == 0; /* SGPIO10 */
} }

7843
firmware/cpldjtagprog/sgpio_if_xsvf.h
View File

File diff suppressed because it is too large Load Diff

8
firmware/usb_performance/usb_performance.c
View File

@ -808,20 +808,28 @@ void sgpio_irqhandler() {
if( transceiver_mode == TRANSCEIVER_MODE_RX ) { if( transceiver_mode == TRANSCEIVER_MODE_RX ) {
__asm__( __asm__(
"ldr r0, [%[SGPIO_REG_SS], #44]\n\t" "ldr r0, [%[SGPIO_REG_SS], #44]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #0]\n\t" "str r0, [%[p], #0]\n\t"
"ldr r0, [%[SGPIO_REG_SS], #20]\n\t" "ldr r0, [%[SGPIO_REG_SS], #20]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #4]\n\t" "str r0, [%[p], #4]\n\t"
"ldr r0, [%[SGPIO_REG_SS], #40]\n\t" "ldr r0, [%[SGPIO_REG_SS], #40]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #8]\n\t" "str r0, [%[p], #8]\n\t"
"ldr r0, [%[SGPIO_REG_SS], #8]\n\t" "ldr r0, [%[SGPIO_REG_SS], #8]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #12]\n\t" "str r0, [%[p], #12]\n\t"
"ldr r0, [%[SGPIO_REG_SS], #36]\n\t" "ldr r0, [%[SGPIO_REG_SS], #36]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #16]\n\t" "str r0, [%[p], #16]\n\t"
"ldr r0, [%[SGPIO_REG_SS], #16]\n\t" "ldr r0, [%[SGPIO_REG_SS], #16]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #20]\n\t" "str r0, [%[p], #20]\n\t"
"ldr r0, [%[SGPIO_REG_SS], #32]\n\t" "ldr r0, [%[SGPIO_REG_SS], #32]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #24]\n\t" "str r0, [%[p], #24]\n\t"
"ldr r0, [%[SGPIO_REG_SS], #0]\n\t" "ldr r0, [%[SGPIO_REG_SS], #0]\n\t"
"rev16 r0, r0\n\t" /* Swap QI -> IQ */
"str r0, [%[p], #28]\n\t" "str r0, [%[p], #28]\n\t"
: :
: [SGPIO_REG_SS] "l" (SGPIO_PORT_BASE + 0x100), : [SGPIO_REG_SS] "l" (SGPIO_PORT_BASE + 0x100),

58
hardware/jellybean/sgpio_if/default.svf
View File

@ -1,5 +1,5 @@
// Created using Xilinx Cse Software [ISE - 13.4] // Created using Xilinx Cse Software [ISE - 14.1]
// Date: Thu Feb 14 12:00:19 2013 // Date: Thu Apr 04 19:24:32 2013
TRST OFF; TRST OFF;
ENDIR IDLE; ENDIR IDLE;
@ -164,7 +164,7 @@ SDR 281 TDI (0083c1fffffffffffffffffffffffffffffddf7ffffffffffbfffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (00c2f9fffffffffffffffffffffffffffffddf7fffffffffffffbffffffffffffffffe7f) ; SDR 281 TDI (00c2f9fffffffffffffffffffffffffffffddf7fffffffffffffbffffffffffffffffe7f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (01c201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffffe7c) ; SDR 281 TDI (01c201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffff27c) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0143c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ; SDR 281 TDI (0143c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -184,7 +184,7 @@ SDR 281 TDI (01a2f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (012201fffffffffffffffffffffffffffffd7f7fffffffffffffffffffff7ffffffffe81) ; SDR 281 TDI (012201fffffffffffffffffffffffffffffd7f7fffffffffffffffffffff7ffffffffe81) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0023c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ; SDR 281 TDI (0023c1fffffffffffffffffffffffffffff5ff7ffffffffffffffffffffffffffffff24f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0032f9fffffffffffffffffffffffffffffd7f7fffffeffffffffffffffffffffffffe7c) ; SDR 281 TDI (0032f9fffffffffffffffffffffffffffffd7f7fffffeffffffffffffffffffffffffe7c) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -202,7 +202,7 @@ SDR 281 TDI (0172f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (007201ffffffffffffffffffffffffffffffe587fffffffffffffffffffffffffffffe7c) ; SDR 281 TDI (007201ffffffffffffffffffffffffffffffe587fffffffffffffffffffffffffffffe7c) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0053c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ; SDR 281 TDI (0053c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffea4f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0152f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ; SDR 281 TDI (0152f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -210,9 +210,9 @@ SDR 281 TDI (01d201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (00d3c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ; SDR 281 TDI (00d3c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0092f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ; SDR 281 TDI (0092f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe65) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (019201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ; SDR 281 TDI (019201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0113c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ; SDR 281 TDI (0113c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -254,7 +254,7 @@ SDR 281 TDI (002bc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0128fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) ; SDR 281 TDI (0128fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (01aa01fffff7ffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) ; SDR 281 TDI (01aa01fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (00abc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ; SDR 281 TDI (00abc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -264,7 +264,7 @@ SDR 281 TDI (01e8f9fffbfffffffffffffffffffffffffbbefffffffffffffffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (016bc9fffffffffff7fffffffffffffffffbeefffffffffffffffffffffffffffffffe0f) ; SDR 281 TDI (016bc9fffffffffff7fffffffffffffffffbeefffffffffffffffffffffffffffffffe0f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (0068e1ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe1d) ; SDR 281 TDI (0068e1fffff7fffffffffffffffffffffffffefafffffffffffffffffffffffffffffe1d) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (004ac5ffffffffffffffffffdffffffffffbeefffffffffffffffffffffffffffffffe7c) ; SDR 281 TDI (004ac5ffffffffffffffffffdffffffffffbeefffffffffffffffffffffffffffffffe7c) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -272,7 +272,7 @@ SDR 281 TDI (014bc1ffffffff7ffffffffffffffffffffbeefffffffffffffffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (01cbf9ffffffffffffffffffffffffdffffbeefffffffffffffffffffffffffffffffe1d) ; SDR 281 TDI (01cbf9ffffffffffffffffffffffffdffffbeefffffffffffffffffffffffffffffffe1d) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (00c8f8fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7c) ; SDR 281 TDI (00c8f9ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe7c) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (008bc9ffffffffffffff7ffffffffffffffbbefffffffffffffffffffffffffffffffe0f) ; SDR 281 TDI (008bc9ffffffffffffff7ffffffffffffffbbefffffffffffffffffffffffffffffffe0f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -330,7 +330,7 @@ SDR 281 TDI (017cf9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (007fc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ; SDR 281 TDI (007fc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (005ce1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ; SDR 281 TDI (005ce0fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7d) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
SDR 281 TDI (015ec5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) ; SDR 281 TDI (015ec5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) ;
RUNTEST 10000 TCK; RUNTEST 10000 TCK;
@ -425,7 +425,7 @@ SDR 7 TDI (70) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffff27c) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -505,7 +505,7 @@ SDR 7 TDI (08) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffff5ff7ffffffffffffffffffffffffffffff24f) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -577,7 +577,7 @@ SDR 7 TDI (14) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffea4f) MASK (
03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ; 03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -609,7 +609,7 @@ SDR 7 TDI (24) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe65) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -617,7 +617,7 @@ SDR 7 TDI (64) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -785,7 +785,7 @@ SDR 7 TDI (6a) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffff7ffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -825,7 +825,7 @@ SDR 7 TDI (1a) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe1d) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffff7fffffffffffffffffffffffffefafffffffffffffffffffffffffffffe1d) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -857,7 +857,7 @@ SDR 7 TDI (32) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f8fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe7c) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1089,7 +1089,7 @@ SDR 7 TDI (17) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e0fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7d) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1306,7 +1306,7 @@ SDR 7 TDI (70) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffff27c) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1386,7 +1386,7 @@ SDR 7 TDI (08) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffff5ff7ffffffffffffffffffffffffffffff24f) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1458,7 +1458,7 @@ SDR 7 TDI (14) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffea4f) MASK (
03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ; 03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1490,7 +1490,7 @@ SDR 7 TDI (24) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe65) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1498,7 +1498,7 @@ SDR 7 TDI (64) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1666,7 +1666,7 @@ SDR 7 TDI (6a) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffff7ffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1706,7 +1706,7 @@ SDR 7 TDI (1a) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe1d) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffff7fffffffffffffffffffffffffefafffffffffffffffffffffffffffffe1d) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1738,7 +1738,7 @@ SDR 7 TDI (32) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f8fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7c) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe7c) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;
@ -1970,7 +1970,7 @@ SDR 7 TDI (17) SMASK (7f) ;
RUNTEST DRPAUSE 20 TCK; RUNTEST DRPAUSE 20 TCK;
ENDDR IDLE; ENDDR IDLE;
RUNTEST IDLE 100 TCK; RUNTEST IDLE 100 TCK;
SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e0fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7d) MASK (
03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
RUNTEST 100 TCK; RUNTEST 100 TCK;
ENDDR DRPAUSE; ENDDR DRPAUSE;

BIN
hardware/jellybean/sgpio_if/default.xsvf
View File

Binary file not shown.

16
hardware/jellybean/sgpio_if/sgpio_if.xise
View File

@ -9,22 +9,22 @@
<!-- along with the project source files, is sufficient to open and --> <!-- along with the project source files, is sufficient to open and -->
<!-- implement in ISE Project Navigator. --> <!-- implement in ISE Project Navigator. -->
<!-- --> <!-- -->
<!-- Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. --> <!-- Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. -->
</header> </header>
<version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/> <version xil_pn:ise_version="14.1" xil_pn:schema_version="2"/>
<files> <files>
<file xil_pn:name="top.vhd" xil_pn:type="FILE_VHDL"> <file xil_pn:name="top.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
<association xil_pn:name="Implementation" xil_pn:seqID="1"/> <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
</file> </file>
<file xil_pn:name="top.ucf" xil_pn:type="FILE_UCF">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="top_tb.vhd" xil_pn:type="FILE_VHDL"> <file xil_pn:name="top_tb.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="38"/> <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="2"/>
</file>
<file xil_pn:name="top.ucf" xil_pn:type="FILE_UCF">
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file> </file>
</files> </files>
@ -97,6 +97,9 @@
<property xil_pn:name="Keep Hierarchy" xil_pn:value="No" xil_pn:valueState="default"/> <property xil_pn:name="Keep Hierarchy" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Keep Hierarchy CPLD" xil_pn:value="Yes" xil_pn:valueState="default"/> <property xil_pn:name="Keep Hierarchy CPLD" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/> <property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Strategy" xil_pn:value="Xilinx Default (unlocked)" xil_pn:valueState="default"/>
<property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/> <property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
@ -200,6 +203,7 @@
<property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/> <property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="User Browsed Strategy Files" xil_pn:value="E:/Xilinx/14.1/ISE_DS/ISE/data/default.xds" xil_pn:valueState="non-default"/>
<property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/> <property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/>
<property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/> <property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/>

34
hardware/jellybean/sgpio_if/top.jed
View File

@ -1,5 +1,5 @@
Programmer Jedec Bit Map Programmer Jedec Bit Map
Date Extracted: Thu Feb 14 11:55:50 2013 Date Extracted: Thu Apr 04 19:23:47 2013
QF25812* QF25812*
QP100* QP100*
@ -7,7 +7,7 @@ QV0*
F0* F0*
X0* X0*
J0 0* J0 0*
N VERSION O.87xd* N VERSION P.15xf*
N DEVICE XC2C64A-7-VQ100* N DEVICE XC2C64A-7-VQ100*
Note Block 0 * Note Block 0 *
@ -205,7 +205,7 @@ L006624 1111111111111111*
L006640 1111111111111111* L006640 1111111111111111*
L006656 1111111111111111* L006656 1111111111111111*
L006672 1111111011100111* L006672 1111111011100111*
L006688 1111111111111111* L006688 1111111011110011*
L006704 1111111011100111* L006704 1111111011100111*
L006720 1111111111111111* L006720 1111111111111111*
L006736 1111111111111111* L006736 1111111111111111*
@ -232,8 +232,8 @@ L007056 1111111111111111*
L007072 1111111111111111* L007072 1111111111111111*
Note Block 1 PLA AND array * Note Block 1 PLA AND array *
L007088 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L007088 11111111110111111111111111111101111111111111111111111111111111111111111111111111*
L007168 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L007168 11111111111011111111111111111110111111111111111111111111111111111111111111111111*
L007248 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L007248 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L007328 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L007328 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L007408 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L007408 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
@ -290,8 +290,8 @@ L011408 111111111111111111111111111111111111111111111111111111111111111111111111
L011488 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L011488 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
Note Block 1 PLA OR array * Note Block 1 PLA OR array *
L011568 1111111111111111* L011568 1111111110111111*
L011584 1111111111111111* L011584 1111111110111111*
L011600 1111111111111111* L011600 1111111111111111*
L011616 1111111111111111* L011616 1111111111111111*
L011632 1111111111111111* L011632 1111111111111111*
@ -358,7 +358,7 @@ L012599 000101111001111101000000001*
L012626 000001111001111110011111100* L012626 000001111001111110011111100*
L012653 000001111000011100011111100* L012653 000001111000011100011111100*
L012680 000101111001111101000000001* L012680 000101111001111101000000001*
L012707 000001111001111100011111100* L012707 000001111001100100011111101*
L012734 000101111001111101000000001* L012734 000101111001111101000000001*
L012761 000101111001111101000000001* L012761 000101111001111101000000001*
L012788 000101111001111101000000001* L012788 000101111001111101000000001*
@ -370,16 +370,16 @@ Note Block 2 *
Note Block 2 ZIA * Note Block 2 ZIA *
L012896 1111111111111111* L012896 1111111111111111*
L012912 1111111111111111* L012912 1111111111111111*
L012928 1111111011110011* L012928 1111111111111111*
L012944 1111111111111111* L012944 1111111111111111*
L012960 1111111010110111* L012960 1111111010110111*
L012976 1111111011010111* L012976 1111111011010111*
L012992 1111111010110111* L012992 1111111010110111*
L013008 1111111011010111* L013008 1110011011111111*
L013024 1111111010110111* L013024 1111111010110111*
L013040 1111111010110111* L013040 1111111010110111*
L013056 1111111010110111* L013056 1111111010110111*
L013072 1111111011100111* L013072 1111111011010111*
L013088 1111111011010111* L013088 1111111011010111*
L013104 1111111111111111* L013104 1111111111111111*
L013120 1111111111111111* L013120 1111111111111111*
@ -400,7 +400,7 @@ L013344 1111111111111111*
L013360 1111111111111111* L013360 1111111111111111*
L013376 1111111111111111* L013376 1111111111111111*
L013392 1111111111111111* L013392 1111111111111111*
L013408 1111111111111111* L013408 1111111011100111*
L013424 1111111111111111* L013424 1111111111111111*
L013440 1111111111111111* L013440 1111111111111111*
L013456 1111111111111111* L013456 1111111111111111*
@ -410,7 +410,7 @@ L013504 1111111111111111*
L013520 1111111111111111* L013520 1111111111111111*
Note Block 2 PLA AND array * Note Block 2 PLA AND array *
L013536 11111111111111111111111011111111111111111111111111111111111111111111111111111111* L013536 11111111111111111111111111111111111111111111111111111111111111111011111111111111*
L013616 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L013616 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L013696 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L013696 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L013776 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L013776 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
@ -420,7 +420,7 @@ L014016 111111111111111111111111111111111111111111111111111111111111111111111111
L014096 11111111111011111111111111111111111111111111111111111111111111111111111111111111* L014096 11111111111011111111111111111111111111111111111111111111111111111111111111111111*
L014176 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L014176 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L014256 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L014256 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L014336 11110111111111111111111111111111111111111111111111111111111111111111111111111111* L014336 11111111111111011111111111111111111111111111111111111111111111111111111111111111*
L014416 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L014416 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L014496 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L014496 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L014576 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L014576 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
@ -462,7 +462,7 @@ L017376 111111111111111111111111111111111111111111111111111111111111111111111111
L017456 11111111111111111111011111111111111111111111111111111111111111111111111111111111* L017456 11111111111111111111011111111111111111111111111111111111111111111111111111111111*
L017536 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L017536 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L017616 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L017616 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L017696 11111111111111011111111111111111111111111111111111111111111111111111111111111111* L017696 11111111111111111111110111111111111111111111111111111111111111111111111111111111*
L017776 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L017776 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L017856 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L017856 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
L017936 11111111111111111111111111111101111111111111111111111111111111111111111111111111* L017936 11111111111111111111111111111101111111111111111111111111111111111111111111111111*
@ -753,5 +753,5 @@ L025810 0*
Note I/O Bank 1 Vcco * Note I/O Bank 1 Vcco *
L025811 0* L025811 0*
C0AA3* C09A6*
D0B9 D0A4

47
hardware/jellybean/sgpio_if/top.vhd
View File

@ -1,22 +1,23 @@
-- --
-- Copyright 2012 Jared Boone -- Copyright 2012 Jared Boone
-- -- Copyright 2013 Benjamin Vernoux
-- This file is part of HackRF. --
-- -- This file is part of HackRF.
-- This program is free software; you can redistribute it and/or modify --
-- it under the terms of the GNU General Public License as published by -- This program is free software; you can redistribute it and/or modify
-- the Free Software Foundation; either version 2, or (at your option) -- it under the terms of the GNU General Public License as published by
-- any later version. -- the Free Software Foundation; either version 2, or (at your option)
-- -- any later version.
-- This program is distributed in the hope that it will be useful, --
-- but WITHOUT ANY WARRANTY; without even the implied warranty of -- This program is distributed in the hope that it will be useful,
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- GNU General Public License for more details. -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- -- GNU General Public License for more details.
-- You should have received a copy of the GNU General Public License --
-- along with this program; see the file COPYING. If not, write to -- You should have received a copy of the GNU General Public License
-- the Free Software Foundation, Inc., 51 Franklin Street, -- along with this program; see the file COPYING. If not, write to
-- Boston, MA 02110-1301, USA. -- the Free Software Foundation, Inc., 51 Franklin Street,
-- Boston, MA 02110-1301, USA.
library IEEE; library IEEE;
use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_1164.ALL;
@ -116,8 +117,14 @@ begin
process(host_clk_i, codec_clk_i) process(host_clk_i, codec_clk_i)
begin begin
if rising_edge(host_clk_i) then if rising_edge(host_clk_i) then
if codec_clk_i = '1' then if transfer_direction_i = to_dac then
host_data_capture_o <= host_data_enable_i; if codec_clk_i = '1' then
host_data_capture_o <= host_data_enable_i;
end if;
else
if codec_clk_i = '0' then
host_data_capture_o <= host_data_enable_i;
end if;
end if; end if;
end if; end if;
end process; end process;

3
host/libhackrf/examples/hackrf_max2837.c
View File

@ -82,9 +82,10 @@ int dump_register(hackrf_device* device, const uint16_t register_number) {
} }
int dump_registers(hackrf_device* device) { int dump_registers(hackrf_device* device) {
uint16_t register_number;
int result = HACKRF_SUCCESS; int result = HACKRF_SUCCESS;
for(uint16_t register_number=0; register_number<32; register_number++) { for(register_number=0; register_number<32; register_number++) {
result = dump_register(device, register_number); result = dump_register(device, register_number);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
break; break;

3
host/libhackrf/examples/hackrf_rffc5071.c
View File

@ -83,9 +83,10 @@ int dump_register(hackrf_device* device, const uint16_t register_number) {
} }
int dump_registers(hackrf_device* device) { int dump_registers(hackrf_device* device) {
uint16_t register_number;
int result = HACKRF_SUCCESS; int result = HACKRF_SUCCESS;
for(uint16_t register_number=0; register_number<31; register_number++) { for(register_number=0; register_number<31; register_number++) {
result = dump_register(device, register_number); result = dump_register(device, register_number);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
break; break;

17
host/libhackrf/examples/hackrf_si5351c.c
View File

@ -70,9 +70,10 @@ int dump_register(hackrf_device* device, const uint16_t register_number) {
} }
int dump_registers(hackrf_device* device) { int dump_registers(hackrf_device* device) {
uint16_t register_number;
int result = HACKRF_SUCCESS; int result = HACKRF_SUCCESS;
for(uint16_t register_number=0; register_number<256; register_number++) { for(register_number=0; register_number<256; register_number++) {
result = dump_register(device, register_number); result = dump_register(device, register_number);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
break; break;
@ -102,9 +103,12 @@ int write_register(
#define REGISTER_INVALID 32767 #define REGISTER_INVALID 32767
int dump_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number) { int dump_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number) {
uint_fast8_t i;
uint_fast8_t reg_base;
uint16_t parameters[8]; uint16_t parameters[8];
uint_fast8_t reg_base = 42 + (ms_number * 8);
for(uint_fast8_t i=0; i<8; i++) { reg_base = 42 + (ms_number * 8);
for(i=0; i<8; i++) {
uint_fast8_t reg_number = reg_base + i; uint_fast8_t reg_number = reg_base + i;
int result = hackrf_si5351c_read(device, reg_number, &parameters[i]); int result = hackrf_si5351c_read(device, reg_number, &parameters[i]);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
@ -141,8 +145,11 @@ int dump_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number)
} }
int dump_configuration(hackrf_device* device) { int dump_configuration(hackrf_device* device) {
for(uint_fast8_t ms_number=0; ms_number<8; ms_number++) { uint_fast8_t ms_number;
int result = dump_multisynth_config(device, ms_number); int result;
for(ms_number=0; ms_number<8; ms_number++) {
result = dump_multisynth_config(device, ms_number);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
return result; return result;
} }

94
host/libhackrf/examples/hackrf_transfer.c
View File

@ -43,7 +43,9 @@
#include <sys/time.h> #include <sys/time.h>
#include <signal.h> #include <signal.h>
#define FREQ_ONE_MHZ (1000000) #define FD_BUFFER_SIZE (8*1024)
#define FREQ_ONE_MHZ (1000000ull)
#define DEFAULT_FREQ_HZ (900000000ull) /* 900MHz */ #define DEFAULT_FREQ_HZ (900000000ull) /* 900MHz */
#define FREQ_MIN_HZ (30000000ull) /* 30MHz */ #define FREQ_MIN_HZ (30000000ull) /* 30MHz */
@ -124,30 +126,6 @@ t_wav_file_hdr wave_file_hdr =
} }
}; };
typedef struct {
uint32_t bandwidth_hz;
} max2837_ft_t;
static const max2837_ft_t max2837_ft[] = {
{ 1750000 },
{ 2500000 },
{ 3500000 },
{ 5000000 },
{ 5500000 },
{ 6000000 },
{ 7000000 },
{ 8000000 },
{ 9000000 },
{ 10000000 },
{ 12000000 },
{ 14000000 },
{ 15000000 },
{ 20000000 },
{ 24000000 },
{ 28000000 },
{ 0 },
};
typedef enum { typedef enum {
TRANSCEIVER_MODE_OFF = 0, TRANSCEIVER_MODE_OFF = 0,
TRANSCEIVER_MODE_RX = 1, TRANSCEIVER_MODE_RX = 1,
@ -209,47 +187,6 @@ int parse_u32(char* s, uint32_t* const value) {
} }
} }
/* Return final bw round down and less than expected bw. */
uint32_t compute_baseband_filter_bw_round_down_lt(const uint32_t bandwidth_hz)
{
const max2837_ft_t* p = max2837_ft;
while( p->bandwidth_hz != 0 )
{
if( p->bandwidth_hz >= bandwidth_hz ) {
break;
}
p++;
}
/* Round down (if no equal to first entry) */
if(p != max2837_ft)
{
p--;
}
return p->bandwidth_hz;
}
/* Return final bw. */
uint32_t compute_baseband_filter_bw(const uint32_t bandwidth_hz)
{
const max2837_ft_t* p = max2837_ft;
while( p->bandwidth_hz != 0 )
{
if( p->bandwidth_hz >= bandwidth_hz ) {
break;
}
p++;
}
/* Round down (if no equal to first entry) and if > bandwidth_hz */
if(p != max2837_ft)
{
if(p->bandwidth_hz > bandwidth_hz)
p--;
}
return p->bandwidth_hz;
}
volatile bool do_exit = false; volatile bool do_exit = false;
FILE* fd = NULL; FILE* fd = NULL;
@ -343,7 +280,7 @@ static void usage() {
printf("\t-t <filename> # Transmit data from file.\n"); printf("\t-t <filename> # Transmit data from file.\n");
printf("\t[-f set_freq_hz] # Set Freq in Hz between [%lluMHz, %lluMHz[.\n", FREQ_MIN_HZ/FREQ_ONE_MHZ, FREQ_MAX_HZ/FREQ_ONE_MHZ); printf("\t[-f set_freq_hz] # Set Freq in Hz between [%lluMHz, %lluMHz[.\n", FREQ_MIN_HZ/FREQ_ONE_MHZ, FREQ_MAX_HZ/FREQ_ONE_MHZ);
printf("\t[-a set_amp] # Set Amp 1=Enable, 0=Disable.\n"); printf("\t[-a set_amp] # Set Amp 1=Enable, 0=Disable.\n");
printf("\t[-s sample_rate_hz] # Set sample rate in Hz (5/10/12.5/16/20MHz, default %dMHz).\n", DEFAULT_SAMPLE_RATE_HZ/FREQ_ONE_MHZ); printf("\t[-s sample_rate_hz] # Set sample rate in Hz (5/10/12.5/16/20MHz, default %lldMHz).\n", DEFAULT_SAMPLE_RATE_HZ/FREQ_ONE_MHZ);
printf("\t[-n num_samples] # Number of samples to transfer (default is unlimited).\n"); printf("\t[-n num_samples] # Number of samples to transfer (default is unlimited).\n");
printf("\t[-b baseband_filter_bw_hz] # Set baseband filter bandwidth in MHz.\n\tPossible values: 1.75/2.5/3.5/5/5.5/6/7/8/9/10/12/14/15/20/24/28MHz, default < sample_rate_hz.\n" ); printf("\t[-b baseband_filter_bw_hz] # Set baseband filter bandwidth in MHz.\n\tPossible values: 1.75/2.5/3.5/5/5.5/6/7/8/9/10/12/14/15/20/24/28MHz, default < sample_rate_hz.\n" );
} }
@ -465,11 +402,11 @@ int main(int argc, char** argv) {
if( baseband_filter_bw ) if( baseband_filter_bw )
{ {
/* Compute nearest freq for bw filter */ /* Compute nearest freq for bw filter */
baseband_filter_bw_hz = compute_baseband_filter_bw(baseband_filter_bw_hz); baseband_filter_bw_hz = hackrf_compute_baseband_filter_bw(baseband_filter_bw_hz);
}else }else
{ {
/* Compute default value depending on sample rate */ /* Compute default value depending on sample rate */
baseband_filter_bw_hz = compute_baseband_filter_bw_round_down_lt(sample_rate_hz); baseband_filter_bw_hz = hackrf_compute_baseband_filter_bw_round_down_lt(sample_rate_hz);
} }
if (baseband_filter_bw_hz > BASEBAND_FILTER_BW_MAX) { if (baseband_filter_bw_hz > BASEBAND_FILTER_BW_MAX) {
@ -560,7 +497,14 @@ int main(int argc, char** argv) {
printf("Failed to open file: %s\n", path); printf("Failed to open file: %s\n", path);
return EXIT_FAILURE; return EXIT_FAILURE;
} }
/* Change fd buffer to have bigger one to store or read data on/to HDD */
result = setvbuf(fd , NULL , _IOFBF , FD_BUFFER_SIZE);
if( result != 0 ) {
printf("setvbuf() failed: %d\n", result);
usage();
return EXIT_FAILURE;
}
/* Write Wav header */ /* Write Wav header */
if( receive_wav ) if( receive_wav )
{ {
@ -574,7 +518,7 @@ int main(int argc, char** argv) {
signal(SIGTERM, &sigint_callback_handler); signal(SIGTERM, &sigint_callback_handler);
signal(SIGABRT, &sigint_callback_handler); signal(SIGABRT, &sigint_callback_handler);
printf("call hackrf_sample_rate_set(%u Hz/%.02f MHz)\n", sample_rate_hz,((float)sample_rate_hz/(float)FREQ_ONE_MHZ)); printf("call hackrf_sample_rate_set(%u Hz/%.03f MHz)\n", sample_rate_hz,((float)sample_rate_hz/(float)FREQ_ONE_MHZ));
result = hackrf_sample_rate_set(device, sample_rate_hz); result = hackrf_sample_rate_set(device, sample_rate_hz);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
printf("hackrf_sample_rate_set() failed: %s (%d)\n", hackrf_error_name(result), result); printf("hackrf_sample_rate_set() failed: %s (%d)\n", hackrf_error_name(result), result);
@ -582,7 +526,7 @@ int main(int argc, char** argv) {
return EXIT_FAILURE; return EXIT_FAILURE;
} }
printf("call hackrf_baseband_filter_bandwidth_set(%d Hz/%.02f MHz)\n", printf("call hackrf_baseband_filter_bandwidth_set(%d Hz/%.03f MHz)\n",
baseband_filter_bw_hz, ((float)baseband_filter_bw_hz/(float)FREQ_ONE_MHZ)); baseband_filter_bw_hz, ((float)baseband_filter_bw_hz/(float)FREQ_ONE_MHZ));
result = hackrf_baseband_filter_bandwidth_set(device, baseband_filter_bw_hz); result = hackrf_baseband_filter_bandwidth_set(device, baseband_filter_bw_hz);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
@ -592,9 +536,9 @@ int main(int argc, char** argv) {
} }
if( transceiver_mode == TRANSCEIVER_MODE_RX ) { if( transceiver_mode == TRANSCEIVER_MODE_RX ) {
result = hackrf_start_rx(device, rx_callback); result = hackrf_start_rx(device, rx_callback, NULL);
} else { } else {
result = hackrf_start_tx(device, tx_callback); result = hackrf_start_tx(device, tx_callback, NULL);
} }
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
printf("hackrf_start_?x() failed: %s (%d)\n", hackrf_error_name(result), result); printf("hackrf_start_?x() failed: %s (%d)\n", hackrf_error_name(result), result);
@ -602,7 +546,7 @@ int main(int argc, char** argv) {
return EXIT_FAILURE; return EXIT_FAILURE;
} }
printf("call hackrf_set_freq(%llu Hz/%llu MHz)\n", freq_hz, (freq_hz/FREQ_ONE_MHZ) ); printf("call hackrf_set_freq(%llu Hz/%.03f MHz)\n", freq_hz, ((float)freq_hz/(float)FREQ_ONE_MHZ) );
result = hackrf_set_freq(device, freq_hz); result = hackrf_set_freq(device, freq_hz);
if( result != HACKRF_SUCCESS ) { if( result != HACKRF_SUCCESS ) {
printf("hackrf_set_freq() failed: %s (%d)\n", hackrf_error_name(result), result); printf("hackrf_set_freq() failed: %s (%d)\n", hackrf_error_name(result), result);

3
host/libhackrf/src/CMakeLists.txt
View File

@ -25,6 +25,9 @@
set(c_sources ${CMAKE_CURRENT_SOURCE_DIR}/hackrf.c CACHE INTERNAL "List of C sources") set(c_sources ${CMAKE_CURRENT_SOURCE_DIR}/hackrf.c CACHE INTERNAL "List of C sources")
set(c_headers ${CMAKE_CURRENT_SOURCE_DIR}/hackrf.h CACHE INTERNAL "List of C headers") set(c_headers ${CMAKE_CURRENT_SOURCE_DIR}/hackrf.h CACHE INTERNAL "List of C headers")
set_source_files_properties(hackrf.c PROPERTIES LANGUAGE CXX )
set_source_files_properties(hackrf.h PROPERTIES LANGUAGE CXX )
# Dynamic library # Dynamic library
add_library(hackrf SHARED ${c_sources}) add_library(hackrf SHARED ${c_sources})
set_target_properties(hackrf PROPERTIES VERSION ${MAJOR_VERSION}.${MINOR_VERSION}.0 SOVERSION 0) set_target_properties(hackrf PROPERTIES VERSION ${MAJOR_VERSION}.${MINOR_VERSION}.0 SOVERSION 0)

188
host/libhackrf/src/hackrf.c
View File

@ -65,6 +65,33 @@ struct hackrf_device {
uint32_t transfer_count; uint32_t transfer_count;
uint32_t buffer_size; uint32_t buffer_size;
bool streaming; bool streaming;
void* rx_ctx;
void* tx_ctx;
};
typedef struct {
uint32_t bandwidth_hz;
} max2837_ft_t;
static const max2837_ft_t max2837_ft[] = {
{ 1750000 },
{ 2500000 },
{ 3500000 },
{ 5000000 },
{ 5500000 },
{ 6000000 },
{ 7000000 },
{ 8000000 },
{ 9000000 },
{ 10000000 },
{ 12000000 },
{ 14000000 },
{ 15000000 },
{ 20000000 },
{ 24000000 },
{ 28000000 },
{ 0 },
}; };
volatile bool do_exit = false; volatile bool do_exit = false;
@ -91,7 +118,7 @@ static int free_transfers(hackrf_device* device) {
static int allocate_transfers(hackrf_device* const device) { static int allocate_transfers(hackrf_device* const device) {
if( device->transfers == NULL ) { if( device->transfers == NULL ) {
device->transfers = calloc(device->transfer_count, sizeof(struct libusb_transfer)); device->transfers = (libusb_transfer**) calloc(device->transfer_count, sizeof(struct libusb_transfer));
if( device->transfers == NULL ) { if( device->transfers == NULL ) {
return HACKRF_ERROR_NO_MEM; return HACKRF_ERROR_NO_MEM;
} }
@ -158,7 +185,12 @@ static int cancel_transfers(hackrf_device* device) {
} }
} }
*/ */
int hackrf_init() { #ifdef __cplusplus
extern "C"
{
#endif
int ADDCALL hackrf_init() {
const int libusb_error = libusb_init(&g_libusb_context); const int libusb_error = libusb_init(&g_libusb_context);
if( libusb_error != 0 ) { if( libusb_error != 0 ) {
return HACKRF_ERROR_LIBUSB; return HACKRF_ERROR_LIBUSB;
@ -167,7 +199,7 @@ int hackrf_init() {
} }
} }
int hackrf_exit() { int ADDCALL hackrf_exit() {
if( g_libusb_context != NULL ) { if( g_libusb_context != NULL ) {
libusb_exit(g_libusb_context); libusb_exit(g_libusb_context);
g_libusb_context = NULL; g_libusb_context = NULL;
@ -176,7 +208,7 @@ int hackrf_exit() {
return HACKRF_SUCCESS; return HACKRF_SUCCESS;
} }
int hackrf_open(hackrf_device** device) { int ADDCALL hackrf_open(hackrf_device** device) {
if( device == NULL ) { if( device == NULL ) {
return HACKRF_ERROR_INVALID_PARAM; return HACKRF_ERROR_INVALID_PARAM;
} }
@ -204,7 +236,7 @@ int hackrf_open(hackrf_device** device) {
} }
hackrf_device* lib_device = NULL; hackrf_device* lib_device = NULL;
lib_device = malloc(sizeof(*lib_device)); lib_device = (hackrf_device*)malloc(sizeof(*lib_device));
if( lib_device == NULL ) { if( lib_device == NULL ) {
libusb_release_interface(usb_device, 0); libusb_release_interface(usb_device, 0);
libusb_close(usb_device); libusb_close(usb_device);
@ -238,7 +270,7 @@ int hackrf_open(hackrf_device** device) {
return HACKRF_SUCCESS; return HACKRF_SUCCESS;
} }
static int hackrf_set_transceiver_mode(hackrf_device* device, hackrf_transceiver_mode value) { int ADDCALL hackrf_set_transceiver_mode(hackrf_device* device, hackrf_transceiver_mode value) {
int result = libusb_control_transfer( int result = libusb_control_transfer(
device->usb_device, device->usb_device,
LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
@ -257,7 +289,7 @@ static int hackrf_set_transceiver_mode(hackrf_device* device, hackrf_transceiver
} }
} }
int hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value) { int ADDCALL hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value) {
if( register_number >= 32 ) { if( register_number >= 32 ) {
return HACKRF_ERROR_INVALID_PARAM; return HACKRF_ERROR_INVALID_PARAM;
} }
@ -280,7 +312,7 @@ int hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t
} }
} }
int hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value) { int ADDCALL hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value) {
if( register_number >= 32 ) { if( register_number >= 32 ) {
return HACKRF_ERROR_INVALID_PARAM; return HACKRF_ERROR_INVALID_PARAM;
} }
@ -306,7 +338,7 @@ int hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_
} }
} }
int hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value) { int ADDCALL hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value) {
if( register_number >= 256 ) { if( register_number >= 256 ) {
return HACKRF_ERROR_INVALID_PARAM; return HACKRF_ERROR_INVALID_PARAM;
} }
@ -331,7 +363,7 @@ int hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_
} }
} }
int hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value) { int ADDCALL hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value) {
if( register_number >= 256 ) { if( register_number >= 256 ) {
return HACKRF_ERROR_INVALID_PARAM; return HACKRF_ERROR_INVALID_PARAM;
} }
@ -357,7 +389,7 @@ int hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16
} }
} }
int hackrf_sample_rate_set(hackrf_device* device, const uint32_t sampling_rate_hz) { int ADDCALL hackrf_sample_rate_set(hackrf_device* device, const uint32_t sampling_rate_hz) {
int result = libusb_control_transfer( int result = libusb_control_transfer(
device->usb_device, device->usb_device,
LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
@ -376,7 +408,7 @@ int hackrf_sample_rate_set(hackrf_device* device, const uint32_t sampling_rate_h
} }
} }
int hackrf_baseband_filter_bandwidth_set(hackrf_device* device, const uint32_t bandwidth_hz) { int ADDCALL hackrf_baseband_filter_bandwidth_set(hackrf_device* device, const uint32_t bandwidth_hz) {
int result = libusb_control_transfer( int result = libusb_control_transfer(
device->usb_device, device->usb_device,
LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
@ -396,7 +428,7 @@ int hackrf_baseband_filter_bandwidth_set(hackrf_device* device, const uint32_t b
} }
int hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value) int ADDCALL hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value)
{ {
if( register_number >= 31 ) { if( register_number >= 31 ) {
return HACKRF_ERROR_INVALID_PARAM; return HACKRF_ERROR_INVALID_PARAM;
@ -420,7 +452,7 @@ int hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_
} }
} }
int hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value) int ADDCALL hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value)
{ {
if( register_number >= 31 ) { if( register_number >= 31 ) {
return HACKRF_ERROR_INVALID_PARAM; return HACKRF_ERROR_INVALID_PARAM;
@ -444,7 +476,7 @@ int hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16
} }
} }
int hackrf_spiflash_erase(hackrf_device* device) { int ADDCALL hackrf_spiflash_erase(hackrf_device* device) {
int result = libusb_control_transfer( int result = libusb_control_transfer(
device->usb_device, device->usb_device,
LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
@ -463,7 +495,7 @@ int hackrf_spiflash_erase(hackrf_device* device) {
} }
} }
int hackrf_spiflash_write(hackrf_device* device, const uint32_t address, int ADDCALL hackrf_spiflash_write(hackrf_device* device, const uint32_t address,
const uint16_t length, unsigned char* const data) const uint16_t length, unsigned char* const data)
{ {
if (address > 0x0FFFFF) { if (address > 0x0FFFFF) {
@ -488,7 +520,7 @@ int hackrf_spiflash_write(hackrf_device* device, const uint32_t address,
} }
} }
int hackrf_spiflash_read(hackrf_device* device, const uint32_t address, int ADDCALL hackrf_spiflash_read(hackrf_device* device, const uint32_t address,
const uint16_t length, unsigned char* data) const uint16_t length, unsigned char* data)
{ {
if (address > 0x0FFFFF) { if (address > 0x0FFFFF) {
@ -513,7 +545,7 @@ int hackrf_spiflash_read(hackrf_device* device, const uint32_t address,
} }
} }
int hackrf_cpld_write(hackrf_device* device, const uint16_t length, int ADDCALL hackrf_cpld_write(hackrf_device* device, const uint16_t length,
unsigned char* const data) unsigned char* const data)
{ {
int result = libusb_control_transfer( int result = libusb_control_transfer(
@ -534,7 +566,7 @@ int hackrf_cpld_write(hackrf_device* device, const uint16_t length,
} }
} }
int hackrf_board_id_read(hackrf_device* device, uint8_t* value) { int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value) {
int result = libusb_control_transfer( int result = libusb_control_transfer(
device->usb_device, device->usb_device,
LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, LIBUSB_ENDPOINT_IN | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
@ -553,7 +585,7 @@ int hackrf_board_id_read(hackrf_device* device, uint8_t* value) {
} }
} }
int hackrf_version_string_read(hackrf_device* device, char* version, int ADDCALL hackrf_version_string_read(hackrf_device* device, char* version,
uint8_t length) uint8_t length)
{ {
int result = libusb_control_transfer( int result = libusb_control_transfer(
@ -582,7 +614,7 @@ typedef struct {
} set_freq_params_t; } set_freq_params_t;
#define FREQ_ONE_MHZ (1000*1000ull) #define FREQ_ONE_MHZ (1000*1000ull)
int hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz) int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz)
{ {
uint32_t l_freq_mhz; uint32_t l_freq_mhz;
uint32_t l_freq_hz; uint32_t l_freq_hz;
@ -614,7 +646,7 @@ int hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz)
} }
} }
int hackrf_set_amp_enable(hackrf_device* device, const uint8_t value) int ADDCALL hackrf_set_amp_enable(hackrf_device* device, const uint8_t value)
{ {
int result = libusb_control_transfer( int result = libusb_control_transfer(
device->usb_device, device->usb_device,
@ -634,7 +666,7 @@ int hackrf_set_amp_enable(hackrf_device* device, const uint8_t value)
} }
} }
int hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno) int ADDCALL hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno)
{ {
uint8_t length; uint8_t length;
@ -676,21 +708,43 @@ static void* transfer_threadproc(void* arg) {
static void hackrf_libusb_transfer_callback(struct libusb_transfer* usb_transfer) { static void hackrf_libusb_transfer_callback(struct libusb_transfer* usb_transfer) {
hackrf_device* device = (hackrf_device*)usb_transfer->user_data; hackrf_device* device = (hackrf_device*)usb_transfer->user_data;
if( usb_transfer->status == LIBUSB_TRANSFER_COMPLETED ) { switch(usb_transfer->status)
hackrf_transfer transfer = { {
.device = device, case LIBUSB_TRANSFER_COMPLETED:
.buffer = usb_transfer->buffer, {
.buffer_length = usb_transfer->length, hackrf_transfer transfer = {
.valid_length = usb_transfer->actual_length, transfer.device = device,
}; transfer.buffer = usb_transfer->buffer,
transfer.buffer_length = usb_transfer->length,
transfer.valid_length = usb_transfer->actual_length,
transfer.rx_ctx = device->rx_ctx,
transfer.tx_ctx = device->tx_ctx
};
if( device->callback(&transfer) == 0 ) { if( device->callback(&transfer) == 0 )
libusb_submit_transfer(usb_transfer); {
return; libusb_submit_transfer(usb_transfer);
return;
}else
{
device->streaming = false;
}
} }
break;
case LIBUSB_TRANSFER_NO_DEVICE:
device->streaming = false; /* Fatal error stop transfer */
break;
case LIBUSB_TRANSFER_ERROR:
case LIBUSB_TRANSFER_TIMED_OUT:
case LIBUSB_TRANSFER_STALL:
case LIBUSB_TRANSFER_OVERFLOW:
case LIBUSB_TRANSFER_CANCELLED:
default:
/* Do nothing and continue */
break;
} }
device->streaming = false;
} }
static int kill_transfer_thread(hackrf_device* device) { static int kill_transfer_thread(hackrf_device* device) {
@ -739,20 +793,21 @@ static int create_transfer_thread(
return HACKRF_SUCCESS; return HACKRF_SUCCESS;
} }
bool hackrf_is_streaming(hackrf_device* device) { bool ADDCALL hackrf_is_streaming(hackrf_device* device) {
return device->streaming; return device->streaming;
} }
int hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback) { int ADDCALL hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx) {
const uint8_t endpoint_address = LIBUSB_ENDPOINT_IN | 1; const uint8_t endpoint_address = LIBUSB_ENDPOINT_IN | 1;
int result = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_RECEIVE); int result = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_RECEIVE);
if( result == HACKRF_SUCCESS ) { if( result == HACKRF_SUCCESS ) {
device->rx_ctx = rx_ctx;
create_transfer_thread(device, endpoint_address, callback); create_transfer_thread(device, endpoint_address, callback);
} }
return result; return result;
} }
int hackrf_stop_rx(hackrf_device* device) { int ADDCALL hackrf_stop_rx(hackrf_device* device) {
int result1, result2; int result1, result2;
result1 = kill_transfer_thread(device); result1 = kill_transfer_thread(device);
result2 = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_OFF); result2 = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_OFF);
@ -761,16 +816,17 @@ int hackrf_stop_rx(hackrf_device* device) {
return result1; return result1;
} }
int hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback) { int ADDCALL hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* tx_ctx) {
const uint8_t endpoint_address = LIBUSB_ENDPOINT_OUT | 2; const uint8_t endpoint_address = LIBUSB_ENDPOINT_OUT | 2;
int result = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_TRANSMIT); int result = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_TRANSMIT);
if( result == HACKRF_SUCCESS ) { if( result == HACKRF_SUCCESS ) {
device->tx_ctx = tx_ctx;
result = create_transfer_thread(device, endpoint_address, callback); result = create_transfer_thread(device, endpoint_address, callback);
} }
return result; return result;
} }
int hackrf_stop_tx(hackrf_device* device) { int ADDCALL hackrf_stop_tx(hackrf_device* device) {
int result1, result2; int result1, result2;
result1 = kill_transfer_thread(device); result1 = kill_transfer_thread(device);
result2 = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_OFF); result2 = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_OFF);
@ -779,7 +835,7 @@ int hackrf_stop_tx(hackrf_device* device) {
return result1; return result1;
} }
int hackrf_close(hackrf_device* device) { int ADDCALL hackrf_close(hackrf_device* device) {
if( device != NULL ) { if( device != NULL ) {
int result = hackrf_stop_rx(device); int result = hackrf_stop_rx(device);
if( result ) { if( result ) {
@ -810,7 +866,7 @@ int hackrf_close(hackrf_device* device) {
return HACKRF_SUCCESS; return HACKRF_SUCCESS;
} }
const char* hackrf_error_name(enum hackrf_error errcode) { const char* ADDCALL hackrf_error_name(enum hackrf_error errcode) {
switch(errcode) { switch(errcode) {
case HACKRF_SUCCESS: case HACKRF_SUCCESS:
return "HACKRF_SUCCESS"; return "HACKRF_SUCCESS";
@ -841,7 +897,7 @@ const char* hackrf_error_name(enum hackrf_error errcode) {
} }
} }
const char* hackrf_board_id_name(enum hackrf_board_id board_id) { const char* ADDCALL hackrf_board_id_name(enum hackrf_board_id board_id) {
switch(board_id) { switch(board_id) {
case BOARD_ID_JELLYBEAN: case BOARD_ID_JELLYBEAN:
return "Jellybean"; return "Jellybean";
@ -856,3 +912,49 @@ const char* hackrf_board_id_name(enum hackrf_board_id board_id) {
return "Unknown Board ID"; return "Unknown Board ID";
} }
} }
/* Return final bw round down and less than expected bw. */
uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt(const uint32_t bandwidth_hz)
{
const max2837_ft_t* p = max2837_ft;
while( p->bandwidth_hz != 0 )
{
if( p->bandwidth_hz >= bandwidth_hz ) {
break;
}
p++;
}
/* Round down (if no equal to first entry) */
if(p != max2837_ft)
{
p--;
}
return p->bandwidth_hz;
}
/* Return final bw. */
uint32_t ADDCALL hackrf_compute_baseband_filter_bw(const uint32_t bandwidth_hz)
{
const max2837_ft_t* p = max2837_ft;
while( p->bandwidth_hz != 0 )
{
if( p->bandwidth_hz >= bandwidth_hz ) {
break;
}
p++;
}
/* Round down (if no equal to first entry) and if > bandwidth_hz */
if(p != max2837_ft)
{
if(p->bandwidth_hz > bandwidth_hz)
p--;
}
return p->bandwidth_hz;
}
#ifdef __cplusplus
} // __cplusplus defined.
#endif

111
host/libhackrf/src/hackrf.h
View File

@ -26,6 +26,27 @@
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#ifdef _WIN32
#define ADD_EXPORTS
/* You should define ADD_EXPORTS *only* when building the DLL. */
#ifdef ADD_EXPORTS
#define ADDAPI __declspec(dllexport)
#else
#define ADDAPI __declspec(dllimport)
#endif
/* Define calling convention in one place, for convenience. */
#define ADDCALL __cdecl
#else /* _WIN32 not defined. */
/* Define with no value on non-Windows OSes. */
#define ADDAPI
#define ADDCALL
#endif
enum hackrf_error { enum hackrf_error {
HACKRF_SUCCESS = 0, HACKRF_SUCCESS = 0,
HACKRF_ERROR_INVALID_PARAM = -2, HACKRF_ERROR_INVALID_PARAM = -2,
@ -50,6 +71,8 @@ typedef struct {
uint8_t* buffer; uint8_t* buffer;
int buffer_length; int buffer_length;
int valid_length; int valid_length;
void* rx_ctx;
void* tx_ctx;
} hackrf_transfer; } hackrf_transfer;
typedef struct { typedef struct {
@ -59,52 +82,62 @@ typedef struct {
typedef int (*hackrf_sample_block_cb_fn)(hackrf_transfer* transfer); typedef int (*hackrf_sample_block_cb_fn)(hackrf_transfer* transfer);
int hackrf_init(); #ifdef __cplusplus
int hackrf_exit(); extern "C"
{
#endif
int hackrf_open(hackrf_device** device); extern ADDAPI int ADDCALL hackrf_init();
int hackrf_close(hackrf_device* device); extern ADDAPI int ADDCALL hackrf_exit();
extern ADDAPI int ADDCALL hackrf_open(hackrf_device** device);
extern ADDAPI int ADDCALL hackrf_close(hackrf_device* device);
extern ADDAPI int ADDCALL hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx);
extern ADDAPI int ADDCALL hackrf_stop_rx(hackrf_device* device);
extern ADDAPI int ADDCALL hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* tx_ctx);
extern ADDAPI int ADDCALL hackrf_stop_tx(hackrf_device* device);
extern ADDAPI bool ADDCALL hackrf_is_streaming(hackrf_device* device);
extern ADDAPI int ADDCALL hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value);
extern ADDAPI int ADDCALL hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value);
extern ADDAPI int ADDCALL hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value);
extern ADDAPI int ADDCALL hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value);
extern ADDAPI int ADDCALL hackrf_sample_rate_set(hackrf_device* device, const uint32_t sampling_rate_hz);
extern ADDAPI int ADDCALL hackrf_baseband_filter_bandwidth_set(hackrf_device* device, const uint32_t bandwidth_hz);
extern ADDAPI int ADDCALL hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value);
extern ADDAPI int ADDCALL hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value);
extern ADDAPI int ADDCALL hackrf_spiflash_erase(hackrf_device* device);
extern ADDAPI int ADDCALL hackrf_spiflash_write(hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* const data);
extern ADDAPI int ADDCALL hackrf_spiflash_read(hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* data);
extern ADDAPI int ADDCALL hackrf_cpld_write(hackrf_device* device, const uint16_t length, unsigned char* const data);
int hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback); extern ADDAPI int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value);
int hackrf_stop_rx(hackrf_device* device); extern ADDAPI int ADDCALL hackrf_version_string_read(hackrf_device* device, char* version, uint8_t length);
int hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback); extern ADDAPI int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz);
int hackrf_stop_tx(hackrf_device* device);
bool hackrf_is_streaming(hackrf_device* device); extern ADDAPI int ADDCALL hackrf_set_amp_enable(hackrf_device* device, const uint8_t value);
int hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value); extern ADDAPI int ADDCALL hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno);
int hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value);
int hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value); extern ADDAPI const char* ADDCALL hackrf_error_name(enum hackrf_error errcode);
int hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value); extern ADDAPI const char* ADDCALL hackrf_board_id_name(enum hackrf_board_id board_id);
int hackrf_sample_rate_set(hackrf_device* device, const uint32_t sampling_rate_hz); /* Compute nearest freq for bw filter (manual filter) */
int hackrf_baseband_filter_bandwidth_set(hackrf_device* device, const uint32_t bandwidth_hz); extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt(const uint32_t bandwidth_hz);
/* Compute best default value depending on sample rate (auto filter) */
extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw(const uint32_t bandwidth_hz);
int hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value); #ifdef __cplusplus
int hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value); } // __cplusplus defined.
#endif
int hackrf_spiflash_erase(hackrf_device* device);
int hackrf_spiflash_write(hackrf_device* device, const uint32_t address,
const uint16_t length, unsigned char* const data);
int hackrf_spiflash_read(hackrf_device* device, const uint32_t address,
const uint16_t length, unsigned char* data);
int hackrf_cpld_write(hackrf_device* device, const uint16_t length,
unsigned char* const data);
int hackrf_board_id_read(hackrf_device* device, uint8_t* value);
int hackrf_version_string_read(hackrf_device* device, char* version,
uint8_t length);
int hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz);
int hackrf_set_amp_enable(hackrf_device* device, const uint8_t value);
int hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno);
const char* hackrf_error_name(enum hackrf_error errcode);
const char* hackrf_board_id_name(enum hackrf_board_id board_id);
#endif//__HACKRF_H__ #endif//__HACKRF_H__