From f39833b4054d6cba346f7626b36a1b7240553419 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Wed, 27 Feb 2013 16:46:08 -0800 Subject: [PATCH 1/6] Flip phase of SGPIO enable, to shift samples captured from incorrect "Q0/I1, Q1/I2" to "Q0/I0, Q1/I1". Update CPLD bitstreams. --- hardware/jellybean/sgpio_if/default.svf | 8 ++++---- hardware/jellybean/sgpio_if/default.xsvf | Bin 37629 -> 37629 bytes hardware/jellybean/sgpio_if/top.jed | 8 ++++---- hardware/jellybean/sgpio_if/top.vhd | 2 +- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/hardware/jellybean/sgpio_if/default.svf b/hardware/jellybean/sgpio_if/default.svf index e0f7b9a8..430ece96 100755 --- a/hardware/jellybean/sgpio_if/default.svf +++ b/hardware/jellybean/sgpio_if/default.svf @@ -1,5 +1,5 @@ // Created using Xilinx Cse Software [ISE - 13.4] -// Date: Thu Feb 14 12:00:19 2013 +// Date: Wed Feb 27 16:39:56 2013 TRST OFF; ENDIR IDLE; @@ -254,7 +254,7 @@ SDR 281 TDI (002bc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff RUNTEST 10000 TCK; SDR 281 TDI (0128fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) ; RUNTEST 10000 TCK; -SDR 281 TDI (01aa01fffff7ffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) ; +SDR 281 TDI (01aa01ffffefffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) ; RUNTEST 10000 TCK; SDR 281 TDI (00abc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ; RUNTEST 10000 TCK; @@ -785,7 +785,7 @@ SDR 7 TDI (6a) SMASK (7f) ; RUNTEST DRPAUSE 20 TCK; ENDDR IDLE; RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffff7ffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK ( +SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffefffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK ( 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; RUNTEST 100 TCK; ENDDR DRPAUSE; @@ -1666,7 +1666,7 @@ SDR 7 TDI (6a) SMASK (7f) ; RUNTEST DRPAUSE 20 TCK; ENDDR IDLE; RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffff7ffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK ( +SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffefffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK ( 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; RUNTEST 100 TCK; ENDDR DRPAUSE; diff --git a/hardware/jellybean/sgpio_if/default.xsvf b/hardware/jellybean/sgpio_if/default.xsvf index 2a005f20d17cf1564fd00f79ea728f4860c443f5..ef48b43e6bf27e0a8375873f33d5ad46683b35cc 100755 GIT binary patch delta 50 vcmeynl Date: Fri, 10 May 2013 18:12:09 -0700 Subject: [PATCH 2/6] Tweak C/CXX_FLAGS to separate language standard used for C and C++ files. --- host/libhackrf/CMakeLists.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/host/libhackrf/CMakeLists.txt b/host/libhackrf/CMakeLists.txt index 370a1c2d..000a4326 100644 --- a/host/libhackrf/CMakeLists.txt +++ b/host/libhackrf/CMakeLists.txt @@ -31,7 +31,8 @@ set(CMAKE_MODULE_PATH "${CMAKE_SOURCE_DIR}") cmake_minimum_required(VERSION 2.8) add_definitions(-Wall) -add_definitions(-std=c99) +set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -std=c99") +set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -std=c++98") find_package(USB1 REQUIRED) include_directories(${LIBUSB_INCLUDE_DIR}) From a4a2a3d6ba4cd5f5c04b8c3acb3267f9403dec54 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sat, 11 May 2013 08:09:07 -0700 Subject: [PATCH 3/6] Added SCU pinmux data for USB LEDs, configured USB LEDs to be outputs (not float). --- firmware/common/hackrf_core.c | 4 ++++ firmware/common/hackrf_core.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index 0b719ccf..b94fc967 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -379,6 +379,10 @@ void pin_setup(void) { scu_pinmux(SCU_PINMUX_BOOT2, SCU_GPIO_FAST); scu_pinmux(SCU_PINMUX_BOOT3, SCU_GPIO_FAST); + /* Configure USB indicators */ + scu_pinmux(SCU_PINMUX_USB_LED0, SCU_CONF_FUNCTION3); + scu_pinmux(SCU_PINMUX_USB_LED1, SCU_CONF_FUNCTION3); + /* Configure all GPIO as Input (safe state) */ GPIO0_DIR = 0; GPIO1_DIR = 0; diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h index 71f017da..462f8b1d 100644 --- a/firmware/common/hackrf_core.h +++ b/firmware/common/hackrf_core.h @@ -61,6 +61,10 @@ extern "C" #define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */ #define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */ +/* USB peripheral */ +#define SCU_PINMUX_USB_LED0 (P6_8) +#define SCU_PINMUX_USB_LED1 (P6_7) + /* SSP1 Peripheral PinMux */ #define SCU_SSP1_MISO (P1_3) /* P1_3 */ #define SCU_SSP1_MOSI (P1_4) /* P1_4 */ From d9884af8b8d04fdfb177aa80341b223c5c91435f Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sat, 11 May 2013 12:11:37 -0700 Subject: [PATCH 4/6] PLL1 was misconfigured to run at 408MHz (way out of spec) instead of 204MHz. Corrected this by using DIRECT=1 instead of FBSEL=1. --- firmware/common/hackrf_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index b94fc967..f2abd656 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -252,7 +252,7 @@ void cpu_clock_init(void) | CGU_PLL1_CTRL_PSEL(0) | CGU_PLL1_CTRL_NSEL(0) | CGU_PLL1_CTRL_MSEL(16) - | CGU_PLL1_CTRL_FBSEL; + | CGU_PLL1_CTRL_DIRECT; /* wait until stable */ while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK)); From e065cdfe20905d1c4957b6ad12d0fa331b9ea0c0 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sat, 11 May 2013 12:13:00 -0700 Subject: [PATCH 5/6] Slowed down edges on LED and power enable signals -- they don't need to be fast, and this *might* have a negligible but positive effect on noise. --- firmware/common/hackrf_core.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index f2abd656..9f5806eb 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -368,11 +368,11 @@ void pin_setup(void) { GPIO_DIR(PORT_CPLD_TDI) &= ~PIN_CPLD_TDI; /* Configure SCU Pin Mux as GPIO */ - scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_FAST); - scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_FAST); - scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_NOPULL); + scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_NOPULL); + scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_NOPULL); - scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_NOPULL); scu_pinmux(SCU_PINMUX_BOOT0, SCU_GPIO_FAST); scu_pinmux(SCU_PINMUX_BOOT1, SCU_GPIO_FAST); From 1723cd12a193df733afc82d83d219fe665d47b4f Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sat, 11 May 2013 12:25:54 -0700 Subject: [PATCH 6/6] Oops, read PLL1 documentation again. Looks like FBSEL=1 is for "normal operation". So include that, but use DIRECT=1 to skip the PSEL divider (which would prevent us producing 204MHz from an in-spec PLL frequency). --- firmware/common/hackrf_core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index 9f5806eb..12bd53c7 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -252,6 +252,7 @@ void cpu_clock_init(void) | CGU_PLL1_CTRL_PSEL(0) | CGU_PLL1_CTRL_NSEL(0) | CGU_PLL1_CTRL_MSEL(16) + | CGU_PLL1_CTRL_FBSEL | CGU_PLL1_CTRL_DIRECT; /* wait until stable */