diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h index e0043389..9c661151 100644 --- a/firmware/common/hackrf_core.h +++ b/firmware/common/hackrf_core.h @@ -59,6 +59,14 @@ extern "C" #define SCU_SSP1_SCK (P1_19) /* P1_19 */ #define SCU_SSP1_SSEL (P1_20) /* P1_20 */ +/* MAX2837 GPIO (XCVR_CTL) PinMux */ +#define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */ +#define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */ +#define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */ + +/* MAX5864 SPI chip select (CS_AD) GPIO PinMux */ +#define SCU_CS_AD (P5_7) /* GPIO2[7] on P5_7 */ + /* TODO add other Pins */ /* @@ -74,6 +82,14 @@ extern "C" #define PIN_EN1V8 (BIT6) /* GPIO3[6] on P6_10 */ #define PORT_EN1V8 (GPIO3) +#define PIN_XCVR_ENABLE (BIT6) /* GPIO2[6] on P4_6 */ +#define PIN_XCVR_RXENABLE (BIT5) /* GPIO2[5] on P4_5 */ +#define PIN_XCVR_TXENABLE (BIT4) /* GPIO2[4] on P4_4 */ +#define PORT_XCVR_ENABLE (GPIO2) /* PORT for ENABLE, TXENABLE, RXENABLE */ + +#define PIN_CS_AD (BIT7) /* GPIO2[7] on P5_7 */ +#define PORT_CS_AD (GPIO2) /* PORT for CS_AD */ + /* GPIO Input */ #define PIN_BOOT0 (BIT8) /* GPIO0[8] on P1_1 */ #define PIN_BOOT1 (BIT9) /* GPIO0[9] on P1_2 */ @@ -86,18 +102,6 @@ extern "C" #define BOOT2_STATE ((GPIO5_PIN & PIN_BOOT2)==PIN_BOOT2) #define BOOT3_STATE ((GPIO1_PIN & PIN_BOOT3)==PIN_BOOT3) -/* indicator LED control */ -#define LED1_SET (GPIO_SET2 = PIN_LED1) -#define LED1_CLR (GPIO_CLR2 = PIN_LED1) -#define LED2_SET (GPIO_SET2 = PIN_LED2) -#define LED2_CLR (GPIO_CLR2 = PIN_LED2) -#define LED3_SET (GPIO_SET2 = PIN_LED3) -#define LED3_CLR (GPIO_CLR2 = PIN_LED3) - -/* 1V8 control */ -#define EN1V8_SET (GPIO_SET3 = PIN_EN1V8) -#define EN1V8_CLR (GPIO_CLR3 = PIN_EN1V8) - /* TODO add other Pins */ #endif diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c index 5336e8fb..81ef8888 100644 --- a/firmware/common/max2837.c +++ b/firmware/common/max2837.c @@ -17,6 +17,9 @@ #else #define LOG(x,...) #include +#include +#include +#include "hackrf_core.h" #endif /* Default register values. */ @@ -59,6 +62,7 @@ uint16_t max2837_regs[MAX2837_NUM_REGS]; /* Mark all regsisters dirty so all will be written at init. */ uint32_t max2837_regs_dirty = 0xffffffff; +/* Set up all registers according to defaults specified in docs. */ void max2837_init(void) { LOG("# max2837_init\n"); @@ -69,6 +73,66 @@ void max2837_init(void) max2837_regs_commit(); } +/* + * Set up pins for GPIO and SPI control, configure SSP peripheral for SPI, and + * set our own default register configuration. + */ +void max2837_setup(void) +{ + /* FIXME speed up once everything is working reliably */ + const uint8_t serial_clock_rate = 32; + const uint8_t clock_prescale_rate = 128; + + /* Configure XCVR_CTL GPIO pins. */ + scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST); + scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST); + + /* Set GPIO pins as outputs. */ + GPIO2_DIR |= (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE); + + /* disable everything */ + gpio_clear(PORT_XCVR_ENABLE, + (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); + + /* + * Configure CS_AD pin to keep the MAX5864 SPI disabled while we use the + * SPI bus for the MAX2837. FIXME: this should probably be somewhere else. + */ + scu_pinmux(SCU_CS_AD, SCU_GPIO_FAST); + GPIO2_DIR |= PIN_CS_AD; + gpio_set(PORT_CS_AD, PIN_CS_AD); + + /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ + scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); + scu_pinmux(SCU_SSP1_SSEL, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); + + ssp_init(SSP1_NUM, + SSP_DATA_16BITS, + SSP_FRAME_SPI, + SSP_CPOL_0_CPHA_0, + serial_clock_rate, + clock_prescale_rate, + SSP_MODE_NORMAL, + SSP_MASTER, + SSP_SLAVE_OUT_ENABLE); + + max2837_init(); + + /* Use SPI control instead of B1-B7 pins for gain settings. */ + set_MAX2837_TXVGA_GAIN_SPI_EN(1); + set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(1); + set_MAX2837_TXVGA_GAIN(0x3f); /* maximum attenuation */ + set_MAX2837_LNAgain_SPI_EN(1); + set_MAX2837_LNAgain(MAX2837_LNAgain_MAX); /* maximum gain */ + set_MAX2837_VGAgain_SPI_EN(1); + set_MAX2837_VGA(0x00); /* minimum attenuation */ + + max2837_regs_commit(); +} + /* SPI register read. */ uint16_t max2837_spi_read(uint8_t r) { return 0; @@ -128,22 +192,22 @@ void max2837_start(void) LOG("# max2837_start\n"); set_MAX2837_EN_SPI(1); max2837_regs_commit(); - /* TODO ENABLE pin */ + gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE); } void max2837_tx(void) { LOG("# max2837_tx\n"); - /* TODO TXENABLE pin */ + gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE); } -/* TODO - placeholder */ void max2837_stop(void) { LOG("# max2837_stop\n"); set_MAX2837_EN_SPI(0); max2837_regs_commit(); - /* TODO ENABLE pin */ + gpio_clear(PORT_XCVR_ENABLE, + (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); } void max2837_set_frequency(uint32_t freq) diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h index 1b7e96fb..25878bb9 100644 --- a/firmware/common/max2837.h +++ b/firmware/common/max2837.h @@ -15,6 +15,7 @@ extern uint32_t max2837_regs_dirty; /* Initialize chip. */ extern void max2837_init(void); +extern void max2837_setup(void); /* Read a register via SPI. Save a copy to memory and return * value. Mark clean. */ @@ -40,4 +41,6 @@ extern void max2837_stop(void); * where order of register writes matters. */ extern void max2837_set_frequency(uint32_t freq); +extern void max2837_tx(void); + #endif // __MAX2837_H diff --git a/firmware/simpletx/simpletx.c b/firmware/simpletx/simpletx.c index 8da8d170..b82c9ab9 100644 --- a/firmware/simpletx/simpletx.c +++ b/firmware/simpletx/simpletx.c @@ -51,18 +51,11 @@ void pin_setup(void) /* GPIO3[6] on P6_10 as output. */ GPIO3_DIR |= PIN_EN1V8; - - /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ - scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); - scu_pinmux(SCU_SSP1_SSEL, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); } int main(void) { - u8 serial_clock_rate; - u8 clock_prescale_rate; + const uint32_t freq = 2441000000U; pin_setup(); gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */ @@ -70,22 +63,12 @@ int main(void) gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */ - clock_prescale_rate = 2; - serial_clock_rate = 128; - - ssp_init(SSP1_NUM, - SSP_DATA_16BITS, - SSP_FRAME_SPI, - SSP_CPOL_0_CPHA_0, - serial_clock_rate, - clock_prescale_rate, - SSP_MODE_NORMAL, - SSP_MASTER, - SSP_SLAVE_OUT_ENABLE); - - max2837_init(); + max2837_setup(); + gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */ + max2837_set_frequency(freq); + max2837_tx(); max2837_start(); - max2837_set_frequency(2441000000); + gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */ while (1); max2837_stop();