diff --git a/firmware/blinky/Makefile b/firmware/blinky/Makefile index 63d3cce5..96e5a9ba 100644 --- a/firmware/blinky/Makefile +++ b/firmware/blinky/Makefile @@ -1,7 +1,7 @@ # Hey Emacs, this is a -*- makefile -*- -TARGET = blinky +BINARY = blinky -SRC = $(TARGET).c +SRC = $(BINARY).c include ../common/Makefile_inc.mk diff --git a/firmware/blinky_SPIFI_SRAM/Makefile b/firmware/blinky_SPIFI_SRAM/Makefile deleted file mode 100644 index cb4e8725..00000000 --- a/firmware/blinky_SPIFI_SRAM/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# Hey Emacs, this is a -*- makefile -*- - -# Target file name (without extension). -TARGET = blinky - -# List C source files here. (C dependencies are automatically generated.) -SRC = $(TARGET).c \ - $(LIBS_PATH)/LPC43xx_M4_Startup_ROM_to_RAM.c \ - $(LIBS_PATH)/LPC43xx_M4_Interrupts.c \ - $(LIBS_PATH)/hackrf_core.c - -# Override Linker Script -LINKER_SCRIPT = LPC4330_M4_ROM_to_RAM.ld -include ../common/Makefile_inc.mk diff --git a/firmware/blinky_SPIFI_SRAM/blinky.c b/firmware/blinky_SPIFI_SRAM/blinky.c deleted file mode 100644 index 0b3f5887..00000000 --- a/firmware/blinky_SPIFI_SRAM/blinky.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright 2010 - 2012 Michael Ossmann - * - * This file is part of HackRF. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -#include - -#include "hackrf_core.h" - -void wait(uint8_t duration) -{ - volatile uint32_t i; - for (i = 0; i < duration * 1000000; i++); -} - -uint32_t boot0, boot1, boot2, boot3; - -int main() -{ - - gpio_init(); - - EN1V8_SET; - EN1V8_CLR; - - while (1) { - boot0 = BOOT0; - boot1 = BOOT1; - boot2 = BOOT2; - boot3 = BOOT3; - - LED1_SET; - LED2_SET; - LED3_SET; - wait(1); - LED1_CLR; - LED2_CLR; - LED3_CLR; - wait(1); - } - - return 0 ; -} diff --git a/firmware/blinky_rom_to_ram/Makefile b/firmware/blinky_rom_to_ram/Makefile new file mode 100644 index 00000000..936e0348 --- /dev/null +++ b/firmware/blinky_rom_to_ram/Makefile @@ -0,0 +1,8 @@ +# Hey Emacs, this is a -*- makefile -*- + +BINARY = blinky + +SRC = $(BINARY).c + +LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld +include ../common/Makefile_inc.mk diff --git a/firmware/blinky_SPIFI_SRAM/README b/firmware/blinky_rom_to_ram/README similarity index 100% rename from firmware/blinky_SPIFI_SRAM/README rename to firmware/blinky_rom_to_ram/README diff --git a/firmware/blinky_rom_to_ram/blinky.c b/firmware/blinky_rom_to_ram/blinky.c new file mode 100644 index 00000000..8842ff9d --- /dev/null +++ b/firmware/blinky_rom_to_ram/blinky.c @@ -0,0 +1,85 @@ +/* + * Copyright 2010 - 2012 Michael Ossmann + * + * This file is part of HackRF. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 51 Franklin Street, + * Boston, MA 02110-1301, USA. + */ + +#include +#include + +#include "hackrf_core.h" + +void gpio_setup(void) +{ + /* Configure SCU Pin Mux as GPIO */ + scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_FAST); + + scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_FAST); + + scu_pinmux(SCU_PINMUX_BOOT0, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_BOOT1, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_BOOT2, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_BOOT3, SCU_GPIO_FAST); + + /* Configure all GPIO as Input (safe state) */ + GPIO0_DIR = 0; + GPIO1_DIR = 0; + GPIO2_DIR = 0; + GPIO3_DIR = 0; + GPIO4_DIR = 0; + GPIO5_DIR = 0; + GPIO6_DIR = 0; + GPIO7_DIR = 0; + + /* Configure GPIO2[1/2/8] (P4_1/2 P6_12) as output. */ + GPIO2_DIR |= (PIN_LED1|PIN_LED2|PIN_LED3); + + /* GPIO3[6] on P6_10 as output. */ + GPIO3_DIR |= PIN_EN1V8; +} + +u32 boot0, boot1, boot2, boot3; + +int main(void) +{ + int i; + gpio_setup(); + + /* Set 1V8 */ + gpio_set(PORT_EN1V8, PIN_EN1V8); + + /* Blink LED1/2/3 on the board and Read BOOT0/1/2/3 pins. */ + while (1) + { + boot0 = BOOT0_STATE; + boot1 = BOOT1_STATE; + boot2 = BOOT2_STATE; + boot3 = BOOT3_STATE; + + gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LEDs on */ + for (i = 0; i < 2000000; i++) /* Wait a bit. */ + __asm__("nop"); + gpio_clear(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LED off */ + for (i = 0; i < 2000000; i++) /* Wait a bit. */ + __asm__("nop"); + } + + return 0; +} diff --git a/firmware/common/LPC4330_M4_ROM_to_RAM.ld b/firmware/common/LPC4330_M4_ROM_to_RAM.ld index 6d9d92e7..f2850b91 100644 --- a/firmware/common/LPC4330_M4_ROM_to_RAM.ld +++ b/firmware/common/LPC4330_M4_ROM_to_RAM.ld @@ -1,6 +1,6 @@ /* - * Copyright 2010 - 2012 Michael Ossmann - * Copyright 2012 Benjamin Vernoux + * Copyright 2012 Michael Ossmann + * Copyright (C) 2012 Benjamin Vernoux * * This file is part of HackRF * @@ -19,145 +19,18 @@ * the Free Software Foundation, Inc., 51 Franklin Street, * Boston, MA 02110-1301, USA. */ -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -ENTRY(_start) -SEARCH_DIR(.) -GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script for HackRF Jellybean (LPC4330, 1M SPI flash, 264K SRAM). */ MEMORY { - /* - * Our code is installed in SPIFI(ROM) at 0x80000000 it is addressed through the 256M shadow area at 0x00000000 at Boot. - * Reset_Handler call Reset_Handler_ROM_to_RAM(executed in SPIFI) and Copy the code from ROM to RAM, - * and set shadow pointer to RAM, then the code execution continue in RAM. - */ - rom (rx) : ORIGIN = 0x80000000, LENGTH = 128K /* Real ROM Address It cannot exceed RAM size (Real Size is 1MB) */ - ram (rwx) : ORIGIN = 0x10000000, LENGTH = 128K /* Real RAM Address */ - shadow_ram (rwx) : ORIGIN = 0x00000000, LENGTH = 128K /* 128 Kb Real Address is 0x10000000 but remapped to Shadow 0x00000000 */ - - /* there are some additional RAM regions */ + /* Physical address in Flash used to copy Code from Flash to RAM */ + rom_flash (rx) : ORIGIN = 0x80000000, LENGTH = 1M + /* rom is really the shadow region that points to SPI flash or elsewhere */ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M + ram (rwx) : ORIGIN = 0x10000000, LENGTH = 128K + /* there are some additional RAM regions */ } -/* - * much copied from: Linker script for Cortex-M3 - * - * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. - */ - -EXTERN(Reset_Handler) -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - _text_ram = . + ORIGIN(ram); /* Start of Code in RAM */ - - . = ALIGN(0x400); /* Ensure that vector table is aligned as hardware requires. */ - _interrupt_vector_table = .; - KEEP(*(.irq_handler_table)) - - *(.text .text.* .gnu.linkonce.t.*) - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(8); - _etext = .; - } > shadow_ram - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > shadow_ram - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > shadow_ram - __exidx_end = .; - - _etext = .; - _etext_ram = . + ORIGIN(ram); - _etext_rom = . + ORIGIN(rom); - - .data : - { - _data = .; - *(vtable) - *(.data*) - _edata = .; - } > shadow_ram - - /* zero initialized data */ - .bss : - { - _bss = .; - __bss_start__ = .; - *(.bss*) - *(COMMON) - _ebss = .; - __bss_end__ = .; - } > shadow_ram - - /* Where we put the heap with cr_clib */ - .cr_heap : - { - end = .; - __end__ = .; - _pvHeapStart = .; - } > shadow_ram - - /* Leave room above stack for IAP to run */ - _StackTop = ORIGIN(ram) + (ORIGIN(shadow_ram) + LENGTH(shadow_ram) - 32); - -} +/* Include the common ld script. */ +INCLUDE libopencm3_lpc43xx_rom_to_ram.ld diff --git a/firmware/common/LPC43xx_M4_Interrupts.c b/firmware/common/LPC43xx_M4_Interrupts.c deleted file mode 100644 index f2680ec6..00000000 --- a/firmware/common/LPC43xx_M4_Interrupts.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Copyright 2010 - 2012 Michael Ossmann - * - * This file is part of HackRF - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ -/* - Copyright 2010-07 By Opendous Inc. (www.MicropendousX.org) - NVIC handler info copied from NXP User Manual UM10360 - - Basic interrupt handlers and NVIC interrupt handler - function table for the LPC17xx. See TODOs for - modification instructions. - - Permission to use, copy, modify, and distribute this software - and its documentation for any purpose and without fee is hereby - granted, provided that the above copyright notice appear in all - copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - - -/* Reset_Handler variables defined in linker script */ -extern unsigned long _StackTop; - -extern void Reset_Handler(void); - -/* Default interrupt handler */ -static void Default_Handler(void) { while(1) {;} } - -/* Empty handlers aliased to the default handler */ -void NMI_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void HardFault_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void MemManagement_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void BusFault_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void UsageFault_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SVC_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void DebugMon_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PendSV_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SysTick_Handler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void DAC_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void M0CORE_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void DMA_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void ETHERNET_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SDIO_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void LCD_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void USB0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void USB1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SCT_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void RITIMER_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void TIMER0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void TIMER1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void TIMER2_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void TIMER3_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void MCPWM_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void ADC0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void I2C0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void I2C1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SPI_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void ADC1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SSP0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SSP1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void USART0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void UART1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void USART2_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void USART3_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void I2S0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void I2S1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SPIFI_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void SGPIO_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT2_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT3_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT4_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT5_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT6_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void PIN_INT7_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void GINT0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void GINT1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void EVENTROUTER_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void C_CAN1_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void ATIMER_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void RTC_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void WWDT_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void C_CAN0_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); -void QEI_IRQHandler(void) __attribute__ ((weak, alias ("Default_Handler"))); - -/* - * This table must be appropriately placed using a linker script: - .text : - { - KEEP(*(.irq_handler_table)) - *(.text*) - *(.rodata*) - } > rom -*/ - -/* TODO - simply name a handler function in your code the same as a handler - * in the following table and it will override the default empty handler. - * Your function should be of the form: static void Something_Handler(void) {} - */ -__attribute__ ((section(".irq_handler_table"))) -void (* const _NVIC_Handler_Functions[])(void) = -{ - // Cortex-M4 Interrupts: IRQ Number - Exception Number - Offset - Vector Description - (void *)&_StackTop, // 0x00 Initial SP Value - defined in Linker Script - Reset_Handler, // 1 0x04 Reset Handler - NMI_Handler, // -14 2 0x08 Non-Maskable Interrupt Handler - HardFault_Handler, // -13 3 0x0C Hard Fault Handler - MemManagement_Handler, // -12 4 0x10 Memory Management Fault Handler - BusFault_Handler, // -11 5 0x14 Bus Fault Handler - UsageFault_Handler, // -10 6 0x18 Usage Fault Handler - 0, // 7 Reserved - 0, // 8 Reserved - 0, // 9 Reserved - 0, // 10 0x2C Reserved - SVC_Handler, // 11 SVCall Handler - DebugMon_Handler, // 12 Debug Monitor Handler - 0, // -2 13 0x38 Reserved - PendSV_Handler, // -1 14 0x3C PendSV Handler - SysTick_Handler, // 0 15 0x40 SysTick Handler - - - /* from table 21, section 7.6.1, UM10503 LPC43xx User Manual */ - DAC_IRQHandler, // 0 16 0x40 - M0CORE_IRQHandler, // 1 17 0x44 Cortex-M0; Latched TXEV; for M4-M0 communication - DMA_IRQHandler, // 2 18 0x48 - 0, // 3 19 0x4C reserved - 0, // 4 20 0x50 reserved - ETHERNET_IRQHandler, // 5 21 0x54 - SDIO_IRQHandler, // 6 22 0x58 - LCD_IRQHandler, // 7 23 0x5C - USB0_IRQHandler, // 8 24 0x60 - USB1_IRQHandler, // 9 25 0x64 - SCT_IRQHandler, // 10 26 0x68 SCT combined interrupt - RITIMER_IRQHandler, // 11 27 0x6C - TIMER0_IRQHandler, // 12 28 0x70 - TIMER1_IRQHandler, // 13 29 0x74 - TIMER2_IRQHandler, // 14 30 0x78 - TIMER3_IRQHandler, // 15 31 0x7C - MCPWM_IRQHandler, // 16 32 0x80 - ADC0_IRQHandler, // 17 33 0x84 - I2C0_IRQHandler, // 18 34 0x88 - I2C1_IRQHandler, // 19 35 0x8C - SPI_IRQHandler, // 20 36 0x90 - ADC1_IRQHandler, // 21 37 0x94 - SSP0_IRQHandler, // 22 38 0x98 - SSP1_IRQHandler, // 23 39 0x9C - USART0_IRQHandler, // 24 40 0xA0 - UART1_IRQHandler, // 25 41 0xA4 Combined UART interrupt with Modem interrupt - USART2_IRQHandler, // 26 42 0xA8 - USART3_IRQHandler, // 27 43 0xAC Combined USART interrupt with IrDA interrupt - I2S0_IRQHandler, // 28 44 0xB0 - I2S1_IRQHandler, // 29 45 0xB4 - SPIFI_IRQHandler, // 30 46 0xB8 - SGPIO_IRQHandler, // 31 47 0xBC - PIN_INT0_IRQHandler, // 32 48 0xC0 GPIO pin interrupt 0 - PIN_INT1_IRQHandler, // 33 49 0xC4 GPIO pin interrupt 1 - PIN_INT2_IRQHandler, // 34 50 0xC8 GPIO pin interrupt 2 - PIN_INT3_IRQHandler, // 35 51 0xCC GPIO pin interrupt 3 - PIN_INT4_IRQHandler, // 36 52 0xD0 GPIO pin interrupt 4 - PIN_INT5_IRQHandler, // 37 53 0xD4 GPIO pin interrupt 5 - PIN_INT6_IRQHandler, // 38 54 0xD8 GPIO pin interrupt 6 - PIN_INT7_IRQHandler, // 39 55 0xDC GPIO pin interrupt 7 - GINT0_IRQHandler, // 40 56 0xE0 GPIO global interrupt 0 - GINT1_IRQHandler, // 41 57 0xE4 GPIO global interrupt 1 - EVENTROUTER_IRQHandler, // 42 58 0xE8 - C_CAN1_IRQHandler, // 43 59 0xEC - 0, // 44 60 0xF0 reserved - 0, // 45 61 0xF4 reserved - ATIMER_IRQHandler, // 46 62 0xF8 Alarm timer interrupt - RTC_IRQHandler, // 47 63 0xFC - 0, // 48 64 0x100 reserved - WWDT_IRQHandler, // 49 65 0x104 - 0, // 50 66 0x108 reserved - C_CAN0_IRQHandler, // 51 67 0x10C - QEI_IRQHandler, // 52 68 0x110 -}; diff --git a/firmware/common/LPC43xx_M4_Startup.c b/firmware/common/LPC43xx_M4_Startup.c deleted file mode 100644 index fef96eb2..00000000 --- a/firmware/common/LPC43xx_M4_Startup.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Copyright 2010 - 2012 Michael Ossmann - * - * This file is part of HackRF. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ -/* - Copyright 2010-07 By Opendous Inc. (www.MicropendousX.org) - NVIC handler info copied from NXP User Manual UM10360 - - Start-up code for LPC17xx. See TODOs for - modification instructions. - - Permission to use, copy, modify, and distribute this software - and its documentation for any purpose and without fee is hereby - granted, provided that the above copyright notice appear in all - copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -#include - -/* Reset_Handler variables defined in linker script */ -extern unsigned long _interrupt_vector_table; -extern unsigned long _data; -extern unsigned long _edata; -extern unsigned long _etext; -extern unsigned long _bss; -extern unsigned long _ebss; - -extern void __libc_init_array(void); -extern int main(void); - -/* Reset Handler */ -void Reset_Handler(void) -{ - unsigned long *src, *dest; - - // Copy the data segment initializers from flash to SRAM - src = &_etext; - for(dest = &_data; dest < &_edata; ) - { - *dest++ = *src++; - } - - // Initialize the .bss segment of memory to zeros - src = &_bss; - while (src < &_ebss) - { - *src++ = 0; - } - - __libc_init_array(); - - // Set the vector table location. - SCB_VTOR = &_interrupt_vector_table; - - main(); - - // In case main() fails, have something to breakpoint - while (1) {;} -} diff --git a/firmware/common/LPC43xx_M4_Startup_ROM_to_RAM.c b/firmware/common/LPC43xx_M4_Startup_ROM_to_RAM.c deleted file mode 100644 index 50d9e234..00000000 --- a/firmware/common/LPC43xx_M4_Startup_ROM_to_RAM.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright 2012 Benjamin Vernoux - * - * This file is part of HackRF. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ -/* - Copyright 2010-07 By Opendous Inc. (www.MicropendousX.org) - NVIC handler info copied from NXP User Manual UM10360 - - Start-up code for LPC17xx. See TODOs for - modification instructions. - - Permission to use, copy, modify, and distribute this software - and its documentation for any purpose and without fee is hereby - granted, provided that the above copyright notice appear in all - copies and that both that the copyright notice and this - permission notice and warranty disclaimer appear in supporting - documentation, and that the name of the author not be used in - advertising or publicity pertaining to distribution of the - software without specific, written prior permission. - - The author disclaim all warranties with regard to this - software, including all implied warranties of merchantability - and fitness. In no event shall the author be liable for any - special, indirect or consequential damages or any damages - whatsoever resulting from loss of use, data or profits, whether - in an action of contract, negligence or other tortious action, - arising out of or in connection with the use or performance of - this software. -*/ - -#include - -#define CREG_BASE 0x40043000 -#define MMIO32(addr) (*(volatile unsigned long *)(addr)) -#define CREG_M4MEMMAP MMIO32(CREG_BASE + 0x100) - -/* Reset_Handler_ROM_to_RAM variables defined in linker script */ -extern unsigned long _text_ram; /* Correspond to start of Code in RAM */ -extern unsigned long _etext_ram; /* Correspond to end of Code in RAM */ -extern unsigned long _etext_rom; /* Correspond to end of Code in ROM */ - - -/* Reset_Handler variables defined in linker script */ -extern unsigned long _interrupt_vector_table; -extern unsigned long _data; -extern unsigned long _edata; -extern unsigned long _etext; -extern unsigned long _bss; -extern unsigned long _ebss; - -extern void __libc_init_array(void); -extern int main(void); - -/* Code to be Copied from ROM to RAM */ -void Reset_Handler_ROM_to_RAM(void) -{ - unsigned long *src, *dest; - - // Copy the code from ROM to Real RAM - src = &_etext_rom-(&_etext_ram-&_text_ram); - for(dest = &_text_ram; dest < &_etext_ram; ) - { - *dest++ = *src++; - } - - /* Change Shadow memory to Real RAM */ - CREG_M4MEMMAP = &_text_ram; - - /* Continue Execution in RAM */ -} - -/* Reset Handler */ -void Reset_Handler(void) -{ - unsigned long *src, *dest; - - Reset_Handler_ROM_to_RAM(); - - // Copy the data segment initializers from flash to SRAM - src = &_etext; - for(dest = &_data; dest < &_edata; ) - { - *dest++ = *src++; - } - - // Initialize the .bss segment of memory to zeros - src = &_bss; - while (src < &_ebss) - { - *src++ = 0; - } - - __libc_init_array(); - - // Set the vector table location. - SCB_VTOR = &_interrupt_vector_table; - - main(); - - // In case main() fails, have something to breakpoint - while (1) {;} -} diff --git a/firmware/common/Makefile_inc.mk b/firmware/common/Makefile_inc.mk index 5e5a1188..49b3af2c 100644 --- a/firmware/common/Makefile_inc.mk +++ b/firmware/common/Makefile_inc.mk @@ -32,7 +32,7 @@ HACKRF_OPTS = -D$(BOARD) # comment to disable RF transmission HACKRF_OPTS += -DTX_ENABLE -LDSCRIPT = ../common/LPC4330_M4.ld +LDSCRIPT ?= ../common/LPC4330_M4.ld LIBOPENCM3 ?= /usr/local/arm-none-eabi diff --git a/firmware/startup_systick/Makefile b/firmware/startup_systick/Makefile new file mode 100644 index 00000000..5d5ccfd4 --- /dev/null +++ b/firmware/startup_systick/Makefile @@ -0,0 +1,9 @@ +# Hey Emacs, this is a -*- makefile -*- + +BINARY = startup_systick + +SRC = $(BINARY).c \ + ../common/hackrf_core.c \ + ../common/si5351c.c + +include ../common/Makefile_inc.mk diff --git a/firmware/startup_systick/README b/firmware/startup_systick/README new file mode 100644 index 00000000..c99ad470 --- /dev/null +++ b/firmware/startup_systick/README @@ -0,0 +1,12 @@ +This program is an example of the startup sequence for HackRF (Jellybean with +Lemondrop attached). +LED1, LED2, and LED3 are blinking at exactly a frequency of 1Hz upon success. + +Required Lemondrop -> Jellybean connections: + +SCL: Lemondrop P7 pin 3 -> Jellybean P6 pin 3 +SDA: Lemondrop P7 pin 5 -> Jellybean P6 pin 5 +SDA: Lemondrop P7 pin 6 -> Jellybean P6 pin 6 +VCC: Lemondrop P4 pin 2, 4, or 6 -> Jellybean P17 pin 2, 4, or 6 +1V8: Lemondrop P11 pin 2, 4, or 6 -> Jellybean P16 pin 2, 4, or 6 +GND: Lemondrop P5 -> Jellybean P13 diff --git a/firmware/startup_systick/startup_systick.c b/firmware/startup_systick/startup_systick.c new file mode 100644 index 00000000..b80a1b59 --- /dev/null +++ b/firmware/startup_systick/startup_systick.c @@ -0,0 +1,325 @@ +/* + * Copyright 2010 - 2012 Michael Ossmann + * + * This file is part of HackRF. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 51 Franklin Street, + * Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include "hackrf_core.h" + +/* Global counter incremented by SysTick Interrupt each millisecond */ +volatile u32 g_ulSysTickCount; +u32 g_NbCyclePerSecond; + +void gpio_setup(void) +{ + /* Configure SCU Pin Mux as GPIO */ + scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_FAST); + + scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_FAST); + + /* Configure all GPIO as Input (safe state) */ + GPIO0_DIR = 0; + GPIO1_DIR = 0; + GPIO2_DIR = 0; + GPIO3_DIR = 0; + GPIO4_DIR = 0; + GPIO5_DIR = 0; + GPIO6_DIR = 0; + GPIO7_DIR = 0; + + /* Configure GPIO2[1/2/8] (P4_1/2 P6_12) as output. */ + GPIO2_DIR |= (PIN_LED1|PIN_LED2|PIN_LED3); + + /* GPIO3[6] on P6_10 as output. */ + GPIO3_DIR |= PIN_EN1V8; +} + +void systick_setup(void) +{ + u32 systick_reload_val; + g_ulSysTickCount = 0; + + /* Disable IRQ globally */ + asm volatile ("cpsid i"); + + /* Set processor Clock as Source Clock */ + systick_set_clocksource(STK_CTRL_CLKSOURCE); + + /* Get SysTick calibration value to obtain by default 1 tick = 10ms */ + systick_reload_val = systick_get_calib(); + /* + * Calibration seems wrong on LPC43xx(TBC) for default Freq it assume System Clock is 12MHz but it is 12*17=204MHz + * Fix the Calibration value bu multiplication by 17 + */ + systick_reload_val = (systick_reload_val*17); + + /* To obtain 1ms per tick just divide by 10 the 10ms base tick and set the reload */ + systick_reload_val = systick_reload_val/10; + systick_set_reload(systick_reload_val); + + systick_interrupt_enable(); + + /* Start counting. */ + systick_counter_enable(); + + /* Set SysTick Priority to maximum */ + nvic_set_priority(NVIC_SYSTICK_IRQ, 0xFF); + + /* Enable IRQ globally */ + asm volatile ("cpsie i"); +} + +void scs_dwt_cycle_counter_enabled(void) +{ + SCS_DEMCR |= SCS_DEMCR_TRCENA; + SCS_DWT_CTRL |= SCS_DWT_CTRL_CYCCNTENA; +} + +u32 sys_tick_get_time_ms(void) +{ + return g_ulSysTickCount; +} + +u32 sys_tick_delta_time_ms(u32 start, u32 end) +{ + #define MAX_T_U32 ((2^32)-1) + u32 diff; + + if(end > start) + { + diff=end-start; + }else + { + diff=MAX_T_U32-(start-end)+1; + } + + return diff; +} + +void sys_tick_wait_time_ms(u32 wait_ms) +{ + u32 start, end; + u32 tickms; + + start = sys_tick_get_time_ms(); + + do + { + end = sys_tick_get_time_ms(); + tickms = sys_tick_delta_time_ms(start, end); + }while(tickms < wait_ms); +} + +/* Called each 1ms/1000Hz by interrupt + 1) Count the number of cycle per second. + 2) Increment g_ulSysTickCount counter. +*/ +void sys_tick_handler(void) +{ + if(g_ulSysTickCount==0) + { + /* Clear Cycle Counter*/ + SCS_DWT_CYCCNT = 0; + }else if(g_ulSysTickCount==1000) + { + /* Capture number of cycle elapsed during 1 second */ + g_NbCyclePerSecond = SCS_DWT_CYCCNT; + } + + g_ulSysTickCount++; +} + +u32 test_nb_instruction_per_sec(void) +{ + u32 start, end, wait_ms; + u32 tickms; + u32 nb_instructions_per_sec; + + nb_instructions_per_sec = 0; + wait_ms = 1000; + + start = sys_tick_get_time_ms(); + + do + { + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + nb_instructions_per_sec += 100; + + end = sys_tick_get_time_ms(); + tickms = sys_tick_delta_time_ms(start, end); + }while(tickms < wait_ms); + + return nb_instructions_per_sec; +} + + +u32 nb_inst_per_sec0; +u32 nb_inst_per_sec1; + +int main(void) +{ + gpio_setup(); + + gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */ + + cpu_clock_init(); + + scs_dwt_cycle_counter_enabled(); + + systick_setup(); + + /* Test number of instruction per second */ + nb_inst_per_sec0 = test_nb_instruction_per_sec(); + nb_inst_per_sec1 = test_nb_instruction_per_sec(); + + gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LEDs on */ + + while (1) + { + gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */ + gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */ + gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */ + + sys_tick_wait_time_ms(500); + + gpio_clear(PORT_LED1_3, (PIN_LED3)); /* LED3 off */ + gpio_clear(PORT_LED1_3, (PIN_LED2)); /* LED2 off */ + gpio_clear(PORT_LED1_3, (PIN_LED1)); /* LED1 off */ + + sys_tick_wait_time_ms(500); + } + + return 0; +} diff --git a/firmware/startup_systick_rom_to_ram/Makefile b/firmware/startup_systick_rom_to_ram/Makefile new file mode 100644 index 00000000..8841bd0c --- /dev/null +++ b/firmware/startup_systick_rom_to_ram/Makefile @@ -0,0 +1,10 @@ +# Hey Emacs, this is a -*- makefile -*- + +BINARY = startup_systick + +SRC = $(BINARY).c \ + ../common/hackrf_core.c \ + ../common/si5351c.c + +LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld +include ../common/Makefile_inc.mk diff --git a/firmware/startup_systick_rom_to_ram/README b/firmware/startup_systick_rom_to_ram/README new file mode 100644 index 00000000..c99ad470 --- /dev/null +++ b/firmware/startup_systick_rom_to_ram/README @@ -0,0 +1,12 @@ +This program is an example of the startup sequence for HackRF (Jellybean with +Lemondrop attached). +LED1, LED2, and LED3 are blinking at exactly a frequency of 1Hz upon success. + +Required Lemondrop -> Jellybean connections: + +SCL: Lemondrop P7 pin 3 -> Jellybean P6 pin 3 +SDA: Lemondrop P7 pin 5 -> Jellybean P6 pin 5 +SDA: Lemondrop P7 pin 6 -> Jellybean P6 pin 6 +VCC: Lemondrop P4 pin 2, 4, or 6 -> Jellybean P17 pin 2, 4, or 6 +1V8: Lemondrop P11 pin 2, 4, or 6 -> Jellybean P16 pin 2, 4, or 6 +GND: Lemondrop P5 -> Jellybean P13 diff --git a/firmware/startup_systick_rom_to_ram/startup_systick.c b/firmware/startup_systick_rom_to_ram/startup_systick.c new file mode 100644 index 00000000..b80a1b59 --- /dev/null +++ b/firmware/startup_systick_rom_to_ram/startup_systick.c @@ -0,0 +1,325 @@ +/* + * Copyright 2010 - 2012 Michael Ossmann + * + * This file is part of HackRF. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 51 Franklin Street, + * Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include + +#include "hackrf_core.h" + +/* Global counter incremented by SysTick Interrupt each millisecond */ +volatile u32 g_ulSysTickCount; +u32 g_NbCyclePerSecond; + +void gpio_setup(void) +{ + /* Configure SCU Pin Mux as GPIO */ + scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_FAST); + + scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_FAST); + + /* Configure all GPIO as Input (safe state) */ + GPIO0_DIR = 0; + GPIO1_DIR = 0; + GPIO2_DIR = 0; + GPIO3_DIR = 0; + GPIO4_DIR = 0; + GPIO5_DIR = 0; + GPIO6_DIR = 0; + GPIO7_DIR = 0; + + /* Configure GPIO2[1/2/8] (P4_1/2 P6_12) as output. */ + GPIO2_DIR |= (PIN_LED1|PIN_LED2|PIN_LED3); + + /* GPIO3[6] on P6_10 as output. */ + GPIO3_DIR |= PIN_EN1V8; +} + +void systick_setup(void) +{ + u32 systick_reload_val; + g_ulSysTickCount = 0; + + /* Disable IRQ globally */ + asm volatile ("cpsid i"); + + /* Set processor Clock as Source Clock */ + systick_set_clocksource(STK_CTRL_CLKSOURCE); + + /* Get SysTick calibration value to obtain by default 1 tick = 10ms */ + systick_reload_val = systick_get_calib(); + /* + * Calibration seems wrong on LPC43xx(TBC) for default Freq it assume System Clock is 12MHz but it is 12*17=204MHz + * Fix the Calibration value bu multiplication by 17 + */ + systick_reload_val = (systick_reload_val*17); + + /* To obtain 1ms per tick just divide by 10 the 10ms base tick and set the reload */ + systick_reload_val = systick_reload_val/10; + systick_set_reload(systick_reload_val); + + systick_interrupt_enable(); + + /* Start counting. */ + systick_counter_enable(); + + /* Set SysTick Priority to maximum */ + nvic_set_priority(NVIC_SYSTICK_IRQ, 0xFF); + + /* Enable IRQ globally */ + asm volatile ("cpsie i"); +} + +void scs_dwt_cycle_counter_enabled(void) +{ + SCS_DEMCR |= SCS_DEMCR_TRCENA; + SCS_DWT_CTRL |= SCS_DWT_CTRL_CYCCNTENA; +} + +u32 sys_tick_get_time_ms(void) +{ + return g_ulSysTickCount; +} + +u32 sys_tick_delta_time_ms(u32 start, u32 end) +{ + #define MAX_T_U32 ((2^32)-1) + u32 diff; + + if(end > start) + { + diff=end-start; + }else + { + diff=MAX_T_U32-(start-end)+1; + } + + return diff; +} + +void sys_tick_wait_time_ms(u32 wait_ms) +{ + u32 start, end; + u32 tickms; + + start = sys_tick_get_time_ms(); + + do + { + end = sys_tick_get_time_ms(); + tickms = sys_tick_delta_time_ms(start, end); + }while(tickms < wait_ms); +} + +/* Called each 1ms/1000Hz by interrupt + 1) Count the number of cycle per second. + 2) Increment g_ulSysTickCount counter. +*/ +void sys_tick_handler(void) +{ + if(g_ulSysTickCount==0) + { + /* Clear Cycle Counter*/ + SCS_DWT_CYCCNT = 0; + }else if(g_ulSysTickCount==1000) + { + /* Capture number of cycle elapsed during 1 second */ + g_NbCyclePerSecond = SCS_DWT_CYCCNT; + } + + g_ulSysTickCount++; +} + +u32 test_nb_instruction_per_sec(void) +{ + u32 start, end, wait_ms; + u32 tickms; + u32 nb_instructions_per_sec; + + nb_instructions_per_sec = 0; + wait_ms = 1000; + + start = sys_tick_get_time_ms(); + + do + { + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + asm volatile ("nop "); + nb_instructions_per_sec += 100; + + end = sys_tick_get_time_ms(); + tickms = sys_tick_delta_time_ms(start, end); + }while(tickms < wait_ms); + + return nb_instructions_per_sec; +} + + +u32 nb_inst_per_sec0; +u32 nb_inst_per_sec1; + +int main(void) +{ + gpio_setup(); + + gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */ + + cpu_clock_init(); + + scs_dwt_cycle_counter_enabled(); + + systick_setup(); + + /* Test number of instruction per second */ + nb_inst_per_sec0 = test_nb_instruction_per_sec(); + nb_inst_per_sec1 = test_nb_instruction_per_sec(); + + gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LEDs on */ + + while (1) + { + gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */ + gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */ + gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */ + + sys_tick_wait_time_ms(500); + + gpio_clear(PORT_LED1_3, (PIN_LED3)); /* LED3 off */ + gpio_clear(PORT_LED1_3, (PIN_LED2)); /* LED2 off */ + gpio_clear(PORT_LED1_3, (PIN_LED1)); /* LED1 off */ + + sys_tick_wait_time_ms(500); + } + + return 0; +}