diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h index 9325cb87..1ae0fc01 100644 --- a/firmware/common/hackrf_core.h +++ b/firmware/common/hackrf_core.h @@ -165,6 +165,7 @@ extern "C" #define SCU_VCO_SDATA (P6_4) /* GPIO3[3] on P6_4 */ #define SCU_VCO_LE (P5_5) /* GPIO2[14] on P5_5 */ #define SCU_MIXER_EN (P6_8) /* GPIO5[16] on P6_8 */ +#define SCU_SYNT_RFOUT_EN (P6_9) /* GPIO3[5] on P6_9 */ #endif /* RF LDO control */ @@ -325,6 +326,8 @@ extern "C" #define PORT_VCO_LE (GPIO2) #define PIN_MIXER_EN (BIT16) /* GPIO5[16] on P6_8 */ #define PORT_MIXER_EN (GPIO5) +#define PIN_SYNT_RFOUT_EN (BIT5) /* GPIO3[5] on P6_9 */ +#define PORT_SYNT_RFOUT_EN (GPIO3) #endif #ifdef JAWBREAKER diff --git a/firmware/common/max2871.c b/firmware/common/max2871.c index 5b960e8a..cba655c7 100644 --- a/firmware/common/max2871.c +++ b/firmware/common/max2871.c @@ -1,6 +1,7 @@ #include "mixer.h" //#include "max2871.h" -//#include "mac2871_regs.def" // private register def macros +// TODO: put max2871_regs.c into the build system +#include "max2871_regs.c" #if (defined DEBUG) #include @@ -17,9 +18,9 @@ #include static void max2871_spi_write(uint8_t r, uint32_t v); +static void max2871_write_registers(void); static void delay_ms(int ms); -static uint32_t registers[6]; /* * - The input is fixed to 50 MHz * f_REF = 50 MHz @@ -140,35 +141,81 @@ void mixer_setup(void) { /* Configure GPIO pins. */ scu_pinmux(SCU_VCO_CE, SCU_GPIO_FAST); - //scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST); + scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + //Only used for the debug pin config: scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST); scu_pinmux(SCU_VCO_SDATA, SCU_GPIO_FAST); scu_pinmux(SCU_VCO_LE, SCU_GPIO_FAST); + scu_pinmux(SCU_SYNT_RFOUT_EN, SCU_GPIO_FAST); /* Set GPIO pins as outputs. */ GPIO_DIR(PORT_VCO_CE) |= PIN_VCO_CE; GPIO_DIR(PORT_VCO_SCLK) |= PIN_VCO_SCLK; GPIO_DIR(PORT_VCO_SDATA) |= PIN_VCO_SDATA; GPIO_DIR(PORT_VCO_LE) |= PIN_VCO_LE; + GPIO_DIR(PORT_SYNT_RFOUT_EN) |= PIN_SYNT_RFOUT_EN; /* set to known state */ gpio_set(PORT_VCO_CE, PIN_VCO_CE); /* active high */ gpio_clear(PORT_VCO_SCLK, PIN_VCO_SCLK); gpio_clear(PORT_VCO_SDATA, PIN_VCO_SDATA); gpio_set(PORT_VCO_LE, PIN_VCO_LE); /* active low */ + gpio_set(PORT_SYNT_RFOUT_EN, PIN_SYNT_RFOUT_EN); /* active high */ - registers[0] = 0x007D0000; - registers[1] = 0x2000FFF9; - registers[2] = 0x00004042; - registers[3] = 0x0000000B; - registers[4] = 0x6180B23C; - registers[5] = 0x00400005; - + max2871_regs_init(); int i; for(i = 5; i >= 0; i--) { - max2871_spi_write(i, registers[i]); + max2871_spi_write(i, max2871_get_register(i)); delay_ms(20); } + + max2871_set_INT(1); + max2871_set_N(4500); + max2871_set_FRAC(0); + max2871_set_CPL(0); + max2871_set_CPT(0); + max2871_set_P(1); + max2871_set_M(0); + max2871_set_LDS(0); + max2871_set_SDN(0); + max2871_set_MUX(3); + max2871_set_DBR(0); + max2871_set_RDIV2(0); + max2871_set_R(50); // 1 MHz f_PFD + max2871_set_REG4DB(0); + max2871_set_CP(3); // ?: CP current up 0-3 + max2871_set_LDF(1); // INT-N + max2871_set_LDP(0); // ?: Lock-Detect Precision + max2871_set_PDP(1); + max2871_set_SHDN(0); + max2871_set_TRI(0); + max2871_set_RST(0); + max2871_set_VCO(0); + max2871_set_VAS_SHDN(0); + max2871_set_VAS_TEMP(0); + max2871_set_CSM(0); + max2871_set_MUTEDEL(1); + max2871_set_CDM(0); + max2871_set_CDIV(0); + max2871_set_SDLDO(0); + max2871_set_SDDIV(0); + max2871_set_SDREF(0); + max2871_set_BS(20); // For 1 MHz f_PFD + max2871_set_FB(1); // Do not put DIVA into the feedback loop + max2871_set_DIVA(0); + max2871_set_SDVCO(0); + max2871_set_MTLD(1); + max2871_set_BDIV(0); + max2871_set_RFB_EN(0); + max2871_set_BPWR(0); + max2871_set_RFA_EN(1); + max2871_set_APWR(3); + max2871_set_SDPLL(0); + max2871_set_F01(1); + max2871_set_LD(1); + max2871_set_ADCS(0); + max2871_set_ADCM(0); + + max2871_write_registers(); } static void delay_ms(int ms) @@ -233,11 +280,11 @@ static void max2871_spi_write(uint8_t r, uint32_t v) { #endif } -void max2871_write_registers(void) +static void max2871_write_registers(void) { int i; for(i = 5; i >= 0; i--) { - max2871_spi_write(i, registers[i]); + max2871_spi_write(i, max2871_get_register(i)); } } diff --git a/firmware/common/max2871_regs.c b/firmware/common/max2871_regs.c new file mode 100644 index 00000000..aec781d1 --- /dev/null +++ b/firmware/common/max2871_regs.c @@ -0,0 +1,299 @@ +#include "max2871_regs.h" +#include + +static uint32_t registers[6]; + +void max2871_regs_init(void) +{ + registers[0] = 0x007D0000; + registers[1] = 0x2000FFF9; + registers[2] = 0x00004042; + registers[3] = 0x0000000B; + registers[4] = 0x6180B23C; + registers[5] = 0x00400005; +} + +uint32_t max2871_get_register(int reg) +{ + return registers[reg]; +} + +void max2871_set_INT(uint32_t v) +{ + registers[0] &= ~(0x1 << 31); + registers[0] |= v << 31; +} + +void max2871_set_N(uint32_t v) +{ + registers[0] &= ~(0xFFFF << 15); + registers[0] |= v << 15; +} + +void max2871_set_FRAC(uint32_t v) +{ + registers[0] &= ~(0xFFF << 3); + registers[0] |= v << 3; +} + +void max2871_set_CPL(uint32_t v) +{ + registers[1] &= ~(0x3 << 29); + registers[1] |= v << 29; +} + +void max2871_set_CPT(uint32_t v) +{ + registers[1] &= ~(0x3 << 27); + registers[1] |= v << 27; +} + +void max2871_set_P(uint32_t v) +{ + registers[1] &= ~(0xFFF << 15); + registers[1] |= v << 15; +} + +void max2871_set_M(uint32_t v) +{ + registers[1] &= ~(0xFFF << 3); + registers[1] |= v << 3; +} + +void max2871_set_LDS(uint32_t v) +{ + registers[2] &= ~(0x1 << 31); + registers[2] |= v << 31; +} + +void max2871_set_SDN(uint32_t v) +{ + registers[2] &= ~(0x3 << 29); + registers[2] |= v << 29; +} + +void max2871_set_MUX(uint32_t v) +{ + registers[2] &= ~(0x7 << 26); + registers[5] &= ~(0x1 << 18); + registers[2] |= (v & 0x7) << 26; + registers[5] |= ((v & 0x8) >> 3) << 18; +} + +void max2871_set_DBR(uint32_t v) +{ + registers[2] &= ~(0x1 << 25); + registers[2] |= v << 25; +} + +void max2871_set_RDIV2(uint32_t v) +{ + registers[2] &= ~(0x1 << 24); + registers[2] |= v << 24; +} + +void max2871_set_R(uint32_t v) +{ + registers[2] &= ~(0x3FF << 14); + registers[2] |= v << 14; +} + +void max2871_set_REG4DB(uint32_t v) +{ + registers[2] &= ~(0x1 << 13); + registers[2] |= v << 13; +} + +void max2871_set_CP(uint32_t v) +{ + registers[2] &= ~(0xF << 9); + registers[2] |= v << 9; +} + +void max2871_set_LDF(uint32_t v) +{ + registers[2] &= ~(0x1 << 8); + registers[2] |= v << 8; +} + +void max2871_set_LDP(uint32_t v) +{ + registers[2] &= ~(0x1 << 7); + registers[2] |= v << 7; +} + +void max2871_set_PDP(uint32_t v) +{ + registers[2] &= ~(0x1 << 6); + registers[2] |= v << 6; +} + +void max2871_set_SHDN(uint32_t v) +{ + registers[2] &= ~(0x1 << 5); + registers[2] |= v << 5; +} + +void max2871_set_TRI(uint32_t v) +{ + registers[2] &= ~(0x1 << 4); + registers[2] |= v << 4; +} + +void max2871_set_RST(uint32_t v) +{ + registers[2] &= ~(0x1 << 3); + registers[2] |= v << 3; +} + +void max2871_set_VCO(uint32_t v) +{ + registers[3] &= ~(0x3F << 26); + registers[3] |= v << 26; +} + +void max2871_set_VAS_SHDN(uint32_t v) +{ + registers[3] &= ~(0x1 << 25); + registers[3] |= v << 25; +} + +void max2871_set_VAS_TEMP(uint32_t v) +{ + registers[3] &= ~(0x1 << 24); + registers[3] |= v << 24; +} + +void max2871_set_CSM(uint32_t v) +{ + registers[3] &= ~(0x1 << 18); + registers[3] |= v << 18; +} + +void max2871_set_MUTEDEL(uint32_t v) +{ + registers[3] &= ~(0x1 << 17); + registers[3] |= v << 17; +} + +void max2871_set_CDM(uint32_t v) +{ + registers[3] &= ~(0x3 << 15); + registers[3] |= v << 15; +} + +void max2871_set_CDIV(uint32_t v) +{ + registers[3] &= ~(0xFFF << 3); + registers[3] |= v << 3; +} + +void max2871_set_SDLDO(uint32_t v) +{ + registers[4] &= ~(0x1 << 28); + registers[4] |= v << 28; +} + +void max2871_set_SDDIV(uint32_t v) +{ + registers[4] &= ~(0x1 << 27); + registers[4] |= v << 27; +} + +void max2871_set_SDREF(uint32_t v) +{ + registers[4] &= ~(0x1 << 26); + registers[4] |= v << 26; +} + +void max2871_set_BS(uint32_t v) +{ + registers[4] &= ~(0x3 << 24); + registers[4] &= ~(0xFF << 12); + registers[4] |= ((v & 0x300) >> 8) << 24; + registers[4] |= (v & 0xFF) << 12; +} + +void max2871_set_FB(uint32_t v) +{ + registers[4] &= ~(0x1 << 23); + registers[4] |= v << 23; +} + +void max2871_set_DIVA(uint32_t v) +{ + registers[4] &= ~(0x7 << 20); + registers[4] |= v << 20; +} + +void max2871_set_SDVCO(uint32_t v) +{ + registers[4] &= ~(0x1 << 11); + registers[4] |= v << 11; +} + +void max2871_set_MTLD(uint32_t v) +{ + registers[4] &= ~(0x1 << 10); + registers[4] |= v << 10; +} + +void max2871_set_BDIV(uint32_t v) +{ + registers[4] &= ~(0x1 << 9); + registers[4] |= v << 9; +} + +void max2871_set_RFB_EN(uint32_t v) +{ + registers[4] &= ~(0x1 << 8); + registers[4] |= v << 8; +} + +void max2871_set_BPWR(uint32_t v) +{ + registers[4] &= ~(0x3 << 6); + registers[4] |= v << 6; +} + +void max2871_set_RFA_EN(uint32_t v) +{ + registers[4] &= ~(0x1 << 5); + registers[4] |= v << 5; +} + +void max2871_set_APWR(uint32_t v) +{ + registers[4] &= ~(0x3 << 3); + registers[4] |= v << 3; +} + +void max2871_set_SDPLL(uint32_t v) +{ + registers[5] &= ~(0x1 << 25); + registers[5] |= v << 25; +} + +void max2871_set_F01(uint32_t v) +{ + registers[5] &= ~(0x1 << 24); + registers[5] |= v << 24; +} + +void max2871_set_LD(uint32_t v) +{ + registers[5] &= ~(0x3 << 22); + registers[5] |= v << 22; +} + +void max2871_set_ADCS(uint32_t v) +{ + registers[5] &= ~(0x1 << 6); + registers[5] |= v << 6; +} + +void max2871_set_ADCM(uint32_t v) +{ + registers[5] &= ~(0x7 << 3); + registers[5] |= v << 3; +} diff --git a/firmware/common/max2871_regs.h b/firmware/common/max2871_regs.h new file mode 100644 index 00000000..223f8b7f --- /dev/null +++ b/firmware/common/max2871_regs.h @@ -0,0 +1,54 @@ +#ifndef MAX2871_H +#define MAX2871_H +#include + +void max2871_regs_init(void); +uint32_t max2871_get_register(int reg); + +void max2871_set_INT(uint32_t v); +void max2871_set_N(uint32_t v); +void max2871_set_FRAC(uint32_t v); +void max2871_set_CPL(uint32_t v); +void max2871_set_CPT(uint32_t v); +void max2871_set_P(uint32_t v); +void max2871_set_M(uint32_t v); +void max2871_set_LDS(uint32_t v); +void max2871_set_SDN(uint32_t v); +void max2871_set_MUX(uint32_t v); +void max2871_set_DBR(uint32_t v); +void max2871_set_RDIV2(uint32_t v); +void max2871_set_R(uint32_t v); +void max2871_set_REG4DB(uint32_t v); +void max2871_set_CP(uint32_t v); +void max2871_set_LDF(uint32_t v); +void max2871_set_LDP(uint32_t v); +void max2871_set_PDP(uint32_t v); +void max2871_set_SHDN(uint32_t v); +void max2871_set_TRI(uint32_t v); +void max2871_set_RST(uint32_t v); +void max2871_set_VCO(uint32_t v); +void max2871_set_VAS_SHDN(uint32_t v); +void max2871_set_VAS_TEMP(uint32_t v); +void max2871_set_CSM(uint32_t v); +void max2871_set_MUTEDEL(uint32_t v); +void max2871_set_CDM(uint32_t v); +void max2871_set_CDIV(uint32_t v); +void max2871_set_SDLDO(uint32_t v); +void max2871_set_SDDIV(uint32_t v); +void max2871_set_SDREF(uint32_t v); +void max2871_set_BS(uint32_t v); +void max2871_set_FB(uint32_t v); +void max2871_set_DIVA(uint32_t v); +void max2871_set_SDVCO(uint32_t v); +void max2871_set_MTLD(uint32_t v); +void max2871_set_BDIV(uint32_t v); +void max2871_set_RFB_EN(uint32_t v); +void max2871_set_BPWR(uint32_t v); +void max2871_set_RFA_EN(uint32_t v); +void max2871_set_APWR(uint32_t v); +void max2871_set_SDPLL(uint32_t v); +void max2871_set_F01(uint32_t v); +void max2871_set_LD(uint32_t v); +void max2871_set_ADCS(uint32_t v); +void max2871_set_ADCM(uint32_t v); +#endif