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Adjust SGPIO GPDMA trigger slice data to a single clock width pulse. Previously, it was 3 clocks long with a 4 clock period, which *seemed* to address GPDMA data drop-outs at maximum baseband speed (20Msps complex).

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This commit is contained in:
Jared Boone
2013-12-31 20:27:14 -08:00
parent fc5ec03353
commit c6b1ec2979
1 changed files with 2 additions and 2 deletions
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4
firmware/common/sgpio.c
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@ -262,8 +262,8 @@ void sgpio_configure(
SGPIO_POS_POS_RESET(0x1f) SGPIO_POS_POS_RESET(0x1f)
| SGPIO_POS_POS(0x1f) | SGPIO_POS_POS(0x1f)
; ;
SGPIO_REG(slice_gpdma) = 0x77777777; // Primary output data register, LSB -> out SGPIO_REG(slice_gpdma) = 0x11111111; // Primary output data register, LSB -> out
SGPIO_REG_SS(slice_gpdma) = 0x77777777; // Shadow output data register, LSB -> out1 SGPIO_REG_SS(slice_gpdma) = 0x11111111; // Shadow output data register, LSB -> out1
slice_enable_mask |= (1 << slice_gpdma); slice_enable_mask |= (1 << slice_gpdma);
} }