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chore(rad1o): White space fixes and cleanup

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This commit is contained in:
schneider
2017-02-03 19:27:19 +01:00
parent 7526723f50
commit c0c0fab368
8 changed files with 111 additions and 120 deletions
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7
firmware/common/hackrf_core.c
View File

@ -625,8 +625,7 @@ void cpu_clock_init(void)
#endif
#ifdef RAD1O
/*
* rad1o clocks:
/* rad1o clocks:
* CLK0 -> MAX5864/CPLD
* CLK1 -> CPLD
* CLK2 -> SGPIO
@ -634,8 +633,7 @@ void cpu_clock_init(void)
* CLK4 -> MAX2837
* CLK5 -> MAX2871
* CLK6 -> none
* CLK7 -> LPC4330 (but LPC4330 starts up on its own crystal)
*/
* CLK7 -> LPC4330 (but LPC4330 starts up on its own crystal) */
/* MS3/CLK3 is the source for the external clock output. */
si5351c_configure_multisynth(&clock_gen, 3, 80*128-512, 0, 1, 0); /* 800/80 = 10MHz */
@ -655,7 +653,6 @@ void cpu_clock_init(void)
/* Set to 10 MHz, the common rate between Jellybean and Jawbreaker. */
sample_rate_set(10000000);
//sample_rate_set(8000000);
si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL);
// soft reset

19
firmware/common/max2871.c
View File

@ -23,7 +23,7 @@ void max2871_setup(max2871_driver_t* const drv)
/* Configure GPIO pins. */
scu_pinmux(SCU_VCO_CE, SCU_GPIO_FAST);
scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
//Only used for the debug pin config: scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST);
/* Only used for the debug pin config: scu_pinmux(SCU_VCO_SCLK, SCU_GPIO_FAST); */
scu_pinmux(SCU_VCO_SDATA, SCU_GPIO_FAST);
scu_pinmux(SCU_VCO_LE, SCU_GPIO_FAST);
scu_pinmux(SCU_VCO_MUX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
@ -62,14 +62,14 @@ void max2871_setup(max2871_driver_t* const drv)
max2871_set_M(0);
max2871_set_LDS(0);
max2871_set_SDN(0);
max2871_set_MUX(0x0C); // Register 6 readback
max2871_set_MUX(0x0C); /* Register 6 readback */
max2871_set_DBR(0);
max2871_set_RDIV2(0);
max2871_set_R(1); // 40 MHz f_PFD
max2871_set_R(1); /* 40 MHz f_PFD */
max2871_set_REG4DB(1);
max2871_set_CP(15); // ?: CP charge pump current 0-15
max2871_set_LDF(1); // INT-N
max2871_set_LDP(0); // ?: Lock-Detect Precision
max2871_set_CP(15); /* ?: CP charge pump current 0-15 */
max2871_set_LDF(1); /* INT-N */
max2871_set_LDP(0); /* ?: Lock-Detect Precision */
max2871_set_PDP(1);
max2871_set_SHDN(0);
max2871_set_TRI(0);
@ -84,8 +84,8 @@ void max2871_setup(max2871_driver_t* const drv)
max2871_set_SDLDO(0);
max2871_set_SDDIV(0);
max2871_set_SDREF(0);
max2871_set_BS(20*40); // For 40 MHz f_PFD
max2871_set_FB(1); // Do not put DIVA into the feedback loop
max2871_set_BS(20*40); /* For 40 MHz f_PFD */
max2871_set_FB(1); /* Do not put DIVA into the feedback loop */
max2871_set_DIVA(0);
max2871_set_SDVCO(0);
max2871_set_MTLD(1);
@ -129,8 +129,7 @@ static void serial_delay(void)
*
* Send 32 bits:
* First 29 bits are data
* Last 3 bits are register number
*/
* Last 3 bits are register number */
static void max2871_spi_write(max2871_driver_t* const drv, uint8_t r, uint32_t v) {
#if DEBUG
LOG("0x%04x -> reg%d\n", v, r);

4
firmware/common/rf_path.c
View File

@ -221,10 +221,6 @@ static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl) {
if (ctrl & SWITCHCTRL_NO_RX_AMP_PWR) {
gpio_clear(rf_path->gpio_rx_lna);
}
if (ctrl & SWITCHCTRL_ANT_PWR) {
// TODO
}
}
#endif

15
firmware/common/sgpio.c
View File

@ -93,8 +93,8 @@ void sgpio_configure(
;
#ifdef RAD1O
// The data direction might have changed. Check if we need to
// adjust the q inversion.
/* The data direction might have changed. Check if we need to
* adjust the q inversion. */
update_q_invert(config);
#endif
@ -283,19 +283,16 @@ bool sgpio_cpld_stream_rx_set_decimation(sgpio_config_t* const config, const uin
* have to go.
*
* As TX/RX can change without sgpio_cpld_stream_rx_set_q_invert
* being called, we store a local copy of its parameter.
*/
* being called, we store a local copy of its parameter. */
static bool sgpio_invert = false;
/*
* Called when TX/RX changes od sgpio_cpld_stream_rx_set_q_invert
* gets called.
*/
/* Called when TX/RX changes od sgpio_cpld_stream_rx_set_q_invert
* gets called. */
static void update_q_invert(sgpio_config_t* const config) {
/* 1=Output SGPIO11 High(TX mode), 0=Output SGPIO11 Low(RX mode) */
bool tx_mode = (SGPIO_GPIO_OUTREG & (1 << 11)) > 0;
// 0.13: P1_18
/* 0.13: P1_18 */
if( !sgpio_invert & !tx_mode) {
gpio_write(config->gpio_rx_q_invert, 1);
} else if( !sgpio_invert & tx_mode) {

6
firmware/hackrf_usb/hackrf_usb.c
View File

@ -58,8 +58,8 @@ static const usb_request_handler_fn vendor_request_handler[] = {
usb_vendor_request_set_sample_rate_frac,
usb_vendor_request_set_baseband_filter_bandwidth,
#ifdef RAD1O
NULL,
NULL,
NULL, // write_rffc5071 not used
NULL, // read_rffc5071 not used
#else
usb_vendor_request_write_rffc5071,
usb_vendor_request_read_rffc5071,
@ -163,6 +163,8 @@ int main(void) {
enable_1v8_power();
#if (defined HACKRF_ONE || defined RAD1O)
enable_rf_power();
/* Let the voltage stabilize */
delay(1000000);
#endif
cpu_clock_init();