Correct a misleading comment.
The effect of the lsr instruction here is to shift the LSB of r0 into the processor's carry flag. The subsequent bcc instruction ("branch if carry clear") will then branch if this bit was zero. The LSB corresponds to the exchange interrupt flag for slice A only. The other interrupt flag bits are not checked here, contrary to the comment.
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@ -168,7 +168,7 @@ loop:
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// Grab the exchange interrupt staus...
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ldr r0, [sgpio_int, #INT_STATUS] // 10, twice
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// ... check to see if it has any interrupt bits set...
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// ... check to see if bit #0 (slice A) was set, by shifting it into the carry bit...
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lsr r0, #1 // 1, twice
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// ... and if not, jump back to the beginning.
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