Sojus07/hackrf
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Correct a misleading comment.

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The effect of the lsr instruction here is to shift the LSB of r0 into
the processor's carry flag. The subsequent bcc instruction ("branch if
carry clear") will then branch if this bit was zero.

The LSB corresponds to the exchange interrupt flag for slice A only. The
other interrupt flag bits are not checked here, contrary to the comment.
This commit is contained in:
Martin Ling
2021-12-20 13:14:48 +00:00
parent f8ea1e8e56
commit bd7d0b9194
1 changed files with 1 additions and 1 deletions
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firmware/hackrf_usb/sgpio_m0.s
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@ -168,7 +168,7 @@ loop:
// Grab the exchange interrupt staus... // Grab the exchange interrupt staus...
ldr r0, [sgpio_int, #INT_STATUS] // 10, twice ldr r0, [sgpio_int, #INT_STATUS] // 10, twice
// ... check to see if it has any interrupt bits set... // ... check to see if bit #0 (slice A) was set, by shifting it into the carry bit...
lsr r0, #1 // 1, twice lsr r0, #1 // 1, twice
// ... and if not, jump back to the beginning. // ... and if not, jump back to the beginning.