From b43c8a58aa010498ffbd12fdca2b15858da821f3 Mon Sep 17 00:00:00 2001
From: Jared Boone <jboone@earfeast.com>
Date: Mon, 30 Apr 2012 10:07:19 -0700
Subject: [PATCH] Added links to useful documentation, products, code.

---
 hardware/test/si5351-configure.py | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/hardware/test/si5351-configure.py b/hardware/test/si5351-configure.py
index bd2e6316..99c49655 100644
--- a/hardware/test/si5351-configure.py
+++ b/hardware/test/si5351-configure.py
@@ -25,6 +25,13 @@
 # via an I2C interface, using a Dangerous Prototypes Bus Pirate v3.5
 # and the pyBusPirateLite Python library.
 #
+# Si5351C:
+#   http://www.silabs.com/products/clocksoscillators/clock-generators-and-buffers/Pages/clock+vcxo.aspx
+# Bus Pirate:
+#   http://dangerousprototypes.com/docs/Bus_Pirate
+# pyBusPirateLite:
+#   http://code.google.com/p/the-bus-pirate/
+#
 # This Si5351C configuration is a work in progress, it does not yet
 # implement the clock plan described in the HackRF wiki:
 # https://github.com/mossmann/hackrf/wiki/Clocking