Sojus07/hackrf
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

CPLD: Fix whitespace.

Browse Source
This commit is contained in:
Jared Boone
2014-08-20 08:04:09 -07:00
parent aec97e7470
commit b2f92665ea
1 changed files with 37 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
firmware/cpld/sgpio_if/top.vhd
View File

@ -32,7 +32,7 @@ entity top is
HOST_CAPTURE : out std_logic; HOST_CAPTURE : out std_logic;
HOST_DISABLE : in std_logic; HOST_DISABLE : in std_logic;
HOST_DIRECTION : in std_logic; HOST_DIRECTION : in std_logic;
HOST_DECIM_SEL : in std_logic_vector(2 downto 0); HOST_DECIM_SEL : in std_logic_vector(2 downto 0);
HOST_Q_INVERT : in std_logic; HOST_Q_INVERT : in std_logic;
DA : in std_logic_vector(7 downto 0); DA : in std_logic_vector(7 downto 0);
@ -61,11 +61,11 @@ architecture Behavioral of top is
signal data_to_host_o : std_logic_vector(7 downto 0); signal data_to_host_o : std_logic_vector(7 downto 0);
signal decimate_count : std_logic_vector(2 downto 0) := "111"; signal decimate_count : std_logic_vector(2 downto 0) := "111";
signal decimate_sel_i : std_logic_vector(2 downto 0); signal decimate_sel_i : std_logic_vector(2 downto 0);
signal decimate_en : std_logic; signal decimate_en : std_logic;
signal q_invert : std_logic; signal q_invert : std_logic;
signal q_invert_mask : std_logic_vector(7 downto 0); signal q_invert_mask : std_logic_vector(7 downto 0);
begin begin
@ -98,22 +98,22 @@ begin
transfer_direction_i <= to_dac when HOST_DIRECTION = '1' transfer_direction_i <= to_dac when HOST_DIRECTION = '1'
else from_adc; else from_adc;
decimate_sel_i <= HOST_DECIM_SEL; decimate_sel_i <= HOST_DECIM_SEL;
------------------------------------------------ ------------------------------------------------
decimate_en <= '1' when decimate_count = "111" else '0'; decimate_en <= '1' when decimate_count = "111" else '0';
process(host_clk_i) process(host_clk_i)
begin begin
if rising_edge(host_clk_i) then if rising_edge(host_clk_i) then
if codec_clk_i = '1' then if codec_clk_i = '1' then
if decimate_count = "111" or host_data_enable_i = '0' then if decimate_count = "111" or host_data_enable_i = '0' then
decimate_count <= decimate_sel_i; decimate_count <= decimate_sel_i;
else else
decimate_count <= decimate_count + 1; decimate_count <= decimate_count + 1;
end if; end if;
end if; end if;
end if; end if;
end process; end process;
@ -123,13 +123,13 @@ begin
process(host_clk_i) process(host_clk_i)
begin begin
if rising_edge(host_clk_i) then if rising_edge(host_clk_i) then
if codec_clk_i = '1' then if codec_clk_i = '1' then
-- I: non-inverted between MAX2837 and MAX5864 -- I: non-inverted between MAX2837 and MAX5864
data_to_host_o <= adc_data_i xor X"80"; data_to_host_o <= adc_data_i xor X"80";
else else
-- Q: inverted between MAX2837 and MAX5864 -- Q: inverted between MAX2837 and MAX5864
data_to_host_o <= adc_data_i xor q_invert_mask; data_to_host_o <= adc_data_i xor q_invert_mask;
end if; end if;
end if; end if;
end process; end process;