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firmware: fix duration of delay_us_at_mhz()

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This commit is contained in:
Michael Ossmann
2022-09-26 15:49:52 -04:00
parent 0e8b941897
commit b026c07000
1 changed files with 4 additions and 4 deletions
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8
firmware/common/hackrf_core.c
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@ -303,11 +303,11 @@ void delay(uint32_t duration)
void delay_us_at_mhz(uint32_t us, uint32_t mhz) void delay_us_at_mhz(uint32_t us, uint32_t mhz)
{ {
// The loop below takes 4 cycles per iteration. // The loop below takes 3 cycles per iteration.
uint32_t loop_iterations = (us * mhz) / 4; uint32_t loop_iterations = (us * mhz) / 3;
asm volatile("start%=:\n" asm volatile("start%=:\n"
" subs %[ITERATIONS], #1\n" // 1 cycle " subs %[ITERATIONS], #1\n" // 1 cycle
" bpl start%=\n" // 3 cycles " bpl start%=\n" // 2 cycles
: :
: [ITERATIONS] "r"(loop_iterations)); : [ITERATIONS] "r"(loop_iterations));
} }
@ -560,7 +560,7 @@ static void cpu_clock_pll1_max_speed(void)
CGU_BASE_M4_CLK = reg_val; CGU_BASE_M4_CLK = reg_val;
/* 9. Wait 50us. */ /* 9. Wait 50us. */
delay_us_at_mhz(50, 104); delay_us_at_mhz(50, 102);
/* 10. Set the PLL1 P-divider to direct output mode (DIRECT=1). */ /* 10. Set the PLL1 P-divider to direct output mode (DIRECT=1). */
CGU_PLL1_CTRL |= CGU_PLL1_CTRL_DIRECT_MASK; CGU_PLL1_CTRL |= CGU_PLL1_CTRL_DIRECT_MASK;