diff --git a/firmware/common/LPC4330_M4_memory.ld b/firmware/common/LPC4330_M4_memory.ld deleted file mode 100644 index 42e217cf..00000000 --- a/firmware/common/LPC4330_M4_memory.ld +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright 2012 Michael Ossmann - * Copyright 2012 Jared Boone - * - * This file is part of HackRF - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, Inc., 51 Franklin Street, - * Boston, MA 02110-1301, USA. - */ - -/* Linker script for HackRF Jellybean/Jawbreaker (LPC4330, 1M SPI flash, 264K SRAM). */ - -MEMORY -{ - /* rom is really the shadow region that points to SPI flash or elsewhere */ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 128K - ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K - ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K - ram_sleep (rwx) : ORIGIN = 0x10090000, LENGTH = 8K -} - -INCLUDE LPC43xx_M4_memory.ld diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index 9bdcf9d6..80841c65 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -470,8 +470,7 @@ bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz) { return bandwidth_hz_real != 0; } -/* clock startup for Jellybean with Lemondrop attached -Configure PLL1 to max speed (204MHz). +/* clock startup for LPC4320 configure PLL1 to max speed (204MHz). Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1. */ void cpu_clock_init(void) { @@ -546,7 +545,7 @@ void cpu_clock_init(void) si5351c_write(&clock_gen, ms7data, sizeof(ms7data)); #endif - /* Set to 10 MHz, the common rate between Jellybean and Jawbreaker. */ + /* Set to 10 MHz, the common rate between Jawbreaker and HackRF One. */ sample_rate_set(10000000); si5351c_set_clock_source(&clock_gen, PLL_SOURCE_XTAL); @@ -560,9 +559,8 @@ void cpu_clock_init(void) i2c_bus_start(clock_gen.bus, &i2c_config_si5351c_fast_clock); /* - * 12MHz clock is entering LPC XTAL1/OSC input now. On - * Jellybean/Lemondrop, this is a signal from the clock generator. On - * Jawbreaker, there is a 12 MHz crystal at the LPC. + * 12MHz clock is entering LPC XTAL1/OSC input now. + * On HackRF One and Jawbreaker, there is a 12 MHz crystal at the LPC. * Set up PLL1 to run from XTAL1 input. */ diff --git a/firmware/cpld/sgpio_if/README.md b/firmware/cpld/sgpio_if/README.md index 44fe9a8c..e56d33a6 100644 --- a/firmware/cpld/sgpio_if/README.md +++ b/firmware/cpld/sgpio_if/README.md @@ -8,20 +8,6 @@ To build this VHDL project and produce an SVF file for flashing the CPLD: * Xilinx WebPACK 13.4 for Windows or Linux. -To program the SVF file into the CPLD: - -* Dangerous Prototypes Bus Blaster v2: - * Configured with [JTAGKey buffers](http://dangerousprototypes.com/docs/Bus_Blaster_v2_buffer_logic). - * Connected to CPLD JTAG signals on Jellybean. - -* urJTAG built with libftdi support. - -* BSDL model files for Xilinx CoolRunner-II XC264A, available at xilinx.com, - in the "Device Models" Support Resources section of the CoolRunner-II - Product Support & Documentation page. Only one file from the BSDL package is - required, and the "program" script below expects it to be at the relative - path "bsdl/xc2c/xc2c64.bsd". - Generate an XSVF ================ @@ -44,8 +30,4 @@ After generating a programming file: To Program ========== -./program - -...which connects to the Bus Blaster interface 0, sets the BSDL directory, -detects devices on the JTAG chain, and writes the sgpio_if.svf file to the -CPLD. +$ hackrf_cpldjtag -x default.xsvf diff --git a/firmware/cpld/sgpio_if/program b/firmware/cpld/sgpio_if/program deleted file mode 100755 index d0b097ca..00000000 --- a/firmware/cpld/sgpio_if/program +++ /dev/null @@ -1,10 +0,0 @@ -#!/bin/sh - -echo Program Xilinx CoolRunner-II CPLD on Jellybean, using Bus Blaster v2 - -jtag < SGPIO[0-15] -B1AUX9=1 control SGPIO0 to 15 as Output. SGPIO[0-15] => B2AUX[1-16] diff --git a/firmware/cpld/sgpio_if_passthrough/program b/firmware/cpld/sgpio_if_passthrough/program deleted file mode 100755 index 0aba6b0e..00000000 --- a/firmware/cpld/sgpio_if_passthrough/program +++ /dev/null @@ -1,10 +0,0 @@ -#!/bin/sh - -echo Program Xilinx CoolRunner-II CPLD on Jellybean, using Bus Blaster v2 - -jtag < - - -
- - - - - - - - -
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/firmware/cpld/sgpio_if_passthrough/top.ucf b/firmware/cpld/sgpio_if_passthrough/top.ucf deleted file mode 100755 index cd6a2e70..00000000 --- a/firmware/cpld/sgpio_if_passthrough/top.ucf +++ /dev/null @@ -1,89 +0,0 @@ -# -# Copyright 2012 Jared Boone -# -# This file is part of HackRF. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; see the file COPYING. If not, write to -# the Free Software Foundation, Inc., 51 Franklin Street, -# Boston, MA 02110-1301, USA. - -NET "CODEC_CLK" LOC="23" |FAST |IOSTANDARD=LVCMOS18; -NET "CODEC_X2_CLK" LOC="27" |FAST |IOSTANDARD=LVCMOS18; -#NET "GCLK0" LOC="22" |FAST |IOSTANDARD=LVCMOS18; - -NET "CODEC_X2_CLK" TNM_NET = CODEC_X2_CLK; -TIMESPEC TS_codec_x2_data = PERIOD "CODEC_X2_CLK" 50 ns; - -NET "DA<7>" LOC="35" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<6>" LOC="36" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<5>" LOC="37" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<4>" LOC="39" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<3>" LOC="40" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<2>" LOC="41" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<1>" LOC="42" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<0>" LOC="43" |FAST |IOSTANDARD=LVCMOS18; - -NET "DD<9>" LOC="17" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<8>" LOC="18" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<7>" LOC="19" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<6>" LOC="24" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<5>" LOC="28" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<4>" LOC="29" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<3>" LOC="30" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<2>" LOC="32" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<1>" LOC="33" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<0>" LOC="34" |FAST |IOSTANDARD=LVCMOS18; - -NET "B1AUX<16>" LOC="60" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<15>" LOC="58" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<14>" LOC="56" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<13>" LOC="55" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<12>" LOC="53" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<11>" LOC="52" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<10>" LOC="50" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<9>" LOC="49" |FAST |IOSTANDARD=LVCMOS18; - -NET "SGPIO<15>" LOC="78" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<14>" LOC="81" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<13>" LOC="90" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<12>" LOC="70" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<11>" LOC="71" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<10>" LOC="76" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<9>" LOC="91" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<8>" LOC="68" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<7>" LOC="77" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<6>" LOC="61" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<5>" LOC="64" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<4>" LOC="67" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<3>" LOC="72" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<2>" LOC="74" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<1>" LOC="79" |FAST |IOSTANDARD=LVCMOS33; -NET "SGPIO<0>" LOC="89" |FAST |IOSTANDARD=LVCMOS33; - -NET "B2AUX<16>" LOC="92" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<15>" LOC="94" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<14>" LOC="97" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<13>" LOC="99" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<12>" LOC="1" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<11>" LOC="2" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<10>" LOC="3" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<9>" LOC="4" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<8>" LOC="6" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<7>" LOC="7" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<6>" LOC="8" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<5>" LOC="9" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<4>" LOC="10" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<3>" LOC="11" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<2>" LOC="12" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<1>" LOC="13" |FAST |IOSTANDARD=LVCMOS33; diff --git a/firmware/cpld/sgpio_if_passthrough/top.vhd b/firmware/cpld/sgpio_if_passthrough/top.vhd deleted file mode 100755 index 55be76b6..00000000 --- a/firmware/cpld/sgpio_if_passthrough/top.vhd +++ /dev/null @@ -1,60 +0,0 @@ --- --- Copyright 2012 Jared Boone --- --- This file is part of HackRF. --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 2, or (at your option) --- any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; see the file COPYING. If not, write to --- the Free Software Foundation, Inc., 51 Franklin Street, --- Boston, MA 02110-1301, USA. - -library IEEE; -use IEEE.STD_LOGIC_1164.ALL; - -library UNISIM; -use UNISIM.vcomponents.all; - -entity top is - Port( - SGPIO : inout std_logic_vector(15 downto 0); - - DA : in std_logic_vector(7 downto 0); - DD : out std_logic_vector(9 downto 0); - - CODEC_CLK : in std_logic; - CODEC_X2_CLK : in std_logic; - - B1AUX : in std_logic_vector(16 downto 9); - B2AUX : inout std_logic_vector(16 downto 1) - ); - -end top; - -architecture Behavioral of top is - type transfer_direction is (to_sgpio, from_sgpio); - signal transfer_direction_i : transfer_direction; - -begin - - transfer_direction_i <= to_sgpio when B1AUX(9) = '0' - else from_sgpio; - - DD <= (DD'high => '1', others => '0'); - - B2AUX <= SGPIO when transfer_direction_i = from_sgpio - else (others => 'Z'); - - SGPIO <= B2AUX when transfer_direction_i = to_sgpio - else (others => 'Z'); - -end Behavioral;