max2837: divisor registers calculated using long division
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@ -136,7 +136,10 @@ void max2837_set_frequency(uint32_t freq)
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{
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{
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uint8_t band;
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uint8_t band;
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uint32_t div_frac;
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uint32_t div_frac;
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uint8_t div_int;
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uint32_t div_int;
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uint32_t div_rem;
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uint32_t div_cmp;
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int i;
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/* Select band. Allow tuning outside specified bands. */
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/* Select band. Allow tuning outside specified bands. */
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if (freq < 2400000000)
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if (freq < 2400000000)
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@ -150,9 +153,22 @@ void max2837_set_frequency(uint32_t freq)
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LOG("# max2837_set_frequency %ld, band %d\n", freq, band);
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LOG("# max2837_set_frequency %ld, band %d\n", freq, band);
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/* TODO - frac vs int, compute values */
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/* ASSUME 40MHz PLL. Ratio = F*(4/3)/40,000,000 = F/30,000,000 */
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div_int = 0x12;
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div_int = freq / 30000000;
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div_frac = 0x34567;
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div_rem = freq % 30000000;
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div_frac = 0;
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div_cmp = 30000000;
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for( i = 0; i < 20; i++) {
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div_frac <<= 1;
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div_cmp >>= 1;
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if (div_rem > div_cmp) {
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div_frac |= 0x1;
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div_rem -= div_cmp;
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}
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}
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LOG("# int %ld, frac %ld\n", div_int, div_frac);
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//
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/* Write order matters here, so commit INT and FRAC_HI before
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/* Write order matters here, so commit INT and FRAC_HI before
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* committing FRAC_LOG, which is the trigger for VCO
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* committing FRAC_LOG, which is the trigger for VCO
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