SSP: Merge SSP0 and SSP1 code into single unit.
Conflicts: firmware/common/hackrf_core.c
This commit is contained in:
@ -23,8 +23,7 @@
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#include "hackrf_core.h"
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#include "hackrf_core.h"
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#include "si5351c.h"
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#include "si5351c.h"
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#include "spi_ssp0.h"
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#include "spi_ssp.h"
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#include "spi_ssp1.h"
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#include "max2837.h"
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#include "max2837.h"
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#include "max2837_target.h"
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#include "max2837_target.h"
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#include "max5864.h"
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#include "max5864.h"
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@ -43,7 +42,7 @@
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#define WAIT_CPU_CLOCK_INIT_DELAY (10000)
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#define WAIT_CPU_CLOCK_INIT_DELAY (10000)
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const ssp1_config_t ssp1_config_max2837 = {
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const ssp_config_t ssp_config_max2837 = {
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/* FIXME speed up once everything is working reliably */
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/* FIXME speed up once everything is working reliably */
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/*
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/*
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// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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@ -58,7 +57,7 @@ const ssp1_config_t ssp1_config_max2837 = {
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.unselect = max2837_target_spi_unselect,
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.unselect = max2837_target_spi_unselect,
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};
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};
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const ssp1_config_t ssp1_config_max5864 = {
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const ssp_config_t ssp_config_max5864 = {
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/* FIXME speed up once everything is working reliably */
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/* FIXME speed up once everything is working reliably */
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/*
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/*
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// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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@ -74,10 +73,11 @@ const ssp1_config_t ssp1_config_max5864 = {
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};
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};
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spi_t spi_ssp1 = {
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spi_t spi_ssp1 = {
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.config = &ssp1_config_max2837,
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.obj = (void*)SSP1_BASE,
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.init = spi_ssp1_init,
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.config = &ssp_config_max2837,
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.transfer = spi_ssp1_transfer,
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.init = spi_ssp_init,
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.transfer_gather = spi_ssp1_transfer_gather,
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.transfer = spi_ssp_transfer,
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.transfer_gather = spi_ssp_transfer_gather,
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};
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};
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max2837_driver_t max2837 = {
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max2837_driver_t max2837 = {
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@ -99,7 +99,7 @@ rffc5071_driver_t rffc5072 = {
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.spi = &rffc5071_spi,
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.spi = &rffc5071_spi,
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};
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};
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const ssp0_config_t ssp0_config_w25q80bv = {
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const ssp_config_t ssp_config_w25q80bv = {
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.data_bits = SSP_DATA_8BITS,
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.data_bits = SSP_DATA_8BITS,
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.serial_clock_rate = 2,
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.serial_clock_rate = 2,
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.clock_prescale_rate = 2,
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.clock_prescale_rate = 2,
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@ -108,10 +108,11 @@ const ssp0_config_t ssp0_config_w25q80bv = {
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};
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};
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spi_t spi_ssp0 = {
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spi_t spi_ssp0 = {
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.config = &ssp0_config_w25q80bv,
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.obj = (void*)SSP0_BASE,
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.init = spi_ssp0_init,
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.config = &ssp_config_w25q80bv,
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.transfer = spi_ssp0_transfer,
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.init = spi_ssp_init,
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.transfer_gather = spi_ssp0_transfer_gather,
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.transfer = spi_ssp_transfer,
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.transfer_gather = spi_ssp_transfer_gather,
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};
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};
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w25q80bv_driver_t spi_flash = {
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w25q80bv_driver_t spi_flash = {
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@ -494,6 +495,12 @@ void cpu_clock_init(void)
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/* Switch APB3 clock over to use PLL1 (204MHz) */
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/* Switch APB3 clock over to use PLL1 (204MHz) */
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CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK(1)
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CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK(1)
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| CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1);
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| CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1);
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CGU_BASE_SSP0_CLK = CGU_BASE_SSP0_CLK_AUTOBLOCK(1)
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| CGU_BASE_SSP0_CLK_CLK_SEL(CGU_SRC_PLL1);
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CGU_BASE_SSP1_CLK = CGU_BASE_SSP1_CLK_AUTOBLOCK(1)
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| CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1);
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}
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}
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@ -589,12 +596,12 @@ void cpu_clock_pll1_max_speed(void)
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void ssp1_set_mode_max2837(void)
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void ssp1_set_mode_max2837(void)
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{
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{
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spi_init(max2837.spi, &ssp1_config_max2837);
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spi_init(max2837.spi, &ssp_config_max2837);
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}
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}
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void ssp1_set_mode_max5864(void)
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void ssp1_set_mode_max5864(void)
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{
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{
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spi_init(max5864.spi, &ssp1_config_max5864);
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spi_init(max5864.spi, &ssp_config_max5864);
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}
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}
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void pin_setup(void) {
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void pin_setup(void) {
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@ -32,8 +32,7 @@ extern "C"
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include "spi_ssp0.h"
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#include "spi_ssp.h"
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#include "spi_ssp1.h"
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#include "max2837.h"
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#include "max2837.h"
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#include "max5864.h"
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#include "max5864.h"
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@ -359,9 +358,9 @@ typedef enum {
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void delay(uint32_t duration);
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void delay(uint32_t duration);
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/* TODO: Hide these configurations */
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/* TODO: Hide these configurations */
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extern const ssp0_config_t ssp0_config_w25q80bv;
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extern const ssp_config_t ssp_config_w25q80bv;
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extern const ssp1_config_t ssp1_config_max2837;
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extern const ssp_config_t ssp_config_max2837;
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extern const ssp1_config_t ssp1_config_max5864;
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extern const ssp_config_t ssp_config_max5864;
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extern max2837_driver_t max2837;
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extern max2837_driver_t max2837;
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extern max5864_driver_t max5864;
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extern max5864_driver_t max5864;
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@ -79,7 +79,7 @@ static const uint16_t max2837_regs_default[MAX2837_NUM_REGS] = {
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/* Set up all registers according to defaults specified in docs. */
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/* Set up all registers according to defaults specified in docs. */
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static void max2837_init(max2837_driver_t* const drv)
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static void max2837_init(max2837_driver_t* const drv)
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{
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{
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spi_init(drv->spi, &ssp1_config_max2837);
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spi_init(drv->spi, &ssp_config_max2837);
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max2837_mode_shutdown(drv);
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max2837_mode_shutdown(drv);
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max2837_target_init(drv);
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max2837_target_init(drv);
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@ -31,7 +31,7 @@ static void max5864_write(max5864_driver_t* const drv, uint8_t value) {
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}
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}
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static void max5864_init(max5864_driver_t* const drv) {
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static void max5864_init(max5864_driver_t* const drv) {
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spi_init(drv->spi, &ssp1_config_max5864);
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spi_init(drv->spi, &ssp_config_max5864);
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max5864_target_init(drv);
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max5864_target_init(drv);
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}
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}
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@ -33,6 +33,7 @@ struct spi_t;
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typedef struct spi_t spi_t;
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typedef struct spi_t spi_t;
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struct spi_t {
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struct spi_t {
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void* const obj;
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const void* config;
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const void* config;
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void (*init)(spi_t* const spi, const void* const config);
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void (*init)(spi_t* const spi, const void* const config);
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void (*transfer)(spi_t* const spi, void* const data, const size_t count);
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void (*transfer)(spi_t* const spi, void* const data, const size_t count);
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102
firmware/common/spi_ssp.c
Normal file
102
firmware/common/spi_ssp.c
Normal file
@ -0,0 +1,102 @@
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/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "spi_ssp.h"
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#include <libopencm3/lpc43xx/rgu.h>
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#include <libopencm3/lpc43xx/ssp.h>
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void spi_ssp_init(spi_t* const spi, const void* const _config) {
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const ssp_config_t* const config = _config;
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if( spi->obj == (void*)SSP0_BASE ) {
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/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
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RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
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}
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SSP_CR1(spi->obj) = 0;
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SSP_CPSR(spi->obj) = config->clock_prescale_rate;
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SSP_CR0(spi->obj) =
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(config->serial_clock_rate << 8)
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| SSP_CPOL_0_CPHA_0
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| SSP_FRAME_SPI
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| config->data_bits
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;
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SSP_CR1(spi->obj) =
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SSP_SLAVE_OUT_ENABLE
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| SSP_MASTER
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| SSP_ENABLE
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| SSP_MODE_NORMAL
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;
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spi->config = config;
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}
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static void spi_ssp_wait_for_tx_fifo_not_full(spi_t* const spi) {
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while( (SSP_SR(spi->obj) & SSP_SR_TNF) == 0 );
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}
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static void spi_ssp_wait_for_rx_fifo_not_empty(spi_t* const spi) {
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while( (SSP_SR(spi->obj) & SSP_SR_RNE) == 0 );
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}
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static void spi_ssp_wait_for_not_busy(spi_t* const spi) {
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while( SSP_SR(spi->obj) & SSP_SR_BSY );
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}
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static uint32_t spi_ssp_transfer_word(spi_t* const spi, const uint32_t data) {
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spi_ssp_wait_for_tx_fifo_not_full(spi);
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SSP_DR(spi->obj) = data;
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spi_ssp_wait_for_not_busy(spi);
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spi_ssp_wait_for_rx_fifo_not_empty(spi);
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return SSP_DR(spi->obj);
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}
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void spi_ssp_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
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const ssp_config_t* const config = spi->config;
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const bool word_size_u16 = (SSP_CR0(spi->obj) & 0xf) > SSP_DATA_8BITS;
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config->select(spi);
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for(size_t i=0; i<count; i++) {
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const size_t data_count = transfers[i].count;
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if( word_size_u16 ) {
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uint16_t* const data = transfers[i].data;
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for(size_t j=0; j<data_count; j++) {
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data[j] = spi_ssp_transfer_word(spi, data[j]);
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}
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} else {
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uint8_t* const data = transfers[i].data;
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for(size_t j=0; j<data_count; j++) {
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data[j] = spi_ssp_transfer_word(spi, data[j]);
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}
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}
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}
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config->unselect(spi);
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}
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void spi_ssp_transfer(spi_t* const spi, void* const data, const size_t count) {
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const spi_transfer_t transfers[] = {
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{ data, count },
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};
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spi_ssp_transfer_gather(spi, transfers, 1);
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}
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@ -19,8 +19,8 @@
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* Boston, MA 02110-1301, USA.
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* Boston, MA 02110-1301, USA.
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*/
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*/
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#ifndef __SPI_SSP1_H__
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#ifndef __SPI_SSP_H__
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#define __SPI_SSP1_H__
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#define __SPI_SSP_H__
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#include <stdint.h>
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#include <stdint.h>
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#include <stddef.h>
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#include <stddef.h>
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@ -29,16 +29,16 @@
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#include <libopencm3/lpc43xx/ssp.h>
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#include <libopencm3/lpc43xx/ssp.h>
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typedef struct ssp1_config_t {
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typedef struct ssp_config_t {
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ssp_datasize_t data_bits;
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ssp_datasize_t data_bits;
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uint8_t serial_clock_rate;
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uint8_t serial_clock_rate;
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uint8_t clock_prescale_rate;
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uint8_t clock_prescale_rate;
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void (*select)(spi_t* const spi);
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void (*select)(spi_t* const spi);
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void (*unselect)(spi_t* const spi);
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void (*unselect)(spi_t* const spi);
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} ssp1_config_t;
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} ssp_config_t;
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|
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void spi_ssp1_init(spi_t* const spi, const void* const config);
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void spi_ssp_init(spi_t* const spi, const void* const config);
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void spi_ssp1_transfer(spi_t* const spi, void* const data, const size_t count);
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void spi_ssp_transfer(spi_t* const spi, void* const data, const size_t count);
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void spi_ssp1_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
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void spi_ssp_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
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#endif/*__SPI_SSP1_H__*/
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#endif/*__SPI_SSP_H__*/
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@ -1,79 +0,0 @@
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/*
|
|
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* Copyright 2013 Michael Ossmann
|
|
||||||
* Copyright 2013 Benjamin Vernoux
|
|
||||||
* Copyright 2014 Jared Boone, ShareBrained Technology
|
|
||||||
*
|
|
||||||
* This file is part of HackRF.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2, or (at your option)
|
|
||||||
* any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; see the file COPYING. If not, write to
|
|
||||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
|
||||||
* Boston, MA 02110-1301, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "spi_ssp0.h"
|
|
||||||
|
|
||||||
#include <libopencm3/lpc43xx/rgu.h>
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|
||||||
#include <libopencm3/lpc43xx/ssp.h>
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|
||||||
|
|
||||||
#include "hackrf_core.h"
|
|
||||||
|
|
||||||
void spi_ssp0_init(spi_t* const spi, const void* const _config) {
|
|
||||||
/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
|
|
||||||
RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
|
|
||||||
|
|
||||||
const ssp0_config_t* const config = _config;
|
|
||||||
|
|
||||||
ssp_init(SSP0_NUM,
|
|
||||||
config->data_bits,
|
|
||||||
SSP_FRAME_SPI,
|
|
||||||
SSP_CPOL_0_CPHA_0,
|
|
||||||
config->serial_clock_rate,
|
|
||||||
config->clock_prescale_rate,
|
|
||||||
SSP_MODE_NORMAL,
|
|
||||||
SSP_MASTER,
|
|
||||||
SSP_SLAVE_OUT_ENABLE);
|
|
||||||
|
|
||||||
spi->config = config;
|
|
||||||
}
|
|
||||||
|
|
||||||
void spi_ssp0_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
|
|
||||||
const ssp0_config_t* const config = spi->config;
|
|
||||||
|
|
||||||
const size_t word_size = (SSP0_CR0 & 0xf) + 1;
|
|
||||||
|
|
||||||
config->select(spi);
|
|
||||||
for(size_t i=0; i<count; i++) {
|
|
||||||
const size_t data_count = transfers[i].count;
|
|
||||||
|
|
||||||
if( word_size > 8 ) {
|
|
||||||
uint16_t* const data = transfers[i].data;
|
|
||||||
for(size_t j=0; j<data_count; j++) {
|
|
||||||
data[j] = ssp_transfer(SSP0_NUM, data[j]);
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
uint8_t* const data = transfers[i].data;
|
|
||||||
for(size_t j=0; j<data_count; j++) {
|
|
||||||
data[j] = ssp_transfer(SSP0_NUM, data[j]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
config->unselect(spi);
|
|
||||||
}
|
|
||||||
|
|
||||||
void spi_ssp0_transfer(spi_t* const spi, void* const data, const size_t count) {
|
|
||||||
const spi_transfer_t transfers[] = {
|
|
||||||
{ data, count },
|
|
||||||
};
|
|
||||||
spi_ssp0_transfer_gather(spi, transfers, 1);
|
|
||||||
}
|
|
@ -1,44 +0,0 @@
|
|||||||
/*
|
|
||||||
* Copyright (C) 2014 Jared Boone, ShareBrained Technology
|
|
||||||
*
|
|
||||||
* This file is part of HackRF.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2, or (at your option)
|
|
||||||
* any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; see the file COPYING. If not, write to
|
|
||||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
|
||||||
* Boston, MA 02110-1301, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __SPI_SSP0_H__
|
|
||||||
#define __SPI_SSP0_H__
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
#include <stddef.h>
|
|
||||||
|
|
||||||
#include "spi.h"
|
|
||||||
|
|
||||||
#include <libopencm3/lpc43xx/ssp.h>
|
|
||||||
|
|
||||||
typedef struct ssp0_config_t {
|
|
||||||
ssp_datasize_t data_bits;
|
|
||||||
uint8_t serial_clock_rate;
|
|
||||||
uint8_t clock_prescale_rate;
|
|
||||||
void (*select)(spi_t* const spi);
|
|
||||||
void (*unselect)(spi_t* const spi);
|
|
||||||
} ssp0_config_t;
|
|
||||||
|
|
||||||
void spi_ssp0_init(spi_t* const spi, const void* const config);
|
|
||||||
void spi_ssp0_transfer(spi_t* const spi, void* const data, const size_t count);
|
|
||||||
void spi_ssp0_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
|
|
||||||
|
|
||||||
#endif/*__SPI_SSP0_H__*/
|
|
@ -1,73 +0,0 @@
|
|||||||
/*
|
|
||||||
* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
|
|
||||||
*
|
|
||||||
* This file is part of HackRF.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2, or (at your option)
|
|
||||||
* any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; see the file COPYING. If not, write to
|
|
||||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
|
||||||
* Boston, MA 02110-1301, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "spi_ssp1.h"
|
|
||||||
|
|
||||||
#include <libopencm3/lpc43xx/ssp.h>
|
|
||||||
|
|
||||||
#include "hackrf_core.h"
|
|
||||||
|
|
||||||
void spi_ssp1_init(spi_t* const spi, const void* const _config) {
|
|
||||||
const ssp1_config_t* const config = _config;
|
|
||||||
|
|
||||||
ssp_init(SSP1_NUM,
|
|
||||||
config->data_bits,
|
|
||||||
SSP_FRAME_SPI,
|
|
||||||
SSP_CPOL_0_CPHA_0,
|
|
||||||
config->serial_clock_rate,
|
|
||||||
config->clock_prescale_rate,
|
|
||||||
SSP_MODE_NORMAL,
|
|
||||||
SSP_MASTER,
|
|
||||||
SSP_SLAVE_OUT_ENABLE);
|
|
||||||
|
|
||||||
spi->config = config;
|
|
||||||
}
|
|
||||||
|
|
||||||
void spi_ssp1_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
|
|
||||||
const ssp1_config_t* const config = spi->config;
|
|
||||||
|
|
||||||
const size_t word_size = (SSP1_CR0 & 0xf) + 1;
|
|
||||||
|
|
||||||
config->select(spi);
|
|
||||||
for(size_t i=0; i<count; i++) {
|
|
||||||
const size_t data_count = transfers[i].count;
|
|
||||||
|
|
||||||
if( word_size > 8 ) {
|
|
||||||
uint16_t* const data = transfers[i].data;
|
|
||||||
for(size_t j=0; j<data_count; j++) {
|
|
||||||
data[j] = ssp_transfer(SSP1_NUM, data[j]);
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
uint8_t* const data = transfers[i].data;
|
|
||||||
for(size_t j=0; j<data_count; j++) {
|
|
||||||
data[j] = ssp_transfer(SSP1_NUM, data[j]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
config->unselect(spi);
|
|
||||||
}
|
|
||||||
|
|
||||||
void spi_ssp1_transfer(spi_t* const spi, void* const data, const size_t count) {
|
|
||||||
const spi_transfer_t transfers[] = {
|
|
||||||
{ data, count },
|
|
||||||
};
|
|
||||||
spi_ssp1_transfer_gather(spi, transfers, 1);
|
|
||||||
}
|
|
@ -59,7 +59,7 @@ void w25q80bv_setup(w25q80bv_driver_t* const drv)
|
|||||||
drv->num_pages = 4096U;
|
drv->num_pages = 4096U;
|
||||||
drv->num_bytes = 1048576U;
|
drv->num_bytes = 1048576U;
|
||||||
|
|
||||||
spi_init(drv->spi, &ssp0_config_w25q80bv);
|
spi_init(drv->spi, &ssp_config_w25q80bv);
|
||||||
w25q80bv_target_init(drv);
|
w25q80bv_target_init(drv);
|
||||||
|
|
||||||
device_id = 0;
|
device_id = 0;
|
||||||
|
@ -143,8 +143,7 @@ macro(DeclareTargets)
|
|||||||
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_target.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_target.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/spi.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/spi.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp0.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp1.c
|
|
||||||
m0_bin.s
|
m0_bin.s
|
||||||
)
|
)
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user