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Merge pull request #79 from Hoernchen/master

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This is excellent, especially the DC offset fix.
This commit is contained in:
Michael Ossmann
2013-06-26 10:37:53 -07:00
parent 5fdfabe2db b33f534da0
commit 8b2a42d706
7 changed files with 91 additions and 36 deletions
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4
firmware/common/max2837.c
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@ -141,6 +141,10 @@ void max2837_setup(void)
set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(1); set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(1);
//set_MAX2837_TXVGA_GAIN(0x3f); /* maximum attenuation */ //set_MAX2837_TXVGA_GAIN(0x3f); /* maximum attenuation */
set_MAX2837_TXVGA_GAIN(0x00); /* minimum attenuation */ set_MAX2837_TXVGA_GAIN(0x00); /* minimum attenuation */
set_MAX2837_VGAMUX_enable(1);
set_MAX2837_VGA_EN(1);
set_MAX2837_HPC_RXGAIN_EN(0);
set_MAX2837_HPC_STOP(MAX2837_STOP_1K);
set_MAX2837_LNAgain_SPI_EN(1); set_MAX2837_LNAgain_SPI_EN(1);
set_MAX2837_LNAgain(MAX2837_LNAgain_MAX); /* maximum gain */ set_MAX2837_LNAgain(MAX2837_LNAgain_MAX); /* maximum gain */
set_MAX2837_VGAgain_SPI_EN(1); set_MAX2837_VGAgain_SPI_EN(1);

39
firmware/common/rffc5071.c
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@ -448,12 +448,14 @@ void rffc5071_enable(void) {
#define REF_FREQ 50 #define REF_FREQ 50
/* configure frequency synthesizer in integer mode (lo in MHz) */ /* configure frequency synthesizer in integer mode (lo in MHz) */
uint16_t rffc5071_config_synth_int(uint16_t lo) { uint32_t rffc5071_config_synth_int(uint16_t lo) {
uint8_t lodiv; uint8_t lodiv;
uint16_t fvco; uint16_t fvco;
uint8_t fbkdiv; uint8_t fbkdiv;
uint16_t n; uint16_t n;
uint16_t tune_freq; uint32_t tune_freq_hz;
uint16_t p1nmsb;
uint8_t p1nlsb;
LOG("# config_synth_int\n"); LOG("# config_synth_int\n");
@ -481,39 +483,38 @@ uint16_t rffc5071_config_synth_int(uint16_t lo) {
set_RFFC5071_PLLCPL(2); set_RFFC5071_PLLCPL(2);
} }
n = (fvco / fbkdiv) / REF_FREQ; uint64_t tmp_n = ((uint64_t)fvco << 29ULL) / (fbkdiv*REF_FREQ) ;
tune_freq = 50*n*fbkdiv/lodiv; n = tmp_n >> 29ULL;
LOG("# lo=%d n_lo=%d lodiv=%d fvco=%d fbkdiv=%d n=%d tune_freq=%d\n", p1nmsb = (tmp_n >> 13ULL) & 0xffff;
p1nlsb = (tmp_n >> 5ULL) & 0xff;
//~ tune_freq = REF_FREQ*tmp_n*fbkdiv/lodiv / (1 << 29);
tune_freq_hz = (uint32_t)(REF_FREQ*tmp_n*fbkdiv/lodiv * 1000*1000 / (1 << 29ULL));
LOG("# lo=%d n_lo=%d lodiv=%d fvco=%d fbkdiv=%d n=%d tune_freq_hz=%d\n",
lo, n_lo, lodiv, fvco, fbkdiv, n, tune_freq); lo, n_lo, lodiv, fvco, fbkdiv, n, tune_freq);
/* Path 1 */ /* Path 1 */
set_RFFC5071_P1LODIV(n_lo); set_RFFC5071_P1LODIV(n_lo);
set_RFFC5071_P1N(n); set_RFFC5071_P1N(n);
set_RFFC5071_P1PRESC(fbkdiv >> 1); set_RFFC5071_P1PRESC(fbkdiv >> 1);
set_RFFC5071_P1NMSB(0); set_RFFC5071_P1NMSB(p1nmsb);
set_RFFC5071_P1NLSB(0); set_RFFC5071_P1NLSB(p1nlsb);
/* Path 2 */ /* Path 2 */
set_RFFC5071_P2LODIV(n_lo); set_RFFC5071_P2LODIV(n_lo);
set_RFFC5071_P2N(n); set_RFFC5071_P2N(n);
set_RFFC5071_P2PRESC(fbkdiv >> 1); set_RFFC5071_P2PRESC(fbkdiv >> 1);
set_RFFC5071_P2NMSB(0); set_RFFC5071_P2NMSB(p1nmsb);
set_RFFC5071_P2NLSB(0); set_RFFC5071_P2NLSB(p1nlsb);
rffc5071_regs_commit(); rffc5071_regs_commit();
return tune_freq; return tune_freq_hz;
} }
/* !!!!!!!!!!! hz is currently ignored !!!!!!!!!!! /* !!!!!!!!!!! hz is currently ignored !!!!!!!!!!! */
* uint32_t rffc5071_set_frequency(uint16_t mhz) {
* Tuning is rounded down to the nearest 25MHz or 50MHz depending on uint32_t tune_freq;
* frequency requsted. Actual tuned value in MHz is returned. */
uint16_t rffc5071_set_frequency(uint16_t mhz, uint32_t hz) {
uint16_t tune_freq;
// Fractional tuning unimplemented, 'hz' ignored
hz=hz;
rffc5071_disable(); rffc5071_disable();
tune_freq = rffc5071_config_synth_int(mhz); tune_freq = rffc5071_config_synth_int(mhz);

7
firmware/common/rffc5071.h
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@ -67,11 +67,8 @@ extern void rffc5071_reg_write(uint8_t r, uint16_t v);
* provided routines for those operations. */ * provided routines for those operations. */
extern void rffc5071_regs_commit(void); extern void rffc5071_regs_commit(void);
/* Set frequency (MHz). The 'hz' field is currently ignored. Actual /* Set frequency (MHz). */
* tune frequency (MHz) is returned. Expect requested freq to be extern uint32_t rffc5071_set_frequency(uint16_t mhz);
* rounded down to the nearest multiple of 25MHz or 50MHz, depending
* internal calculations. */
extern uint16_t rffc5071_set_frequency(uint16_t mhz, uint32_t hz);
/* Set up rx only, tx only, or full duplex. Chip should be disabled /* Set up rx only, tx only, or full duplex. Chip should be disabled
* before _tx, _rx, or _rxtx are called. */ * before _tx, _rx, or _rxtx are called. */

41
firmware/hackrf_usb/hackrf_usb.c
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@ -96,9 +96,10 @@ void update_switches(void)
#define MIN_HP_FREQ_MHZ (2700) #define MIN_HP_FREQ_MHZ (2700)
#define MAX_HP_FREQ_MHZ (6800) #define MAX_HP_FREQ_MHZ (6800)
#define MAX2837_FREQ_NOMINAL_HZ (2600000000) static uint32_t MAX2837_FREQ_NOMINAL_HZ=2600000000;
#define MAX2837_FREQ_NOMINAL_MHZ (MAX2837_FREQ_NOMINAL_HZ / FREQ_ONE_MHZ) #define MAX2837_FREQ_NOMINAL_MHZ (MAX2837_FREQ_NOMINAL_HZ / FREQ_ONE_MHZ)
uint32_t freq_mhz_cache=100, freq_hz_cache=0;
/* /*
* Set freq/tuning between 5MHz to 6800 MHz (less than 16bits really used) * Set freq/tuning between 5MHz to 6800 MHz (less than 16bits really used)
* hz between 0 to 999999 Hz (not checked) * hz between 0 to 999999 Hz (not checked)
@ -109,11 +110,12 @@ bool set_freq(uint32_t freq_mhz, uint32_t freq_hz)
bool success; bool success;
uint32_t RFFC5071_freq_mhz; uint32_t RFFC5071_freq_mhz;
uint32_t MAX2837_freq_hz; uint32_t MAX2837_freq_hz;
uint32_t real_RFFC5071_freq_mhz; uint32_t real_RFFC5071_freq_hz;
uint32_t tmp_hz; uint32_t tmp_hz;
success = true; success = true;
gpio_clear(PORT_XCVR_ENABLE, (PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE));
if(freq_mhz >= MIN_LP_FREQ_MHZ) if(freq_mhz >= MIN_LP_FREQ_MHZ)
{ {
if(freq_mhz < MAX_LP_FREQ_MHZ) if(freq_mhz < MAX_LP_FREQ_MHZ)
@ -122,13 +124,13 @@ bool set_freq(uint32_t freq_mhz, uint32_t freq_hz)
RFFC5071_freq_mhz = MAX2837_FREQ_NOMINAL_MHZ - freq_mhz; RFFC5071_freq_mhz = MAX2837_FREQ_NOMINAL_MHZ - freq_mhz;
/* Set Freq and read real freq */ /* Set Freq and read real freq */
real_RFFC5071_freq_mhz = rffc5071_set_frequency(RFFC5071_freq_mhz, 0); real_RFFC5071_freq_hz = rffc5071_set_frequency(RFFC5071_freq_mhz);
if(real_RFFC5071_freq_mhz < RFFC5071_freq_mhz) if(real_RFFC5071_freq_hz < RFFC5071_freq_mhz * FREQ_ONE_MHZ)
{ {
tmp_hz = -((RFFC5071_freq_mhz - real_RFFC5071_freq_mhz) * FREQ_ONE_MHZ); tmp_hz = -(RFFC5071_freq_mhz * FREQ_ONE_MHZ - real_RFFC5071_freq_hz);
}else }else
{ {
tmp_hz = ((real_RFFC5071_freq_mhz - RFFC5071_freq_mhz) * FREQ_ONE_MHZ); tmp_hz = (real_RFFC5071_freq_hz - RFFC5071_freq_mhz * FREQ_ONE_MHZ);
} }
MAX2837_freq_hz = MAX2837_FREQ_NOMINAL_HZ + tmp_hz + freq_hz; MAX2837_freq_hz = MAX2837_FREQ_NOMINAL_HZ + tmp_hz + freq_hz;
max2837_set_frequency(MAX2837_freq_hz); max2837_set_frequency(MAX2837_freq_hz);
@ -148,13 +150,13 @@ bool set_freq(uint32_t freq_mhz, uint32_t freq_hz)
RFFC5071_freq_mhz = freq_mhz - MAX2837_FREQ_NOMINAL_MHZ; RFFC5071_freq_mhz = freq_mhz - MAX2837_FREQ_NOMINAL_MHZ;
/* Set Freq and read real freq */ /* Set Freq and read real freq */
real_RFFC5071_freq_mhz = rffc5071_set_frequency(RFFC5071_freq_mhz, 0); real_RFFC5071_freq_hz = rffc5071_set_frequency(RFFC5071_freq_mhz);
if(real_RFFC5071_freq_mhz < RFFC5071_freq_mhz) if(real_RFFC5071_freq_hz < RFFC5071_freq_mhz * FREQ_ONE_MHZ)
{ {
tmp_hz = ((RFFC5071_freq_mhz - real_RFFC5071_freq_mhz) * FREQ_ONE_MHZ); tmp_hz = (RFFC5071_freq_mhz * FREQ_ONE_MHZ - real_RFFC5071_freq_hz);
}else }else
{ {
tmp_hz = -((real_RFFC5071_freq_mhz - RFFC5071_freq_mhz) * FREQ_ONE_MHZ); tmp_hz = -(real_RFFC5071_freq_hz - RFFC5071_freq_mhz * FREQ_ONE_MHZ);
} }
MAX2837_freq_hz = MAX2837_FREQ_NOMINAL_HZ + tmp_hz + freq_hz; MAX2837_freq_hz = MAX2837_FREQ_NOMINAL_HZ + tmp_hz + freq_hz;
max2837_set_frequency(MAX2837_freq_hz); max2837_set_frequency(MAX2837_freq_hz);
@ -169,6 +171,13 @@ bool set_freq(uint32_t freq_mhz, uint32_t freq_hz)
/* Error freq_mhz too low */ /* Error freq_mhz too low */
success = false; success = false;
} }
if(transceiver_mode == TRANSCEIVER_MODE_RX)
gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_RXENABLE);
else if(transceiver_mode == TRANSCEIVER_MODE_TX)
gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE);
freq_mhz_cache = freq_mhz;
freq_hz_cache = freq_hz;
return success; return success;
} }
@ -812,6 +821,17 @@ usb_request_status_t usb_vendor_request_set_txvga_gain(
return USB_REQUEST_STATUS_OK; return USB_REQUEST_STATUS_OK;
} }
usb_request_status_t usb_vendor_request_set_if_freq(
usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage
) {
if( stage == USB_TRANSFER_STAGE_SETUP ) {
MAX2837_FREQ_NOMINAL_HZ = (uint32_t)endpoint->setup.index * 1000 * 1000;
set_freq(freq_mhz_cache, freq_hz_cache);
usb_endpoint_schedule_ack(endpoint->in);
}
return USB_REQUEST_STATUS_OK;
}
static const usb_request_handler_fn vendor_request_handler[] = { static const usb_request_handler_fn vendor_request_handler[] = {
NULL, NULL,
usb_vendor_request_set_transceiver_mode, usb_vendor_request_set_transceiver_mode,
@ -835,6 +855,7 @@ static const usb_request_handler_fn vendor_request_handler[] = {
usb_vendor_request_set_lna_gain, usb_vendor_request_set_lna_gain,
usb_vendor_request_set_vga_gain, usb_vendor_request_set_vga_gain,
usb_vendor_request_set_txvga_gain, usb_vendor_request_set_txvga_gain,
usb_vendor_request_set_if_freq,
}; };
static const uint32_t vendor_request_handler_count = static const uint32_t vendor_request_handler_count =

2
firmware/sgpio-rx/sgpio-rx.c
View File

@ -104,7 +104,7 @@ int main(void) {
switchctrl = (SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_HP); switchctrl = (SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_HP);
#endif #endif
rffc5071_rx(switchctrl); rffc5071_rx(switchctrl);
rffc5071_set_frequency(500, 0); // 500 MHz, 0 Hz (Hz ignored) rffc5071_set_frequency(500); // 500 MHz
max2837_set_frequency(freq); max2837_set_frequency(freq);
max2837_start(); max2837_start();

29
host/libhackrf/src/hackrf.c
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@ -64,6 +64,7 @@ typedef enum {
HACKRF_VENDOR_REQUEST_SET_LNA_GAIN = 19, HACKRF_VENDOR_REQUEST_SET_LNA_GAIN = 19,
HACKRF_VENDOR_REQUEST_SET_VGA_GAIN = 20, HACKRF_VENDOR_REQUEST_SET_VGA_GAIN = 20,
HACKRF_VENDOR_REQUEST_SET_TXVGA_GAIN = 21, HACKRF_VENDOR_REQUEST_SET_TXVGA_GAIN = 21,
HACKRF_VENDOR_REQUEST_SET_IF_FREQ = 22,
} hackrf_vendor_request; } hackrf_vendor_request;
typedef enum { typedef enum {
@ -958,6 +959,34 @@ int ADDCALL hackrf_set_txvga_gain(hackrf_device* device, uint32_t value)
} }
} }
int ADDCALL hackrf_set_if_freq(hackrf_device* device, const uint32_t freq_mhz)
{
int result;
if(freq_mhz < 2300 || freq_mhz > 2700)
{
return HACKRF_ERROR_INVALID_PARAM;
}
result = libusb_control_transfer(
device->usb_device,
LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE,
HACKRF_VENDOR_REQUEST_SET_IF_FREQ,
0,
freq_mhz,
NULL,
0,
0
);
if( result != 0 )
{
return HACKRF_ERROR_LIBUSB;
} else {
return HACKRF_SUCCESS;
}
}
static void* transfer_threadproc(void* arg) static void* transfer_threadproc(void* arg)
{ {
hackrf_device* device = (hackrf_device*)arg; hackrf_device* device = (hackrf_device*)arg;

3
host/libhackrf/src/hackrf.h
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@ -129,6 +129,9 @@ extern ADDAPI int ADDCALL hackrf_version_string_read(hackrf_device* device, char
extern ADDAPI int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz); extern ADDAPI int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz);
/* range 2300-2700 Mhz */
extern ADDAPI int ADDCALL hackrf_set_if_freq(hackrf_device* device, const uint32_t freq_mhz);
/* currently 8-20Mhz - either as a fraction, i.e. freq 20000000hz divider 2 -> 10Mhz or as plain old 10000000hz (double) /* currently 8-20Mhz - either as a fraction, i.e. freq 20000000hz divider 2 -> 10Mhz or as plain old 10000000hz (double)
preferred rates are 8, 10, 12.5, 16, 20Mhz due to less jitter */ preferred rates are 8, 10, 12.5, 16, 20Mhz due to less jitter */
extern ADDAPI int ADDCALL hackrf_set_sample_rate_manual(hackrf_device* device, const uint32_t freq_hz, const uint32_t divider); extern ADDAPI int ADDCALL hackrf_set_sample_rate_manual(hackrf_device* device, const uint32_t freq_hz, const uint32_t divider);