diff --git a/hardware/jellybean/sgpio_if/README.md b/hardware/jellybean/sgpio_if/README.md
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+
+CPLD interface between LPC43xx microcontroller SGPIO peripheral and MAX5864
+RF codec.
+
+Requirements
+============
+
+To build this VHDL project and produce an SVF file for flashing the CPLD:
+
+* Xilinx WebPACK 13.4 for Windows or Linux.
+
+* BSDL model files for Xilinx CoolRunner-II XC264A, available at xilinx.com,
+  in the "Device Models" Support Resources section of the CoolRunner-II
+  Product Support & Documentation page. Only one file from the BSDL package is
+  required, and the "program" script below expects it to be at the relative
+  path "bsdl/xc2c/xc2c64.bsd".
+
+To program the SVF file into the CPLD:
+
+* Dangerous Prototypes Bus Blaster v2:
+  * Configured with JTAGKey buffers.
+  * Connected to CPLD JTAG signals on Jellybean.
+
+* urJTAG built with libftdi support.
+
+To Program
+==========
+
+./program
+
+...which connects to the Bus Blaster interface 0, sets the BSDL directory,
+detects devices on the JTAG chain, and writes the sgpio_if.svf file to the
+CPLD.
diff --git a/hardware/jellybean/sgpio_if/program b/hardware/jellybean/sgpio_if/program
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+#!/bin/sh
+
+echo Program Xilinx CoolRunner-II CPLD on Jellybean, using Bus Blaster v2
+
+jtag <<COMMANDSEND
+cable jtagkey vid=0x0403 pid=0x6010 interface=0 driver=ftdi-mpsse
+bsdl path bsdl/xc2c
+detect
+svf sgpio_if.svf progress stop
+COMMANDSEND