From 0ab6a92ae6d659e26b1383260e2842a63d83a575 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sun, 15 Jun 2014 10:12:43 -0700 Subject: [PATCH 1/3] Change SGPIO CPLD decimation API interface to be one-based (decimation of 1 to 8). --- firmware/common/sgpio.c | 5 +++-- firmware/common/sgpio.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c index c0da0fe6..41baa00f 100644 --- a/firmware/common/sgpio.c +++ b/firmware/common/sgpio.c @@ -48,7 +48,7 @@ void sgpio_configure_pin_functions() { scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[13] */ scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[14] */ - sgpio_cpld_stream_rx_set_decimation(0); + sgpio_cpld_stream_rx_set_decimation(1); GPIO_DIR(GPIO5) |= GPIOPIN14 | GPIOPIN13 | GPIOPIN12; } @@ -286,7 +286,7 @@ bool sgpio_cpld_stream_is_enabled() { return (SGPIO_GPIO_OUTREG & (1L << 10)) == 0; /* SGPIO10 */ } -bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t skip_n) { +bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t n) { /* CPLD interface is three bits, SGPIO[15:13]: * 111: decimate by 1 (skip_n=0, skip no samples) * 110: decimate by 2 (skip_n=1, skip every other sample) @@ -294,6 +294,7 @@ bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t skip_n) { * ... * 000: decimate by 8 (skip_n=7, skip seven of eight samples) */ + const uint_fast8_t skip_n = n - 1; GPIO_SET(GPIO5) = GPIOPIN14 | GPIOPIN13 | GPIOPIN12; GPIO_CLR(GPIO5) = (skip_n & 7) << 12; diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h index 8f0bb125..62bc8f4e 100644 --- a/firmware/common/sgpio.h +++ b/firmware/common/sgpio.h @@ -41,6 +41,6 @@ void sgpio_cpld_stream_enable(); void sgpio_cpld_stream_disable(); bool sgpio_cpld_stream_is_enabled(); -bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t skip_n); +bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t n); #endif//__SGPIO_H__ From 422173a5f74d68bf9cc5952ee96ef00d7f3ea73d Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Mon, 4 Aug 2014 14:20:42 -0700 Subject: [PATCH 2/3] SGPIO: Add CPLD RX Q channel inversion, API to control. --- firmware/common/sgpio.c | 12 +++++++++++- firmware/common/sgpio.h | 1 + firmware/cpld/sgpio_if/top.ucf | 1 + firmware/cpld/sgpio_if/top.vhd | 9 ++++++++- 4 files changed, 21 insertions(+), 2 deletions(-) diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c index 41baa00f..4c87bb44 100644 --- a/firmware/common/sgpio.c +++ b/firmware/common/sgpio.c @@ -43,13 +43,15 @@ void sgpio_configure_pin_functions() { scu_pinmux(SCU_PINMUX_SGPIO9, SCU_GPIO_FAST | SCU_CONF_FUNCTION7); scu_pinmux(SCU_PINMUX_SGPIO10, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); scu_pinmux(SCU_PINMUX_SGPIO11, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); - scu_pinmux(SCU_PINMUX_SGPIO12, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); + scu_pinmux(SCU_PINMUX_SGPIO12, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); /* GPIO0[13] */ scu_pinmux(SCU_PINMUX_SGPIO13, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */ scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[13] */ scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[14] */ sgpio_cpld_stream_rx_set_decimation(1); + sgpio_cpld_stream_rx_set_q_invert(0); + GPIO_DIR(GPIO0) |= GPIOPIN13; GPIO_DIR(GPIO5) |= GPIOPIN14 | GPIOPIN13 | GPIOPIN12; } @@ -300,3 +302,11 @@ bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t n) { return (skip_n < 8); } + +void sgpio_cpld_stream_rx_set_q_invert(const uint_fast8_t invert) { + if( invert ) { + GPIO_SET(GPIO0) = GPIOPIN13; + } else { + GPIO_CLR(GPIO0) = GPIOPIN13; + } +} diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h index 62bc8f4e..c7c13f8c 100644 --- a/firmware/common/sgpio.h +++ b/firmware/common/sgpio.h @@ -42,5 +42,6 @@ void sgpio_cpld_stream_disable(); bool sgpio_cpld_stream_is_enabled(); bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t n); +void sgpio_cpld_stream_rx_set_q_invert(const uint_fast8_t invert); #endif//__SGPIO_H__ diff --git a/firmware/cpld/sgpio_if/top.ucf b/firmware/cpld/sgpio_if/top.ucf index 7fb009ba..db85ab13 100755 --- a/firmware/cpld/sgpio_if/top.ucf +++ b/firmware/cpld/sgpio_if/top.ucf @@ -59,6 +59,7 @@ NET "HOST_DATA<0>" LOC="89" |IOSTANDARD=LVCMOS33 | SLEW=SLOW | TNM=to_host; NET "HOST_DECIM_SEL<2>" LOC="78" |IOSTANDARD=LVCMOS33; NET "HOST_DECIM_SEL<1>" LOC="81" |IOSTANDARD=LVCMOS33; NET "HOST_DECIM_SEL<0>" LOC="90" |IOSTANDARD=LVCMOS33; +NET "HOST_Q_INVERT" LOC="70" |IOSTANDARD=LVCMOS33; TIMEGRP "adc_data" OFFSET = IN 16 ns BEFORE "CODEC_X2_CLK"; diff --git a/firmware/cpld/sgpio_if/top.vhd b/firmware/cpld/sgpio_if/top.vhd index c8fab177..a3e45d38 100755 --- a/firmware/cpld/sgpio_if/top.vhd +++ b/firmware/cpld/sgpio_if/top.vhd @@ -33,6 +33,7 @@ entity top is HOST_DISABLE : in std_logic; HOST_DIRECTION : in std_logic; HOST_DECIM_SEL : in std_logic_vector(2 downto 0); + HOST_Q_INVERT : in std_logic; DA : in std_logic_vector(7 downto 0); DD : out std_logic_vector(9 downto 0); @@ -62,6 +63,9 @@ architecture Behavioral of top is signal decimate_count : std_logic_vector(2 downto 0) := "111"; signal decimate_sel_i : std_logic_vector(2 downto 0); signal decimate_en : std_logic; + + signal q_invert : std_logic; + signal q_invert_mask : std_logic_vector(7 downto 0); begin @@ -113,6 +117,9 @@ begin end if; end process; + q_invert <= HOST_Q_INVERT; + q_invert_mask <= X"80" when q_invert = '1' else X"7f"; + process(host_clk_i) begin if rising_edge(host_clk_i) then @@ -121,7 +128,7 @@ begin data_to_host_o <= adc_data_i xor X"80"; else -- Q: inverted between MAX2837 and MAX5864 - data_to_host_o <= adc_data_i xor X"7f"; + data_to_host_o <= adc_data_i xor q_invert_mask; end if; end if; end process; From 8e387e5489077d838e889179612c266830ed3913 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Mon, 11 Aug 2014 11:57:59 -0700 Subject: [PATCH 3/3] CPLD: Update bitstream files with RX Q channel flip. --- firmware/cpld/sgpio_if/default.xsvf | Bin 37629 -> 37629 bytes firmware/cpld/sgpio_if/sgpio_if.xise | 2 +- firmware/cpld/sgpio_if/top.jed | 56 +++++++++++++-------------- 3 files changed, 29 insertions(+), 29 deletions(-) diff --git a/firmware/cpld/sgpio_if/default.xsvf b/firmware/cpld/sgpio_if/default.xsvf index 720733d4b74e33aec56a4ebf7a72cf2d3f2fe67f..873eb2d20122527b9364726b92dc7222684be3db 100644 GIT binary patch delta 425 zcmeynlh?5L#A39)bT0t2PZ)3vv8LG7FnBs{sn zES`}GWbfpDW1-E$=9}1{c2ABMl%A~MFSz-;Z8{6g4KkBIxC&10cS@O@;3T_Qz?q8` z>W;||EQL1vdML4h-BJ)LG4oS9?;1>_+0h9lZ_Jq Dir1~9 delta 393 zcmeynlU3=o8twmnI?a9lAruj*qG@LP_L`>W>1mzOiTw>PZm^?+bkg-!aP|-NoI0~ zlqusMko4r6Qgw{`fkrBBu9QB`#`u4;qmn-7 - + diff --git a/firmware/cpld/sgpio_if/top.jed b/firmware/cpld/sgpio_if/top.jed index 9d609adf..5a8731c0 100755 --- a/firmware/cpld/sgpio_if/top.jed +++ b/firmware/cpld/sgpio_if/top.jed @@ -1,5 +1,5 @@ Programmer Jedec Bit Map -Date Extracted: Fri Nov 29 16:09:27 2013 +Date Extracted: Mon Aug 4 21:44:14 2014 QF25812* QP100* @@ -7,7 +7,7 @@ QV0* F0* X0* J0 0* -N VERSION P.68d* +N VERSION P.20131013* N DEVICE XC2C64A-7-VQ100* Note Block 0 * @@ -30,7 +30,7 @@ L000224 1111111111111111* L000240 1111111111111111* L000256 1111111111111111* L000272 1111111111111111* -L000288 1111111111111111* +L000288 1111111011010111* L000304 1111111111111111* L000320 1111111111111111* L000336 1111111111111111* @@ -100,7 +100,7 @@ L004000 111111111111111111111111111111111111111111111111111111111111111111111111 L004080 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L004160 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L004240 11111111111111111111111111111111111111111111111111111111111111111111111111111111* -L004320 11111111111111111111111111111111111111111111111111111111111111111111111111111111* +L004320 11111011111111111111111111111111111110111111111111111111111111111111111111111111* L004400 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L004480 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L004560 11111111111111111111111111111111111111111111111111111111111111111111111111111111* @@ -183,7 +183,7 @@ L006232 000001111001111110011111100* L006259 000001111001111110011111100* L006286 000001111001111110011111100* L006313 000001111001111110011111100* -L006340 000001111001111110011111100* +L006340 000001111001100111011111101* L006367 000101111101110110011111100* L006394 000101111101110111111111100* L006421 000101111001110110011111100* @@ -378,8 +378,8 @@ L012992 1110101011111111* L013008 1100111011111111* L013024 1110101011111111* L013040 1111111010110111* -L013056 1111111010110111* -L013072 1111111011010111* +L013056 1110101011111111* +L013072 1111111010110111* L013088 1111111010110111* L013104 1111111111111111* L013120 1111111010110111* @@ -391,7 +391,7 @@ L013200 1111111111111111* L013216 1111111111111111* L013232 1111111111111111* L013248 1111111111111111* -L013264 1111111111111111* +L013264 1111111011010111* L013280 1111111011010111* L013296 1111111111111111* L013312 1111111111111111* @@ -414,23 +414,23 @@ L013536 111101111101111111111111111111111111111111111111111111111111111110111111 L013616 11011011111001110111111111111111111111111111111111111111111111111011111111111111* L013696 11110111111011011111111111111111111111111111111111111111111111111111111111111111* L013776 11111011110111011111111111111111111111111111111111111111111111111111111111111111* -L013856 11111011111111111101111111111111111111111111111111111111111111111111111111111111* -L013936 11110111111111111110111111111111111111111111111111111111111111111111111111111111* -L014016 11111011111111111111111111110111111111111111111111111111111111111111111111111111* +L013856 11111111111111111101011111111111111111111111111111111111111111111111111111111111* +L013936 11111111111111111110101111111111111111111111111111111111111111111111111111111111* +L014016 11111111111111111111011111110111111111111111111111111111111111111111111111111111* L014096 11111111111011111111111111111111111111111111111111111111111111111111111111111111* -L014176 11110111111111111111111111111011111111111111111111111111111111111111111111111111* -L014256 11111011011111111111111111111111111111111111111111111111111111111111111111111111* -L014336 11110111101111111111111111111111111111111111111111111111111111111111111111111111* -L014416 11111011111111111111111101111111111111111111111111111111111111111111111111111111* -L014496 11110111111111111111111110111111111111111111111111111111111111111111111111111111* -L014576 11111011111111111111011111111111111111111111111111111111111111111111111111111111* -L014656 11110111111111111111101111111111111111111111111111111111111111111111111111111111* -L014736 11111011111111111111110111111111111111111111111111111111111111111111111111111111* -L014816 11110111111111111111111011111111111111111111111111111111111111111111111111111111* -L014896 11111011111111111111111111111101111111111111111111111111111111111111111111111111* -L014976 11110111111111111111111111111110111111111111111111111111111111111111111111111111* -L015056 11111011111111111111111111111111111111111111111101111111111111111111111111111111* -L015136 11110111111111111111111111111111111111111111111110111111111111111111111111111111* +L014176 11111111111111111111101111111011111111111111111111111111111111111111111111111111* +L014256 11111111011111111111011111111111111111111111111111111111111111111111111111111111* +L014336 11111111101111111111101111111111111111111111111111111111111111111111111111111111* +L014416 11111111111111111111011101111111111111111111111111111111111111111111111111111111* +L014496 11111111111111111111101110111111111111111111111111111111111111111111111111111111* +L014576 11111111111111111111010111111111111111111111111111111111111111111111111111111111* +L014656 11111111111111111111101011111111111111111111111111111111111111111111111111111111* +L014736 11111111111111111111011111111111111111111111110111111111111111111111111111111111* +L014816 11111111111111111111101111111111111111111111111011111111111111111111111111111111* +L014896 11111111111111111111011111111101111111111111111111111111111111111111111111111111* +L014976 11111111111111111111101111111110111111111111111111111111111111111111111111111111* +L015056 11111111111111111111011111111111111111111111111110111111111111111111111111111111* +L015136 11111111111111111111101111111111111111111111111101111111111111111111111111111111* L015216 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L015296 11111111111111111111111111111111111111111111111111111111111111111111111111111111* L015376 11111111111111111111111111111111111111111111111111111111111111111111111111111111* @@ -533,12 +533,12 @@ L018966 000101111000011101101000111* L018993 000001111000011100011111100* L019020 000101111000011101101000111* L019047 000001111000011100011111100* -L019074 000101111000011100001000111* +L019074 000101111000011101101000111* L019101 000001111000011100011111100* L019128 000101111000011101101000111* L019155 000101111000011101101000111* L019182 000001111000011100011111100* -L019209 000001111001111110011111100* +L019209 000001111000011100011111100* L019236 000001111001111110011111100* L019263 000101111000011101101000111* L019290 000101111000011101101000111* @@ -753,5 +753,5 @@ L025810 0* Note I/O Bank 1 Vcco * L025811 0* -C0625* -A9E4 +C0459* +AA99