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With Makefile RAM/SPIFI option, remove/rework redundant "rom_to_ram" projects.

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This commit is contained in:
Jared Boone
2013-11-20 15:20:32 -08:00
parent c365d0a37e
commit 6a03f157ff
15 changed files with 6 additions and 148 deletions
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8
firmware/Makefile
View File

@ -21,7 +21,6 @@
#
TARGETS = blinky \
blinky_rom_to_ram \
mixertx \
sgpio \
sgpio-rx \
@ -29,12 +28,7 @@ TARGETS = blinky \
startup \
startup_systick \
startup_systick_perfo \
hackrf_usb \
hackrf_usb_rom_to_ram
# blinky_rom_to_ram
# sgpio_passthrough_rom_to_ram
# startup_systick_perfo_rom_to_ram
hackrf_usb
all: build

38
firmware/blinky_rom_to_ram/Makefile
View File

@ -1,38 +0,0 @@
# Hey Emacs, this is a -*- makefile -*-
#
# Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
#
# This file is part of HackRF.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; see the file COPYING. If not, write to
# the Free Software Foundation, Inc., 51 Franklin Street,
# Boston, MA 02110-1301, USA.
#
BINARY = blinky_rom_to_ram
SRC_DIR = blinky
SRC = blinky.c \
../common/hackrf_core.c \
../common/si5351c.c \
../common/max2837.c
LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
%.o: ../$(SRC_DIR)/%.c Makefile
@printf " CC $(subst $(shell pwd)/,,$(@))\n"
$(Q)$(CC) $(CFLAGS) -o $@ -c $<
include ../common/Makefile_inc.mk

3
firmware/blinky_rom_to_ram/README
View File

@ -1,3 +0,0 @@
This is the simplest example firmware for HackRF. It flashes three LEDs.
This Example Start execution in SPIFI(ROM) and at startup, code from ROM is copied to RAM and shadow pointer is modified to RAM.
So at end all the code and vector table is executed from RAM.

42
firmware/cpldjtagprog_rom_to_ram/Makefile
View File

@ -1,42 +0,0 @@
# Hey Emacs, this is a -*- makefile -*-
#
# Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
#
# This file is part of HackRF.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; see the file COPYING. If not, write to
# the Free Software Foundation, Inc., 51 Franklin Street,
# Boston, MA 02110-1301, USA.
#
BINARY = cpldjtagprog_rom_to_ram
SRC_DIR = cpldjtagprog
SRC = cpldjtagprog.c \
../common/hackrf_core.c \
../common/si5351c.c \
../common/max2837.c \
../common/cpld_jtag.c \
../common/xapp058/lenval.c \
../common/xapp058/micro.c \
../common/xapp058/ports.c
LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
%.o: ../$(SRC_DIR)/%.c Makefile
@printf " CC $(subst $(shell pwd)/,,$(@))\n"
$(Q)$(CC) $(CFLAGS) -o $@ -c $<
include ../common/Makefile_inc.mk

1
firmware/cpldjtagprog_rom_to_ram/README
View File

@ -1 +0,0 @@
This is a test program for CPLD JTAG programming.

2
firmware/sgpio_passthrough_rom_to_ram/Makefile → firmware/sgpio_passthrough/Makefile
View File

@ -25,8 +25,8 @@ BINARY = sgpio_passthrough
SRC = $(BINARY).c \
../common/hackrf_core.c \
../common/sgpio.c \
../common/si5351c.c \
../common/max2837.c
LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
include ../common/Makefile_inc.mk

0
firmware/sgpio_passthrough_rom_to_ram/README → firmware/sgpio_passthrough/README
View File

0
firmware/sgpio_passthrough_rom_to_ram/Test_SGPIO0_to15.ods → firmware/sgpio_passthrough/Test_SGPIO0_to15.ods
View File

0
firmware/sgpio_passthrough_rom_to_ram/Test_SGPIO0_to15.pdf → firmware/sgpio_passthrough/Test_SGPIO0_to15.pdf
View File

0
firmware/sgpio_passthrough_rom_to_ram/Test_SGPIO_GPIO_mode_test_sgpio_interface.txt → firmware/sgpio_passthrough/Test_SGPIO_GPIO_mode_test_sgpio_interface.txt
View File

2
firmware/sgpio_passthrough_rom_to_ram/sgpio_passthrough.c → firmware/sgpio_passthrough/sgpio_passthrough.c
View File

@ -169,7 +169,7 @@ void test_sgpio_sliceA_D(void)
/* SGPIO pin 14 outputs slice H bit 0. */
/* SGPIO pin 15 outputs slice P bit 0. */
/*******************************************************************************/
const u8 slice_preset_tab[16] =
const uint8_t slice_preset_tab[16] =
{
0, /* Idx00 = Slice A => SGPIO0 Freq Div by 1=0 */
8, /* Idx01 = Slice B => SGPIO8 Freq Div by 9=8 */

3
firmware/startup_systick_perfo/README
View File

@ -4,6 +4,9 @@ Test number of instruction per second (MIPS) slow blink ON 1s, OFF 1s
Then after 16s (the 16tests) it blink LED1/2/3 ON/OFF each 250ms.
This example compute the number of instructions per second executed called also MIPS (Millions of Instructions Per Second)
This example code run from SRAM so maximum performance expected is 204MIPS.
See result details in result_exec_from_SRAM.txt
This example code run from SPIFI (SPI Quad mode) and the tests check different loop size to compute the cache size used with SPIFI and estimated to less than 256Bytes (about 128 instructions in best case and in Thumb2).
See result_exec_from_SPIFI.txt for more details.

0
firmware/startup_systick_perfo_rom_to_ram/result_exec_from_SRAM.txt → firmware/startup_systick_perfo/result_exec_from_SRAM.txt
View File

38
firmware/startup_systick_perfo_rom_to_ram/Makefile
View File

@ -1,38 +0,0 @@
# Hey Emacs, this is a -*- makefile -*-
#
# Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
#
# This file is part of HackRF.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2, or (at your option)
# any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; see the file COPYING. If not, write to
# the Free Software Foundation, Inc., 51 Franklin Street,
# Boston, MA 02110-1301, USA.
#
BINARY = startup_systick_perfo_rom_to_ram
SRC_DIR = startup_systick_perfo
SRC = startup_systick.c \
perf_mips.c \
../common/hackrf_core.c \
../common/si5351c.c \
../common/max2837.c
LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
%.o: ../$(SRC_DIR)/%.c Makefile
@printf " CC $(subst $(shell pwd)/,,$(@))\n"
$(Q)$(CC) $(CFLAGS) -o $@ -c $<
include ../common/Makefile_inc.mk

17
firmware/startup_systick_perfo_rom_to_ram/README
View File

@ -1,17 +0,0 @@
This program is an example of the startup sequence for HackRF (Jellybean with
Lemondrop attached).
Test number of instruction per second (MIPS) slow blink ON 1s, OFF 1s
Then after 16s (the 16tests) it blink LED1/2/3 ON/OFF each 250ms.
This example compute the number of instructions per second executed called also MIPS (Millions of Instructions Per Second)
This example code run from SRAM so maximum performance expected is 204MIPS.
See result details in result_exec_from_SRAM.txt
Required Lemondrop -> Jellybean connections:
SCL: Lemondrop P7 pin 3 -> Jellybean P6 pin 3
SDA: Lemondrop P7 pin 5 -> Jellybean P6 pin 5
SDA: Lemondrop P7 pin 6 -> Jellybean P6 pin 6
VCC: Lemondrop P4 pin 2, 4, or 6 -> Jellybean P17 pin 2, 4, or 6
1V8: Lemondrop P11 pin 2, 4, or 6 -> Jellybean P16 pin 2, 4, or 6
GND: Lemondrop P5 -> Jellybean P13