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schematic notes

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Michael Ossmann
2012-09-05 10:46:27 -06:00
parent e15c367c1c
commit 61cab9cab2
5 changed files with 9 additions and 5 deletions
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2
hardware/jawbreaker/baseband.sch
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EESchema Schematic File Version 2 date Wed Sep 5 10:36:00 2012 EESchema Schematic File Version 2 date Wed Sep 5 10:46:14 2012
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors

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hardware/jawbreaker/frontend.sch
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EESchema Schematic File Version 2 date Wed Sep 5 10:36:00 2012 EESchema Schematic File Version 2 date Wed Sep 5 10:46:14 2012
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors

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hardware/jawbreaker/jawbreaker-cache.lib
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EESchema-LIBRARY Version 2.3 Date: Wed Sep 5 10:36:00 2012 EESchema-LIBRARY Version 2.3 Date: Wed Sep 5 10:46:14 2012
#encoding utf-8 #encoding utf-8
# #
# +1.8V # +1.8V

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hardware/jawbreaker/jawbreaker.sch
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EESchema Schematic File Version 2 date Wed Sep 5 10:36:00 2012 EESchema Schematic File Version 2 date Wed Sep 5 10:46:14 2012
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors

6
hardware/jawbreaker/mcu.sch
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EESchema Schematic File Version 2 date Wed Sep 5 10:36:00 2012 EESchema Schematic File Version 2 date Wed Sep 5 10:46:14 2012
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:transistors LIBS:transistors
@ -45,6 +45,10 @@ Comment2 ""
Comment3 "" Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
Text Notes 8250 1400 0 40 ~ 0
traces may be cut to install\nheader and jumpers
Text Notes 12000 9550 0 40 ~ 0
R97 may be installed to connect SGPIO8 to the CPLD.\nBy default SGPIO8 is used as a clock input.
NoConn ~ 9700 5800 NoConn ~ 9700 5800
Text GLabel 8750 7750 3 40 Input ~ 0 Text GLabel 8750 7750 3 40 Input ~ 0
SGPIO_CLK SGPIO_CLK