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OOPS. Missed changes from clock reconfiguration two commits (and five minutes) ago.

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This commit is contained in:
Jared Boone
2012-06-13 17:58:14 -07:00
parent d99533d112
commit 61b7b76912
1 changed files with 10 additions and 4 deletions
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14
firmware/common/hackrf_core.c
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@ -49,13 +49,19 @@ void cpu_clock_init(void)
si5351c_configure_pll1_multisynth(); si5351c_configure_pll1_multisynth();
/* MS0/CLK0 is the source for the MAX2837 clock input. */ /* MS0/CLK0 is the source for the MAX2837 clock input. */
si5351c_configure_multisynth(0, 2048, 0, 1); /* 40MHz */ si5351c_configure_multisynth(0, 2048, 0, 1, 0); /* 40MHz */
/* MS1/CLK1 is the source for the MAX5864 codec. */ /* MS0/CLK1 is the source for the MAX5864 codec. */
si5351c_configure_multisynth(1, 4608, 0, 1); /* 20MHz */ si5351c_configure_multisynth(1, 4608, 0, 1, 2); /* 10MHz */
/* MS0/CLK2 is the source for the CPLD clock. */
si5351c_configure_multisynth(2, 4608, 0, 1, 1); /* 20MHz */
/* MS0/CLK3 is the source for the CPLD clock (inverted). */
si5351c_configure_multisynth(3, 4608, 0, 1, 1); /* 20MHz */
/* MS4/CLK4 is the source for the LPC43xx microcontroller. */ /* MS4/CLK4 is the source for the LPC43xx microcontroller. */
si5351c_configure_multisynth(4, 8021, 1, 3); /* 12MHz */ si5351c_configure_multisynth(4, 8021, 1, 3, 0); /* 12MHz */
si5351c_configure_clock_control(); si5351c_configure_clock_control();
si5351c_enable_clock_outputs(); si5351c_enable_clock_outputs();