adopt OSHWA convention for SPI signal names

https://www.oshwa.org/a-resolution-to-redefine-spi-signal-names
This commit is contained in:
Michael Ossmann
2020-07-03 16:37:15 -06:00
parent 43e6f99fe8
commit 5e6a2b5d95
14 changed files with 72 additions and 72 deletions

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@ -94,10 +94,10 @@ extern "C"
#endif #endif
/* SSP1 Peripheral PinMux */ /* SSP1 Peripheral PinMux */
#define SCU_SSP1_MISO (P1_3) /* P1_3 */ #define SCU_SSP1_CIPO (P1_3) /* P1_3 */
#define SCU_SSP1_MOSI (P1_4) /* P1_4 */ #define SCU_SSP1_COPI (P1_4) /* P1_4 */
#define SCU_SSP1_SCK (P1_19) /* P1_19 */ #define SCU_SSP1_SCK (P1_19) /* P1_19 */
#define SCU_SSP1_SSEL (P1_20) /* P1_20 */ #define SCU_SSP1_CS (P1_20) /* P1_20 */
/* CPLD JTAG interface */ /* CPLD JTAG interface */
#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */ #define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */
@ -177,10 +177,10 @@ extern "C"
/* SPI flash */ /* SPI flash */
#define SCU_SSP0_MISO (P3_6) #define SCU_SSP0_CIPO (P3_6)
#define SCU_SSP0_MOSI (P3_7) #define SCU_SSP0_COPI (P3_7)
#define SCU_SSP0_SCK (P3_3) #define SCU_SSP0_SCK (P3_3)
#define SCU_SSP0_SSEL (P3_8) /* GPIO5[11] on P3_8 */ #define SCU_SSP0_CS (P3_8) /* GPIO5[11] on P3_8 */
#define SCU_FLASH_HOLD (P3_4) /* GPIO1[14] on P3_4 */ #define SCU_FLASH_HOLD (P3_4) /* GPIO1[14] on P3_4 */
#define SCU_FLASH_WP (P3_5) /* GPIO1[15] on P3_5 */ #define SCU_FLASH_WP (P3_5) /* GPIO1[15] on P3_5 */

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@ -31,9 +31,9 @@ void i2c_bus_stop(i2c_bus_t* const bus) {
void i2c_bus_transfer( void i2c_bus_transfer(
i2c_bus_t* const bus, i2c_bus_t* const bus,
const uint_fast8_t slave_address, const uint_fast8_t peripheral_address,
const uint8_t* const tx, const size_t tx_count, const uint8_t* const tx, const size_t tx_count,
uint8_t* const rx, const size_t rx_count uint8_t* const rx, const size_t rx_count
) { ) {
bus->transfer(bus, slave_address, tx, tx_count, rx, rx_count); bus->transfer(bus, peripheral_address, tx, tx_count, rx, rx_count);
} }

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@ -34,7 +34,7 @@ struct i2c_bus_t {
void (*stop)(i2c_bus_t* const bus); void (*stop)(i2c_bus_t* const bus);
void (*transfer)( void (*transfer)(
i2c_bus_t* const bus, i2c_bus_t* const bus,
const uint_fast8_t slave_address, const uint_fast8_t peripheral_address,
const uint8_t* const tx, const size_t tx_count, const uint8_t* const tx, const size_t tx_count,
uint8_t* const rx, const size_t rx_count uint8_t* const rx, const size_t rx_count
); );
@ -44,7 +44,7 @@ void i2c_bus_start(i2c_bus_t* const bus, const void* const config);
void i2c_bus_stop(i2c_bus_t* const bus); void i2c_bus_stop(i2c_bus_t* const bus);
void i2c_bus_transfer( void i2c_bus_transfer(
i2c_bus_t* const bus, i2c_bus_t* const bus,
const uint_fast8_t slave_address, const uint_fast8_t peripheral_address,
const uint8_t* const tx, const size_t tx_count, const uint8_t* const tx, const size_t tx_count,
uint8_t* const rx, const size_t rx_count uint8_t* const rx, const size_t rx_count
); );

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@ -39,7 +39,7 @@ void i2c_lpc_stop(i2c_bus_t* const bus) {
} }
void i2c_lpc_transfer(i2c_bus_t* const bus, void i2c_lpc_transfer(i2c_bus_t* const bus,
const uint_fast8_t slave_address, const uint_fast8_t peripheral_address,
const uint8_t* const data_tx, const size_t count_tx, const uint8_t* const data_tx, const size_t count_tx,
uint8_t* const data_rx, const size_t count_rx uint8_t* const data_rx, const size_t count_rx
) { ) {
@ -48,7 +48,7 @@ void i2c_lpc_transfer(i2c_bus_t* const bus,
bool ack = false; bool ack = false;
if (data_tx && (count_tx > 0)) { if (data_tx && (count_tx > 0)) {
i2c_tx_start(port); i2c_tx_start(port);
i2c_tx_byte(port, (slave_address << 1) | I2C_WRITE); i2c_tx_byte(port, (peripheral_address << 1) | I2C_WRITE);
for(i=0; i<count_tx; i++) { for(i=0; i<count_tx; i++) {
i2c_tx_byte(port, data_tx[i]); i2c_tx_byte(port, data_tx[i]);
} }
@ -56,7 +56,7 @@ void i2c_lpc_transfer(i2c_bus_t* const bus,
if (data_rx && (count_rx > 0)) { if (data_rx && (count_rx > 0)) {
i2c_tx_start(port); i2c_tx_start(port);
i2c_tx_byte(port, (slave_address << 1) | I2C_READ); i2c_tx_byte(port, (peripheral_address << 1) | I2C_READ);
for(i=0; i<count_rx; i++) { for(i=0; i<count_rx; i++) {
/* ACK each byte except the last */ /* ACK each byte except the last */
ack = (i!=count_rx-1); ack = (i!=count_rx-1);

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@ -35,7 +35,7 @@ typedef struct i2c_lpc_config_t {
void i2c_lpc_start(i2c_bus_t* const bus, const void* const config); void i2c_lpc_start(i2c_bus_t* const bus, const void* const config);
void i2c_lpc_stop(i2c_bus_t* const bus); void i2c_lpc_stop(i2c_bus_t* const bus);
void i2c_lpc_transfer(i2c_bus_t* const bus, void i2c_lpc_transfer(i2c_bus_t* const bus,
const uint_fast8_t slave_address, const uint_fast8_t peripheral_address,
const uint8_t* const data_tx, const size_t count_tx, const uint8_t* const data_tx, const size_t count_tx,
uint8_t* const data_rx, const size_t count_rx uint8_t* const data_rx, const size_t count_rx
); );

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@ -27,8 +27,8 @@
void max2837_target_init(max2837_driver_t* const drv) { void max2837_target_init(max2837_driver_t* const drv) {
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */ /* Configure SSP1 Peripheral (to be moved later in SSP driver) */
scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST); scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST);

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@ -28,8 +28,8 @@ void max5864_target_init(max5864_driver_t* const drv) {
(void)drv; (void)drv;
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */ /* Configure SSP1 Peripheral (to be moved later in SSP driver) */
scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
/* /*

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@ -52,7 +52,7 @@
/* /*
* Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI. * Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI.
* SSP0_SSEL is controlled by GPIO in order to handle various transfer lengths. * SSP0_CS is controlled by GPIO in order to handle various transfer lengths.
*/ */
void w25q80bv_setup(w25q80bv_driver_t* const drv) void w25q80bv_setup(w25q80bv_driver_t* const drv)
{ {

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@ -24,7 +24,7 @@
#include <libopencm3/lpc43xx/scu.h> #include <libopencm3/lpc43xx/scu.h>
#include "hackrf_core.h" #include "hackrf_core.h"
/* TODO: Why is SSEL being controlled manually when SSP0 could do it /* TODO: Why is CS being controlled manually when SSP0 could do it
* automatically? * automatically?
*/ */
@ -35,21 +35,21 @@ void w25q80bv_target_init(w25q80bv_driver_t* const drv) {
scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_3 SPIFI_SCK => SSP0_SCK scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_3 SPIFI_SCK => SSP0_SCK
scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14] scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14]
scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15] scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15]
scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_MISO IO1 => GPIO0[6] scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_CIPO IO1 => GPIO0[6]
scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_MOSI IO0 => GPIO5[10] scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_COPI IO0 => GPIO5[10]
scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11] scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11]
/* configure SSP pins */ /* configure SSP pins */
scu_pinmux(SCU_SSP0_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP0_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP0_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP0_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP0_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); scu_pinmux(SCU_SSP0_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION2));
/* configure GPIO pins */ /* configure GPIO pins */
scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST); scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST);
scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST); scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST);
scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); scu_pinmux(SCU_SSP0_CS, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
/* drive SSEL, HOLD, and WP pins high */ /* drive CS, HOLD, and WP pins high */
gpio_set(drv->gpio_hold); gpio_set(drv->gpio_hold);
gpio_set(drv->gpio_wp); gpio_set(drv->gpio_wp);

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@ -90,9 +90,9 @@ $EndComp
Text Notes 1750 5050 0 40 ~ 0 Text Notes 1750 5050 0 40 ~ 0
test points test points
Text GLabel 1300 5550 3 40 Input ~ 0 Text GLabel 1300 5550 3 40 Input ~ 0
SSP1_MISO SSP1_CIPO
Text GLabel 1150 5550 3 40 Input ~ 0 Text GLabel 1150 5550 3 40 Input ~ 0
SSP1_MOSI SSP1_COPI
Text GLabel 1000 5550 3 40 Input ~ 0 Text GLabel 1000 5550 3 40 Input ~ 0
SSP1_SCK SSP1_SCK
$Comp $Comp
@ -100,7 +100,7 @@ L CONN_1 P40
U 1 1 5052A336 U 1 1 5052A336
P 1150 5300 P 1150 5300
F 0 "P40" H 1230 5300 40 0000 L CNN F 0 "P40" H 1230 5300 40 0000 L CNN
F 1 "SSP1_MOSI" H 1150 5355 30 0001 C CNN F 1 "SSP1_COPI" H 1150 5355 30 0001 C CNN
F 2 "hackrf:GSG-TESTPOINT-50MIL" H 1150 5300 60 0001 C CNN F 2 "hackrf:GSG-TESTPOINT-50MIL" H 1150 5300 60 0001 C CNN
F 3 "" H 1150 5300 60 0001 C CNN F 3 "" H 1150 5300 60 0001 C CNN
F 4 "DNP" H 1150 5300 60 0001 C CNN "Note" F 4 "DNP" H 1150 5300 60 0001 C CNN "Note"
@ -112,7 +112,7 @@ L CONN_1 P41
U 1 1 5052A335 U 1 1 5052A335
P 1300 5300 P 1300 5300
F 0 "P41" H 1380 5300 40 0000 L CNN F 0 "P41" H 1380 5300 40 0000 L CNN
F 1 "SSP1_MISO" H 1300 5355 30 0001 C CNN F 1 "SSP1_CIPO" H 1300 5355 30 0001 C CNN
F 2 "hackrf:GSG-TESTPOINT-50MIL" H 1300 5300 60 0001 C CNN F 2 "hackrf:GSG-TESTPOINT-50MIL" H 1300 5300 60 0001 C CNN
F 3 "" H 1300 5300 60 0001 C CNN F 3 "" H 1300 5300 60 0001 C CNN
F 4 "DNP" H 1300 5300 60 0001 C CNN "Note" F 4 "DNP" H 1300 5300 60 0001 C CNN "Note"
@ -2282,11 +2282,11 @@ SSP1_SCK
Text GLabel 15650 4500 2 40 Input ~ 0 Text GLabel 15650 4500 2 40 Input ~ 0
SSP1_SCK SSP1_SCK
Text GLabel 15650 4600 2 40 Input ~ 0 Text GLabel 15650 4600 2 40 Input ~ 0
SSP1_MOSI SSP1_COPI
Text GLabel 9100 4900 2 40 Input ~ 0 Text GLabel 9100 4900 2 40 Input ~ 0
SSP1_MOSI SSP1_COPI
Text GLabel 9100 5100 2 40 Input ~ 0 Text GLabel 9100 5100 2 40 Input ~ 0
SSP1_MISO SSP1_CIPO
$Comp $Comp
L VCC #PWR0163 L VCC #PWR0163
U 1 1 52699FA2 U 1 1 52699FA2
@ -3842,7 +3842,7 @@ Wire Wire Line
11400 8300 11300 8300 11400 8300 11300 8300
Connection ~ 11300 8300 Connection ~ 11300 8300
Text GLabel 9800 7450 1 40 Input ~ 0 Text GLabel 9800 7450 1 40 Input ~ 0
SSP1_MISO SSP1_CIPO
$Comp $Comp
L C C168 L C C168
U 1 1 52963CCA U 1 1 52963CCA

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@ -1690,14 +1690,14 @@ EndCmp
BeginCmp BeginCmp
TimeStamp = /50370666/5052A336; TimeStamp = /50370666/5052A336;
Reference = P40; Reference = P40;
ValeurCmp = SSP1_MOSI; ValeurCmp = SSP1_COPI;
IdModule = hackrf:GSG-TESTPOINT-50MIL; IdModule = hackrf:GSG-TESTPOINT-50MIL;
EndCmp EndCmp
BeginCmp BeginCmp
TimeStamp = /50370666/5052A335; TimeStamp = /50370666/5052A335;
Reference = P41; Reference = P41;
ValeurCmp = SSP1_MISO; ValeurCmp = SSP1_CIPO;
IdModule = hackrf:GSG-TESTPOINT-50MIL; IdModule = hackrf:GSG-TESTPOINT-50MIL;
EndCmp EndCmp

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@ -248,8 +248,8 @@
(net 144 /mcu/usb/power/SGPIO7) (net 144 /mcu/usb/power/SGPIO7)
(net 145 /mcu/usb/power/SGPIO9) (net 145 /mcu/usb/power/SGPIO9)
(net 146 /mcu/usb/power/SPIFI_CS) (net 146 /mcu/usb/power/SPIFI_CS)
(net 147 /mcu/usb/power/SPIFI_MISO) (net 147 /mcu/usb/power/SPIFI_CIPO)
(net 148 /mcu/usb/power/SPIFI_MOSI) (net 148 /mcu/usb/power/SPIFI_COPI)
(net 149 /mcu/usb/power/SPIFI_SCK) (net 149 /mcu/usb/power/SPIFI_SCK)
(net 150 /mcu/usb/power/SPIFI_SIO2) (net 150 /mcu/usb/power/SPIFI_SIO2)
(net 151 /mcu/usb/power/SPIFI_SIO3) (net 151 /mcu/usb/power/SPIFI_SIO3)
@ -313,8 +313,8 @@
(net 209 SCL) (net 209 SCL)
(net 210 SDA) (net 210 SDA)
(net 211 SGPIO_CLK) (net 211 SGPIO_CLK)
(net 212 SSP1_MISO) (net 212 SSP1_CIPO)
(net 213 SSP1_MOSI) (net 213 SSP1_COPI)
(net 214 SSP1_SCK) (net 214 SSP1_SCK)
(net 215 TX) (net 215 TX)
(net 216 TXENABLE) (net 216 TXENABLE)
@ -634,8 +634,8 @@
(add_net /mcu/usb/power/SGPIO7) (add_net /mcu/usb/power/SGPIO7)
(add_net /mcu/usb/power/SGPIO9) (add_net /mcu/usb/power/SGPIO9)
(add_net /mcu/usb/power/SPIFI_CS) (add_net /mcu/usb/power/SPIFI_CS)
(add_net /mcu/usb/power/SPIFI_MISO) (add_net /mcu/usb/power/SPIFI_CIPO)
(add_net /mcu/usb/power/SPIFI_MOSI) (add_net /mcu/usb/power/SPIFI_COPI)
(add_net /mcu/usb/power/SPIFI_SCK) (add_net /mcu/usb/power/SPIFI_SCK)
(add_net /mcu/usb/power/SPIFI_SIO2) (add_net /mcu/usb/power/SPIFI_SIO2)
(add_net /mcu/usb/power/SPIFI_SIO3) (add_net /mcu/usb/power/SPIFI_SIO3)
@ -855,8 +855,8 @@
(add_net SCL) (add_net SCL)
(add_net SDA) (add_net SDA)
(add_net SGPIO_CLK) (add_net SGPIO_CLK)
(add_net SSP1_MISO) (add_net SSP1_CIPO)
(add_net SSP1_MOSI) (add_net SSP1_COPI)
(add_net SSP1_SCK) (add_net SSP1_SCK)
(add_net TX) (add_net TX)
(add_net TXENABLE) (add_net TXENABLE)
@ -4693,7 +4693,7 @@
(pad 2 smd rect (at 0.5334 0 180) (size 0.508 0.5588) (layers C1F F.Paste F.Mask) (pad 2 smd rect (at 0.5334 0 180) (size 0.508 0.5588) (layers C1F F.Paste F.Mask)
(net 193 GND) (solder_mask_margin 0.1016)) (net 193 GND) (solder_mask_margin 0.1016))
(pad 1 smd rect (at -0.5334 0 180) (size 0.508 0.5588) (layers C1F F.Paste F.Mask) (pad 1 smd rect (at -0.5334 0 180) (size 0.508 0.5588) (layers C1F F.Paste F.Mask)
(net 212 SSP1_MISO) (die_length -2147.483648) (solder_mask_margin 0.1016)) (net 212 SSP1_CIPO) (die_length -2147.483648) (solder_mask_margin 0.1016))
) )
(module hackrf:GSG-0402 (layer C1F) (tedit 4FB6CFE4) (tstamp 5787E592) (module hackrf:GSG-0402 (layer C1F) (tedit 4FB6CFE4) (tstamp 5787E592)
@ -6010,11 +6010,11 @@
(pad 6 thru_hole circle (at -10.16 -1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 6 thru_hole circle (at -10.16 -1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 99 /mcu/usb/power/I2C1_SDA) (die_length 0.12192)) (net 99 /mcu/usb/power/I2C1_SDA) (die_length 0.12192))
(pad 7 thru_hole circle (at -7.62 1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 7 thru_hole circle (at -7.62 1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 147 /mcu/usb/power/SPIFI_MISO) (die_length 0.12192)) (net 147 /mcu/usb/power/SPIFI_CIPO) (die_length 0.12192))
(pad 8 thru_hole circle (at -7.62 -1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 8 thru_hole circle (at -7.62 -1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 149 /mcu/usb/power/SPIFI_SCK) (die_length 0.08382)) (net 149 /mcu/usb/power/SPIFI_SCK) (die_length 0.08382))
(pad 9 thru_hole circle (at -5.08 1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 9 thru_hole circle (at -5.08 1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 148 /mcu/usb/power/SPIFI_MOSI) (die_length -2147.483648)) (net 148 /mcu/usb/power/SPIFI_COPI) (die_length -2147.483648))
(pad 10 thru_hole circle (at -5.08 -1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 10 thru_hole circle (at -5.08 -1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 193 GND) (die_length 0.24638)) (net 193 GND) (die_length 0.24638))
(pad 11 thru_hole circle (at -2.54 1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) (pad 11 thru_hole circle (at -2.54 1.27 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
@ -6450,12 +6450,12 @@
(fp_text reference P40 (at 0 0) (layer F.SilkS) (fp_text reference P40 (at 0 0) (layer F.SilkS)
(effects (font (size 0.381 0.381) (thickness 0.09652))) (effects (font (size 0.381 0.381) (thickness 0.09652)))
) )
(fp_text value SSP1_MOSI (at 0 0) (layer F.SilkS) hide (fp_text value SSP1_COPI (at 0 0) (layer F.SilkS) hide
(effects (font (size 0.508 0.508) (thickness 0.127))) (effects (font (size 0.508 0.508) (thickness 0.127)))
) )
(fp_circle (center 0 0) (end 0.7112 0) (layer F.SilkS) (width 0.2032)) (fp_circle (center 0 0) (end 0.7112 0) (layer F.SilkS) (width 0.2032))
(pad 1 smd circle (at 0 0) (size 1.27 1.27) (layers C1F F.Mask) (pad 1 smd circle (at 0 0) (size 1.27 1.27) (layers C1F F.Mask)
(net 213 SSP1_MOSI) (die_length 0.1651)) (net 213 SSP1_COPI) (die_length 0.1651))
) )
(module hackrf:GSG-TESTPOINT-50MIL (layer C1F) (tedit 50997FDC) (tstamp 5787E8B3) (module hackrf:GSG-TESTPOINT-50MIL (layer C1F) (tedit 50997FDC) (tstamp 5787E8B3)
@ -6464,12 +6464,12 @@
(fp_text reference P41 (at 0 0 180) (layer F.SilkS) (fp_text reference P41 (at 0 0 180) (layer F.SilkS)
(effects (font (size 0.381 0.381) (thickness 0.09652))) (effects (font (size 0.381 0.381) (thickness 0.09652)))
) )
(fp_text value SSP1_MISO (at 0 0 180) (layer F.SilkS) hide (fp_text value SSP1_CIPO (at 0 0 180) (layer F.SilkS) hide
(effects (font (size 0.508 0.508) (thickness 0.127))) (effects (font (size 0.508 0.508) (thickness 0.127)))
) )
(fp_circle (center 0 0) (end 0.7112 0) (layer F.SilkS) (width 0.2032)) (fp_circle (center 0 0) (end 0.7112 0) (layer F.SilkS) (width 0.2032))
(pad 1 smd circle (at 0 0 180) (size 1.27 1.27) (layers C1F F.Mask) (pad 1 smd circle (at 0 0 180) (size 1.27 1.27) (layers C1F F.Mask)
(net 212 SSP1_MISO) (die_length 0.1651)) (net 212 SSP1_CIPO) (die_length 0.1651))
) )
(module hackrf:GSG-TESTPOINT-50MIL (layer C1F) (tedit 50997FDC) (tstamp 5787E8B8) (module hackrf:GSG-TESTPOINT-50MIL (layer C1F) (tedit 50997FDC) (tstamp 5787E8B8)
@ -9641,13 +9641,13 @@
(pad 1 smd rect (at -3.81 -1.905 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask) (pad 1 smd rect (at -3.81 -1.905 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask)
(net 146 /mcu/usb/power/SPIFI_CS) (die_length 0.08382)) (net 146 /mcu/usb/power/SPIFI_CS) (die_length 0.08382))
(pad 2 smd rect (at -3.81 -0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask) (pad 2 smd rect (at -3.81 -0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask)
(net 147 /mcu/usb/power/SPIFI_MISO) (die_length 0.08128)) (net 147 /mcu/usb/power/SPIFI_CIPO) (die_length 0.08128))
(pad 3 smd rect (at -3.81 0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask) (pad 3 smd rect (at -3.81 0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask)
(net 150 /mcu/usb/power/SPIFI_SIO2) (die_length 0.1143)) (net 150 /mcu/usb/power/SPIFI_SIO2) (die_length 0.1143))
(pad 4 smd rect (at -3.81 1.905 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask) (pad 4 smd rect (at -3.81 1.905 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask)
(net 193 GND) (die_length 0.53086)) (net 193 GND) (die_length 0.53086))
(pad 5 smd rect (at 3.81 1.905 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask) (pad 5 smd rect (at 3.81 1.905 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask)
(net 148 /mcu/usb/power/SPIFI_MOSI) (die_length -2147.483648)) (net 148 /mcu/usb/power/SPIFI_COPI) (die_length -2147.483648))
(pad 6 smd rect (at 3.81 0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask) (pad 6 smd rect (at 3.81 0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask)
(net 149 /mcu/usb/power/SPIFI_SCK) (die_length -2147.483648)) (net 149 /mcu/usb/power/SPIFI_SCK) (die_length -2147.483648))
(pad 7 smd rect (at 3.81 -0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask) (pad 7 smd rect (at 3.81 -0.635 180) (size 1.905 0.635) (layers C1F F.Paste F.Mask)
@ -9835,13 +9835,13 @@
(pad 43 smd rect (at -5.75056 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 43 smd rect (at -5.75056 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 111 /mcu/usb/power/P1_2) (die_length -2147.483648)) (net 111 /mcu/usb/power/P1_2) (die_length -2147.483648))
(pad 44 smd rect (at -5.25018 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 44 smd rect (at -5.25018 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 212 SSP1_MISO) (die_length -2147.483648)) (net 212 SSP1_CIPO) (die_length -2147.483648))
(pad 45 smd rect (at -4.7498 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 45 smd rect (at -4.7498 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 123 /mcu/usb/power/SD_CLK) (die_length 0.01778)) (net 123 /mcu/usb/power/SD_CLK) (die_length 0.01778))
(pad 46 smd rect (at -4.24942 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 46 smd rect (at -4.24942 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 219 TX_MIX_BP) (die_length 0.01524)) (net 219 TX_MIX_BP) (die_length 0.01524))
(pad 47 smd rect (at -3.74904 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 47 smd rect (at -3.74904 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 213 SSP1_MOSI) (die_length 0.01524)) (net 213 SSP1_COPI) (die_length 0.01524))
(pad 48 smd rect (at -3.2512 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 48 smd rect (at -3.2512 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 129 /mcu/usb/power/SD_POW) (die_length -2147.483648)) (net 129 /mcu/usb/power/SD_POW) (die_length -2147.483648))
(pad 49 smd rect (at -2.75082 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 49 smd rect (at -2.75082 11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
@ -9991,9 +9991,9 @@
(pad 121 smd rect (at 2.75082 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 121 smd rect (at 2.75082 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 150 /mcu/usb/power/SPIFI_SIO2) (die_length 0.01524)) (net 150 /mcu/usb/power/SPIFI_SIO2) (die_length 0.01524))
(pad 122 smd rect (at 2.25044 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 122 smd rect (at 2.25044 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 147 /mcu/usb/power/SPIFI_MISO) (die_length 0.01524)) (net 147 /mcu/usb/power/SPIFI_CIPO) (die_length 0.01524))
(pad 123 smd rect (at 1.75006 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 123 smd rect (at 1.75006 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 148 /mcu/usb/power/SPIFI_MOSI) (die_length -2147.483648)) (net 148 /mcu/usb/power/SPIFI_COPI) (die_length -2147.483648))
(pad 124 smd rect (at 1.24968 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 124 smd rect (at 1.24968 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
(net 146 /mcu/usb/power/SPIFI_CS) (die_length -2147.483648)) (net 146 /mcu/usb/power/SPIFI_CS) (die_length -2147.483648))
(pad 125 smd rect (at 0.7493 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask) (pad 125 smd rect (at 0.7493 -11.00074 315) (size 1.50114 0.29464) (layers C1F F.Paste F.Mask)
@ -10552,11 +10552,11 @@
(pad 28 smd oval (at 3 1 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask) (pad 28 smd oval (at 3 1 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask)
(net 220 VAA)) (net 220 VAA))
(pad 29 smd oval (at 3 0.6 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask) (pad 29 smd oval (at 3 0.6 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask)
(net 212 SSP1_MISO)) (net 212 SSP1_CIPO))
(pad 30 smd oval (at 3 0.2 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask) (pad 30 smd oval (at 3 0.2 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask)
(net 172 CS_XCVR)) (net 172 CS_XCVR))
(pad 31 smd oval (at 3 -0.2 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask) (pad 31 smd oval (at 3 -0.2 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask)
(net 213 SSP1_MOSI)) (net 213 SSP1_COPI))
(pad 32 smd oval (at 3 -0.6 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask) (pad 32 smd oval (at 3 -0.6 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask)
(net 203 RSSI)) (net 203 RSSI))
(pad 33 smd oval (at 3 -1 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask) (pad 33 smd oval (at 3 -1 90) (size 0.87 0.245) (layers C1F F.Paste F.Mask)
@ -10716,7 +10716,7 @@
(pad 33 smd oval (at 3.45 -1.25 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask) (pad 33 smd oval (at 3.45 -1.25 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask)
(net 220 VAA)) (net 220 VAA))
(pad 34 smd oval (at 3.45 -1.75 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask) (pad 34 smd oval (at 3.45 -1.75 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask)
(net 213 SSP1_MOSI)) (net 213 SSP1_COPI))
(pad 35 smd oval (at 3.45 -2.25 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask) (pad 35 smd oval (at 3.45 -2.25 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask)
(net 214 SSP1_SCK)) (net 214 SSP1_SCK))
(pad 36 smd oval (at 3.45 -2.75 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask) (pad 36 smd oval (at 3.45 -2.75 90) (size 0.9 0.28) (layers C1F F.Paste F.Mask)

View File

@ -1450,7 +1450,7 @@
(sheetpath (names /baseband/) (tstamps /50370666/)) (sheetpath (names /baseband/) (tstamps /50370666/))
(tstamp 5052A7D7)) (tstamp 5052A7D7))
(comp (ref P40) (comp (ref P40)
(value SSP1_MOSI) (value SSP1_COPI)
(footprint hackrf:GSG-TESTPOINT-50MIL) (footprint hackrf:GSG-TESTPOINT-50MIL)
(fields (fields
(field (name Note) DNP)) (field (name Note) DNP))
@ -1458,7 +1458,7 @@
(sheetpath (names /baseband/) (tstamps /50370666/)) (sheetpath (names /baseband/) (tstamps /50370666/))
(tstamp 5052A336)) (tstamp 5052A336))
(comp (ref P41) (comp (ref P41)
(value SSP1_MISO) (value SSP1_CIPO)
(footprint hackrf:GSG-TESTPOINT-50MIL) (footprint hackrf:GSG-TESTPOINT-50MIL)
(fields (fields
(field (name Note) DNP)) (field (name Note) DNP))
@ -5314,11 +5314,11 @@
(node (ref P16) (pin 1)) (node (ref P16) (pin 1))
(node (ref U19) (pin 6)) (node (ref U19) (pin 6))
(node (ref D3) (pin 2))) (node (ref D3) (pin 2)))
(net (code 46) (name /mcu/usb/power/SPIFI_MISO) (net (code 46) (name /mcu/usb/power/SPIFI_CIPO)
(node (ref U23) (pin 122)) (node (ref U23) (pin 122))
(node (ref P22) (pin 7)) (node (ref P22) (pin 7))
(node (ref U20) (pin 2))) (node (ref U20) (pin 2)))
(net (code 47) (name /mcu/usb/power/SPIFI_MOSI) (net (code 47) (name /mcu/usb/power/SPIFI_COPI)
(node (ref U20) (pin 5)) (node (ref U20) (pin 5))
(node (ref U23) (pin 123)) (node (ref U23) (pin 123))
(node (ref P22) (pin 9))) (node (ref P22) (pin 9)))
@ -5503,7 +5503,7 @@
(node (ref U18) (pin 36)) (node (ref U18) (pin 36))
(node (ref U23) (pin 65)) (node (ref U23) (pin 65))
(node (ref P54) (pin 1))) (node (ref P54) (pin 1)))
(net (code 97) (name SSP1_MISO) (net (code 97) (name SSP1_CIPO)
(node (ref P41) (pin 1)) (node (ref P41) (pin 1))
(node (ref C168) (pin 1)) (node (ref C168) (pin 1))
(node (ref U23) (pin 44)) (node (ref U23) (pin 44))
@ -5985,7 +5985,7 @@
(node (ref R11) (pin 2)) (node (ref R11) (pin 2))
(node (ref Q3) (pin G)) (node (ref Q3) (pin G))
(node (ref P5) (pin 5))) (node (ref P5) (pin 5)))
(net (code 215) (name SSP1_MOSI) (net (code 215) (name SSP1_COPI)
(node (ref P40) (pin 1)) (node (ref P40) (pin 1))
(node (ref U17) (pin 31)) (node (ref U17) (pin 31))
(node (ref U23) (pin 47)) (node (ref U23) (pin 47))

View File

@ -1312,9 +1312,9 @@ CS_AD
Text GLabel 8350 7750 3 40 Input ~ 0 Text GLabel 8350 7750 3 40 Input ~ 0
SSP1_SCK SSP1_SCK
Text GLabel 6250 7750 3 40 Input ~ 0 Text GLabel 6250 7750 3 40 Input ~ 0
SSP1_MOSI SSP1_COPI
Text GLabel 5950 7750 3 40 Input ~ 0 Text GLabel 5950 7750 3 40 Input ~ 0
SSP1_MISO SSP1_CIPO
Text GLabel 12500 9050 3 40 Input ~ 0 Text GLabel 12500 9050 3 40 Input ~ 0
GCK2 GCK2
Text GLabel 11500 7950 0 40 Input ~ 0 Text GLabel 11500 7950 0 40 Input ~ 0
@ -2726,9 +2726,9 @@ SGPIO0
Text Label 7550 1400 1 40 ~ 0 Text Label 7550 1400 1 40 ~ 0
SPIFI_SIO2 SPIFI_SIO2
Text Label 7350 1400 1 40 ~ 0 Text Label 7350 1400 1 40 ~ 0
SPIFI_MOSI SPIFI_COPI
Text Label 7450 1400 1 40 ~ 0 Text Label 7450 1400 1 40 ~ 0
SPIFI_MISO SPIFI_CIPO
Text Label 4000 5300 0 40 ~ 0 Text Label 4000 5300 0 40 ~ 0
RREF RREF
Text Label 4000 6000 0 40 ~ 0 Text Label 4000 6000 0 40 ~ 0
@ -3256,11 +3256,11 @@ F 3 "" H 12800 3500 60 0001 C CNN
0 -1 -1 0 0 -1 -1 0
$EndComp $EndComp
Text Label 11100 3400 0 40 ~ 0 Text Label 11100 3400 0 40 ~ 0
SPIFI_MISO SPIFI_CIPO
Text Label 12800 3400 2 40 ~ 0 Text Label 12800 3400 2 40 ~ 0
SPIFI_SCK SPIFI_SCK
Text Label 11100 3500 0 40 ~ 0 Text Label 11100 3500 0 40 ~ 0
SPIFI_MOSI SPIFI_COPI
Text Label 10000 5100 2 40 ~ 0 Text Label 10000 5100 2 40 ~ 0
I2C1_SDA I2C1_SDA
Text Label 10000 5000 2 40 ~ 0 Text Label 10000 5000 2 40 ~ 0