MAX2837: Refactoring toward abstracted SPI.
Conflicts: firmware/common/hackrf_core.c firmware/common/hackrf_core.h firmware/common/tuning.c
This commit is contained in:
@ -24,6 +24,8 @@
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#include "hackrf_core.h"
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#include "hackrf_core.h"
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#include "si5351c.h"
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#include "si5351c.h"
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#include "max2837.h"
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#include "max2837.h"
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#include "max2837_spi.h"
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#include "max2837_target.h"
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#include "rffc5071.h"
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#include "rffc5071.h"
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#include "rffc5071_spi.h"
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#include "rffc5071_spi.h"
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#include "sgpio.h"
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#include "sgpio.h"
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@ -36,7 +38,10 @@
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#define WAIT_CPU_CLOCK_INIT_DELAY (10000)
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#define WAIT_CPU_CLOCK_INIT_DELAY (10000)
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max2837_driver_t max2837;
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max2837_driver_t max2837 = {
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.spi = NULL, /* TODO */
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};
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spi_t rffc5071_spi = {
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spi_t rffc5071_spi = {
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.init = rffc5071_spi_init,
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.init = rffc5071_spi_init,
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@ -528,38 +533,11 @@ void ssp1_init(void)
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scu_pinmux(SCU_AD_CS, SCU_GPIO_FAST);
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scu_pinmux(SCU_AD_CS, SCU_GPIO_FAST);
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GPIO_SET(PORT_AD_CS) = PIN_AD_CS;
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GPIO_SET(PORT_AD_CS) = PIN_AD_CS;
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GPIO_DIR(PORT_AD_CS) |= PIN_AD_CS;
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GPIO_DIR(PORT_AD_CS) |= PIN_AD_CS;
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scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST);
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GPIO_SET(PORT_XCVR_CS) = PIN_XCVR_CS;
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GPIO_DIR(PORT_XCVR_CS) |= PIN_XCVR_CS;
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/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
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scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
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}
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}
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void ssp1_set_mode_max2837(void)
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void ssp1_set_mode_max2837(void)
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{
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{
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/* FIXME speed up once everything is working reliably */
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max2837_spi_init(max2837.spi);
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/*
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// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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const uint8_t serial_clock_rate = 32;
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const uint8_t clock_prescale_rate = 128;
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*/
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// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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const uint8_t serial_clock_rate = 21;
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const uint8_t clock_prescale_rate = 2;
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ssp_init(SSP1_NUM,
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SSP_DATA_16BITS,
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SSP_FRAME_SPI,
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SSP_CPOL_0_CPHA_0,
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serial_clock_rate,
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clock_prescale_rate,
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SSP_MODE_NORMAL,
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SSP_MASTER,
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SSP_SLAVE_OUT_ENABLE);
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}
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}
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void ssp1_set_mode_max5864(void)
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void ssp1_set_mode_max5864(void)
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@ -32,7 +32,7 @@ extern "C"
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include "max2837_drv.h"
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#include "max2837.h"
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#include "rffc5071.h"
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#include "rffc5071.h"
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#include "w25q80bv.h"
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#include "w25q80bv.h"
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@ -31,7 +31,8 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <string.h>
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#include <string.h>
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#include "max2837.h"
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#include "max2837.h"
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#include "max2837_drv.h"
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#include "max2837_spi.h"
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#include "max2837_target.h"
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#include "max2837_regs.def" // private register def macros
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#include "max2837_regs.def" // private register def macros
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#include "hackrf_core.h"
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#include "hackrf_core.h"
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@ -77,8 +78,12 @@ static const uint16_t max2837_regs_default[MAX2837_NUM_REGS] = {
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0x000 }; /* 31 */
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0x000 }; /* 31 */
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/* Set up all registers according to defaults specified in docs. */
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/* Set up all registers according to defaults specified in docs. */
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void max2837_init(max2837_driver_t* const drv)
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static void max2837_init(max2837_driver_t* const drv)
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{
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{
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max2837_spi_init(drv->spi);
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max2837_mode_shutdown(drv);
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max2837_target_init(drv);
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memcpy(drv->regs, max2837_regs_default, sizeof(drv->regs));
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memcpy(drv->regs, max2837_regs_default, sizeof(drv->regs));
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drv->regs_dirty = 0xffffffff;
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drv->regs_dirty = 0xffffffff;
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@ -92,10 +97,8 @@ void max2837_init(max2837_driver_t* const drv)
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*/
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*/
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void max2837_setup(max2837_driver_t* const drv)
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void max2837_setup(max2837_driver_t* const drv)
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{
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{
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max2837_pin_config(drv);
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max2837_init(drv);
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max2837_init(drv);
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/* Use SPI control instead of B1-B7 pins for gain settings. */
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/* Use SPI control instead of B1-B7 pins for gain settings. */
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set_MAX2837_TXVGA_GAIN_SPI_EN(drv, 1);
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set_MAX2837_TXVGA_GAIN_SPI_EN(drv, 1);
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set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(drv, 1);
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set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(drv, 1);
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@ -121,10 +124,21 @@ void max2837_setup(max2837_driver_t* const drv)
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max2837_regs_commit(drv);
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max2837_regs_commit(drv);
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}
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}
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static uint16_t max2837_read(max2837_driver_t* const drv, uint8_t r) {
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uint16_t value = (1 << 15) | (r << 10);
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max2837_spi_transfer(drv->spi, &value, 1);
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return value & 0x3ff;
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}
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static void max2837_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) {
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uint16_t value = (r << 10) | (v & 0x3ff);
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max2837_spi_transfer(drv->spi, &value, 1);
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}
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uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r)
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uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r)
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{
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{
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if ((drv->regs_dirty >> r) & 0x1) {
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if ((drv->regs_dirty >> r) & 0x1) {
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drv->regs[r] = max2837_spi_read(drv, r);
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drv->regs[r] = max2837_read(drv, r);
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};
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};
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return drv->regs[r];
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return drv->regs[r];
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}
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}
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@ -132,7 +146,7 @@ uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r)
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void max2837_reg_write(max2837_driver_t* const drv, uint8_t r, uint16_t v)
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void max2837_reg_write(max2837_driver_t* const drv, uint8_t r, uint16_t v)
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{
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{
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drv->regs[r] = v;
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drv->regs[r] = v;
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max2837_spi_write(drv, r, v);
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max2837_write(drv, r, v);
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MAX2837_REG_SET_CLEAN(drv, r);
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MAX2837_REG_SET_CLEAN(drv, r);
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}
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}
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@ -26,10 +26,26 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include "max2837_drv.h"
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#include "spi.h"
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/* 32 registers, each containing 10 bits of data. */
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#define MAX2837_NUM_REGS 32
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#define MAX2837_DATA_REGS_MAX_VALUE 1024
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typedef enum {
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MAX2837_MODE_SHUTDOWN,
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MAX2837_MODE_STANDBY,
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MAX2837_MODE_TX,
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MAX2837_MODE_RX
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} max2837_mode_t;
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typedef struct {
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spi_t* const spi;
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uint16_t regs[MAX2837_NUM_REGS];
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uint32_t regs_dirty;
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} max2837_driver_t;
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/* Initialize chip. */
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/* Initialize chip. */
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extern void max2837_init(max2837_driver_t* const drv);
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extern void max2837_setup(max2837_driver_t* const drv);
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extern void max2837_setup(max2837_driver_t* const drv);
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/* Read a register via SPI. Save a copy to memory and return
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/* Read a register via SPI. Save a copy to memory and return
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70
firmware/common/max2837_spi.c
Normal file
70
firmware/common/max2837_spi.c
Normal file
@ -0,0 +1,70 @@
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/*
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* Copyright 2012 Will Code? (TODO: Proper attribution)
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "max2837_spi.h"
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#include <libopencm3/lpc43xx/gpio.h>
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/ssp.h>
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#include "hackrf_core.h"
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void max2837_spi_init(spi_t* const spi) {
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(void)spi;
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/* FIXME speed up once everything is working reliably */
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/*
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// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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const uint8_t serial_clock_rate = 32;
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const uint8_t clock_prescale_rate = 128;
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*/
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// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
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const uint8_t serial_clock_rate = 21;
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const uint8_t clock_prescale_rate = 2;
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ssp_init(SSP1_NUM,
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SSP_DATA_16BITS,
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SSP_FRAME_SPI,
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SSP_CPOL_0_CPHA_0,
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serial_clock_rate,
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clock_prescale_rate,
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SSP_MODE_NORMAL,
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SSP_MASTER,
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SSP_SLAVE_OUT_ENABLE);
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/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
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scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
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scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
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}
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void max2837_spi_transfer(spi_t* const spi, void* const _data, const size_t count) {
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(void)spi;
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uint16_t* const data = _data;
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gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
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for(size_t i=0; i<count; i++) {
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data[i] = ssp_transfer(SSP1_NUM, data[i]);
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}
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gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
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}
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34
firmware/common/max2837_spi.h
Normal file
34
firmware/common/max2837_spi.h
Normal file
@ -0,0 +1,34 @@
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/*
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* Copyright 2012 Will Code? (TODO: Proper attribution)
|
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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|
*
|
||||||
|
* This file is part of HackRF.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2, or (at your option)
|
||||||
|
* any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; see the file COPYING. If not, write to
|
||||||
|
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||||
|
* Boston, MA 02110-1301, USA.
|
||||||
|
*/
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#ifndef __MAX2837_SPI_H__
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#define __MAX2837_SPI_H__
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#include "stdint.h"
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#include "stddef.h"
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#include "spi.h"
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void max2837_spi_init(spi_t* const spi);
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void max2837_spi_transfer(spi_t* const spi, void* const data, const size_t count);
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#endif/*__MAX2837_SPI_H__*/
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@ -20,14 +20,19 @@
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* Boston, MA 02110-1301, USA.
|
* Boston, MA 02110-1301, USA.
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*/
|
*/
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#include "max2837_drv.h"
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#include "max2837_target.h"
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#include <libopencm3/lpc43xx/ssp.h>
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/gpio.h>
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#include <libopencm3/lpc43xx/gpio.h>
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#include "hackrf_core.h"
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#include "hackrf_core.h"
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void max2837_pin_config(max2837_driver_t* const drv) {
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void max2837_target_init(max2837_driver_t* const drv) {
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(void)drv;
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scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST);
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GPIO_SET(PORT_XCVR_CS) = PIN_XCVR_CS;
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GPIO_DIR(PORT_XCVR_CS) |= PIN_XCVR_CS;
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/* Configure XCVR_CTL GPIO pins. */
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/* Configure XCVR_CTL GPIO pins. */
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#ifdef JELLYBEAN
|
#ifdef JELLYBEAN
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scu_pinmux(SCU_XCVR_RXHP, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_RXHP, SCU_GPIO_FAST);
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@ -58,7 +63,6 @@ void max2837_pin_config(max2837_driver_t* const drv) {
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;
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;
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#endif
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#endif
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max2837_mode_shutdown(drv);
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#ifdef JELLYBEAN
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#ifdef JELLYBEAN
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gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP);
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gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP);
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gpio_set(PORT_XCVR_B,
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gpio_set(PORT_XCVR_B,
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@ -131,20 +135,3 @@ max2837_mode_t max2837_mode(max2837_driver_t* const drv) {
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return MAX2837_MODE_SHUTDOWN;
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return MAX2837_MODE_SHUTDOWN;
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}
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}
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}
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}
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/* SPI register read. */
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uint16_t max2837_spi_read(max2837_driver_t* const drv, uint8_t r) {
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|
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(void)drv;
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|
||||||
gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
|
|
||||||
const uint16_t value = ssp_transfer(SSP1_NUM, (uint16_t)((1 << 15) | (r << 10)));
|
|
||||||
gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
|
|
||||||
return value & 0x3ff;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* SPI register write */
|
|
||||||
void max2837_spi_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) {
|
|
||||||
(void)drv;
|
|
||||||
gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
|
|
||||||
ssp_transfer(SSP1_NUM, (uint16_t)((r << 10) | (v & 0x3ff)));
|
|
||||||
gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
|
|
||||||
}
|
|
@ -20,35 +20,18 @@
|
|||||||
* Boston, MA 02110-1301, USA.
|
* Boston, MA 02110-1301, USA.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __MAX2837_DRV_H
|
#ifndef __MAX2837_TARGET_H
|
||||||
#define __MAX2837_DRV_H
|
#define __MAX2837_TARGET_H
|
||||||
|
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
|
|
||||||
/* 32 registers, each containing 10 bits of data. */
|
#include "max2837.h"
|
||||||
#define MAX2837_NUM_REGS 32
|
|
||||||
#define MAX2837_DATA_REGS_MAX_VALUE 1024
|
|
||||||
|
|
||||||
typedef enum {
|
void max2837_target_init(max2837_driver_t* const drv);
|
||||||
MAX2837_MODE_SHUTDOWN,
|
|
||||||
MAX2837_MODE_STANDBY,
|
|
||||||
MAX2837_MODE_TX,
|
|
||||||
MAX2837_MODE_RX
|
|
||||||
} max2837_mode_t;
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
uint16_t regs[MAX2837_NUM_REGS];
|
|
||||||
uint32_t regs_dirty;
|
|
||||||
} max2837_driver_t;
|
|
||||||
|
|
||||||
void max2837_pin_config(max2837_driver_t* const drv);
|
|
||||||
void max2837_mode_shutdown(max2837_driver_t* const drv);
|
void max2837_mode_shutdown(max2837_driver_t* const drv);
|
||||||
void max2837_mode_standby(max2837_driver_t* const drv);
|
void max2837_mode_standby(max2837_driver_t* const drv);
|
||||||
void max2837_mode_tx(max2837_driver_t* const drv);
|
void max2837_mode_tx(max2837_driver_t* const drv);
|
||||||
void max2837_mode_rx(max2837_driver_t* const drv);
|
void max2837_mode_rx(max2837_driver_t* const drv);
|
||||||
max2837_mode_t max2837_mode(max2837_driver_t* const drv);
|
max2837_mode_t max2837_mode(max2837_driver_t* const drv);
|
||||||
|
|
||||||
uint16_t max2837_spi_read(max2837_driver_t* const drv, uint8_t r);
|
#endif // __MAX2837_TARGET_H
|
||||||
void max2837_spi_write(max2837_driver_t* const drv, uint8_t r, uint16_t v);
|
|
||||||
|
|
||||||
#endif // __MAX2837_DRV_H
|
|
@ -26,6 +26,7 @@
|
|||||||
#include <rffc5071.h>
|
#include <rffc5071.h>
|
||||||
#include <max2837.h>
|
#include <max2837.h>
|
||||||
#include <sgpio.h>
|
#include <sgpio.h>
|
||||||
|
#include "max2837_target.h"
|
||||||
|
|
||||||
#define FREQ_ONE_MHZ (1000*1000)
|
#define FREQ_ONE_MHZ (1000*1000)
|
||||||
|
|
||||||
|
@ -135,7 +135,8 @@ macro(DeclareTargets)
|
|||||||
${PATH_HACKRF_FIRMWARE_COMMON}/rf_path.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/rf_path.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/si5351c.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/si5351c.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/max2837.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/max2837.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/max2837_drv.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/max2837_spi.c
|
||||||
|
${PATH_HACKRF_FIRMWARE_COMMON}/max2837_target.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/max5864.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/max5864.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c
|
||||||
|
Reference in New Issue
Block a user