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Use new GPIO API to abstract GPIO in various drivers.

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Had to do it all at once due to name conflicts with API exposed in libopencm3.
Quite invasive patch! Also precipitated an LED API...
This commit is contained in:
Jared Boone
2014-11-15 16:21:10 -08:00
parent 7eee145365
commit 5363ec3672
48 changed files with 886 additions and 870 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
firmware/blinky/blinky.c
View File

@ -19,13 +19,8 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include "hackrf_core.h"
uint32_t boot0, boot1, boot2, boot3;
int main(void)
{
int i;
@ -34,18 +29,20 @@ int main(void)
/* enable all power supplies */
enable_1v8_power();
/* Blink LED1/2/3 on the board and Read BOOT0/1/2/3 pins. */
/* Blink LED1/2/3 on the board. */
while (1)
{
boot0 = BOOT0_STATE;
boot1 = BOOT1_STATE;
boot2 = BOOT2_STATE;
boot3 = BOOT3_STATE;
led_on(LED1);
led_on(LED2);
led_on(LED3);
gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LEDs on */
for (i = 0; i < 2000000; i++) /* Wait a bit. */
__asm__("nop");
gpio_clear(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LED off */
led_off(LED1);
led_off(LED2);
led_off(LED3);
for (i = 0; i < 2000000; i++) /* Wait a bit. */
__asm__("nop");
}

31
firmware/common/cpld_jtag.c
View File

@ -22,7 +22,6 @@
#include "cpld_jtag.h"
#include "hackrf_core.h"
#include "xapp058/micro.h"
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <stdint.h>
@ -30,47 +29,45 @@ static refill_buffer_cb refill_buffer;
static uint32_t xsvf_buffer_len, xsvf_pos;
static unsigned char* xsvf_buffer;
void cpld_jtag_setup(void) {
void cpld_jtag_setup(jtag_t* const jtag) {
scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
/* TDO is an input */
GPIO_DIR(PORT_CPLD_TDO) &= ~PIN_CPLD_TDO;
/* the rest are outputs */
GPIO_DIR(PORT_CPLD_TCK) |= PIN_CPLD_TCK;
GPIO_DIR(PORT_CPLD_TMS) |= PIN_CPLD_TMS;
GPIO_DIR(PORT_CPLD_TDI) |= PIN_CPLD_TDI;
gpio_input(jtag->gpio->gpio_tdo);
gpio_output(jtag->gpio->gpio_tck);
gpio_output(jtag->gpio->gpio_tms);
gpio_output(jtag->gpio->gpio_tdi);
}
/* set pins as inputs so we don't interfere with an external JTAG device */
void cpld_jtag_release(void) {
void cpld_jtag_release(jtag_t* const jtag) {
scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
GPIO_DIR(PORT_CPLD_TDO) &= ~PIN_CPLD_TDO;
GPIO_DIR(PORT_CPLD_TCK) &= ~PIN_CPLD_TCK;
GPIO_DIR(PORT_CPLD_TMS) &= ~PIN_CPLD_TMS;
GPIO_DIR(PORT_CPLD_TDI) &= ~PIN_CPLD_TDI;
gpio_input(jtag->gpio->gpio_tdo);
gpio_input(jtag->gpio->gpio_tck);
gpio_input(jtag->gpio->gpio_tms);
gpio_input(jtag->gpio->gpio_tdi);
}
/* return 0 if success else return error code see xsvfExecute() */
int cpld_jtag_program(
jtag_t* const jtag,
const uint32_t buffer_length,
unsigned char* const buffer,
refill_buffer_cb refill
) {
int error;
cpld_jtag_setup();
cpld_jtag_setup(jtag);
xsvf_buffer = buffer;
xsvf_buffer_len = buffer_length;
refill_buffer = refill;
error = xsvfExecute();
cpld_jtag_release();
error = xsvfExecute(jtag->gpio);
cpld_jtag_release(jtag);
return error;
}

16
firmware/common/cpld_jtag.h
View File

@ -24,9 +24,22 @@
#include <stdint.h>
#include "gpio.h"
typedef struct jtag_gpio_t {
gpio_t gpio_tms;
gpio_t gpio_tck;
gpio_t gpio_tdi;
gpio_t gpio_tdo;
} jtag_gpio_t;
typedef struct jtag_t {
jtag_gpio_t* const gpio;
} jtag_t;
typedef void (*refill_buffer_cb)(void);
void cpld_jtag_release(void);
void cpld_jtag_release(jtag_t* const jtag);
/* Return 0 if success else return error code see xsvfExecute() see micro.h.
*
@ -34,6 +47,7 @@ void cpld_jtag_release(void);
* contents of the buffer has been streamed to the CPLD the given
* refill_buffer callback will be called. */
int cpld_jtag_program(
jtag_t* const jtag,
const uint32_t buffer_length,
unsigned char* const buffer,
refill_buffer_cb refill

23
firmware/common/pin.h → firmware/common/gpio.h
View File

@ -19,19 +19,20 @@
* Boston, MA 02110-1301, USA.
*/
#ifndef __PIN_H__
#define __PIN_H__
#ifndef __GPIO_H__
#define __GPIO_H__
#include <stdbool.h>
typedef const struct pin_t* pin_t;
typedef const struct gpio_t* gpio_t;
void pin_set(pin_t pin);
void pin_clear(pin_t pin);
void pin_toggle(pin_t pin);
void pin_output(pin_t pin);
void pin_input(pin_t pin);
void pin_write(pin_t pin, const bool value);
bool pin_read(pin_t pin);
void gpio_init();
void gpio_set(gpio_t gpio);
void gpio_clear(gpio_t gpio);
void gpio_toggle(gpio_t gpio);
void gpio_output(gpio_t gpio);
void gpio_input(gpio_t gpio);
void gpio_write(gpio_t gpio, const bool value);
bool gpio_read(gpio_t gpio);
#endif/*__PIN_H__*/
#endif/*__GPIO_H__*/

38
firmware/common/pin_lpc.c → firmware/common/gpio_lpc.c
View File

@ -19,34 +19,40 @@
* Boston, MA 02110-1301, USA.
*/
#include "pin_lpc.h"
#include "gpio_lpc.h"
#include <libopencm3/lpc43xx/gpio.h>
#include <stddef.h>
void pin_set(pin_t pin) {
GPIO_SET(pin->gpio) = pin->mask;
void gpio_init() {
for(size_t i=0; i<8; i++) {
GPIO_LPC_PORT(i)->dir = 0;
}
}
void pin_clear(pin_t pin) {
GPIO_CLR(pin->gpio) = pin->mask;
void gpio_set(gpio_t gpio) {
gpio->port->set = gpio->mask;
}
void pin_toggle(pin_t pin) {
GPIO_NOT(pin->gpio) = pin->mask;
void gpio_clear(gpio_t gpio) {
gpio->port->clr = gpio->mask;
}
void pin_output(pin_t pin) {
GPIO_DIR(pin->gpio) |= pin->mask;
void gpio_toggle(gpio_t gpio) {
gpio->port->not = gpio->mask;
}
void pin_input(pin_t pin) {
GPIO_DIR(pin->gpio) &= ~pin->mask;
void gpio_output(gpio_t gpio) {
gpio->port->dir |= gpio->mask;
}
void pin_write(pin_t pin, const bool value) {
MMIO32(pin->gpio_w) = value;
void gpio_input(gpio_t gpio) {
gpio->port->dir &= ~gpio->mask;
}
bool pin_read(pin_t pin) {
return MMIO32(pin->gpio_w);
void gpio_write(gpio_t gpio, const bool value) {
*gpio->gpio_w = value;
}
bool gpio_read(gpio_t gpio) {
return *gpio->gpio_w;
}

70
firmware/common/gpio_lpc.h Normal file
View File

@ -0,0 +1,70 @@
/*
* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
*
* This file is part of HackRF.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#ifndef __GPIO_LPC_H__
#define __GPIO_LPC_H__
#include <stdint.h>
#include "gpio.h"
/* NOTE: libopencm3 constants and functions not used here due to naming
* conflicts. I'd recommend changes to libopencm3 design to separate
* register #defines and API declarations into separate header files.
*/
typedef struct gpio_port_t {
volatile uint32_t dir; /* +0x000 */
uint32_t _reserved0[31];
volatile uint32_t mask; /* +0x080 */
uint32_t _reserved1[31];
volatile uint32_t pin; /* +0x100 */
uint32_t _reserved2[31];
volatile uint32_t mpin; /* +0x180 */
uint32_t _reserved3[31];
volatile uint32_t set; /* +0x200 */
uint32_t _reserved4[31];
volatile uint32_t clr; /* +0x280 */
uint32_t _reserved5[31];
volatile uint32_t not; /* +0x300 */
} gpio_port_t;
struct gpio_t {
const uint32_t mask;
gpio_port_t* const port;
volatile uint32_t* const gpio_w;
};
#define GPIO_LPC_BASE (0x400f4000)
#define GPIO_LPC_B_OFFSET (0x0)
#define GPIO_LPC_W_OFFSET (0x1000)
#define GPIO_LPC_PORT_OFFSET (0x2000)
#define GPIO_LPC_PORT(_n) ((gpio_port_t*)((GPIO_LPC_BASE + GPIO_LPC_PORT_OFFSET) + (_n) * 4))
#define GPIO_LPC_W(_port_num, _pin_num) (volatile uint32_t*)((GPIO_LPC_BASE + GPIO_LPC_W_OFFSET) + ((_port_num) * 0x80) + ((_pin_num) * 4))
#define GPIO(_port_num, _pin_num) { \
.mask = (1UL << (_pin_num)), \
.port = GPIO_LPC_PORT(_port_num), \
.gpio_w = GPIO_LPC_W(_port_num, _pin_num), \
}
#endif/*__GPIO_LPC_H__*/

237
firmware/common/hackrf_core.c
View File

@ -32,17 +32,118 @@
#include "rffc5071_spi.h"
#include "w25q80bv.h"
#include "w25q80bv_target.h"
#include "sgpio.h"
#include "rf_path.h"
#include "i2c_bus.h"
#include "i2c_lpc.h"
#include <libopencm3/lpc43xx/cgu.h>
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/ssp.h>
#include "gpio_lpc.h"
/* TODO: Consolidate ARRAY_SIZE declarations */
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
#define WAIT_CPU_CLOCK_INIT_DELAY (10000)
/* GPIO Output PinMux */
static struct gpio_t gpio_led[3] = {
GPIO(2, 1),
GPIO(2, 2),
GPIO(2, 8)
};
static struct gpio_t gpio_1v8_enable = GPIO(3, 6);
/* MAX2837 GPIO (XCVR_CTL) PinMux */
static struct gpio_t gpio_max2837_select = GPIO(0, 15);
static struct gpio_t gpio_max2837_enable = GPIO(2, 6);
static struct gpio_t gpio_max2837_rx_enable = GPIO(2, 5);
static struct gpio_t gpio_max2837_tx_enable = GPIO(2, 4);
#ifdef JELLYBEAN
static struct gpio_t gpio_max2837_rxhp = GPIO(2, 0);
static struct gpio_t gpio_max2837_b1 = GPIO(2, 9);
static struct gpio_t gpio_max2837_b2 = GPIO(2, 10);
static struct gpio_t gpio_max2837_b3 = GPIO(2, 11);
static struct gpio_t gpio_max2837_b4 = GPIO(2, 12);
static struct gpio_t gpio_max2837_b5 = GPIO(2, 13);
static struct gpio_t gpio_max2837_b6 = GPIO(2, 14);
static struct gpio_t gpio_max2837_b7 = GPIO(2, 15);
#endif
/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
static struct gpio_t gpio_max5864_select = GPIO(2, 7);
/* RFFC5071 GPIO serial interface PinMux */
#ifdef JELLYBEAN
static struct gpio_t gpio_rffc5072_select = GPIO(3, 8);
static struct gpio_t gpio_rffc5072_clock = GPIO(3, 9);
static struct gpio_t gpio_rffc5072_data = GPIO(3, 10);
static struct gpio_t gpio_rffc5072_reset = GPIO(3, 11);
#endif
#if (defined JAWBREAKER || defined HACKRF_ONE)
static struct gpio_t gpio_rffc5072_select = GPIO(2, 13);
static struct gpio_t gpio_rffc5072_clock = GPIO(5, 6);
static struct gpio_t gpio_rffc5072_data = GPIO(3, 3);
static struct gpio_t gpio_rffc5072_reset = GPIO(2, 14);
#endif
/* RF LDO control */
#ifdef JAWBREAKER
static struct gpio_t gpio_rf_ldo_enable = GPIO(2, 9);
#endif
/* RF supply (VAA) control */
#ifdef HACKRF_ONE
static struct gpio_t gpio_vaa_disable = GPIO(2, 9);
#endif
static struct gpio_t gpio_w25q80bv_hold = GPIO(1, 14);
static struct gpio_t gpio_w25q80bv_wp = GPIO(1, 15);
static struct gpio_t gpio_w25q80bv_select = GPIO(5, 11);
/* RF switch control */
#ifdef HACKRF_ONE
static struct gpio_t gpio_hp = GPIO(2, 0);
static struct gpio_t gpio_lp = GPIO(2, 10);
static struct gpio_t gpio_tx_mix_bp = GPIO(2, 11);
static struct gpio_t gpio_no_mix_bypass = GPIO(1, 0);
static struct gpio_t gpio_rx_mix_bp = GPIO(2, 12);
static struct gpio_t gpio_tx_amp = GPIO(2, 15);
static struct gpio_t gpio_tx = GPIO(5, 15);
static struct gpio_t gpio_mix_bypass = GPIO(5, 16);
static struct gpio_t gpio_rx = GPIO(5, 5);
static struct gpio_t gpio_no_tx_amp_pwr = GPIO(3, 5);
static struct gpio_t gpio_amp_bypass = GPIO(0, 14);
static struct gpio_t gpio_rx_amp = GPIO(1, 11);
static struct gpio_t gpio_no_rx_amp_pwr = GPIO(1, 12);
#endif
#if 0
/* GPIO Input */
static struct gpio_t gpio_boot[] = {
GPIO(0, 8),
GPIO(0, 9),
GPIO(5, 7),
GPIO(1, 10),
};
#endif
/* CPLD JTAG interface GPIO pins */
static struct gpio_t gpio_cpld_tdo = GPIO(5, 18);
static struct gpio_t gpio_cpld_tck = GPIO(3, 0);
#ifdef HACKRF_ONE
static struct gpio_t gpio_cpld_tms = GPIO(3, 4);
static struct gpio_t gpio_cpld_tdi = GPIO(3, 1);
#else
static struct gpio_t gpio_cpld_tms = GPIO(3, 1);
static struct gpio_t gpio_cpld_tdi = GPIO(3, 4);
#endif
static struct gpio_t gpio_rx_decimation[3] = {
GPIO(5, 12),
GPIO(5, 13),
GPIO(5, 14),
};
static struct gpio_t gpio_rx_q_invert = GPIO(0, 13);
i2c_bus_t i2c0 = {
.obj = (void*)I2C0_BASE,
.start = i2c_lpc_start,
@ -81,8 +182,7 @@ const ssp_config_t ssp_config_max2837 = {
.data_bits = SSP_DATA_16BITS,
.serial_clock_rate = 21,
.clock_prescale_rate = 2,
.select = max2837_target_spi_select,
.unselect = max2837_target_spi_unselect,
.gpio_select = &gpio_max2837_select,
};
const ssp_config_t ssp_config_max5864 = {
@ -96,8 +196,7 @@ const ssp_config_t ssp_config_max5864 = {
.data_bits = SSP_DATA_8BITS,
.serial_clock_rate = 21,
.clock_prescale_rate = 2,
.select = max5864_target_spi_select,
.unselect = max5864_target_spi_unselect,
.gpio_select = &gpio_max5864_select,
};
spi_bus_t spi_bus_ssp1 = {
@ -111,6 +210,19 @@ spi_bus_t spi_bus_ssp1 = {
max2837_driver_t max2837 = {
.bus = &spi_bus_ssp1,
.gpio_enable = &gpio_max2837_enable,
.gpio_rx_enable = &gpio_max2837_rx_enable,
.gpio_tx_enable = &gpio_max2837_tx_enable,
#ifdef JELLYBEAN
.gpio_rxhp = &gpio_max2837_rxhp,
.gpio_b1 = &gpio_max2837_b1,
.gpio_b2 = &gpio_max2837_b2,
.gpio_b3 = &gpio_max2837_b3,
.gpio_b4 = &gpio_max2837_b4,
.gpio_b5 = &gpio_max2837_b5,
.gpio_b6 = &gpio_max2837_b6,
.gpio_b7 = &gpio_max2837_b7,
#endif
.target_init = max2837_target_init,
.set_mode = max2837_target_set_mode,
};
@ -120,8 +232,14 @@ max5864_driver_t max5864 = {
.target_init = max5864_target_init,
};
const rffc5071_spi_config_t rffc5071_spi_config = {
.gpio_select = &gpio_rffc5072_select,
.gpio_clock = &gpio_rffc5072_clock,
.gpio_data = &gpio_rffc5072_data,
};
spi_bus_t spi_bus_rffc5071 = {
.config = NULL,
.config = &rffc5071_spi_config,
.start = rffc5071_spi_start,
.stop = rffc5071_spi_stop,
.transfer = rffc5071_spi_transfer,
@ -130,14 +248,14 @@ spi_bus_t spi_bus_rffc5071 = {
rffc5071_driver_t rffc5072 = {
.bus = &spi_bus_rffc5071,
.gpio_reset = &gpio_rffc5072_reset,
};
const ssp_config_t ssp_config_w25q80bv = {
.data_bits = SSP_DATA_8BITS,
.serial_clock_rate = 2,
.clock_prescale_rate = 2,
.select = w25q80bv_target_spi_select,
.unselect = w25q80bv_target_spi_unselect,
.gpio_select = &gpio_w25q80bv_select,
};
spi_bus_t spi_bus_ssp0 = {
@ -151,9 +269,49 @@ spi_bus_t spi_bus_ssp0 = {
w25q80bv_driver_t spi_flash = {
.bus = &spi_bus_ssp0,
.gpio_hold = &gpio_w25q80bv_hold,
.gpio_wp = &gpio_w25q80bv_wp,
.target_init = w25q80bv_target_init,
};
sgpio_config_t sgpio_config = {
.gpio_rx_q_invert = &gpio_rx_q_invert,
.gpio_rx_decimation = {
&gpio_rx_decimation[0],
&gpio_rx_decimation[1],
&gpio_rx_decimation[2],
},
.slice_mode_multislice = true,
};
rf_path_t rf_path = {
.switchctrl = 0,
.gpio_hp = &gpio_hp,
.gpio_lp = &gpio_lp,
.gpio_tx_mix_bp = &gpio_tx_mix_bp,
.gpio_no_mix_bypass = &gpio_no_mix_bypass,
.gpio_rx_mix_bp = &gpio_rx_mix_bp,
.gpio_tx_amp = &gpio_tx_amp,
.gpio_tx = &gpio_tx,
.gpio_mix_bypass = &gpio_mix_bypass,
.gpio_rx = &gpio_rx,
.gpio_no_tx_amp_pwr = &gpio_no_tx_amp_pwr,
.gpio_amp_bypass = &gpio_amp_bypass,
.gpio_rx_amp = &gpio_rx_amp,
.gpio_no_rx_amp_pwr = &gpio_no_rx_amp_pwr,
};
jtag_gpio_t jtag_gpio_cpld = {
.gpio_tms = &gpio_cpld_tms,
.gpio_tck = &gpio_cpld_tck,
.gpio_tdi = &gpio_cpld_tdi,
.gpio_tdo = &gpio_cpld_tdo,
};
jtag_t jtag_cpld = {
.gpio = &jtag_gpio_cpld,
};
void delay(uint32_t duration)
{
uint32_t i;
@ -646,10 +804,10 @@ void pin_setup(void) {
scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
GPIO_DIR(PORT_CPLD_TDO) &= ~PIN_CPLD_TDO;
GPIO_DIR(PORT_CPLD_TCK) &= ~PIN_CPLD_TCK;
GPIO_DIR(PORT_CPLD_TMS) &= ~PIN_CPLD_TMS;
GPIO_DIR(PORT_CPLD_TDI) &= ~PIN_CPLD_TDI;
gpio_input(&gpio_cpld_tdo);
gpio_input(&gpio_cpld_tck);
gpio_input(&gpio_cpld_tms);
gpio_input(&gpio_cpld_tdi);
/* Configure SCU Pin Mux as GPIO */
scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_NOPULL);
@ -665,49 +823,62 @@ void pin_setup(void) {
#endif
/* Configure all GPIO as Input (safe state) */
GPIO0_DIR = 0;
GPIO1_DIR = 0;
GPIO2_DIR = 0;
GPIO3_DIR = 0;
GPIO4_DIR = 0;
GPIO5_DIR = 0;
GPIO6_DIR = 0;
GPIO7_DIR = 0;
gpio_init();
/* Configure GPIO2[1/2/8] (P4_1/2 P6_12) as output. */
GPIO2_DIR |= (PIN_LED1 | PIN_LED2 | PIN_LED3);
gpio_output(&gpio_led[0]);
gpio_output(&gpio_led[1]);
gpio_output(&gpio_led[2]);
/* GPIO3[6] on P6_10 as output. */
GPIO3_DIR |= PIN_EN1V8;
gpio_output(&gpio_1v8_enable);
#ifdef HACKRF_ONE
/* Configure RF power supply (VAA) switch control signal as output */
gpio_output(&gpio_vaa_disable);
/* Safe state: start with VAA turned off: */
disable_rf_power();
#endif
/* enable input on SCL and SDA pins */
SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
spi_bus_start(&spi_bus_ssp1, &ssp_config_max2837);
spi_bus_start(&spi_bus_rffc5071, NULL);
spi_bus_start(&spi_bus_rffc5071, &rffc5071_spi_config);
rf_path_pin_setup();
rf_path_pin_setup(&rf_path);
/* Configure external clock in */
scu_pinmux(SCU_PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
sgpio_configure_pin_functions();
sgpio_configure_pin_functions(&sgpio_config);
}
void enable_1v8_power(void) {
gpio_set(PORT_EN1V8, PIN_EN1V8);
gpio_set(&gpio_1v8_enable);
}
void disable_1v8_power(void) {
gpio_clear(PORT_EN1V8, PIN_EN1V8);
gpio_clear(&gpio_1v8_enable);
}
#ifdef HACKRF_ONE
void enable_rf_power(void) {
gpio_clear(PORT_NO_VAA_ENABLE, PIN_NO_VAA_ENABLE);
gpio_clear(&gpio_vaa_disable);
}
void disable_rf_power(void) {
gpio_set(PORT_NO_VAA_ENABLE, PIN_NO_VAA_ENABLE);
gpio_set(&gpio_vaa_disable);
}
#endif
void led_on(const led_t led) {
gpio_set(&gpio_led[led]);
}
void led_off(const led_t led) {
gpio_clear(&gpio_led[led]);
}
void led_toggle(const led_t led) {
gpio_toggle(&gpio_led[led]);
}

152
firmware/common/hackrf_core.h
View File

@ -39,6 +39,9 @@ extern "C"
#include "max5864.h"
#include "rffc5071.h"
#include "w25q80bv.h"
#include "sgpio.h"
#include "rf_path.h"
#include "cpld_jtag.h"
/* hardware identification number */
#define BOARD_ID_JELLYBEAN 0
@ -214,142 +217,6 @@ extern "C"
#define SCU_PINMUX_GP_CLKIN (P4_7)
/*
* GPIO Pins
*/
/* GPIO Output */
#define PIN_LED1 (BIT1) /* GPIO2[1] on P4_1 */
#define PIN_LED2 (BIT2) /* GPIO2[2] on P4_2 */
#define PIN_LED3 (BIT8) /* GPIO2[8] on P6_12 */
#define PORT_LED1_3 (GPIO2) /* PORT for LED1, 2 & 3 */
#define PIN_EN1V8 (BIT6) /* GPIO3[6] on P6_10 */
#define PORT_EN1V8 (GPIO3)
#define PIN_XCVR_CS (BIT15) /* GPIO0[15] on P1_20 */
#define PORT_XCVR_CS (GPIO0) /* PORT for CS */
#define PIN_XCVR_ENABLE (BIT6) /* GPIO2[6] on P4_6 */
#define PIN_XCVR_RXENABLE (BIT5) /* GPIO2[5] on P4_5 */
#define PIN_XCVR_TXENABLE (BIT4) /* GPIO2[4] on P4_4 */
#define PORT_XCVR_ENABLE (GPIO2) /* PORT for ENABLE, TXENABLE, RXENABLE */
#ifdef JELLYBEAN
#define PIN_XCVR_RXHP (BIT0) /* GPIO2[0] on P4_0 */
#define PORT_XCVR_RXHP (GPIO2)
#define PIN_XCVR_B1 (BIT9) /* GPIO2[9] on P5_0 */
#define PIN_XCVR_B2 (BIT10) /* GPIO2[10] on P5_1 */
#define PIN_XCVR_B3 (BIT11) /* GPIO2[11] on P5_2 */
#define PIN_XCVR_B4 (BIT12) /* GPIO2[12] on P5_3 */
#define PIN_XCVR_B5 (BIT13) /* GPIO2[13] on P5_4 */
#define PIN_XCVR_B6 (BIT14) /* GPIO2[14] on P5_5 */
#define PIN_XCVR_B7 (BIT15) /* GPIO2[15] on P5_6 */
#define PORT_XCVR_B (GPIO2)
#endif
#define PIN_AD_CS (BIT7) /* GPIO2[7] on P5_7 */
#define PORT_AD_CS (GPIO2) /* PORT for AD_CS */
#ifdef JELLYBEAN
#define PIN_MIXER_ENX (BIT8) /* GPIO3[8] on P7_0 */
#define PORT_MIXER_ENX (GPIO3)
#define PIN_MIXER_SCLK (BIT9) /* GPIO3[9] on P7_1 */
#define PORT_MIXER_SCLK (GPIO3)
#define PIN_MIXER_SDATA (BIT10) /* GPIO3[10] on P7_2 */
#define PORT_MIXER_SDATA (GPIO3)
#define PIN_MIXER_RESETX (BIT11) /* GPIO3[11] on P7_3 */
#define PORT_MIXER_RESETX (GPIO3)
#endif
#if (defined JAWBREAKER || defined HACKRF_ONE)
#define PIN_MIXER_ENX (BIT13) /* GPIO2[13] on P5_4 */
#define PORT_MIXER_ENX (GPIO2)
#define PIN_MIXER_SCLK (BIT6) /* GPIO5[6] on P2_6 */
#define PORT_MIXER_SCLK (GPIO5)
#define PIN_MIXER_SDATA (BIT3) /* GPIO3[3] on P6_4 */
#define PORT_MIXER_SDATA (GPIO3)
#define PIN_MIXER_RESETX (BIT14) /* GPIO2[14] on P5_5 */
#define PORT_MIXER_RESETX (GPIO2)
#endif
#ifdef JAWBREAKER
#define PIN_RF_LDO_ENABLE (BIT9) /* GPIO2[9] on P5_0 */
#define PORT_RF_LDO_ENABLE (GPIO2) /* PORT for RF_LDO_ENABLE */
#endif
#ifdef HACKRF_ONE
#define PIN_NO_VAA_ENABLE (BIT9) /* GPIO2[9] on P5_0 */
#define PORT_NO_VAA_ENABLE (GPIO2) /* PORT for NO_VAA_ENABLE */
#endif
#define PIN_FLASH_HOLD (BIT14) /* GPIO1[14] on P3_4 */
#define PIN_FLASH_WP (BIT15) /* GPIO1[15] on P3_5 */
#define PORT_FLASH (GPIO1)
#define PIN_SSP0_SSEL (BIT11) /* GPIO5[11] on P3_8 */
#define PORT_SSP0_SSEL (GPIO5)
/* RF switch control */
#ifdef HACKRF_ONE
#define PIN_HP (GPIOPIN0) /* GPIO2[0] on P4_0 */
#define PORT_HP (GPIO2)
#define PIN_LP (GPIOPIN10) /* GPIO2[10] on P5_1 */
#define PORT_LP (GPIO2)
#define PIN_TX_MIX_BP (GPIOPIN11) /* GPIO2[11] on P5_2 */
#define PORT_TX_MIX_BP (GPIO2)
#define PIN_NO_MIX_BYPASS (GPIOPIN0) /* GPIO1[0] on P1_7 */
#define PORT_NO_MIX_BYPASS (GPIO1)
#define PIN_RX_MIX_BP (GPIOPIN12) /* GPIO2[12] on P5_3 */
#define PORT_RX_MIX_BP (GPIO2)
#define PIN_TX_AMP (GPIOPIN15) /* GPIO2[15] on P5_6 */
#define PORT_TX_AMP (GPIO2)
#define PIN_TX (GPIOPIN15) /* GPIO5[15] on P6_7 */
#define PORT_TX (GPIO5)
#define PIN_MIX_BYPASS (GPIOPIN16) /* GPIO5[16] on P6_8 */
#define PORT_MIX_BYPASS (GPIO5)
#define PIN_RX (GPIOPIN5) /* GPIO5[5] on P2_5 */
#define PORT_RX (GPIO5)
#define PIN_NO_TX_AMP_PWR (GPIOPIN5) /* GPIO3[5] on P6_9 */
#define PORT_NO_TX_AMP_PWR (GPIO3)
#define PIN_AMP_BYPASS (GPIOPIN14) /* GPIO0[14] on P2_10 */
#define PORT_AMP_BYPASS (GPIO0)
#define PIN_RX_AMP (GPIOPIN11) /* GPIO1[11] on P2_11 */
#define PORT_RX_AMP (GPIO1)
#define PIN_NO_RX_AMP_PWR (GPIOPIN12) /* GPIO1[12] on P2_12 */
#define PORT_NO_RX_AMP_PWR (GPIO1)
#endif
/* GPIO Input */
#define PIN_BOOT0 (BIT8) /* GPIO0[8] on P1_1 */
#define PIN_BOOT1 (BIT9) /* GPIO0[9] on P1_2 */
#define PIN_BOOT2 (BIT7) /* GPIO5[7] on P2_8 */
#define PIN_BOOT3 (BIT10) /* GPIO1[10] on P2_9 */
/* CPLD JTAG interface GPIO pins */
#define PIN_CPLD_TDO (GPIOPIN18)
#define PORT_CPLD_TDO (GPIO5)
#define PIN_CPLD_TCK (GPIOPIN0)
#define PORT_CPLD_TCK (GPIO3)
#ifdef HACKRF_ONE
#define PIN_CPLD_TMS (GPIOPIN4)
#define PORT_CPLD_TMS (GPIO3)
#define PIN_CPLD_TDI (GPIOPIN1)
#define PORT_CPLD_TDI (GPIO3)
#else
#define PIN_CPLD_TMS (GPIOPIN1)
#define PORT_CPLD_TMS (GPIO3)
#define PIN_CPLD_TDI (GPIOPIN4)
#define PORT_CPLD_TDI (GPIO3)
#endif
/* Read GPIO Pin */
#define GPIO_STATE(port, pin) ((GPIO_PIN(port) & (pin)) == (pin))
#define BOOT0_STATE GPIO_STATE(GPIO0, PIN_BOOT0)
#define BOOT1_STATE GPIO_STATE(GPIO0, PIN_BOOT1)
#define BOOT2_STATE GPIO_STATE(GPIO5, PIN_BOOT2)
#define BOOT3_STATE GPIO_STATE(GPIO1, PIN_BOOT3)
#define MIXER_SDATA_STATE GPIO_STATE(PORT_MIXER_SDATA, PIN_MIXER_SDATA)
#define CPLD_TDO_STATE GPIO_STATE(PORT_CPLD_TDO, PIN_CPLD_TDO)
/* TODO add other Pins */
typedef enum {
TRANSCEIVER_MODE_OFF = 0,
TRANSCEIVER_MODE_RX = 1,
@ -368,6 +235,9 @@ extern max2837_driver_t max2837;
extern max5864_driver_t max5864;
extern rffc5071_driver_t rffc5072;
extern w25q80bv_driver_t spi_flash;
extern sgpio_config_t sgpio_config;
extern rf_path_t rf_path;
extern jtag_t jtag_cpld;
void cpu_clock_init(void);
void cpu_clock_pll1_low_speed(void);
@ -389,6 +259,16 @@ void enable_rf_power(void);
void disable_rf_power(void);
#endif
typedef enum {
LED1 = 0,
LED2 = 1,
LED3 = 2,
} led_t;
void led_on(const led_t led);
void led_off(const led_t led);
void led_toggle(const led_t led);
#ifdef __cplusplus
}
#endif

14
firmware/common/max2837.h
View File

@ -26,6 +26,7 @@
#include <stdint.h>
#include <stdbool.h>
#include "gpio.h"
#include "spi_bus.h"
/* 32 registers, each containing 10 bits of data. */
@ -44,6 +45,19 @@ typedef struct max2837_driver_t max2837_driver_t;
struct max2837_driver_t {
spi_bus_t* const bus;
gpio_t gpio_enable;
gpio_t gpio_rx_enable;
gpio_t gpio_tx_enable;
#ifdef JELLYBEAN
gpio_t gpio_rxhp;
gpio_t gpio_b1;
gpio_t gpio_b2;
gpio_t gpio_b3;
gpio_t gpio_b4;
gpio_t gpio_b5;
gpio_t gpio_b6;
gpio_t gpio_b7;
#endif
void (*target_init)(max2837_driver_t* const drv);
void (*set_mode)(max2837_driver_t* const drv, const max2837_mode_t new_mode);
max2837_mode_t mode;

123
firmware/common/max2837_target.c
View File

@ -23,20 +23,15 @@
#include "max2837_target.h"
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/gpio.h>
#include "hackrf_core.h"
void max2837_target_init(max2837_driver_t* const drv) {
(void)drv;
/* Configure SSP1 Peripheral (to be moved later in SSP driver) */
scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST);
GPIO_SET(PORT_XCVR_CS) = PIN_XCVR_CS;
GPIO_DIR(PORT_XCVR_CS) |= PIN_XCVR_CS;
/* Configure XCVR_CTL GPIO pins. */
#ifdef JELLYBEAN
@ -54,105 +49,57 @@ void max2837_target_init(max2837_driver_t* const drv) {
scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST);
/* Set GPIO pins as outputs. */
GPIO2_DIR |= (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE);
gpio_output(drv->gpio_enable);
gpio_output(drv->gpio_rx_enable);
gpio_output(drv->gpio_tx_enable);
#ifdef JELLYBEAN
GPIO_DIR(PORT_XCVR_RXHP) |= PIN_XCVR_RXHP;
GPIO_DIR(PORT_XCVR_B) |=
PIN_XCVR_B1
| PIN_XCVR_B2
| PIN_XCVR_B3
| PIN_XCVR_B4
| PIN_XCVR_B5
| PIN_XCVR_B6
| PIN_XCVR_B7
;
gpio_output(drv->gpio_rxhp);
gpio_output(drv->gpio_b1);
gpio_output(drv->gpio_b2);
gpio_output(drv->gpio_b3);
gpio_output(drv->gpio_b4);
gpio_output(drv->gpio_b5);
gpio_output(drv->gpio_b6);
gpio_output(drv->gpio_b7);
#endif
#ifdef JELLYBEAN
gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP);
gpio_set(PORT_XCVR_B,
PIN_XCVR_B1
| PIN_XCVR_B2
| PIN_XCVR_B3
| PIN_XCVR_B4
| PIN_XCVR_B5
| PIN_XCVR_B6
| PIN_XCVR_B7
);
gpio_set(drv->gpio_rxhp);
gpio_set(drv->gpio_b1);
gpio_set(drv->gpio_b2);
gpio_set(drv->gpio_b3);
gpio_set(drv->gpio_b4);
gpio_set(drv->gpio_b5);
gpio_set(drv->gpio_b6);
gpio_set(drv->gpio_b7);
#endif
}
void max2837_target_spi_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
}
void max2837_target_spi_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
}
static void max2837_target_mode_shutdown(max2837_driver_t* const drv) {
/* All circuit blocks are powered down, except the 4-wire serial bus
void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) {
/* MAX2837_MODE_SHUTDOWN:
* All circuit blocks are powered down, except the 4-wire serial bus
* and its internal programmable registers.
*/
gpio_clear(PORT_XCVR_ENABLE,
(PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE));
drv->mode = MAX2837_MODE_SHUTDOWN;
}
static void max2837_target_mode_standby(max2837_driver_t* const drv) {
/* Used to enable the frequency synthesizer block while the rest of the
*
* MAX2837_MODE_STANDBY:
* Used to enable the frequency synthesizer block while the rest of the
* device is powered down. In this mode, PLL, VCO, and LO generator
* are on, so that Tx or Rx modes can be quickly enabled from this mode.
* These and other blocks can be selectively enabled in this mode.
*/
gpio_clear(PORT_XCVR_ENABLE, (PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE));
gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE);
drv->mode = MAX2837_MODE_STANDBY;
}
static void max2837_target_mode_tx(max2837_driver_t* const drv) {
/* All Tx circuit blocks are powered on. The external PA is powered on
*
* MAX2837_MODE_TX:
* All Tx circuit blocks are powered on. The external PA is powered on
* after a programmable delay using the on-chip PA bias DAC. The slow-
* charging Rx circuits are in a precharged “idle-off” state for fast
* Tx-to-Rx turnaround time.
*/
gpio_clear(PORT_XCVR_ENABLE, PIN_XCVR_RXENABLE);
gpio_set(PORT_XCVR_ENABLE,
(PIN_XCVR_ENABLE | PIN_XCVR_TXENABLE));
drv->mode = MAX2837_MODE_TX;
}
static void max2837_target_mode_rx(max2837_driver_t* const drv) {
/* All Rx circuit blocks are powered on and active. Antenna signal is
*
* MAX2837_MODE_RX:
* All Rx circuit blocks are powered on and active. Antenna signal is
* applied; RF is downconverted, filtered, and buffered at Rx BB I and Q
* outputs. The slow- charging Tx circuits are in a precharged “idle-off”
* state for fast Rx-to-Tx turnaround time.
*/
gpio_clear(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE);
gpio_set(PORT_XCVR_ENABLE,
(PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE));
drv->mode = MAX2837_MODE_RX;
}
void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) {
switch(new_mode) {
default:
case MAX2837_MODE_SHUTDOWN:
max2837_target_mode_shutdown(drv);
break;
case MAX2837_MODE_STANDBY:
max2837_target_mode_standby(drv);
break;
case MAX2837_MODE_TX:
max2837_target_mode_tx(drv);
break;
case MAX2837_MODE_RX:
max2837_target_mode_rx(drv);
break;
}
gpio_write(drv->gpio_enable, new_mode != MAX2837_MODE_SHUTDOWN);
gpio_write(drv->gpio_rx_enable, new_mode == MAX2837_MODE_RX);
gpio_write(drv->gpio_tx_enable, new_mode == MAX2837_MODE_TX);
drv->mode = new_mode;
}

4
firmware/common/max2837_target.h
View File

@ -24,12 +24,8 @@
#define __MAX2837_TARGET_H
#include "max2837.h"
#include "spi_bus.h"
void max2837_target_init(max2837_driver_t* const drv);
void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode);
void max2837_target_spi_select(spi_bus_t* const bus);
void max2837_target_spi_unselect(spi_bus_t* const bus);
#endif // __MAX2837_TARGET_H

13
firmware/common/max5864_target.c
View File

@ -22,7 +22,6 @@
#include "max5864_target.h"
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/gpio.h>
#include "hackrf_core.h"
void max5864_target_init(max5864_driver_t* const drv) {
@ -38,16 +37,4 @@ void max5864_target_init(max5864_driver_t* const drv) {
* SPI bus for the MAX2837. FIXME: this should probably be somewhere else.
*/
scu_pinmux(SCU_AD_CS, SCU_GPIO_FAST);
GPIO_SET(PORT_AD_CS) = PIN_AD_CS;
GPIO_DIR(PORT_AD_CS) |= PIN_AD_CS;
}
void max5864_target_spi_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_AD_CS, PIN_AD_CS);
}
void max5864_target_spi_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_AD_CS, PIN_AD_CS);
}

3
firmware/common/max5864_target.h
View File

@ -23,10 +23,7 @@
#define __MAX5864_TARGET_H__
#include "max5864.h"
#include "spi_bus.h"
void max5864_target_init(max5864_driver_t* const drv);
void max5864_target_spi_select(spi_bus_t* const bus);
void max5864_target_spi_unselect(spi_bus_t* const bus);
#endif/*__MAX5864_TARGET_H__*/

41
firmware/common/pin_lpc.h
View File

@ -1,41 +0,0 @@
/*
* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
*
* This file is part of HackRF.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#ifndef __PIN_LPC_H__
#define __PIN_LPC_H__
#include <stdint.h>
#include "pin.h"
struct pin_t {
uint32_t gpio;
uint32_t mask;
uint32_t gpio_w;
};
#define PIN_LPC(_port_num, _pin_num) { \
.gpio = (GPIO0) + (_port_num) * 4, \
.mask = (1UL << (_pin_num)), \
.gpio_w = GPIO_PORT_BASE + 0x1000 + ((_port_num) * 0x80) + ((_pin_num) * 4), \
};
#endif/*__PIN_LPC_H__*/

177
firmware/common/rf_path.c
View File

@ -22,7 +22,6 @@
#include "rf_path.h"
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <hackrf_core.h>
@ -84,58 +83,58 @@ uint8_t switchctrl = SWITCHCTRL_SAFE;
#define SWITCHCTRL_ANT_PWR (1 << 6) /* turn on antenna port power */
#ifdef HACKRF_ONE
static void switchctrl_set_hackrf_one(uint8_t ctrl) {
static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl) {
if (ctrl & SWITCHCTRL_TX) {
gpio_set(PORT_TX, PIN_TX);
gpio_clear(PORT_RX, PIN_RX);
gpio_set(rf_path->gpio_tx);
gpio_clear(rf_path->gpio_rx);
} else {
gpio_clear(PORT_TX, PIN_TX);
gpio_set(PORT_RX, PIN_RX);
gpio_clear(rf_path->gpio_tx);
gpio_set(rf_path->gpio_rx);
}
if (ctrl & SWITCHCTRL_MIX_BYPASS) {
gpio_set(PORT_MIX_BYPASS, PIN_MIX_BYPASS);
gpio_clear(PORT_NO_MIX_BYPASS, PIN_NO_MIX_BYPASS);
gpio_set(rf_path->gpio_mix_bypass);
gpio_clear(rf_path->gpio_no_mix_bypass);
if (ctrl & SWITCHCTRL_TX) {
gpio_set(PORT_TX_MIX_BP, PIN_TX_MIX_BP);
gpio_clear(PORT_RX_MIX_BP, PIN_RX_MIX_BP);
gpio_set(rf_path->gpio_tx_mix_bp);
gpio_clear(rf_path->gpio_rx_mix_bp);
} else {
gpio_clear(PORT_TX_MIX_BP, PIN_TX_MIX_BP);
gpio_set(PORT_RX_MIX_BP, PIN_RX_MIX_BP);
gpio_clear(rf_path->gpio_tx_mix_bp);
gpio_set(rf_path->gpio_rx_mix_bp);
}
} else {
gpio_clear(PORT_MIX_BYPASS, PIN_MIX_BYPASS);
gpio_set(PORT_NO_MIX_BYPASS, PIN_NO_MIX_BYPASS);
gpio_clear(PORT_TX_MIX_BP, PIN_TX_MIX_BP);
gpio_clear(PORT_RX_MIX_BP, PIN_RX_MIX_BP);
gpio_clear(rf_path->gpio_mix_bypass);
gpio_set(rf_path->gpio_no_mix_bypass);
gpio_clear(rf_path->gpio_tx_mix_bp);
gpio_clear(rf_path->gpio_rx_mix_bp);
}
if (ctrl & SWITCHCTRL_HP) {
gpio_set(PORT_HP, PIN_HP);
gpio_clear(PORT_LP, PIN_LP);
gpio_set(rf_path->gpio_hp);
gpio_clear(rf_path->gpio_lp);
} else {
gpio_clear(PORT_HP, PIN_HP);
gpio_set(PORT_LP, PIN_LP);
gpio_clear(rf_path->gpio_hp);
gpio_set(rf_path->gpio_lp);
}
if (ctrl & SWITCHCTRL_AMP_BYPASS) {
gpio_set(PORT_AMP_BYPASS, PIN_AMP_BYPASS);
gpio_clear(PORT_TX_AMP, PIN_TX_AMP);
gpio_set(PORT_NO_TX_AMP_PWR, PIN_NO_TX_AMP_PWR);
gpio_clear(PORT_RX_AMP, PIN_RX_AMP);
gpio_set(PORT_NO_RX_AMP_PWR, PIN_NO_RX_AMP_PWR);
gpio_set(rf_path->gpio_amp_bypass);
gpio_clear(rf_path->gpio_tx_amp);
gpio_set(rf_path->gpio_no_tx_amp_pwr);
gpio_clear(rf_path->gpio_rx_amp);
gpio_set(rf_path->gpio_no_rx_amp_pwr);
} else if (ctrl & SWITCHCTRL_TX) {
gpio_clear(PORT_AMP_BYPASS, PIN_AMP_BYPASS);
gpio_set(PORT_TX_AMP, PIN_TX_AMP);
gpio_clear(PORT_NO_TX_AMP_PWR, PIN_NO_TX_AMP_PWR);
gpio_clear(PORT_RX_AMP, PIN_RX_AMP);
gpio_set(PORT_NO_RX_AMP_PWR, PIN_NO_RX_AMP_PWR);
gpio_clear(rf_path->gpio_amp_bypass);
gpio_set(rf_path->gpio_tx_amp);
gpio_clear(rf_path->gpio_no_tx_amp_pwr);
gpio_clear(rf_path->gpio_rx_amp);
gpio_set(rf_path->gpio_no_rx_amp_pwr);
} else {
gpio_clear(PORT_AMP_BYPASS, PIN_AMP_BYPASS);
gpio_clear(PORT_TX_AMP, PIN_TX_AMP);
gpio_set(PORT_NO_TX_AMP_PWR, PIN_NO_TX_AMP_PWR);
gpio_set(PORT_RX_AMP, PIN_RX_AMP);
gpio_clear(PORT_NO_RX_AMP_PWR, PIN_NO_RX_AMP_PWR);
gpio_clear(rf_path->gpio_amp_bypass);
gpio_clear(rf_path->gpio_tx_amp);
gpio_set(rf_path->gpio_no_tx_amp_pwr);
gpio_set(rf_path->gpio_rx_amp);
gpio_clear(rf_path->gpio_no_rx_amp_pwr);
}
/*
@ -144,9 +143,9 @@ static void switchctrl_set_hackrf_one(uint8_t ctrl) {
* is unset:
*/
if (ctrl & SWITCHCTRL_NO_TX_AMP_PWR)
gpio_set(PORT_NO_TX_AMP_PWR, PIN_NO_TX_AMP_PWR);
gpio_set(rf_path->gpio_no_tx_amp_pwr);
if (ctrl & SWITCHCTRL_NO_RX_AMP_PWR)
gpio_set(PORT_NO_RX_AMP_PWR, PIN_NO_RX_AMP_PWR);
gpio_set(rf_path->gpio_no_rx_amp_pwr);
if (ctrl & SWITCHCTRL_ANT_PWR) {
rffc5071_set_gpo(&rffc5072, 0x00); /* turn on antenna power by clearing GPO1 */
@ -156,17 +155,17 @@ static void switchctrl_set_hackrf_one(uint8_t ctrl) {
}
#endif
static void switchctrl_set(const uint8_t gpo) {
static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo) {
#ifdef JAWBREAKER
rffc5071_set_gpo(&rffc5072, gpo);
#elif HACKRF_ONE
switchctrl_set_hackrf_one(gpo);
switchctrl_set_hackrf_one(rf_path, gpo);
#else
(void)gpo;
#endif
}
void rf_path_pin_setup() {
void rf_path_pin_setup(rf_path_t* const rf_path) {
#ifdef HACKRF_ONE
/* Configure RF switch control signals */
scu_pinmux(SCU_HP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
@ -187,27 +186,29 @@ void rf_path_pin_setup() {
scu_pinmux(SCU_NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
/* Configure RF switch control signals as outputs */
GPIO0_DIR |= PIN_AMP_BYPASS;
GPIO1_DIR |= (PIN_NO_MIX_BYPASS | PIN_RX_AMP | PIN_NO_RX_AMP_PWR);
GPIO2_DIR |= (PIN_HP | PIN_LP | PIN_TX_MIX_BP | PIN_RX_MIX_BP | PIN_TX_AMP);
GPIO3_DIR |= PIN_NO_TX_AMP_PWR;
GPIO5_DIR |= (PIN_TX | PIN_MIX_BYPASS | PIN_RX);
gpio_output(rf_path->gpio_amp_bypass);
gpio_output(rf_path->gpio_no_mix_bypass);
gpio_output(rf_path->gpio_rx_amp);
gpio_output(rf_path->gpio_no_rx_amp_pwr);
gpio_output(rf_path->gpio_hp);
gpio_output(rf_path->gpio_lp);
gpio_output(rf_path->gpio_tx_mix_bp);
gpio_output(rf_path->gpio_rx_mix_bp);
gpio_output(rf_path->gpio_tx_amp);
gpio_output(rf_path->gpio_no_tx_amp_pwr);
gpio_output(rf_path->gpio_tx);
gpio_output(rf_path->gpio_mix_bypass);
gpio_output(rf_path->gpio_rx);
/*
* Safe (initial) switch settings turn off both amplifiers and antenna port
* power and enable both amp bypass and mixer bypass.
*/
switchctrl_set(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_MIX_BYPASS);
/* Configure RF power supply (VAA) switch control signal as output */
GPIO_DIR(PORT_NO_VAA_ENABLE) |= PIN_NO_VAA_ENABLE;
/* Safe state: start with VAA turned off: */
disable_rf_power();
switchctrl_set(rf_path, SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_MIX_BYPASS);
#endif
}
void rf_path_init(void) {
void rf_path_init(rf_path_t* const rf_path) {
ssp1_set_mode_max5864();
max5864_setup(&max5864);
max5864_shutdown(&max5864);
@ -217,21 +218,21 @@ void rf_path_init(void) {
max2837_start(&max2837);
rffc5071_setup(&rffc5072);
switchctrl_set(switchctrl);
switchctrl_set(rf_path, switchctrl);
}
void rf_path_set_direction(const rf_path_direction_t direction) {
void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t direction) {
/* Turn off TX and RX amplifiers, then enable based on direction and bypass state. */
switchctrl |= SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_NO_RX_AMP_PWR;
rf_path->switchctrl |= SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_NO_RX_AMP_PWR;
switch(direction) {
case RF_PATH_DIRECTION_TX:
switchctrl |= SWITCHCTRL_TX;
if( (switchctrl & SWITCHCTRL_AMP_BYPASS) == 0 ) {
rf_path->switchctrl |= SWITCHCTRL_TX;
if( (rf_path->switchctrl & SWITCHCTRL_AMP_BYPASS) == 0 ) {
/* TX amplifier is in path, be sure to enable TX amplifier. */
switchctrl &= ~SWITCHCTRL_NO_TX_AMP_PWR;
rf_path->switchctrl &= ~SWITCHCTRL_NO_TX_AMP_PWR;
}
rffc5071_tx(&rffc5072);
if( switchctrl & SWITCHCTRL_MIX_BYPASS ) {
if( rf_path->switchctrl & SWITCHCTRL_MIX_BYPASS ) {
rffc5071_disable(&rffc5072);
} else {
rffc5071_enable(&rffc5072);
@ -240,17 +241,17 @@ void rf_path_set_direction(const rf_path_direction_t direction) {
max5864_tx(&max5864);
ssp1_set_mode_max2837();
max2837_tx(&max2837);
sgpio_configure(SGPIO_DIRECTION_TX);
sgpio_configure(&sgpio_config, SGPIO_DIRECTION_TX);
break;
case RF_PATH_DIRECTION_RX:
switchctrl &= ~SWITCHCTRL_TX;
if( (switchctrl & SWITCHCTRL_AMP_BYPASS) == 0 ) {
rf_path->switchctrl &= ~SWITCHCTRL_TX;
if( (rf_path->switchctrl & SWITCHCTRL_AMP_BYPASS) == 0 ) {
/* RX amplifier is in path, be sure to enable RX amplifier. */
switchctrl &= ~SWITCHCTRL_NO_RX_AMP_PWR;
rf_path->switchctrl &= ~SWITCHCTRL_NO_RX_AMP_PWR;
}
rffc5071_rx(&rffc5072);
if( switchctrl & SWITCHCTRL_MIX_BYPASS ) {
if( rf_path->switchctrl & SWITCHCTRL_MIX_BYPASS ) {
rffc5071_disable(&rffc5072);
} else {
rffc5071_enable(&rffc5072);
@ -259,77 +260,77 @@ void rf_path_set_direction(const rf_path_direction_t direction) {
max5864_rx(&max5864);
ssp1_set_mode_max2837();
max2837_rx(&max2837);
sgpio_configure(SGPIO_DIRECTION_RX);
sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX);
break;
case RF_PATH_DIRECTION_OFF:
default:
#ifdef HACKRF_ONE
rf_path_set_antenna(0);
rf_path_set_antenna(rf_path, 0);
#endif
/* Set RF path to receive direction when "off" */
switchctrl &= ~SWITCHCTRL_TX;
rf_path->switchctrl &= ~SWITCHCTRL_TX;
rffc5071_disable(&rffc5072);
ssp1_set_mode_max5864();
max5864_standby(&max5864);
ssp1_set_mode_max2837();
max2837_set_mode(&max2837, MAX2837_MODE_STANDBY);
sgpio_configure(SGPIO_DIRECTION_RX);
sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX);
break;
}
switchctrl_set(switchctrl);
switchctrl_set(rf_path, rf_path->switchctrl);
}
void rf_path_set_filter(const rf_path_filter_t filter) {
void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter) {
switch(filter) {
default:
case RF_PATH_FILTER_BYPASS:
switchctrl |= SWITCHCTRL_MIX_BYPASS;
rf_path->switchctrl |= SWITCHCTRL_MIX_BYPASS;
rffc5071_disable(&rffc5072);
break;
case RF_PATH_FILTER_LOW_PASS:
switchctrl &= ~(SWITCHCTRL_HP | SWITCHCTRL_MIX_BYPASS);
rf_path->switchctrl &= ~(SWITCHCTRL_HP | SWITCHCTRL_MIX_BYPASS);
rffc5071_enable(&rffc5072);
break;
case RF_PATH_FILTER_HIGH_PASS:
switchctrl &= ~SWITCHCTRL_MIX_BYPASS;
switchctrl |= SWITCHCTRL_HP;
rf_path->switchctrl &= ~SWITCHCTRL_MIX_BYPASS;
rf_path->switchctrl |= SWITCHCTRL_HP;
rffc5071_enable(&rffc5072);
break;
}
switchctrl_set(switchctrl);
switchctrl_set(rf_path, rf_path->switchctrl);
}
void rf_path_set_lna(const uint_fast8_t enable) {
void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable) {
if( enable ) {
if( switchctrl & SWITCHCTRL_TX ) {
if( rf_path->switchctrl & SWITCHCTRL_TX ) {
/* AMP_BYPASS=0, NO_RX_AMP_PWR=1, NO_TX_AMP_PWR=0 */
switchctrl |= SWITCHCTRL_NO_RX_AMP_PWR;
switchctrl &= ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR);
rf_path->switchctrl |= SWITCHCTRL_NO_RX_AMP_PWR;
rf_path->switchctrl &= ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR);
} else {
/* AMP_BYPASS=0, NO_RX_AMP_PWR=0, NO_TX_AMP_PWR=1 */
switchctrl |= SWITCHCTRL_NO_TX_AMP_PWR;
switchctrl &= ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_RX_AMP_PWR);
rf_path->switchctrl |= SWITCHCTRL_NO_TX_AMP_PWR;
rf_path->switchctrl &= ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_RX_AMP_PWR);
}
} else {
/* AMP_BYPASS=1, NO_RX_AMP_PWR=1, NO_TX_AMP_PWR=1 */
switchctrl |= SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_NO_RX_AMP_PWR;
rf_path->switchctrl |= SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_NO_RX_AMP_PWR;
}
switchctrl_set(switchctrl);
switchctrl_set(rf_path, rf_path->switchctrl);
}
/* antenna port power control */
void rf_path_set_antenna(const uint_fast8_t enable) {
void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable) {
if (enable) {
switchctrl |= SWITCHCTRL_ANT_PWR;
rf_path->switchctrl |= SWITCHCTRL_ANT_PWR;
} else {
switchctrl &= ~(SWITCHCTRL_ANT_PWR);
rf_path->switchctrl &= ~(SWITCHCTRL_ANT_PWR);
}
switchctrl_set(switchctrl);
switchctrl_set(rf_path, rf_path->switchctrl);
}

35
firmware/common/rf_path.h
View File

@ -25,8 +25,7 @@
#include <stdint.h>
void rf_path_pin_setup(void);
void rf_path_init(void);
#include "gpio.h"
typedef enum {
RF_PATH_DIRECTION_OFF,
@ -34,17 +33,39 @@ typedef enum {
RF_PATH_DIRECTION_TX,
} rf_path_direction_t;
void rf_path_set_direction(const rf_path_direction_t direction);
typedef enum {
RF_PATH_FILTER_BYPASS = 0,
RF_PATH_FILTER_LOW_PASS = 1,
RF_PATH_FILTER_HIGH_PASS = 2,
} rf_path_filter_t;
void rf_path_set_filter(const rf_path_filter_t filter);
typedef struct rf_path_t {
uint8_t switchctrl;
#ifdef HACKRF_ONE
gpio_t gpio_hp;
gpio_t gpio_lp;
gpio_t gpio_tx_mix_bp;
gpio_t gpio_no_mix_bypass;
gpio_t gpio_rx_mix_bp;
gpio_t gpio_tx_amp;
gpio_t gpio_tx;
gpio_t gpio_mix_bypass;
gpio_t gpio_rx;
gpio_t gpio_no_tx_amp_pwr;
gpio_t gpio_amp_bypass;
gpio_t gpio_rx_amp;
gpio_t gpio_no_rx_amp_pwr;
#endif
} rf_path_t;
void rf_path_set_lna(const uint_fast8_t enable);
void rf_path_set_antenna(const uint_fast8_t enable);
void rf_path_pin_setup(rf_path_t* const rf_path);
void rf_path_init(rf_path_t* const rf_path);
void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t direction);
void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter);
void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable);
void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable);
#endif/*__RFPATH_H__*/

3
firmware/common/rffc5071.c
View File

@ -88,6 +88,9 @@ void rffc5071_init(rffc5071_driver_t* const drv)
*/
void rffc5071_setup(rffc5071_driver_t* const drv)
{
gpio_set(drv->gpio_reset);
gpio_output(drv->gpio_reset);
rffc5071_init(drv);
/* initial setup */

2
firmware/common/rffc5071.h
View File

@ -26,12 +26,14 @@
#include <stdint.h>
#include "spi_bus.h"
#include "gpio.h"
/* 31 registers, each containing 16 bits of data. */
#define RFFC5071_NUM_REGS 31
typedef struct {
spi_bus_t* const bus;
gpio_t gpio_reset;
uint16_t regs[RFFC5071_NUM_REGS];
uint32_t regs_dirty;
} rffc5071_driver_t;

54
firmware/common/rffc5071_spi.c
View File

@ -21,69 +21,69 @@
*/
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/gpio.h>
#include "hackrf_core.h"
#include "rffc5071_spi.h"
static void rffc5071_spi_target_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_MIXER_ENX, PIN_MIXER_ENX);
const rffc5071_spi_config_t* const config = bus->config;
gpio_clear(config->gpio_select);
}
static void rffc5071_spi_target_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_MIXER_ENX, PIN_MIXER_ENX);
const rffc5071_spi_config_t* const config = bus->config;
gpio_set(config->gpio_select);
}
static void rffc5071_spi_direction_out(spi_bus_t* const bus) {
(void)bus;
GPIO_DIR(PORT_MIXER_SDATA) |= PIN_MIXER_SDATA;
const rffc5071_spi_config_t* const config = bus->config;
gpio_output(config->gpio_data);
}
static void rffc5071_spi_direction_in(spi_bus_t* const bus) {
(void)bus;
GPIO_DIR(PORT_MIXER_SDATA) &= ~PIN_MIXER_SDATA;
const rffc5071_spi_config_t* const config = bus->config;
gpio_input(config->gpio_data);
}
static void rffc5071_spi_data_out(spi_bus_t* const bus, const bool bit) {
(void)bus;
if (bit)
gpio_set(PORT_MIXER_SDATA, PIN_MIXER_SDATA);
else
gpio_clear(PORT_MIXER_SDATA, PIN_MIXER_SDATA);
const rffc5071_spi_config_t* const config = bus->config;
gpio_write(config->gpio_data, bit);
}
static bool rffc5071_spi_data_in(spi_bus_t* const bus) {
(void)bus;
return MIXER_SDATA_STATE;
const rffc5071_spi_config_t* const config = bus->config;
return gpio_read(config->gpio_data);
}
static void rffc5071_spi_bus_init(spi_bus_t* const bus) {
const rffc5071_spi_config_t* const config = bus->config;
scu_pinmux(SCU_MIXER_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_MIXER_SDATA, SCU_GPIO_FAST);
GPIO_DIR(PORT_MIXER_SCLK) |= PIN_MIXER_SCLK;
gpio_output(config->gpio_clock);
rffc5071_spi_direction_out(bus);
gpio_clear(PORT_MIXER_SCLK, PIN_MIXER_SCLK);
gpio_clear(PORT_MIXER_SDATA, PIN_MIXER_SDATA);
gpio_clear(config->gpio_clock);
gpio_clear(config->gpio_data);
}
static void rffc5071_spi_target_init(spi_bus_t* const bus) {
const rffc5071_spi_config_t* const config = bus->config;
/* Configure GPIO pins. */
scu_pinmux(SCU_MIXER_ENX, SCU_GPIO_FAST);
scu_pinmux(SCU_MIXER_RESETX, SCU_GPIO_FAST);
/* Set GPIO pins as outputs. */
GPIO_DIR(PORT_MIXER_ENX) |= PIN_MIXER_ENX;
GPIO_DIR(PORT_MIXER_RESETX) |= PIN_MIXER_RESETX;
gpio_output(config->gpio_select);
/* set to known state */
rffc5071_spi_target_unselect(bus);
gpio_set(PORT_MIXER_RESETX, PIN_MIXER_RESETX); /* active low */
}
void rffc5071_spi_start(spi_bus_t* const bus, const void* const config) {
(void)config;
bus->config = config;
rffc5071_spi_bus_init(bus);
rffc5071_spi_target_init(bus);
}
@ -101,11 +101,13 @@ static void rffc5071_spi_serial_delay(spi_bus_t* const bus) {
}
static void rffc5071_spi_sck(spi_bus_t* const bus) {
rffc5071_spi_serial_delay(bus);
gpio_set(PORT_MIXER_SCLK, PIN_MIXER_SCLK);
const rffc5071_spi_config_t* const config = bus->config;
rffc5071_spi_serial_delay(bus);
gpio_clear(PORT_MIXER_SCLK, PIN_MIXER_SCLK);
gpio_set(config->gpio_clock);
rffc5071_spi_serial_delay(bus);
gpio_clear(config->gpio_clock);
}
static uint32_t rffc5071_spi_exchange_bit(spi_bus_t* const bus, const uint32_t bit) {

8
firmware/common/rffc5071_spi.h
View File

@ -25,6 +25,14 @@
#include "spi_bus.h"
#include "gpio.h"
typedef struct rffc5071_spi_config_t {
gpio_t gpio_select;
gpio_t gpio_clock;
gpio_t gpio_data;
} rffc5071_spi_config_t;
void rffc5071_spi_start(spi_bus_t* const bus, const void* const config);
void rffc5071_spi_stop(spi_bus_t* const bus);
void rffc5071_spi_transfer(spi_bus_t* const bus, void* const data, const size_t count);

97
firmware/common/sgpio.c
View File

@ -20,7 +20,6 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/sgpio.h>
@ -28,9 +27,7 @@
#include <sgpio.h>
static bool sgpio_slice_mode_multislice = true;
void sgpio_configure_pin_functions() {
void sgpio_configure_pin_functions(sgpio_config_t* const config) {
scu_pinmux(SCU_PINMUX_SGPIO0, SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
scu_pinmux(SCU_PINMUX_SGPIO1, SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
scu_pinmux(SCU_PINMUX_SGPIO2, SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
@ -48,61 +45,20 @@ void sgpio_configure_pin_functions() {
scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[13] */
scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[14] */
sgpio_cpld_stream_rx_set_decimation(1);
sgpio_cpld_stream_rx_set_q_invert(0);
sgpio_cpld_stream_rx_set_decimation(config, 1);
sgpio_cpld_stream_rx_set_q_invert(config, 0);
GPIO_DIR(GPIO0) |= GPIOPIN13;
GPIO_DIR(GPIO5) |= GPIOPIN14 | GPIOPIN13 | GPIOPIN12;
}
void sgpio_test_interface() {
const uint_fast8_t host_clock_sgpio_pin = 8; // Input
const uint_fast8_t host_capture_sgpio_pin = 9; // Input
const uint_fast8_t host_disable_sgpio_pin = 10; // Output
const uint_fast8_t host_direction_sgpio_pin = 11; // Output
SGPIO_GPIO_OENREG = 0; // All inputs for the moment.
// Disable all counters during configuration
SGPIO_CTRL_ENABLE = 0;
// Make all SGPIO controlled by SGPIO's "GPIO" registers
for (uint_fast8_t i = 0; i < 16; i++) {
SGPIO_OUT_MUX_CFG(i) =
SGPIO_OUT_MUX_CFG_P_OE_CFG(0)
| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4);
}
// Set SGPIO output values.
SGPIO_GPIO_OUTREG =
(1L << host_direction_sgpio_pin)
| (1L << host_disable_sgpio_pin);
// Enable SGPIO pin outputs.
SGPIO_GPIO_OENREG =
(1L << host_direction_sgpio_pin)
| (1L << host_disable_sgpio_pin)
| (0L << host_capture_sgpio_pin)
| (0L << host_clock_sgpio_pin)
| (0xFF << 0);
// Configure SGPIO slices.
// Enable codec data stream.
SGPIO_GPIO_OUTREG &= ~(1L << host_disable_sgpio_pin);
while (1) {
for (uint_fast8_t i = 0; i < 8; i++) {
SGPIO_GPIO_OUTREG ^= (1L << i);
}
}
gpio_output(config->gpio_rx_q_invert);
gpio_output(config->gpio_rx_decimation[0]);
gpio_output(config->gpio_rx_decimation[1]);
gpio_output(config->gpio_rx_decimation[2]);
}
void sgpio_set_slice_mode(
sgpio_config_t* const config,
const bool multi_slice
) {
sgpio_slice_mode_multislice = multi_slice;
config->slice_mode_multislice = multi_slice;
}
/*
@ -118,6 +74,7 @@ void sgpio_set_slice_mode(
SGPIO11 Direction Output (1/High=TX mode LPC43xx=>CPLD=>DAC, 0/Low=RX mode LPC43xx<=CPLD<=ADC)
*/
void sgpio_configure(
sgpio_config_t* const config,
const sgpio_direction_t direction
) {
// Disable all counters during configuration
@ -167,7 +124,7 @@ void sgpio_configure(
;
const uint_fast8_t output_multiplexing_mode =
sgpio_slice_mode_multislice ? 11 : 9;
config->slice_mode_multislice ? 11 : 9;
/* SGPIO0 to SGPIO7 */
for(uint_fast8_t i=0; i<8; i++) {
// SGPIO pin 0 outputs slice A bit "i".
@ -189,9 +146,9 @@ void sgpio_configure(
};
const uint_fast8_t slice_gpdma = SGPIO_SLICE_H;
const uint_fast8_t pos = sgpio_slice_mode_multislice ? 0x1f : 0x03;
const bool single_slice = !sgpio_slice_mode_multislice;
const uint_fast8_t slice_count = sgpio_slice_mode_multislice ? 8 : 1;
const uint_fast8_t pos = config->slice_mode_multislice ? 0x1f : 0x03;
const bool single_slice = !config->slice_mode_multislice;
const uint_fast8_t slice_count = config->slice_mode_multislice ? 8 : 1;
const uint_fast8_t clk_capture_mode = (direction == SGPIO_DIRECTION_TX) ? 0 : 1;
uint32_t slice_enable_mask = 0;
@ -236,7 +193,7 @@ void sgpio_configure(
slice_enable_mask |= (1 << slice_index);
}
if( sgpio_slice_mode_multislice == false ) {
if( config->slice_mode_multislice == false ) {
SGPIO_MUX_CFG(slice_gpdma) =
SGPIO_MUX_CFG_CONCAT_ORDER(0) /* Self-loop */
| SGPIO_MUX_CFG_CONCAT_ENABLE(1)
@ -274,21 +231,24 @@ void sgpio_configure(
SGPIO_CTRL_ENABLE = slice_enable_mask;
}
void sgpio_cpld_stream_enable() {
void sgpio_cpld_stream_enable(sgpio_config_t* const config) {
(void)config;
// Enable codec data stream.
SGPIO_GPIO_OUTREG &= ~(1L << 10); /* SGPIO10 */
}
void sgpio_cpld_stream_disable() {
void sgpio_cpld_stream_disable(sgpio_config_t* const config) {
(void)config;
// Disable codec data stream.
SGPIO_GPIO_OUTREG |= (1L << 10); /* SGPIO10 */
}
bool sgpio_cpld_stream_is_enabled() {
bool sgpio_cpld_stream_is_enabled(sgpio_config_t* const config) {
(void)config;
return (SGPIO_GPIO_OUTREG & (1L << 10)) == 0; /* SGPIO10 */
}
bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t n) {
bool sgpio_cpld_stream_rx_set_decimation(sgpio_config_t* const config, const uint_fast8_t n) {
/* CPLD interface is three bits, SGPIO[15:13]:
* 111: decimate by 1 (skip_n=0, skip no samples)
* 110: decimate by 2 (skip_n=1, skip every other sample)
@ -297,16 +257,13 @@ bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t n) {
* 000: decimate by 8 (skip_n=7, skip seven of eight samples)
*/
const uint_fast8_t skip_n = n - 1;
GPIO_SET(GPIO5) = GPIOPIN14 | GPIOPIN13 | GPIOPIN12;
GPIO_CLR(GPIO5) = (skip_n & 7) << 12;
gpio_write(config->gpio_rx_decimation[0], (skip_n & 1) == 0);
gpio_write(config->gpio_rx_decimation[1], (skip_n & 2) == 0);
gpio_write(config->gpio_rx_decimation[2], (skip_n & 4) == 0);
return (skip_n < 8);
}
void sgpio_cpld_stream_rx_set_q_invert(const uint_fast8_t invert) {
if( invert ) {
GPIO_SET(GPIO0) = GPIOPIN13;
} else {
GPIO_CLR(GPIO0) = GPIOPIN13;
}
void sgpio_cpld_stream_rx_set_q_invert(sgpio_config_t* const config, const uint_fast8_t invert) {
gpio_write(config->gpio_rx_q_invert, invert);
}

29
firmware/common/sgpio.h
View File

@ -22,26 +22,39 @@
#ifndef __SGPIO_H__
#define __SGPIO_H__
#include <hackrf_core.h>
#include <stdint.h>
#include <stdbool.h>
#include <libopencm3/lpc43xx/sgpio.h>
#include "gpio.h"
typedef enum {
SGPIO_DIRECTION_RX,
SGPIO_DIRECTION_TX,
} sgpio_direction_t;
void sgpio_configure_pin_functions();
void sgpio_test_interface();
typedef struct sgpio_config_t {
gpio_t gpio_rx_q_invert;
gpio_t gpio_rx_decimation[3];
bool slice_mode_multislice;
} sgpio_config_t;
void sgpio_configure_pin_functions(sgpio_config_t* const config);
void sgpio_test_interface(sgpio_config_t* const config);
void sgpio_set_slice_mode(
sgpio_config_t* const config,
const bool multi_slice
);
void sgpio_configure(
sgpio_config_t* const config,
const sgpio_direction_t direction
);
void sgpio_cpld_stream_enable();
void sgpio_cpld_stream_disable();
bool sgpio_cpld_stream_is_enabled();
void sgpio_cpld_stream_enable(sgpio_config_t* const config);
void sgpio_cpld_stream_disable(sgpio_config_t* const config);
bool sgpio_cpld_stream_is_enabled(sgpio_config_t* const config);
bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t n);
void sgpio_cpld_stream_rx_set_q_invert(const uint_fast8_t invert);
bool sgpio_cpld_stream_rx_set_decimation(sgpio_config_t* const config, const uint_fast8_t n);
void sgpio_cpld_stream_rx_set_q_invert(sgpio_config_t* const config, const uint_fast8_t invert);
#endif//__SGPIO_H__

7
firmware/common/spi_ssp.c
View File

@ -32,6 +32,9 @@ void spi_ssp_start(spi_bus_t* const bus, const void* const _config) {
RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
}
gpio_set(config->gpio_select);
gpio_output(config->gpio_select);
SSP_CR1(bus->obj) = 0;
SSP_CPSR(bus->obj) = config->clock_prescale_rate;
SSP_CR0(bus->obj) =
@ -79,7 +82,7 @@ void spi_ssp_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const t
const bool word_size_u16 = (SSP_CR0(bus->obj) & 0xf) > SSP_DATA_8BITS;
config->select(bus);
gpio_clear(config->gpio_select);
for(size_t i=0; i<count; i++) {
const size_t data_count = transfers[i].count;
@ -95,7 +98,7 @@ void spi_ssp_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const t
}
}
}
config->unselect(bus);
gpio_set(config->gpio_select);
}
void spi_ssp_transfer(spi_bus_t* const bus, void* const data, const size_t count) {

5
firmware/common/spi_ssp.h
View File

@ -27,14 +27,15 @@
#include "spi_bus.h"
#include "gpio.h"
#include <libopencm3/lpc43xx/ssp.h>
typedef struct ssp_config_t {
ssp_datasize_t data_bits;
uint8_t serial_clock_rate;
uint8_t clock_prescale_rate;
void (*select)(spi_bus_t* const bus);
void (*unselect)(spi_bus_t* const bus);
gpio_t gpio_select;
} ssp_config_t;
void spi_ssp_start(spi_bus_t* const bus, const void* const config);

10
firmware/common/streaming.c
View File

@ -25,18 +25,16 @@
#include <libopencm3/lpc43xx/m4/nvic.h>
#include <libopencm3/lpc43xx/sgpio.h>
#include <sgpio.h>
void baseband_streaming_enable() {
void baseband_streaming_enable(sgpio_config_t* const sgpio_config) {
nvic_set_priority(NVIC_SGPIO_IRQ, 0);
nvic_enable_irq(NVIC_SGPIO_IRQ);
SGPIO_SET_EN_1 = (1 << SGPIO_SLICE_A);
sgpio_cpld_stream_enable();
sgpio_cpld_stream_enable(sgpio_config);
}
void baseband_streaming_disable() {
sgpio_cpld_stream_disable();
void baseband_streaming_disable(sgpio_config_t* const sgpio_config) {
sgpio_cpld_stream_disable(sgpio_config);
nvic_disable_irq(NVIC_SGPIO_IRQ);
}

6
firmware/common/streaming.h
View File

@ -23,7 +23,9 @@
#ifndef __STREAMING_H__
#define __STREAMING_H__
void baseband_streaming_enable();
void baseband_streaming_disable();
#include <sgpio.h>
void baseband_streaming_enable(sgpio_config_t* const sgpio_config);
void baseband_streaming_disable(sgpio_config_t* const sgpio_config);
#endif/*__STREAMING_H__*/

18
firmware/common/tuning.c
View File

@ -67,21 +67,21 @@ bool set_freq(const uint64_t freq)
max2837_set_mode(&max2837, MAX2837_MODE_STANDBY);
if(freq_mhz < MAX_LP_FREQ_MHZ)
{
rf_path_set_filter(RF_PATH_FILTER_LOW_PASS);
rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS);
/* IF is graduated from 2650 MHz to 2343 MHz */
max2837_freq_nominal_hz = 2650000000 - (freq / 7);
RFFC5071_freq_mhz = (max2837_freq_nominal_hz / FREQ_ONE_MHZ) + freq_mhz;
/* Set Freq and read real freq */
real_RFFC5071_freq_hz = rffc5071_set_frequency(&rffc5072, RFFC5071_freq_mhz);
max2837_set_frequency(&max2837, real_RFFC5071_freq_hz - freq);
sgpio_cpld_stream_rx_set_q_invert(1);
sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 1);
}else if( (freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ) )
{
rf_path_set_filter(RF_PATH_FILTER_BYPASS);
rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS);
MAX2837_freq_hz = (freq_mhz * FREQ_ONE_MHZ) + freq_hz;
/* RFFC5071_freq_mhz <= not used in Bypass mode */
max2837_set_frequency(&max2837, MAX2837_freq_hz);
sgpio_cpld_stream_rx_set_q_invert(0);
sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 0);
}else if( (freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ) )
{
if (freq_mhz < MID1_HP_FREQ_MHZ) {
@ -94,12 +94,12 @@ bool set_freq(const uint64_t freq)
/* IF is graduated from 2500 MHz to 2738 MHz */
max2837_freq_nominal_hz = 2500000000 + ((freq - 5100000000) / 9);
}
rf_path_set_filter(RF_PATH_FILTER_HIGH_PASS);
rf_path_set_filter(&rf_path, RF_PATH_FILTER_HIGH_PASS);
RFFC5071_freq_mhz = freq_mhz - (max2837_freq_nominal_hz / FREQ_ONE_MHZ);
/* Set Freq and read real freq */
real_RFFC5071_freq_hz = rffc5071_set_frequency(&rffc5072, RFFC5071_freq_mhz);
max2837_set_frequency(&max2837, freq - real_RFFC5071_freq_hz);
sgpio_cpld_stream_rx_set_q_invert(0);
sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 0);
}else
{
/* Error freq_mhz too high */
@ -129,12 +129,12 @@ bool set_freq_explicit(const uint64_t if_freq_hz, const uint64_t lo_freq_hz,
return false;
}
rf_path_set_filter(path);
rf_path_set_filter(&rf_path, path);
max2837_set_frequency(&max2837, if_freq_hz);
if (lo_freq_hz > if_freq_hz) {
sgpio_cpld_stream_rx_set_q_invert(1);
sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 1);
} else {
sgpio_cpld_stream_rx_set_q_invert(0);
sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 0);
}
if (path != RF_PATH_FILTER_BYPASS) {
(void)rffc5071_set_frequency(&rffc5072, lo_freq_hz / FREQ_ONE_MHZ);

3
firmware/common/w25q80bv.h
View File

@ -28,6 +28,7 @@
#include <stddef.h>
#include "spi_bus.h"
#include "gpio.h"
typedef union
{
@ -41,6 +42,8 @@ typedef struct w25q80bv_driver_t w25q80bv_driver_t;
struct w25q80bv_driver_t {
spi_bus_t* bus;
gpio_t gpio_hold;
gpio_t gpio_wp;
void (*target_init)(w25q80bv_driver_t* const drv);
size_t page_len;
size_t num_pages;

19
firmware/common/w25q80bv_target.c
View File

@ -22,7 +22,6 @@
#include "w25q80bv_target.h"
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/gpio.h>
#include "hackrf_core.h"
/* TODO: Why is SSEL being controlled manually when SSP0 could do it
@ -51,20 +50,10 @@ void w25q80bv_target_init(w25q80bv_driver_t* const drv) {
scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
/* drive SSEL, HOLD, and WP pins high */
gpio_set(PORT_FLASH, (PIN_FLASH_HOLD | PIN_FLASH_WP));
gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
gpio_set(drv->gpio_hold);
gpio_set(drv->gpio_wp);
/* Set GPIO pins as outputs. */
GPIO1_DIR |= (PIN_FLASH_HOLD | PIN_FLASH_WP);
GPIO5_DIR |= PIN_SSP0_SSEL;
}
void w25q80bv_target_spi_select(spi_bus_t* const bus) {
(void)bus;
gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
}
void w25q80bv_target_spi_unselect(spi_bus_t* const bus) {
(void)bus;
gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
gpio_output(drv->gpio_hold);
gpio_output(drv->gpio_wp);
}

3
firmware/common/w25q80bv_target.h
View File

@ -23,10 +23,7 @@
#define __W25Q80BV_TARGET_H__
#include "w25q80bv.h"
#include "spi_bus.h"
void w25q80bv_target_init(w25q80bv_driver_t* const drv);
void w25q80bv_target_spi_select(spi_bus_t* const bus);
void w25q80bv_target_spi_unselect(spi_bus_t* const bus);
#endif/*__W25Q80BV_TARGET_H__*/

234
firmware/common/xapp058/micro.c
View File

@ -197,7 +197,7 @@ typedef struct tagSXsvfInfo
} SXsvfInfo;
/* Declare pointer to functions that perform XSVF commands */
typedef int (*TXsvfDoCmdFuncPtr)( SXsvfInfo* );
typedef int (*TXsvfDoCmdFuncPtr)( jtag_gpio_t* const gpio, SXsvfInfo* );
/*============================================================================
@ -267,24 +267,24 @@ typedef int (*TXsvfDoCmdFuncPtr)( SXsvfInfo* );
* XSVF Function Prototypes
============================================================================*/
int xsvfDoIllegalCmd( SXsvfInfo* pXsvfInfo ); /* Illegal command function */
int xsvfDoXCOMPLETE( SXsvfInfo* pXsvfInfo );
int xsvfDoXTDOMASK( SXsvfInfo* pXsvfInfo );
int xsvfDoXSIR( SXsvfInfo* pXsvfInfo );
int xsvfDoXSIR2( SXsvfInfo* pXsvfInfo );
int xsvfDoXSDR( SXsvfInfo* pXsvfInfo );
int xsvfDoXRUNTEST( SXsvfInfo* pXsvfInfo );
int xsvfDoXREPEAT( SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRSIZE( SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRTDO( SXsvfInfo* pXsvfInfo );
int xsvfDoXSETSDRMASKS( SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRBCE( SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRTDOBCE( SXsvfInfo* pXsvfInfo );
int xsvfDoXSTATE( SXsvfInfo* pXsvfInfo );
int xsvfDoXENDXR( SXsvfInfo* pXsvfInfo );
int xsvfDoXCOMMENT( SXsvfInfo* pXsvfInfo );
int xsvfDoXWAIT( SXsvfInfo* pXsvfInfo );
int xsvfDoIllegalCmd( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo ); /* Illegal command function */
int xsvfDoXCOMPLETE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXTDOMASK( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSIR( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSIR2( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSDR( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXRUNTEST( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXREPEAT( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRSIZE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRTDO( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSETSDRMASKS( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRINC( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRBCE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSDRTDOBCE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXSTATE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXENDXR( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXCOMMENT( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
int xsvfDoXWAIT( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo );
/* Insert new command functions here */
/*============================================================================
@ -476,11 +476,11 @@ short xsvfGetAsNumBytes( long lNumBits )
* Parameters: sTms - new TMS value.
* Returns: void.
*****************************************************************************/
void xsvfTmsTransition( short sTms )
void xsvfTmsTransition(jtag_gpio_t* const gpio, short sTms )
{
setPort( TMS, sTms );
setPort( TCK, 0 );
setPort( TCK, 1 );
setPort(gpio, TMS, sTms );
setPort(gpio, TCK, 0 );
setPort(gpio, TCK, 1 );
}
/*****************************************************************************
@ -496,7 +496,8 @@ void xsvfTmsTransition( short sTms )
* ucTargetState - New target TAP state.
* Returns: int - 0 = success; otherwise error.
*****************************************************************************/
int xsvfGotoTapState( unsigned char* pucTapState,
int xsvfGotoTapState( jtag_gpio_t* const gpio,
unsigned char* pucTapState,
unsigned char ucTargetState )
{
int i;
@ -506,11 +507,11 @@ int xsvfGotoTapState( unsigned char* pucTapState,
if ( ucTargetState == XTAPSTATE_RESET )
{
/* If RESET, always perform TMS reset sequence to reset/sync TAPs */
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
for ( i = 0; i < 5; ++i )
{
setPort( TCK, 0 );
setPort( TCK, 1 );
setPort(gpio, TCK, 0 );
setPort(gpio, TCK, 1 );
}
*pucTapState = XTAPSTATE_RESET;
XSVFDBG_PRINTF( 3, " TMS Reset Sequence -> Test-Logic-Reset\n" );
@ -532,14 +533,14 @@ int xsvfGotoTapState( unsigned char* pucTapState,
or in IRPAUSE to comply with SVF standard */
if ( ucTargetState == XTAPSTATE_PAUSEDR )
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT2DR;
XSVFDBG_PRINTF1( 3, " TAP State = %s\n",
xsvf_pzTapState[ *pucTapState ] );
}
else if ( ucTargetState == XTAPSTATE_PAUSEIR )
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT2IR;
XSVFDBG_PRINTF1( 3, " TAP State = %s\n",
xsvf_pzTapState[ *pucTapState ] );
@ -552,138 +553,138 @@ int xsvfGotoTapState( unsigned char* pucTapState,
switch ( *pucTapState )
{
case XTAPSTATE_RESET:
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_RUNTEST;
break;
case XTAPSTATE_RUNTEST:
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_SELECTDR;
break;
case XTAPSTATE_SELECTDR:
if ( ucTargetState >= XTAPSTATE_IRSTATES )
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_SELECTIR;
}
else
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_CAPTUREDR;
}
break;
case XTAPSTATE_CAPTUREDR:
if ( ucTargetState == XTAPSTATE_SHIFTDR )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_SHIFTDR;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT1DR;
}
break;
case XTAPSTATE_SHIFTDR:
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT1DR;
break;
case XTAPSTATE_EXIT1DR:
if ( ucTargetState == XTAPSTATE_PAUSEDR )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_PAUSEDR;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_UPDATEDR;
}
break;
case XTAPSTATE_PAUSEDR:
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT2DR;
break;
case XTAPSTATE_EXIT2DR:
if ( ucTargetState == XTAPSTATE_SHIFTDR )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_SHIFTDR;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_UPDATEDR;
}
break;
case XTAPSTATE_UPDATEDR:
if ( ucTargetState == XTAPSTATE_RUNTEST )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_RUNTEST;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_SELECTDR;
}
break;
case XTAPSTATE_SELECTIR:
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_CAPTUREIR;
break;
case XTAPSTATE_CAPTUREIR:
if ( ucTargetState == XTAPSTATE_SHIFTIR )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_SHIFTIR;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT1IR;
}
break;
case XTAPSTATE_SHIFTIR:
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT1IR;
break;
case XTAPSTATE_EXIT1IR:
if ( ucTargetState == XTAPSTATE_PAUSEIR )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_PAUSEIR;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_UPDATEIR;
}
break;
case XTAPSTATE_PAUSEIR:
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_EXIT2IR;
break;
case XTAPSTATE_EXIT2IR:
if ( ucTargetState == XTAPSTATE_SHIFTIR )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_SHIFTIR;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_UPDATEIR;
}
break;
case XTAPSTATE_UPDATEIR:
if ( ucTargetState == XTAPSTATE_RUNTEST )
{
xsvfTmsTransition( 0 );
xsvfTmsTransition( gpio, 0 );
*pucTapState = XTAPSTATE_RUNTEST;
}
else
{
xsvfTmsTransition( 1 );
xsvfTmsTransition( gpio, 1 );
*pucTapState = XTAPSTATE_SELECTDR;
}
break;
@ -714,7 +715,8 @@ int xsvfGotoTapState( unsigned char* pucTapState,
* iExitShift - 1=exit at end of shift; 0=stay in Shift-DR.
* Returns: void.
*****************************************************************************/
void xsvfShiftOnly( long lNumBits,
void xsvfShiftOnly( jtag_gpio_t* const gpio,
long lNumBits,
lenVal* plvTdi,
lenVal* plvTdoCaptured,
int iExitShift )
@ -749,25 +751,25 @@ void xsvfShiftOnly( long lNumBits,
if ( iExitShift && !lNumBits )
{
/* Exit Shift-DR state */
setPort( TMS, 1 );
setPort(gpio, TMS, 1 );
}
/* Set the new TDI value */
setPort( TDI, (short)(ucTdiByte & 1) );
setPort(gpio, TDI, (short)(ucTdiByte & 1) );
ucTdiByte >>= 1;
/* Set TCK low */
setPort( TCK, 0 );
setPort(gpio, TCK, 0 );
if ( pucTdo )
{
/* Save the TDO value */
ucTdoBit = readTDOBit();
ucTdoBit = readTDOBit(gpio);
ucTdoByte |= ( ucTdoBit << i );
}
/* Set TCK high */
setPort( TCK, 1 );
setPort(gpio, TCK, 1 );
}
/* Save the TDO byte value */
@ -802,7 +804,8 @@ void xsvfShiftOnly( long lNumBits,
* Skip the waitTime() if plvTdoMask->val[0:plvTdoMask->len-1]
* is NOT all zeros and sMatch==1.
*****************************************************************************/
int xsvfShift( unsigned char* pucTapState,
int xsvfShift( jtag_gpio_t* const gpio,
unsigned char* pucTapState,
unsigned char ucStartState,
long lNumBits,
lenVal* plvTdi,
@ -837,9 +840,9 @@ int xsvfShift( unsigned char* pucTapState,
if ( lRunTestTime )
{
/* Wait for prespecified XRUNTEST time */
xsvfGotoTapState( pucTapState, XTAPSTATE_RUNTEST );
xsvfGotoTapState( gpio, pucTapState, XTAPSTATE_RUNTEST );
XSVFDBG_PRINTF1( 3, " Wait = %ld usec\n", lRunTestTime );
waitTime( lRunTestTime );
waitTime( gpio, lRunTestTime );
}
}
else
@ -847,10 +850,10 @@ int xsvfShift( unsigned char* pucTapState,
do
{
/* Goto Shift-DR or Shift-IR */
xsvfGotoTapState( pucTapState, ucStartState );
xsvfGotoTapState( gpio, pucTapState, ucStartState );
/* Shift TDI and capture TDO */
xsvfShiftOnly( lNumBits, plvTdi, plvTdoCaptured, iExitShift );
xsvfShiftOnly( gpio, lNumBits, plvTdi, plvTdoCaptured, iExitShift );
if ( plvTdoExpected )
{
@ -880,24 +883,24 @@ int xsvfShift( unsigned char* pucTapState,
XSVFDBG_PRINTF( 4, "\n");
XSVFDBG_PRINTF1( 3, " Retry #%d\n", ( ucRepeat + 1 ) );
/* Do exception handling retry - ShiftDR only */
xsvfGotoTapState( pucTapState, XTAPSTATE_PAUSEDR );
xsvfGotoTapState( gpio, pucTapState, XTAPSTATE_PAUSEDR );
/* Shift 1 extra bit */
xsvfGotoTapState( pucTapState, XTAPSTATE_SHIFTDR );
xsvfGotoTapState( gpio, pucTapState, XTAPSTATE_SHIFTDR );
/* Increment RUNTEST time by an additional 25% */
lRunTestTime += ( lRunTestTime >> 2 );
}
else
{
/* Do normal exit from Shift-XR */
xsvfGotoTapState( pucTapState, ucEndState );
xsvfGotoTapState( gpio, pucTapState, ucEndState );
}
if ( lRunTestTime )
{
/* Wait for prespecified XRUNTEST time */
xsvfGotoTapState( pucTapState, XTAPSTATE_RUNTEST );
xsvfGotoTapState( gpio, pucTapState, XTAPSTATE_RUNTEST );
XSVFDBG_PRINTF1( 3, " Wait = %ld usec\n", lRunTestTime );
waitTime( lRunTestTime );
waitTime( gpio, lRunTestTime );
}
}
} while ( iMismatch && ( ucRepeat++ < ucMaxRepeat ) );
@ -941,7 +944,8 @@ int xsvfShift( unsigned char* pucTapState,
* ucMaxRepeat - maximum xc9500/xl retries.
* Returns: int - 0 = success; otherwise TDO mismatch.
*****************************************************************************/
int xsvfBasicXSDRTDO( unsigned char* pucTapState,
int xsvfBasicXSDRTDO( jtag_gpio_t* const gpio,
unsigned char* pucTapState,
long lShiftLengthBits,
short sShiftLengthBytes,
lenVal* plvTdi,
@ -957,7 +961,7 @@ int xsvfBasicXSDRTDO( unsigned char* pucTapState,
{
readVal( plvTdoExpected, sShiftLengthBytes );
}
return( xsvfShift( pucTapState, XTAPSTATE_SHIFTDR, lShiftLengthBits,
return( xsvfShift( gpio, pucTapState, XTAPSTATE_SHIFTDR, lShiftLengthBits,
plvTdi, plvTdoCaptured, plvTdoExpected, plvTdoMask,
ucEndState, lRunTestTime, ucMaxRepeat ) );
}
@ -1052,8 +1056,9 @@ void xsvfDoSDRMasking( lenVal* plvTdi,
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoIllegalCmd( SXsvfInfo* pXsvfInfo )
int xsvfDoIllegalCmd( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
XSVFDBG_PRINTF2( 0, "ERROR: Encountered unsupported command #%d (%s)\n",
((unsigned int)(pXsvfInfo->ucCommand)),
((pXsvfInfo->ucCommand < XLASTCMD)
@ -1070,8 +1075,9 @@ int xsvfDoIllegalCmd( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXCOMPLETE( SXsvfInfo* pXsvfInfo )
int xsvfDoXCOMPLETE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
pXsvfInfo->ucComplete = 1;
return( XSVF_ERROR_NONE );
}
@ -1083,8 +1089,9 @@ int xsvfDoXCOMPLETE( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXTDOMASK( SXsvfInfo* pXsvfInfo )
int xsvfDoXTDOMASK( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
readVal( &(pXsvfInfo->lvTdoMask), pXsvfInfo->sShiftLengthBytes );
XSVFDBG_PRINTF( 4, " TDO Mask = ");
XSVFDBG_PRINTLENVAL( 4, &(pXsvfInfo->lvTdoMask) );
@ -1101,7 +1108,7 @@ int xsvfDoXTDOMASK( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSIR( SXsvfInfo* pXsvfInfo )
int xsvfDoXSIR( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
unsigned char ucShiftIrBits;
short sShiftIrBytes;
@ -1123,7 +1130,7 @@ int xsvfDoXSIR( SXsvfInfo* pXsvfInfo )
readVal( &(pXsvfInfo->lvTdi), xsvfGetAsNumBytes( ucShiftIrBits ) );
/* Shift the data */
iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTIR,
iErrorCode = xsvfShift( gpio, &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTIR,
ucShiftIrBits, &(pXsvfInfo->lvTdi),
/*plvTdoCaptured*/0, /*plvTdoExpected*/0,
/*plvTdoMask*/0, pXsvfInfo->ucEndIR,
@ -1146,7 +1153,7 @@ int xsvfDoXSIR( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSIR2( SXsvfInfo* pXsvfInfo )
int xsvfDoXSIR2( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
long lShiftIrBits;
short sShiftIrBytes;
@ -1168,7 +1175,7 @@ int xsvfDoXSIR2( SXsvfInfo* pXsvfInfo )
readVal( &(pXsvfInfo->lvTdi), xsvfGetAsNumBytes( lShiftIrBits ) );
/* Shift the data */
iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTIR,
iErrorCode = xsvfShift( gpio, &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTIR,
lShiftIrBits, &(pXsvfInfo->lvTdi),
/*plvTdoCaptured*/0, /*plvTdoExpected*/0,
/*plvTdoMask*/0, pXsvfInfo->ucEndIR,
@ -1192,12 +1199,12 @@ int xsvfDoXSIR2( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSDR( SXsvfInfo* pXsvfInfo )
int xsvfDoXSDR( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
int iErrorCode;
readVal( &(pXsvfInfo->lvTdi), pXsvfInfo->sShiftLengthBytes );
/* use TDOExpected from last XSDRTDO instruction */
iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTDR,
iErrorCode = xsvfShift( gpio, &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTDR,
pXsvfInfo->lShiftLengthBits, &(pXsvfInfo->lvTdi),
&(pXsvfInfo->lvTdoCaptured),
&(pXsvfInfo->lvTdoExpected),
@ -1217,8 +1224,9 @@ int xsvfDoXSDR( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXRUNTEST( SXsvfInfo* pXsvfInfo )
int xsvfDoXRUNTEST( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
readVal( &(pXsvfInfo->lvTdi), 4 );
pXsvfInfo->lRunTestTime = value( &(pXsvfInfo->lvTdi) );
XSVFDBG_PRINTF1( 3, " XRUNTEST = %ld\n", pXsvfInfo->lRunTestTime );
@ -1232,8 +1240,9 @@ int xsvfDoXRUNTEST( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXREPEAT( SXsvfInfo* pXsvfInfo )
int xsvfDoXREPEAT( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
readByte( &(pXsvfInfo->ucMaxRepeat) );
XSVFDBG_PRINTF1( 3, " XREPEAT = %d\n",
((unsigned int)(pXsvfInfo->ucMaxRepeat)) );
@ -1247,8 +1256,9 @@ int xsvfDoXREPEAT( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSDRSIZE( SXsvfInfo* pXsvfInfo )
int xsvfDoXSDRSIZE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
int iErrorCode;
iErrorCode = XSVF_ERROR_NONE;
readVal( &(pXsvfInfo->lvTdi), 4 );
@ -1272,10 +1282,10 @@ int xsvfDoXSDRSIZE( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSDRTDO( SXsvfInfo* pXsvfInfo )
int xsvfDoXSDRTDO( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
int iErrorCode;
iErrorCode = xsvfBasicXSDRTDO( &(pXsvfInfo->ucTapState),
iErrorCode = xsvfBasicXSDRTDO( gpio, &(pXsvfInfo->ucTapState),
pXsvfInfo->lShiftLengthBits,
pXsvfInfo->sShiftLengthBytes,
&(pXsvfInfo->lvTdi),
@ -1303,8 +1313,9 @@ int xsvfDoXSDRTDO( SXsvfInfo* pXsvfInfo )
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
#ifdef XSVF_SUPPORT_COMPRESSION
int xsvfDoXSETSDRMASKS( SXsvfInfo* pXsvfInfo )
int xsvfDoXSETSDRMASKS( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
/* read the addressMask */
readVal( &(pXsvfInfo->lvAddressMask), pXsvfInfo->sShiftLengthBytes );
/* read the dataMask */
@ -1338,7 +1349,7 @@ int xsvfDoXSETSDRMASKS( SXsvfInfo* pXsvfInfo )
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
#ifdef XSVF_SUPPORT_COMPRESSION
int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo )
int xsvfDoXSDRINC( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
int iErrorCode;
int iDataMaskLen;
@ -1347,7 +1358,7 @@ int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo )
unsigned char i;
readVal( &(pXsvfInfo->lvTdi), pXsvfInfo->sShiftLengthBytes );
iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTDR,
iErrorCode = xsvfShift( gpio, &(pXsvfInfo->ucTapState), XTAPSTATE_SHIFTDR,
pXsvfInfo->lShiftLengthBits,
&(pXsvfInfo->lvTdi), &(pXsvfInfo->lvTdoCaptured),
&(pXsvfInfo->lvTdoExpected),
@ -1379,7 +1390,7 @@ int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo )
&(pXsvfInfo->lvNextData),
&(pXsvfInfo->lvAddressMask),
&(pXsvfInfo->lvDataMask) );
iErrorCode = xsvfShift( &(pXsvfInfo->ucTapState),
iErrorCode = xsvfShift( gpio, &(pXsvfInfo->ucTapState),
XTAPSTATE_SHIFTDR,
pXsvfInfo->lShiftLengthBits,
&(pXsvfInfo->lvTdi),
@ -1410,13 +1421,13 @@ int xsvfDoXSDRINC( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSDRBCE( SXsvfInfo* pXsvfInfo )
int xsvfDoXSDRBCE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
unsigned char ucEndDR;
int iErrorCode;
ucEndDR = (unsigned char)(( pXsvfInfo->ucCommand == XSDRE ) ?
pXsvfInfo->ucEndDR : XTAPSTATE_SHIFTDR);
iErrorCode = xsvfBasicXSDRTDO( &(pXsvfInfo->ucTapState),
iErrorCode = xsvfBasicXSDRTDO( gpio, &(pXsvfInfo->ucTapState),
pXsvfInfo->lShiftLengthBits,
pXsvfInfo->sShiftLengthBytes,
&(pXsvfInfo->lvTdi),
@ -1441,13 +1452,13 @@ int xsvfDoXSDRBCE( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSDRTDOBCE( SXsvfInfo* pXsvfInfo )
int xsvfDoXSDRTDOBCE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
unsigned char ucEndDR;
int iErrorCode;
ucEndDR = (unsigned char)(( pXsvfInfo->ucCommand == XSDRTDOE ) ?
pXsvfInfo->ucEndDR : XTAPSTATE_SHIFTDR);
iErrorCode = xsvfBasicXSDRTDO( &(pXsvfInfo->ucTapState),
iErrorCode = xsvfBasicXSDRTDO( gpio, &(pXsvfInfo->ucTapState),
pXsvfInfo->lShiftLengthBits,
pXsvfInfo->sShiftLengthBytes,
&(pXsvfInfo->lvTdi),
@ -1470,12 +1481,12 @@ int xsvfDoXSDRTDOBCE( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXSTATE( SXsvfInfo* pXsvfInfo )
int xsvfDoXSTATE( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
unsigned char ucNextState;
int iErrorCode;
readByte( &ucNextState );
iErrorCode = xsvfGotoTapState( &(pXsvfInfo->ucTapState), ucNextState );
iErrorCode = xsvfGotoTapState( gpio, &(pXsvfInfo->ucTapState), ucNextState );
if ( iErrorCode != XSVF_ERROR_NONE )
{
pXsvfInfo->iErrorCode = iErrorCode;
@ -1492,8 +1503,9 @@ int xsvfDoXSTATE( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXENDXR( SXsvfInfo* pXsvfInfo )
int xsvfDoXENDXR( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
int iErrorCode;
unsigned char ucEndState;
@ -1549,8 +1561,10 @@ int xsvfDoXENDXR( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXCOMMENT( SXsvfInfo* pXsvfInfo )
int xsvfDoXCOMMENT( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
(void)gpio;
/* Use the comment for debugging */
/* Otherwise, read through the comment to the end '\0' and ignore */
unsigned char ucText;
@ -1587,7 +1601,7 @@ int xsvfDoXCOMMENT( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - XSVF information pointer.
* Returns: int - 0 = success; non-zero = error.
*****************************************************************************/
int xsvfDoXWAIT( SXsvfInfo* pXsvfInfo )
int xsvfDoXWAIT( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
unsigned char ucWaitState;
unsigned char ucEndState;
@ -1611,16 +1625,16 @@ int xsvfDoXWAIT( SXsvfInfo* pXsvfInfo )
/* If not already in <wait_state>, go to <wait_state> */
if ( pXsvfInfo->ucTapState != ucWaitState )
{
xsvfGotoTapState( &(pXsvfInfo->ucTapState), ucWaitState );
xsvfGotoTapState( gpio, &(pXsvfInfo->ucTapState), ucWaitState );
}
/* Wait for <wait_time> microseconds */
waitTime( lWaitTime );
waitTime( gpio, lWaitTime );
/* If not already in <end_state>, go to <end_state> */
if ( pXsvfInfo->ucTapState != ucEndState )
{
xsvfGotoTapState( &(pXsvfInfo->ucTapState), ucEndState );
xsvfGotoTapState( gpio, &(pXsvfInfo->ucTapState), ucEndState );
}
return( XSVF_ERROR_NONE );
@ -1641,7 +1655,7 @@ int xsvfDoXWAIT( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - ptr to the XSVF information.
* Returns: int - 0 = success; otherwise error.
*****************************************************************************/
int xsvfInitialize( SXsvfInfo* pXsvfInfo )
int xsvfInitialize( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
/* Initialize values */
pXsvfInfo->iErrorCode = xsvfInfoInit( pXsvfInfo );
@ -1649,7 +1663,7 @@ int xsvfInitialize( SXsvfInfo* pXsvfInfo )
if ( !pXsvfInfo->iErrorCode )
{
/* Initialize the TAPs */
pXsvfInfo->iErrorCode = xsvfGotoTapState( &(pXsvfInfo->ucTapState),
pXsvfInfo->iErrorCode = xsvfGotoTapState( gpio, &(pXsvfInfo->ucTapState),
XTAPSTATE_RESET );
}
@ -1666,7 +1680,7 @@ int xsvfInitialize( SXsvfInfo* pXsvfInfo )
* Parameters: pXsvfInfo - ptr to the XSVF information.
* Returns: int - 0 = success; otherwise error.
*****************************************************************************/
int xsvfRun( SXsvfInfo* pXsvfInfo )
int xsvfRun( jtag_gpio_t* const gpio, SXsvfInfo* pXsvfInfo )
{
/* Process the XSVF commands */
if ( (!pXsvfInfo->iErrorCode) && (!pXsvfInfo->ucComplete) )
@ -1682,12 +1696,12 @@ int xsvfRun( SXsvfInfo* pXsvfInfo )
xsvf_pzCommandName[pXsvfInfo->ucCommand] );
/* If your compiler cannot take this form,
then convert to a switch statement */
xsvf_pfDoCmd[ pXsvfInfo->ucCommand ]( pXsvfInfo );
xsvf_pfDoCmd[ pXsvfInfo->ucCommand ]( gpio, pXsvfInfo );
}
else
{
/* Illegal command value. Func sets error code. */
xsvfDoIllegalCmd( pXsvfInfo );
xsvfDoIllegalCmd( gpio, pXsvfInfo );
}
}
@ -1717,15 +1731,15 @@ void xsvfCleanup( SXsvfInfo* pXsvfInfo )
* Parameters: none.
* Returns: int - Legacy result values: 1 == success; 0 == failed.
*****************************************************************************/
int xsvfExecute()
int xsvfExecute(jtag_gpio_t* const gpio)
{
SXsvfInfo xsvfInfo;
xsvfInitialize( &xsvfInfo );
xsvfInitialize( gpio, &xsvfInfo );
while ( !xsvfInfo.iErrorCode && (!xsvfInfo.ucComplete) )
{
xsvfRun( &xsvfInfo );
xsvfRun( gpio, &xsvfInfo );
}
if ( xsvfInfo.iErrorCode )

4
firmware/common/xapp058/micro.h
View File

@ -13,6 +13,8 @@
#ifndef XSVF_MICRO_H
#define XSVF_MICRO_H
#include "cpld_jtag.h"
/* Legacy error codes for xsvfExecute from original XSVF player v2.0 */
#define XSVF_LEGACY_SUCCESS 1
#define XSVF_LEGACY_ERROR 0
@ -36,7 +38,7 @@
* Parameters: none.
* Returns: int - For error codes see above.
*****************************************************************************/
extern int xsvfExecute();
extern int xsvfExecute(jtag_gpio_t* const gpio);
#endif /* XSVF_MICRO_H */

31
firmware/common/xapp058/ports.c
View File

@ -13,7 +13,8 @@
#include "hackrf_core.h"
#include "cpld_jtag.h"
#include <libopencm3/lpc43xx/gpio.h>
#include "gpio.h"
void delay_jtag(uint32_t duration)
{
@ -38,23 +39,23 @@ void delay_jtag(uint32_t duration)
/* setPort: Implement to set the named JTAG signal (p) to the new value (v).*/
/* if in debugging mode, then just set the variables */
void setPort(short p,short val)
void setPort(jtag_gpio_t* const gpio, short p, short val)
{
if (p==TMS) {
if (val)
gpio_set(PORT_CPLD_TMS, PIN_CPLD_TMS);
gpio_set(gpio->gpio_tms);
else
gpio_clear(PORT_CPLD_TMS, PIN_CPLD_TMS);
gpio_clear(gpio->gpio_tms);
} if (p==TDI) {
if (val)
gpio_set(PORT_CPLD_TDI, PIN_CPLD_TDI);
gpio_set(gpio->gpio_tdi);
else
gpio_clear(PORT_CPLD_TDI, PIN_CPLD_TDI);
gpio_clear(gpio->gpio_tdi);
} if (p==TCK) {
if (val)
gpio_set(PORT_CPLD_TCK, PIN_CPLD_TCK);
gpio_set(gpio->gpio_tck);
else
gpio_clear(PORT_CPLD_TCK, PIN_CPLD_TCK);
gpio_clear(gpio->gpio_tck);
}
/* conservative delay */
@ -63,11 +64,11 @@ void setPort(short p,short val)
/* toggle tck LH. No need to modify this code. It is output via setPort. */
void pulseClock()
void pulseClock(jtag_gpio_t* const gpio)
{
setPort(TCK,0); /* set the TCK port to low */
setPort(gpio, TCK,0); /* set the TCK port to low */
delay_jtag(200);
setPort(TCK,1); /* set the TCK port to high */
setPort(gpio, TCK,1); /* set the TCK port to high */
delay_jtag(200);
}
@ -81,10 +82,10 @@ void readByte(unsigned char *data)
/* readTDOBit: Implement to return the current value of the JTAG TDO signal.*/
/* read the TDO bit from port */
unsigned char readTDOBit()
unsigned char readTDOBit(jtag_gpio_t* const gpio)
{
delay_jtag(2000);
return CPLD_TDO_STATE;
return gpio_read(gpio->gpio_tdo);;
}
/* waitTime: Implement as follows: */
@ -96,7 +97,7 @@ unsigned char readTDOBit()
/* RECOMMENDED IMPLEMENTATION: Pulse TCK at least microsec times AND */
/* continue pulsing TCK until the microsec wait */
/* requirement is also satisfied. */
void waitTime(long microsec)
void waitTime(jtag_gpio_t* const gpio, long microsec)
{
static long tckCyclesPerMicrosec = 1; /* must be at least 1 */
long tckCycles = microsec * tckCyclesPerMicrosec;
@ -108,6 +109,6 @@ void waitTime(long microsec)
in order to satisfy the microsec wait time requirement. */
for ( i = 0; i < tckCycles; ++i )
{
pulseClock();
pulseClock(gpio);
}
}

10
firmware/common/xapp058/ports.h
View File

@ -7,6 +7,8 @@
#ifndef ports_dot_h
#define ports_dot_h
#include "cpld_jtag.h"
/* these constants are used to send the appropriate ports to setPort */
/* they should be enumerated types, but some of the microcontroller */
/* compilers don't like enumerated types */
@ -15,17 +17,17 @@
#define TDI (short) 2
/* set the port "p" (TCK, TMS, or TDI) to val (0 or 1) */
extern void setPort(short p, short val);
extern void setPort(jtag_gpio_t* const gpio, short p, short val);
/* read the TDO bit and store it in val */
extern unsigned char readTDOBit();
extern unsigned char readTDOBit(jtag_gpio_t* const gpio);
/* make clock go down->up->down*/
extern void pulseClock();
extern void pulseClock(jtag_gpio_t* const gpio);
/* read the next byte of data from the xsvf file */
extern void readByte(unsigned char *data);
extern void waitTime(long microsec);
extern void waitTime(jtag_gpio_t* const gpio, long microsec);
#endif

2
firmware/hackrf-common.cmake
View File

@ -146,7 +146,7 @@ macro(DeclareTargets)
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_target.c
${PATH_HACKRF_FIRMWARE_COMMON}/spi_bus.c
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp.c
${PATH_HACKRF_FIRMWARE_COMMON}/pin_lpc.c
${PATH_HACKRF_FIRMWARE_COMMON}/gpio_lpc.c
m0_bin.s
)

31
firmware/hackrf_usb/hackrf_usb.c
View File

@ -24,7 +24,6 @@
#include <libopencm3/cm3/vector.h>
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/m4/nvic.h>
#include <streaming.h>
@ -40,15 +39,13 @@
#include "usb_api_spiflash.h"
#include "usb_api_transceiver.h"
#include "rf_path.h"
#include "sgpio_isr.h"
#include "usb_bulk_buffer.h"
#include "si5351c.h"
static volatile transceiver_mode_t _transceiver_mode = TRANSCEIVER_MODE_OFF;
void set_transceiver_mode(const transceiver_mode_t new_transceiver_mode) {
baseband_streaming_disable();
baseband_streaming_disable(&sgpio_config);
usb_endpoint_disable(&usb_endpoint_bulk_in);
usb_endpoint_disable(&usb_endpoint_bulk_out);
@ -56,27 +53,27 @@ void set_transceiver_mode(const transceiver_mode_t new_transceiver_mode) {
_transceiver_mode = new_transceiver_mode;
if( _transceiver_mode == TRANSCEIVER_MODE_RX ) {
gpio_clear(PORT_LED1_3, PIN_LED3);
gpio_set(PORT_LED1_3, PIN_LED2);
led_off(LED3);
led_on(LED2);
usb_endpoint_init(&usb_endpoint_bulk_in);
rf_path_set_direction(RF_PATH_DIRECTION_RX);
rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_RX);
vector_table.irq[NVIC_SGPIO_IRQ] = sgpio_isr_rx;
} else if (_transceiver_mode == TRANSCEIVER_MODE_TX) {
gpio_clear(PORT_LED1_3, PIN_LED2);
gpio_set(PORT_LED1_3, PIN_LED3);
led_off(LED2);
led_on(LED3);
usb_endpoint_init(&usb_endpoint_bulk_out);
rf_path_set_direction(RF_PATH_DIRECTION_TX);
rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_TX);
vector_table.irq[NVIC_SGPIO_IRQ] = sgpio_isr_tx;
} else {
gpio_clear(PORT_LED1_3, PIN_LED2);
gpio_clear(PORT_LED1_3, PIN_LED3);
rf_path_set_direction(RF_PATH_DIRECTION_OFF);
led_off(LED2);
led_off(LED3);
rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_OFF);
vector_table.irq[NVIC_SGPIO_IRQ] = sgpio_isr_rx;
}
if( _transceiver_mode != TRANSCEIVER_MODE_OFF ) {
si5351c_activate_best_clock_source(&clock_gen);
baseband_streaming_enable();
baseband_streaming_enable(&sgpio_config);
}
}
@ -170,7 +167,7 @@ void usb_configuration_changed(
if( device->configuration->number == 1 ) {
// transceiver configuration
cpu_clock_pll1_max_speed();
gpio_set(PORT_LED1_3, PIN_LED1);
led_on(LED1);
} else if( device->configuration->number == 2 ) {
// CPLD update configuration
cpu_clock_pll1_max_speed();
@ -179,7 +176,7 @@ void usb_configuration_changed(
} else {
/* Configuration number equal 0 means usb bus reset. */
cpu_clock_pll1_low_speed();
gpio_clear(PORT_LED1_3, PIN_LED1);
led_off(LED1);
}
}
@ -208,7 +205,7 @@ int main(void) {
usb_run(&usb_device);
rf_path_init();
rf_path_init(&rf_path);
unsigned int phase = 0;
while(true) {

15
firmware/hackrf_usb/usb_api_cpld.c
View File

@ -22,8 +22,6 @@
#include "usb_api_cpld.h"
#include <libopencm3/lpc43xx/gpio.h>
#include <hackrf_core.h>
#include <cpld_jtag.h>
#include <usb_queue.h>
@ -63,7 +61,6 @@ static void refill_cpld_buffer(void)
void cpld_update(void)
{
#define WAIT_LOOP_DELAY (6000000)
#define ALL_LEDS (PIN_LED1|PIN_LED2|PIN_LED3)
int i;
int error;
@ -72,7 +69,7 @@ void cpld_update(void)
refill_cpld_buffer();
error = cpld_jtag_program(sizeof(cpld_xsvf_buffer),
error = cpld_jtag_program(&jtag_cpld, sizeof(cpld_xsvf_buffer),
cpld_xsvf_buffer,
refill_cpld_buffer);
if(error == 0)
@ -80,17 +77,21 @@ void cpld_update(void)
/* blink LED1, LED2, and LED3 on success */
while (1)
{
gpio_set(PORT_LED1_3, ALL_LEDS); /* LEDs on */
led_on(LED1);
led_on(LED2);
led_on(LED3);
for (i = 0; i < WAIT_LOOP_DELAY; i++) /* Wait a bit. */
__asm__("nop");
gpio_clear(PORT_LED1_3, ALL_LEDS); /* LEDs off */
led_off(LED1);
led_off(LED2);
led_off(LED3);
for (i = 0; i < WAIT_LOOP_DELAY; i++) /* Wait a bit. */
__asm__("nop");
}
}else
{
/* LED3 (Red) steady on error */
gpio_set(PORT_LED1_3, PIN_LED3); /* LEDs on */
led_on(LED3);
while (1);
}
}

10
firmware/hackrf_usb/usb_api_transceiver.c
View File

@ -22,8 +22,6 @@
#include "usb_api_transceiver.h"
#include <libopencm3/lpc43xx/gpio.h>
#include <max2837.h>
#include <rf_path.h>
#include <tuning.h>
@ -125,11 +123,11 @@ usb_request_status_t usb_vendor_request_set_amp_enable(
if (stage == USB_TRANSFER_STAGE_SETUP) {
switch (endpoint->setup.value) {
case 0:
rf_path_set_lna(0);
rf_path_set_lna(&rf_path, 0);
usb_transfer_schedule_ack(endpoint->in);
return USB_REQUEST_STATUS_OK;
case 1:
rf_path_set_lna(1);
rf_path_set_lna(&rf_path, 1);
usb_transfer_schedule_ack(endpoint->in);
return USB_REQUEST_STATUS_OK;
default:
@ -189,11 +187,11 @@ usb_request_status_t usb_vendor_request_set_antenna_enable(
if (stage == USB_TRANSFER_STAGE_SETUP) {
switch (endpoint->setup.value) {
case 0:
rf_path_set_antenna(0);
rf_path_set_antenna(&rf_path, 0);
usb_transfer_schedule_ack(endpoint->in);
return USB_REQUEST_STATUS_OK;
case 1:
rf_path_set_antenna(1);
rf_path_set_antenna(&rf_path, 1);
usb_transfer_schedule_ack(endpoint->in);
return USB_REQUEST_STATUS_OK;
default:

13
firmware/mixertx/mixertx.c
View File

@ -19,14 +19,7 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/i2c.h>
#include <libopencm3/lpc43xx/ssp.h>
#include "hackrf_core.h"
#include "max2837.h"
#include "rffc5071.h"
int main(void)
{
@ -39,17 +32,17 @@ int main(void)
#endif
cpu_clock_init();
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
led_on(LED1);
ssp1_set_mode_max2837();
max2837_setup(&max2837);
rffc5071_setup(&rffc5072);
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
led_on(LED2);
max2837_set_frequency(&max2837, freq);
max2837_start(&max2837);
max2837_tx(&max2837);
gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
led_on(LED3);
while (1);
max2837_stop(&max2837);

29
firmware/sgpio-rx/sgpio-rx.c
View File

@ -20,17 +20,14 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/sgpio.h>
#include <hackrf_core.h>
#include <rf_path.h>
#include <sgpio.h>
#include <tuning.h>
void tx_test() {
sgpio_set_slice_mode(false);
sgpio_configure(TRANSCEIVER_MODE_TX);
sgpio_set_slice_mode(&sgpio_config, false);
sgpio_configure(&sgpio_config, TRANSCEIVER_MODE_TX);
// LSB goes out first, samples are 0x<Q1><I1><Q0><I0>
volatile uint32_t buffer[] = {
@ -41,7 +38,7 @@ void tx_test() {
};
uint32_t i = 0;
sgpio_cpld_stream_enable();
sgpio_cpld_stream_enable(&sgpio_config);
while(true) {
while(SGPIO_STATUS_1 == 0);
@ -51,20 +48,20 @@ void tx_test() {
}
void rx_test() {
sgpio_set_slice_mode(false);
sgpio_configure(TRANSCEIVER_MODE_RX);
sgpio_set_slice_mode(&sgpio_config, false);
sgpio_configure(&sgpio_config, TRANSCEIVER_MODE_RX);
volatile uint32_t buffer[4096];
uint32_t i = 0;
int16_t magsq;
int8_t sigi, sigq;
sgpio_cpld_stream_enable();
sgpio_cpld_stream_enable(&sgpio_config);
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
led_on(LED2);
while(true) {
while(SGPIO_STATUS_1 == 0);
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
led_on(LED1);
SGPIO_CLR_STATUS_1 = 1;
buffer[i & 4095] = SGPIO_REG_SS(SGPIO_SLICE_A);
@ -79,9 +76,9 @@ void rx_test() {
/* illuminate LED3 only when magsq exceeds threshold */
if (magsq > 0x3c00)
gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
led_on(LED3);
else
gpio_clear(PORT_LED1_3, (PIN_LED3)); /* LED3 off */
led_off(LED3);
i++;
}
}
@ -96,13 +93,13 @@ int main(void) {
enable_rf_power();
#endif
cpu_clock_init();
rf_path_init();
rf_path_set_direction(RF_PATH_DIRECTION_RX);
rf_path_init(&rf_path);
rf_path_set_direction(&rf_path, RF_PATH_DIRECTION_RX);
set_freq(freq);
rx_test();
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
led_on(LED2);
while (1) {

21
firmware/sgpio/sgpio_test.c
View File

@ -19,22 +19,15 @@
* the Free Software Foundation, Inc., 51 Franklin Street,
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/sgpio.h>
#include <libopencm3/lpc43xx/cgu.h>
#include <libopencm3/cm3/scs.h>
#include <hackrf_core.h>
#include <max5864.h>
#include <sgpio.h>
volatile uint32_t buffer[4096];
void tx_test() {
sgpio_set_slice_mode(false);
sgpio_configure(TRANSCEIVER_MODE_TX);
sgpio_set_slice_mode(&sgpio_config, false);
sgpio_configure(&sgpio_config, TRANSCEIVER_MODE_TX);
// LSB goes out first, samples are 0x<Q1><I1><Q0><I0>
buffer[0] = 0xda808080;
@ -44,7 +37,7 @@ void tx_test() {
uint32_t i = 0;
sgpio_cpld_stream_enable();
sgpio_cpld_stream_enable(&sgpio_config);
while(true) {
while(SGPIO_STATUS_1 == 0);
@ -54,12 +47,12 @@ void tx_test() {
}
void rx_test() {
sgpio_set_slice_mode(false);
sgpio_configure(TRANSCEIVER_MODE_RX);
sgpio_set_slice_mode(&sgpio_config, false);
sgpio_configure(&sgpio_config, TRANSCEIVER_MODE_RX);
uint32_t i = 0;
sgpio_cpld_stream_enable();
sgpio_cpld_stream_enable(&sgpio_config);
while(true) {
while(SGPIO_STATUS_1 == 0);
@ -73,7 +66,7 @@ int main(void) {
enable_1v8_power();
cpu_clock_init();
gpio_set(PORT_LED1_3, PIN_LED1);
led_on(LED1);
ssp1_set_mode_max5864();
max5864_setup(&max5864);

5
firmware/sgpio_passthrough/sgpio_passthrough.c
View File

@ -21,11 +21,8 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/sgpio.h>
#include <libopencm3/lpc43xx/cgu.h>
#include <libopencm3/cm3/scs.h>
#include <hackrf_core.h>
@ -353,7 +350,7 @@ int main(void)
pin_setup();
enable_1v8_power();
cpu_clock_init();
gpio_set(PORT_LED1_3, PIN_LED1);
led_on(LED1);
//test_sgpio_sliceA_D();
test_sgpio_interface();

12
firmware/simpletx/simpletx.c
View File

@ -19,13 +19,7 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/i2c.h>
#include <libopencm3/lpc43xx/ssp.h>
#include "hackrf_core.h"
#include "max2837.h"
int main(void)
{
@ -38,15 +32,15 @@ int main(void)
#endif
cpu_clock_init();
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
led_on(LED1);
ssp1_set_mode_max2837();
max2837_setup(&max2837);
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
led_on(LED2);
max2837_set_frequency(&max2837, freq);
max2837_start(&max2837);
max2837_tx(&max2837);
gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
led_on(LED3);
while (1);
max2837_stop(&max2837);

16
firmware/spiflash/spiflash.c
View File

@ -19,11 +19,7 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include "hackrf_core.h"
#include "w25q80bv.h"
int main(void)
{
@ -39,17 +35,19 @@ int main(void)
/* program test data to SPI flash */
for (i = 0; i < 515; i++)
buf[i] = (i * 3) & 0xFF;
w25q80bv_setup();
w25q80bv_chip_erase();
w25q80bv_program(790, 515, &buf[0]);
w25q80bv_setup(&w25q80bv);
w25q80bv_chip_erase(&w25q80bv);
w25q80bv_program(&w25q80bv, 790, 515, &buf[0]);
/* blink LED1 and LED3 */
while (1)
{
gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED3)); /* LEDs on */
led_on(LED1);
led_on(LED3);
for (i = 0; i < 8000000; i++) /* Wait a bit. */
__asm__("nop");
gpio_clear(PORT_LED1_3, (PIN_LED1|PIN_LED3)); /* LED off */
led_off(LED1);
led_off(LED3);
for (i = 0; i < 8000000; i++) /* Wait a bit. */
__asm__("nop");
}

18
firmware/startup/startup.c
View File

@ -19,10 +19,6 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/i2c.h>
#include "hackrf_core.h"
int main(void)
@ -35,23 +31,27 @@ int main(void)
cpu_clock_init();
gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LEDs on */
led_on(LED1);
led_on(LED2);
led_on(LED3);
while (1)
{
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LEDs on */
led_on(LED1);
for (i = 0; i < 2000000; i++) /* Wait a bit. */
__asm__("nop");
gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2)); /* LEDs on */
led_on(LED2);
for (i = 0; i < 2000000; i++) /* Wait a bit. */
__asm__("nop");
gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LED off */
led_on(LED3);
for (i = 0; i < 2000000; i++) /* Wait a bit. */
__asm__("nop");
gpio_clear(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LED off */
led_off(LED1);
led_off(LED2);
led_off(LED3);
for (i = 0; i < 2000000; i++) /* Wait a bit. */
__asm__("nop");
}

19
firmware/startup_systick/startup_systick.c
View File

@ -19,9 +19,6 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/i2c.h>
#include <libopencm3/lpc43xx/m4/nvic.h>
#include <libopencm3/cm3/systick.h>
#include <libopencm3/cm3/scs.h>
@ -139,19 +136,21 @@ int main(void)
systick_setup();
gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LEDs on */
led_on(LED1);
led_on(LED2);
led_on(LED3);
while (1)
{
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
led_on(LED1);
led_on(LED2);
led_on(LED3);
sys_tick_wait_time_ms(500);
gpio_clear(PORT_LED1_3, (PIN_LED3)); /* LED3 off */
gpio_clear(PORT_LED1_3, (PIN_LED2)); /* LED2 off */
gpio_clear(PORT_LED1_3, (PIN_LED1)); /* LED1 off */
led_off(LED1);
led_off(LED2);
led_off(LED3);
sys_tick_wait_time_ms(500);
}

3
firmware/startup_systick_perfo/perf_mips.c
View File

@ -19,9 +19,6 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/i2c.h>
#include <libopencm3/lpc43xx/m4/nvic.h>
#include <libopencm3/cm3/systick.h>
#include <libopencm3/cm3/scs.h>

19
firmware/startup_systick_perfo/startup_systick.c
View File

@ -19,9 +19,6 @@
* Boston, MA 02110-1301, USA.
*/
#include <libopencm3/lpc43xx/gpio.h>
#include <libopencm3/lpc43xx/scu.h>
#include <libopencm3/lpc43xx/i2c.h>
#include <libopencm3/lpc43xx/m4/nvic.h>
#include <libopencm3/cm3/systick.h>
#include <libopencm3/cm3/scs.h>
@ -138,7 +135,7 @@ extern uint32_t test_nb_instruction_per_sec_150_nop_asm();
extern uint32_t test_nb_instruction_per_sec_200_nop_asm();
extern uint32_t test_nb_instruction_per_sec_1000_nop_asm();
#define LED1_TOGGLE() (gpio_toggle(PORT_LED1_3, (PIN_LED1)))
#define LED1_TOGGLE() (led_toggle(LED1))
int main(void)
{
@ -152,7 +149,7 @@ int main(void)
systick_setup();
gpio_clear(PORT_LED1_3, (PIN_LED1)); /* LED1 off */
led_off(LED1);
/* Test number of instruction per second (MIPS) slow blink ON 1s, OFF 1s */
LED1_TOGGLE();
@ -192,15 +189,15 @@ LED1_TOGGLE();
/* Test finished fast blink */
while (1)
{
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
led_on(LED1);
led_on(LED2);
led_on(LED3);
sys_tick_wait_time_ms(250);
gpio_clear(PORT_LED1_3, (PIN_LED3)); /* LED3 off */
gpio_clear(PORT_LED1_3, (PIN_LED2)); /* LED2 off */
gpio_clear(PORT_LED1_3, (PIN_LED1)); /* LED1 off */
led_off(LED1);
led_off(LED2);
led_off(LED3);
sys_tick_wait_time_ms(250);
}