Remove Jellybean support from firmware
- nobody has a jellybean board
This commit is contained in:
@ -62,21 +62,17 @@ static struct gpio_t gpio_max2837_select = GPIO(0, 15);
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static struct gpio_t gpio_max2837_enable = GPIO(2, 6);
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static struct gpio_t gpio_max2837_enable = GPIO(2, 6);
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static struct gpio_t gpio_max2837_rx_enable = GPIO(2, 5);
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static struct gpio_t gpio_max2837_rx_enable = GPIO(2, 5);
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static struct gpio_t gpio_max2837_tx_enable = GPIO(2, 4);
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static struct gpio_t gpio_max2837_tx_enable = GPIO(2, 4);
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#ifdef JELLYBEAN
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static struct gpio_t gpio_max2837_rxhp = GPIO(2, 0);
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static struct gpio_t gpio_max2837_b1 = GPIO(2, 9);
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static struct gpio_t gpio_max2837_b2 = GPIO(2, 10);
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static struct gpio_t gpio_max2837_b3 = GPIO(2, 11);
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static struct gpio_t gpio_max2837_b4 = GPIO(2, 12);
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static struct gpio_t gpio_max2837_b5 = GPIO(2, 13);
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static struct gpio_t gpio_max2837_b6 = GPIO(2, 14);
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static struct gpio_t gpio_max2837_b7 = GPIO(2, 15);
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#endif
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/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
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/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
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static struct gpio_t gpio_max5864_select = GPIO(2, 7);
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static struct gpio_t gpio_max5864_select = GPIO(2, 7);
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/* RFFC5071 GPIO serial interface PinMux */
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#if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O)
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#if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O)
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static struct gpio_t gpio_rffc5072_select = GPIO(2, 13);
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static struct gpio_t gpio_rffc5072_clock = GPIO(5, 6);
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static struct gpio_t gpio_rffc5072_data = GPIO(3, 3);
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static struct gpio_t gpio_rffc5072_reset = GPIO(2, 14);
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/*
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/*
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static struct gpio_t gpio_sync_in_a = GPIO(3, 8);
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static struct gpio_t gpio_sync_in_a = GPIO(3, 8);
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static struct gpio_t gpio_sync_in_b = GPIO(3, 9);
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static struct gpio_t gpio_sync_in_b = GPIO(3, 9);
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@ -232,16 +228,6 @@ max2837_driver_t max2837 = {
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.gpio_enable = &gpio_max2837_enable,
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.gpio_enable = &gpio_max2837_enable,
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.gpio_rx_enable = &gpio_max2837_rx_enable,
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.gpio_rx_enable = &gpio_max2837_rx_enable,
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.gpio_tx_enable = &gpio_max2837_tx_enable,
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.gpio_tx_enable = &gpio_max2837_tx_enable,
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#ifdef JELLYBEAN
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.gpio_rxhp = &gpio_max2837_rxhp,
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.gpio_b1 = &gpio_max2837_b1,
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.gpio_b2 = &gpio_max2837_b2,
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.gpio_b3 = &gpio_max2837_b3,
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.gpio_b4 = &gpio_max2837_b4,
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.gpio_b5 = &gpio_max2837_b5,
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.gpio_b6 = &gpio_max2837_b6,
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.gpio_b7 = &gpio_max2837_b7,
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#endif
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.target_init = max2837_target_init,
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.target_init = max2837_target_init,
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.set_mode = max2837_target_set_mode,
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.set_mode = max2837_target_set_mode,
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};
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};
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@ -434,53 +420,6 @@ bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom)
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}
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}
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bool sample_rate_set(const uint32_t sample_rate_hz) {
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bool sample_rate_set(const uint32_t sample_rate_hz) {
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#ifdef JELLYBEAN
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/* Due to design issues, Jellybean/Lemondrop frequency plan is limited.
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* Long version of the story: The MAX2837 reference frequency
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* originates from the same PLL as the sample clocks, and in order to
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* keep the sample clocks in phase and keep jitter noise down, the MAX2837
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* and sample clocks must be integer-related.
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*/
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uint32_t r_div_sample = 2;
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uint32_t r_div_sgpio = 1;
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switch( sample_rate_hz ) {
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case 5000000:
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r_div_sample = 3; /* 800 MHz / 20 / 8 = 5 MHz */
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r_div_sgpio = 2; /* 800 MHz / 20 / 4 = 10 MHz */
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break;
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case 10000000:
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r_div_sample = 2; /* 800 MHz / 20 / 4 = 10 MHz */
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r_div_sgpio = 1; /* 800 MHz / 20 / 2 = 20 MHz */
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break;
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case 20000000:
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r_div_sample = 1; /* 800 MHz / 20 / 2 = 20 MHz */
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r_div_sgpio = 0; /* 800 MHz / 20 / 1 = 40 MHz */
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break;
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default:
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return false;
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}
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hackrf_ui_setSampleRate(sample_rate_hz);
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/* NOTE: Because MS1, 2, 3 outputs are slaved to PLLA, the p1, p2, p3
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* values are irrelevant. */
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/* MS0/CLK1 is the source for the MAX5864 codec. */
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si5351c_configure_multisynth(&clock_gen, 1, 4608, 0, 1, r_div_sample);
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/* MS0/CLK2 is the source for the CPLD codec clock (same as CLK1). */
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si5351c_configure_multisynth(&clock_gen, 2, 4608, 0, 1, r_div_sample);
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/* MS0/CLK3 is the source for the SGPIO clock. */
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si5351c_configure_multisynth(&clock_gen, 3, 4608, 0, 1, r_div_sgpio);
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return true;
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#endif
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#if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O)
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#if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O)
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uint32_t p1 = 4608;
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uint32_t p1 = 4608;
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uint32_t p2 = 0;
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uint32_t p2 = 0;
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@ -574,29 +513,6 @@ void cpu_clock_init(void)
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si5351c_configure_pll_sources(&clock_gen);
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si5351c_configure_pll_sources(&clock_gen);
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si5351c_configure_pll_multisynth(&clock_gen);
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si5351c_configure_pll_multisynth(&clock_gen);
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#ifdef JELLYBEAN
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/*
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* Jellybean/Lemondrop clocks:
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* CLK0 -> MAX2837
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* CLK1 -> MAX5864/CPLD.GCLK0
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* CLK2 -> CPLD.GCLK1
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* CLK3 -> CPLD.GCLK2
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* CLK4 -> LPC4330
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* CLK5 -> RFFC5072
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* CLK6 -> extra
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* CLK7 -> extra
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*/
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/* MS0/CLK0 is the source for the MAX2837 clock input. */
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si5351c_configure_multisynth(&clock_gen, 0, 2048, 0, 1, 0); /* 40MHz */
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/* MS4/CLK4 is the source for the LPC43xx microcontroller. */
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si5351c_configure_multisynth(&clock_gen, 4, 8021, 0, 3, 0); /* 12MHz */
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/* MS5/CLK5 is the source for the RFFC5071 mixer. */
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si5351c_configure_multisynth(&clock_gen, 5, 1536, 0, 1, 0); /* 50MHz */
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#endif
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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/*
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/*
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* Jawbreaker clocks:
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* Jawbreaker clocks:
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@ -674,11 +590,6 @@ void cpu_clock_init(void)
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//FIXME a lot of the details here should be in a CGU driver
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//FIXME a lot of the details here should be in a CGU driver
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#ifdef JELLYBEAN
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/* configure xtal oscillator for external clock input signal */
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CGU_XTAL_OSC_CTRL |= CGU_XTAL_OSC_CTRL_BYPASS;
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#endif
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/* set xtal oscillator to low frequency mode */
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/* set xtal oscillator to low frequency mode */
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CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_HF_MASK;
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CGU_XTAL_OSC_CTRL &= ~CGU_XTAL_OSC_CTRL_HF_MASK;
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@ -936,7 +847,7 @@ void pin_setup(void) {
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scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_NOPULL);
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scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_NOPULL);
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/* Configure USB indicators */
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/* Configure USB indicators */
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#if (defined JELLYBEAN || defined JAWBREAKER)
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#ifdef JAWBREAKER
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scu_pinmux(SCU_PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
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scu_pinmux(SCU_PINMUX_USB_LED0, SCU_CONF_FUNCTION3);
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scu_pinmux(SCU_PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
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scu_pinmux(SCU_PINMUX_USB_LED1, SCU_CONF_FUNCTION3);
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#endif
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#endif
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@ -44,15 +44,10 @@ extern "C"
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#include "cpld_jtag.h"
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#include "cpld_jtag.h"
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/* hardware identification number */
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/* hardware identification number */
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#define BOARD_ID_JELLYBEAN 0
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#define BOARD_ID_JAWBREAKER 1
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#define BOARD_ID_JAWBREAKER 1
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#define BOARD_ID_HACKRF_ONE 2
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#define BOARD_ID_HACKRF_ONE 2
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#define BOARD_ID_RAD1O 3
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#define BOARD_ID_RAD1O 3
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#ifdef JELLYBEAN
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#define BOARD_ID BOARD_ID_JELLYBEAN
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#endif
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#ifdef JAWBREAKER
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#ifdef JAWBREAKER
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#define BOARD_ID BOARD_ID_JAWBREAKER
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#define BOARD_ID BOARD_ID_JAWBREAKER
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#endif
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#endif
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@ -86,7 +81,7 @@ extern "C"
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#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
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#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */
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/* USB peripheral */
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/* USB peripheral */
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#if (defined JELLYBEAN || defined JAWBREAKER)
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#ifdef JAWBREAKER
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#define SCU_PINMUX_USB_LED0 (P6_8)
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#define SCU_PINMUX_USB_LED0 (P6_8)
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#define SCU_PINMUX_USB_LED1 (P6_7)
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#define SCU_PINMUX_USB_LED1 (P6_7)
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#endif
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#endif
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@ -117,9 +112,6 @@ extern "C"
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#define SCU_PINMUX_SGPIO5 (P6_6)
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#define SCU_PINMUX_SGPIO5 (P6_6)
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#define SCU_PINMUX_SGPIO6 (P2_2)
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#define SCU_PINMUX_SGPIO6 (P2_2)
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#define SCU_PINMUX_SGPIO7 (P1_0)
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#define SCU_PINMUX_SGPIO7 (P1_0)
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#ifdef JELLYBEAN
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#define SCU_PINMUX_SGPIO8 (P1_12)
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#endif
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#if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O)
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#if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O)
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#define SCU_PINMUX_SGPIO8 (P9_6)
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#define SCU_PINMUX_SGPIO8 (P9_6)
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#endif
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#endif
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@ -132,16 +124,6 @@ extern "C"
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#define SCU_PINMUX_SGPIO15 (P4_10)
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#define SCU_PINMUX_SGPIO15 (P4_10)
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/* MAX2837 GPIO (XCVR_CTL) PinMux */
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/* MAX2837 GPIO (XCVR_CTL) PinMux */
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#ifdef JELLYBEAN
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#define SCU_XCVR_RXHP (P4_0) /* GPIO2[0] on P4_0 */
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#define SCU_XCVR_B1 (P5_0) /* GPIO2[9] on P5_0 */
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#define SCU_XCVR_B2 (P5_1) /* GPIO2[10] on P5_1 */
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#define SCU_XCVR_B3 (P5_2) /* GPIO2[11] on P5_2 */
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#define SCU_XCVR_B4 (P5_3) /* GPIO2[12] on P5_3 */
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#define SCU_XCVR_B5 (P5_4) /* GPIO2[13] on P5_4 */
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#define SCU_XCVR_B6 (P5_5) /* GPIO2[14] on P5_5 */
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#define SCU_XCVR_B7 (P5_6) /* GPIO2[15] on P5_6 */
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#endif
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#ifdef RAD1O
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#ifdef RAD1O
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#define SCU_XCVR_RXHP (P8_1) /* GPIO[] on P8_1 */
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#define SCU_XCVR_RXHP (P8_1) /* GPIO[] on P8_1 */
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#define SCU_XCVR_B6 (P8_2) /* GPIO[] on P8_2 */
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#define SCU_XCVR_B6 (P8_2) /* GPIO[] on P8_2 */
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@ -157,12 +139,6 @@ extern "C"
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#define SCU_AD_CS (P5_7) /* GPIO2[7] on P5_7 */
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#define SCU_AD_CS (P5_7) /* GPIO2[7] on P5_7 */
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/* RFFC5071 GPIO serial interface PinMux */
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/* RFFC5071 GPIO serial interface PinMux */
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#ifdef JELLYBEAN
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#define SCU_MIXER_ENX (P7_0) /* GPIO3[8] on P7_0 */
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#define SCU_MIXER_SCLK (P7_1) /* GPIO3[9] on P7_1 */
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#define SCU_MIXER_SDATA (P7_2) /* GPIO3[10] on P7_2 */
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#define SCU_MIXER_RESETX (P7_3) /* GPIO3[11] on P7_3 */
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#endif
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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#if (defined JAWBREAKER || defined HACKRF_ONE)
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#define SCU_MIXER_ENX (P5_4) /* GPIO2[13] on P5_4 */
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#define SCU_MIXER_ENX (P5_4) /* GPIO2[13] on P5_4 */
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#define SCU_MIXER_SCLK (P2_6) /* GPIO5[6] on P2_6 */
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#define SCU_MIXER_SCLK (P2_6) /* GPIO5[6] on P2_6 */
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@ -48,16 +48,6 @@ struct max2837_driver_t {
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gpio_t gpio_enable;
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gpio_t gpio_enable;
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gpio_t gpio_rx_enable;
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gpio_t gpio_rx_enable;
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gpio_t gpio_tx_enable;
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gpio_t gpio_tx_enable;
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#ifdef JELLYBEAN
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gpio_t gpio_rxhp;
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gpio_t gpio_b1;
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gpio_t gpio_b2;
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gpio_t gpio_b3;
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gpio_t gpio_b4;
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gpio_t gpio_b5;
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gpio_t gpio_b6;
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gpio_t gpio_b7;
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#endif
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void (*target_init)(max2837_driver_t* const drv);
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void (*target_init)(max2837_driver_t* const drv);
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void (*set_mode)(max2837_driver_t* const drv, const max2837_mode_t new_mode);
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void (*set_mode)(max2837_driver_t* const drv, const max2837_mode_t new_mode);
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max2837_mode_t mode;
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max2837_mode_t mode;
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@ -34,16 +34,6 @@ void max2837_target_init(max2837_driver_t* const drv) {
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scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST);
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/* Configure XCVR_CTL GPIO pins. */
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/* Configure XCVR_CTL GPIO pins. */
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#ifdef JELLYBEAN
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scu_pinmux(SCU_XCVR_RXHP, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_B1, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_B2, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_B3, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_B4, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_B5, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_B6, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_B7, SCU_GPIO_FAST);
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#endif
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scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST);
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scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST);
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@ -52,27 +42,6 @@ void max2837_target_init(max2837_driver_t* const drv) {
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gpio_output(drv->gpio_enable);
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gpio_output(drv->gpio_enable);
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gpio_output(drv->gpio_rx_enable);
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gpio_output(drv->gpio_rx_enable);
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gpio_output(drv->gpio_tx_enable);
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gpio_output(drv->gpio_tx_enable);
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#ifdef JELLYBEAN
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gpio_output(drv->gpio_rxhp);
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gpio_output(drv->gpio_b1);
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gpio_output(drv->gpio_b2);
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gpio_output(drv->gpio_b3);
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gpio_output(drv->gpio_b4);
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gpio_output(drv->gpio_b5);
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gpio_output(drv->gpio_b6);
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gpio_output(drv->gpio_b7);
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#endif
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|
||||||
|
|
||||||
#ifdef JELLYBEAN
|
|
||||||
gpio_set(drv->gpio_rxhp);
|
|
||||||
gpio_set(drv->gpio_b1);
|
|
||||||
gpio_set(drv->gpio_b2);
|
|
||||||
gpio_set(drv->gpio_b3);
|
|
||||||
gpio_set(drv->gpio_b4);
|
|
||||||
gpio_set(drv->gpio_b5);
|
|
||||||
gpio_set(drv->gpio_b6);
|
|
||||||
gpio_set(drv->gpio_b7);
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) {
|
void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) {
|
||||||
|
@ -164,59 +164,6 @@ void si5351c_configure_multisynth(si5351c_driver_t* const drv,
|
|||||||
si5351c_write(drv, data, sizeof(data));
|
si5351c_write(drv, data, sizeof(data));
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef JELLYBEAN
|
|
||||||
/*
|
|
||||||
* Registers 16 through 23: CLKx Control
|
|
||||||
* CLK0:
|
|
||||||
* CLK0_PDN=0 (powered up)
|
|
||||||
* MS0_INT=1 (integer mode)
|
|
||||||
* MS0_SRC=0 (PLLA as source for MultiSynth 0)
|
|
||||||
* CLK0_INV=0 (not inverted)
|
|
||||||
* CLK0_SRC=3 (MS0 as input source)
|
|
||||||
* CLK0_IDRV=3 (8mA)
|
|
||||||
* CLK1:
|
|
||||||
* CLK1_PDN=0 (powered up)
|
|
||||||
* MS1_INT=1 (integer mode)
|
|
||||||
* MS1_SRC=0 (PLLA as source for MultiSynth 1)
|
|
||||||
* CLK1_INV=0 (not inverted)
|
|
||||||
* CLK1_SRC=2 (MS0 as input source)
|
|
||||||
* CLK1_IDRV=3 (8mA)
|
|
||||||
* CLK2:
|
|
||||||
* CLK2_PDN=0 (powered up)
|
|
||||||
* MS2_INT=1 (integer mode)
|
|
||||||
* MS2_SRC=0 (PLLA as source for MultiSynth 2)
|
|
||||||
* CLK2_INV=0 (not inverted)
|
|
||||||
* CLK2_SRC=2 (MS0 as input source)
|
|
||||||
* CLK2_IDRV=3 (8mA)
|
|
||||||
* CLK3:
|
|
||||||
* CLK3_PDN=0 (powered up)
|
|
||||||
* MS3_INT=1 (integer mode)
|
|
||||||
* MS3_SRC=0 (PLLA as source for MultiSynth 3)
|
|
||||||
* CLK3_INV=0 (inverted)
|
|
||||||
* CLK3_SRC=2 (MS0 as input source)
|
|
||||||
* CLK3_IDRV=3 (8mA)
|
|
||||||
* CLK4:
|
|
||||||
* CLK4_PDN=0 (powered up)
|
|
||||||
* MS4_INT=0 (fractional mode -- to support 12MHz to LPC for USB DFU)
|
|
||||||
* MS4_SRC=0 (PLLA as source for MultiSynth 4)
|
|
||||||
* CLK4_INV=0 (not inverted)
|
|
||||||
* CLK4_SRC=3 (MS4 as input source)
|
|
||||||
* CLK4_IDRV=3 (8mA)
|
|
||||||
* CLK5:
|
|
||||||
* CLK5_PDN=0 (powered up)
|
|
||||||
* MS5_INT=1 (integer mode)
|
|
||||||
* MS5_SRC=0 (PLLA as source for MultiSynth 5)
|
|
||||||
* CLK5_INV=0 (not inverted)
|
|
||||||
* CLK5_SRC=3 (MS5 as input source)
|
|
||||||
* CLK5_IDRV=3 (8mA)
|
|
||||||
*/
|
|
||||||
void si5351c_configure_clock_control(si5351c_driver_t* const drv)
|
|
||||||
{
|
|
||||||
uint8_t data[] = { 16, 0x4F, 0x4B, 0x4B, 0x4B, 0x0F, 0x4F, 0xC0, 0xC0 };
|
|
||||||
si5351c_write(drv, data, sizeof(data));
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if (defined JAWBREAKER || defined HACKRF_ONE)
|
#if (defined JAWBREAKER || defined HACKRF_ONE)
|
||||||
void si5351c_configure_clock_control(si5351c_driver_t* const drv, const enum pll_sources source)
|
void si5351c_configure_clock_control(si5351c_driver_t* const drv, const enum pll_sources source)
|
||||||
{
|
{
|
||||||
|
@ -80,10 +80,7 @@ typedef enum {
|
|||||||
HACKRF_VENDOR_REQUEST_RESET = 30,
|
HACKRF_VENDOR_REQUEST_RESET = 30,
|
||||||
} hackrf_vendor_request;
|
} hackrf_vendor_request;
|
||||||
|
|
||||||
typedef enum {
|
#define USB_CONFIG_STANDARD 0x1
|
||||||
USB_CONFIG_STANDARD = 0x1,
|
|
||||||
USB_CONFIG_CPLD_UPDATE = 0x2,
|
|
||||||
} hackrf_usb_configurations;
|
|
||||||
|
|
||||||
typedef enum {
|
typedef enum {
|
||||||
HACKRF_TRANSCEIVER_MODE_OFF = 0,
|
HACKRF_TRANSCEIVER_MODE_OFF = 0,
|
||||||
@ -385,9 +382,9 @@ hackrf_device_list_t* ADDCALL hackrf_device_list()
|
|||||||
{
|
{
|
||||||
ssize_t i;
|
ssize_t i;
|
||||||
libusb_device_handle* usb_device = NULL;
|
libusb_device_handle* usb_device = NULL;
|
||||||
uint_fast8_t serial_descriptor_index;
|
uint8_t serial_descriptor_index;
|
||||||
char serial_number[64];
|
char serial_number[64];
|
||||||
int serial_number_length;
|
uint8_t idx, serial_number_length;
|
||||||
|
|
||||||
hackrf_device_list_t* list = calloc(1, sizeof(*list));
|
hackrf_device_list_t* list = calloc(1, sizeof(*list));
|
||||||
if ( list == NULL )
|
if ( list == NULL )
|
||||||
@ -412,7 +409,7 @@ hackrf_device_list_t* ADDCALL hackrf_device_list()
|
|||||||
if((device_descriptor.idProduct == hackrf_one_usb_pid) ||
|
if((device_descriptor.idProduct == hackrf_one_usb_pid) ||
|
||||||
(device_descriptor.idProduct == hackrf_jawbreaker_usb_pid) ||
|
(device_descriptor.idProduct == hackrf_jawbreaker_usb_pid) ||
|
||||||
(device_descriptor.idProduct == rad1o_usb_pid)) {
|
(device_descriptor.idProduct == rad1o_usb_pid)) {
|
||||||
int idx = list->devicecount++;
|
idx = list->devicecount++;
|
||||||
list->usb_board_ids[idx] = device_descriptor.idProduct;
|
list->usb_board_ids[idx] = device_descriptor.idProduct;
|
||||||
list->usb_device_index[idx] = i;
|
list->usb_device_index[idx] = i;
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user