Sojus07/hackrf
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

MAX2837: De-singleton the driver.

Browse Source 
Conflicts:
	firmware/common/hackrf_core.c
	firmware/common/hackrf_core.h
This commit is contained in:
Jared Boone
2014-11-04 12:15:03 -08:00
parent 4f3cae2e41
commit 453f622b74
13 changed files with 177 additions and 173 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
firmware/common/hackrf_core.c
View File

@ -35,6 +35,8 @@
#define WAIT_CPU_CLOCK_INIT_DELAY (10000) #define WAIT_CPU_CLOCK_INIT_DELAY (10000)
max2837_driver_t max2837;
void delay(uint32_t duration) void delay(uint32_t duration)
{ {
uint32_t i; uint32_t i;
@ -250,7 +252,7 @@ bool sample_rate_set(const uint32_t sample_rate_hz) {
} }
bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz) { bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz) {
return max2837_set_lpf_bandwidth(bandwidth_hz); return max2837_set_lpf_bandwidth(&max2837, bandwidth_hz);
} }
/* clock startup for Jellybean with Lemondrop attached /* clock startup for Jellybean with Lemondrop attached

3
firmware/common/hackrf_core.h
View File

@ -32,6 +32,8 @@ extern "C"
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include "max2837_drv.h"
/* hardware identification number */ /* hardware identification number */
#define BOARD_ID_JELLYBEAN 0 #define BOARD_ID_JELLYBEAN 0
#define BOARD_ID_JAWBREAKER 1 #define BOARD_ID_JAWBREAKER 1
@ -349,6 +351,7 @@ typedef enum {
} transceiver_mode_t; } transceiver_mode_t;
void delay(uint32_t duration); void delay(uint32_t duration);
extern max2837_driver_t max2837;
void cpu_clock_init(void); void cpu_clock_init(void);
void cpu_clock_pll1_low_speed(void); void cpu_clock_pll1_low_speed(void);

171
firmware/common/max2837.c
View File

@ -43,7 +43,7 @@
#endif #endif
/* Default register values. */ /* Default register values. */
static uint16_t max2837_regs_default[MAX2837_NUM_REGS] = { static const uint16_t max2837_regs_default[MAX2837_NUM_REGS] = {
0x150, /* 0 */ 0x150, /* 0 */
0x002, /* 1 */ 0x002, /* 1 */
0x1f4, /* 2 */ 0x1f4, /* 2 */
@ -82,105 +82,100 @@ static uint16_t max2837_regs_default[MAX2837_NUM_REGS] = {
0x080, /* 30 */ 0x080, /* 30 */
0x000 }; /* 31 */ 0x000 }; /* 31 */
uint16_t max2837_regs[MAX2837_NUM_REGS];
/* Mark all regsisters dirty so all will be written at init. */
uint32_t max2837_regs_dirty = 0xffffffff;
/* Set up all registers according to defaults specified in docs. */ /* Set up all registers according to defaults specified in docs. */
void max2837_init(void) void max2837_init(max2837_driver_t* const drv)
{ {
LOG("# max2837_init\n"); LOG("# max2837_init\n");
memcpy(max2837_regs, max2837_regs_default, sizeof(max2837_regs)); memcpy(drv->regs, max2837_regs_default, sizeof(drv->regs));
max2837_regs_dirty = 0xffffffff; drv->regs_dirty = 0xffffffff;
/* Write default register values to chip. */ /* Write default register values to chip. */
max2837_regs_commit(); max2837_regs_commit(drv);
} }
/* /*
* Set up pins for GPIO and SPI control, configure SSP peripheral for SPI, and * Set up pins for GPIO and SPI control, configure SSP peripheral for SPI, and
* set our own default register configuration. * set our own default register configuration.
*/ */
void max2837_setup(void) void max2837_setup(max2837_driver_t* const drv)
{ {
LOG("# max2837_setup\n"); LOG("# max2837_setup\n");
max2837_pin_config(); max2837_pin_config(drv);
max2837_init(); max2837_init(drv);
LOG("# max2837_init done\n"); LOG("# max2837_init done\n");
/* Use SPI control instead of B1-B7 pins for gain settings. */ /* Use SPI control instead of B1-B7 pins for gain settings. */
set_MAX2837_TXVGA_GAIN_SPI_EN(1); set_MAX2837_TXVGA_GAIN_SPI_EN(drv, 1);
set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(1); set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(drv, 1);
//set_MAX2837_TXVGA_GAIN(0x3f); /* maximum attenuation */ //set_MAX2837_TXVGA_GAIN(0x3f); /* maximum attenuation */
set_MAX2837_TXVGA_GAIN(0x00); /* minimum attenuation */ set_MAX2837_TXVGA_GAIN(drv, 0x00); /* minimum attenuation */
set_MAX2837_VGAMUX_enable(1); set_MAX2837_VGAMUX_enable(drv, 1);
set_MAX2837_VGA_EN(1); set_MAX2837_VGA_EN(drv, 1);
set_MAX2837_HPC_RXGAIN_EN(0); set_MAX2837_HPC_RXGAIN_EN(drv, 0);
set_MAX2837_HPC_STOP(MAX2837_STOP_1K); set_MAX2837_HPC_STOP(drv, MAX2837_STOP_1K);
set_MAX2837_LNAgain_SPI_EN(1); set_MAX2837_LNAgain_SPI_EN(drv, 1);
set_MAX2837_LNAgain(MAX2837_LNAgain_MAX); /* maximum gain */ set_MAX2837_LNAgain(drv, MAX2837_LNAgain_MAX); /* maximum gain */
set_MAX2837_VGAgain_SPI_EN(1); set_MAX2837_VGAgain_SPI_EN(drv, 1);
set_MAX2837_VGA(0x18); /* reasonable gain for noisy 2.4GHz environment */ set_MAX2837_VGA(drv, 0x18); /* reasonable gain for noisy 2.4GHz environment */
/* maximum rx output common-mode voltage */ /* maximum rx output common-mode voltage */
set_MAX2837_BUFF_VCM(MAX2837_BUFF_VCM_1_25); set_MAX2837_BUFF_VCM(drv, MAX2837_BUFF_VCM_1_25);
/* configure baseband filter for 8 MHz TX */ /* configure baseband filter for 8 MHz TX */
set_MAX2837_LPF_EN(1); set_MAX2837_LPF_EN(drv, 1);
set_MAX2837_ModeCtrl(MAX2837_ModeCtrl_RxLPF); set_MAX2837_ModeCtrl(drv, MAX2837_ModeCtrl_RxLPF);
set_MAX2837_FT(MAX2837_FT_5M); set_MAX2837_FT(drv, MAX2837_FT_5M);
max2837_regs_commit(); max2837_regs_commit(drv);
} }
uint16_t max2837_reg_read(uint8_t r) uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r)
{ {
if ((max2837_regs_dirty >> r) & 0x1) { if ((drv->regs_dirty >> r) & 0x1) {
max2837_regs[r] = max2837_spi_read(r); drv->regs[r] = max2837_spi_read(drv, r);
}; };
return max2837_regs[r]; return drv->regs[r];
} }
void max2837_reg_write(uint8_t r, uint16_t v) void max2837_reg_write(max2837_driver_t* const drv, uint8_t r, uint16_t v)
{ {
max2837_regs[r] = v; drv->regs[r] = v;
max2837_spi_write(r, v); max2837_spi_write(drv, r, v);
MAX2837_REG_SET_CLEAN(r); MAX2837_REG_SET_CLEAN(drv, r);
} }
static inline void max2837_reg_commit(uint8_t r) static inline void max2837_reg_commit(max2837_driver_t* const drv, uint8_t r)
{ {
max2837_reg_write(r,max2837_regs[r]); max2837_reg_write(drv, r, drv->regs[r]);
} }
void max2837_regs_commit(void) void max2837_regs_commit(max2837_driver_t* const drv)
{ {
int r; int r;
for(r = 0; r < MAX2837_NUM_REGS; r++) { for(r = 0; r < MAX2837_NUM_REGS; r++) {
if ((max2837_regs_dirty >> r) & 0x1) { if ((drv->regs_dirty >> r) & 0x1) {
max2837_reg_commit(r); max2837_reg_commit(drv, r);
} }
} }
} }
void max2837_set_mode(const max2837_mode_t new_mode) { void max2837_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) {
switch(new_mode) { switch(new_mode) {
case MAX2837_MODE_SHUTDOWN: case MAX2837_MODE_SHUTDOWN:
max2837_mode_shutdown(); max2837_mode_shutdown(drv);
break; break;
case MAX2837_MODE_STANDBY: case MAX2837_MODE_STANDBY:
max2837_mode_standby(); max2837_mode_standby(drv);
break; break;
case MAX2837_MODE_TX: case MAX2837_MODE_TX:
max2837_mode_tx(); max2837_mode_tx(drv);
break; break;
case MAX2837_MODE_RX: case MAX2837_MODE_RX:
max2837_mode_rx(); max2837_mode_rx(drv);
break; break;
default: default:
@ -188,50 +183,50 @@ void max2837_set_mode(const max2837_mode_t new_mode) {
} }
} }
void max2837_start(void) void max2837_start(max2837_driver_t* const drv)
{ {
LOG("# max2837_start\n"); LOG("# max2837_start\n");
set_MAX2837_EN_SPI(1); set_MAX2837_EN_SPI(drv, 1);
max2837_regs_commit(); max2837_regs_commit(drv);
#if !defined TEST #if !defined TEST
max2837_mode_standby(); max2837_mode_standby(drv);
#endif #endif
} }
void max2837_tx(void) void max2837_tx(max2837_driver_t* const drv)
{ {
LOG("# max2837_tx\n"); LOG("# max2837_tx\n");
#if !defined TEST #if !defined TEST
set_MAX2837_ModeCtrl(MAX2837_ModeCtrl_TxLPF); set_MAX2837_ModeCtrl(drv, MAX2837_ModeCtrl_TxLPF);
max2837_regs_commit(); max2837_regs_commit(drv);
max2837_mode_tx(); max2837_mode_tx(drv);
#endif #endif
} }
void max2837_rx(void) void max2837_rx(max2837_driver_t* const drv)
{ {
LOG("# max2837_rx\n"); LOG("# max2837_rx\n");
set_MAX2837_ModeCtrl(MAX2837_ModeCtrl_RxLPF); set_MAX2837_ModeCtrl(drv, MAX2837_ModeCtrl_RxLPF);
max2837_regs_commit(); max2837_regs_commit(drv);
#if !defined TEST #if !defined TEST
max2837_mode_rx(); max2837_mode_rx(drv);
#endif #endif
} }
void max2837_stop(void) void max2837_stop(max2837_driver_t* const drv)
{ {
LOG("# max2837_stop\n"); LOG("# max2837_stop\n");
set_MAX2837_EN_SPI(0); set_MAX2837_EN_SPI(drv, 0);
max2837_regs_commit(); max2837_regs_commit(drv);
#if !defined TEST #if !defined TEST
max2837_mode_shutdown(); max2837_mode_shutdown(drv);
#endif #endif
} }
void max2837_set_frequency(uint32_t freq) void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq)
{ {
uint8_t band; uint8_t band;
uint8_t lna_band; uint8_t lna_band;
@ -278,19 +273,19 @@ void max2837_set_frequency(uint32_t freq)
LOG("# int %ld, frac %ld\n", div_int, div_frac); LOG("# int %ld, frac %ld\n", div_int, div_frac);
/* Band settings */ /* Band settings */
set_MAX2837_LOGEN_BSW(band); set_MAX2837_LOGEN_BSW(drv, band);
set_MAX2837_LNAband(lna_band); set_MAX2837_LNAband(drv, lna_band);
/* Write order matters here, so commit INT and FRAC_HI before /* Write order matters here, so commit INT and FRAC_HI before
* committing FRAC_LO, which is the trigger for VCO * committing FRAC_LO, which is the trigger for VCO
* auto-select. TODO - it's cleaner this way, but it would be * auto-select. TODO - it's cleaner this way, but it would be
* faster to explicitly commit the registers explicitly so the * faster to explicitly commit the registers explicitly so the
* dirty bits aren't scanned twice. */ * dirty bits aren't scanned twice. */
set_MAX2837_SYN_INT(div_int); set_MAX2837_SYN_INT(drv, div_int);
set_MAX2837_SYN_FRAC_HI((div_frac >> 10) & 0x3ff); set_MAX2837_SYN_FRAC_HI(drv, (div_frac >> 10) & 0x3ff);
max2837_regs_commit(); max2837_regs_commit(drv);
set_MAX2837_SYN_FRAC_LO(div_frac & 0x3ff); set_MAX2837_SYN_FRAC_LO(drv, div_frac & 0x3ff);
max2837_regs_commit(); max2837_regs_commit(drv);
} }
typedef struct { typedef struct {
@ -318,7 +313,7 @@ static const max2837_ft_t max2837_ft[] = {
{ 0, 0 }, { 0, 0 },
}; };
bool max2837_set_lpf_bandwidth(const uint32_t bandwidth_hz) { bool max2837_set_lpf_bandwidth(max2837_driver_t* const drv, const uint32_t bandwidth_hz) {
const max2837_ft_t* p = max2837_ft; const max2837_ft_t* p = max2837_ft;
while( p->bandwidth_hz != 0 ) { while( p->bandwidth_hz != 0 ) {
if( p->bandwidth_hz >= bandwidth_hz ) { if( p->bandwidth_hz >= bandwidth_hz ) {
@ -328,15 +323,15 @@ bool max2837_set_lpf_bandwidth(const uint32_t bandwidth_hz) {
} }
if( p->bandwidth_hz != 0 ) { if( p->bandwidth_hz != 0 ) {
set_MAX2837_FT(p->ft); set_MAX2837_FT(drv, p->ft);
max2837_regs_commit(); max2837_regs_commit(drv);
return true; return true;
} else { } else {
return false; return false;
} }
} }
bool max2837_set_lna_gain(const uint32_t gain_db) { bool max2837_set_lna_gain(max2837_driver_t* const drv, const uint32_t gain_db) {
uint16_t val; uint16_t val;
switch(gain_db){ switch(gain_db){
case 40: case 40:
@ -360,21 +355,21 @@ bool max2837_set_lna_gain(const uint32_t gain_db) {
default: default:
return false; return false;
} }
set_MAX2837_LNAgain(val); set_MAX2837_LNAgain(drv, val);
max2837_reg_commit(1); max2837_reg_commit(drv, 1);
return true; return true;
} }
bool max2837_set_vga_gain(const uint32_t gain_db) { bool max2837_set_vga_gain(max2837_driver_t* const drv, const uint32_t gain_db) {
if( (gain_db & 0x1) || gain_db > 62)/* 0b11111*2 */ if( (gain_db & 0x1) || gain_db > 62)/* 0b11111*2 */
return false; return false;
set_MAX2837_VGA( 31-(gain_db >> 1) ); set_MAX2837_VGA(drv, 31-(gain_db >> 1) );
max2837_reg_commit(5); max2837_reg_commit(drv, 5);
return true; return true;
} }
bool max2837_set_txvga_gain(const uint32_t gain_db) { bool max2837_set_txvga_gain(max2837_driver_t* const drv, const uint32_t gain_db) {
uint16_t val=0; uint16_t val=0;
if(gain_db <16){ if(gain_db <16){
val = 31-gain_db; val = 31-gain_db;
@ -383,18 +378,18 @@ bool max2837_set_txvga_gain(const uint32_t gain_db) {
val = 31-(gain_db-16); val = 31-(gain_db-16);
} }
set_MAX2837_TXVGA_GAIN(val); set_MAX2837_TXVGA_GAIN(drv, val);
max2837_reg_commit(29); max2837_reg_commit(drv, 29);
return true; return true;
} }
#ifdef TEST #ifdef TEST
int main(int ac, char **av) int main(int ac, char **av)
{ {
max2837_setup(); max2837_setup(drv);
max2837_set_frequency(2441000000); max2837_set_frequency(drv, 2441000000);
max2837_start(); max2837_start(drv);
max2837_tx(); max2837_tx(drv);
max2837_stop(); max2837_stop(drv);
} }
#endif //TEST #endif //TEST

50
firmware/common/max2837.h
View File

@ -28,57 +28,39 @@
#include "max2837_drv.h" #include "max2837_drv.h"
/* TODO - make this a private header for max2837.c only, make new max2837.h */
/* 32 registers, each containing 10 bits of data. */
#define MAX2837_NUM_REGS 32
#define MAX2837_DATA_REGS_MAX_VALUE 1024
/* TODO - these externs will be local to max2837.c ... don't define here? */
extern uint16_t max2837_regs[MAX2837_NUM_REGS];
extern uint32_t max2837_regs_dirty;
#define MAX2837_REG_SET_CLEAN(r) max2837_regs_dirty &= ~(1UL<<r)
#define MAX2837_REG_SET_DIRTY(r) max2837_regs_dirty |= (1UL<<r)
/* Initialize chip. */ /* Initialize chip. */
extern void max2837_init(void); extern void max2837_init(max2837_driver_t* const drv);
extern void max2837_setup(void); extern void max2837_setup(max2837_driver_t* const drv);
/* Read a register via SPI. Save a copy to memory and return /* Read a register via SPI. Save a copy to memory and return
* value. Mark clean. */ * value. Mark clean. */
extern uint16_t max2837_reg_read(uint8_t r); extern uint16_t max2837_reg_read(max2837_driver_t* const drv, uint8_t r);
/* Write value to register via SPI and save a copy to memory. Mark /* Write value to register via SPI and save a copy to memory. Mark
* clean. */ * clean. */
extern void max2837_reg_write(uint8_t r, uint16_t v); extern void max2837_reg_write(max2837_driver_t* const drv, uint8_t r, uint16_t v);
/* Write all dirty registers via SPI from memory. Mark all clean. Some /* Write all dirty registers via SPI from memory. Mark all clean. Some
* operations require registers to be written in a certain order. Use * operations require registers to be written in a certain order. Use
* provided routines for those operations. */ * provided routines for those operations. */
extern void max2837_regs_commit(void); extern void max2837_regs_commit(max2837_driver_t* const drv);
void max2837_mode_shutdown(void); max2837_mode_t max2837_mode(max2837_driver_t* const drv);
void max2837_mode_standby(void); void max2837_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode);
void max2837_mode_tx(void);
void max2837_mode_rx(void);
max2837_mode_t max2837_mode(void);
void max2837_set_mode(const max2837_mode_t new_mode);
/* Turn on/off all chip functions. Does not control oscillator and CLKOUT */ /* Turn on/off all chip functions. Does not control oscillator and CLKOUT */
extern void max2837_start(void); extern void max2837_start(max2837_driver_t* const drv);
extern void max2837_stop(void); extern void max2837_stop(max2837_driver_t* const drv);
/* Set frequency in Hz. Frequency setting is a multi-step function /* Set frequency in Hz. Frequency setting is a multi-step function
* where order of register writes matters. */ * where order of register writes matters. */
extern void max2837_set_frequency(uint32_t freq); extern void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq);
bool max2837_set_lpf_bandwidth(const uint32_t bandwidth_hz); bool max2837_set_lpf_bandwidth(max2837_driver_t* const drv, const uint32_t bandwidth_hz);
bool max2837_set_lna_gain(const uint32_t gain_db); bool max2837_set_lna_gain(max2837_driver_t* const drv, const uint32_t gain_db);
bool max2837_set_vga_gain(const uint32_t gain_db); bool max2837_set_vga_gain(max2837_driver_t* const drv, const uint32_t gain_db);
bool max2837_set_txvga_gain(const uint32_t gain_db); bool max2837_set_txvga_gain(max2837_driver_t* const drv, const uint32_t gain_db);
extern void max2837_tx(void); extern void max2837_tx(max2837_driver_t* const drv);
extern void max2837_rx(void); extern void max2837_rx(max2837_driver_t* const drv);
#endif // __MAX2837_H #endif // __MAX2837_H

25
firmware/common/max2837_drv.c
View File

@ -33,7 +33,7 @@
#include "hackrf_core.h" #include "hackrf_core.h"
#endif #endif
void max2837_pin_config(void) { void max2837_pin_config(max2837_driver_t* const drv) {
#if !defined TEST #if !defined TEST
/* Configure XCVR_CTL GPIO pins. */ /* Configure XCVR_CTL GPIO pins. */
#ifdef JELLYBEAN #ifdef JELLYBEAN
@ -65,7 +65,7 @@ void max2837_pin_config(void) {
; ;
#endif #endif
max2837_mode_shutdown(); max2837_mode_shutdown(drv);
#ifdef JELLYBEAN #ifdef JELLYBEAN
gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP); gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP);
gpio_set(PORT_XCVR_B, gpio_set(PORT_XCVR_B,
@ -81,7 +81,8 @@ void max2837_pin_config(void) {
#endif #endif
} }
void max2837_mode_shutdown(void) { void max2837_mode_shutdown(max2837_driver_t* const drv) {
(void)drv;
/* All circuit blocks are powered down, except the 4-wire serial bus /* All circuit blocks are powered down, except the 4-wire serial bus
* and its internal programmable registers. * and its internal programmable registers.
*/ */
@ -89,7 +90,8 @@ void max2837_mode_shutdown(void) {
(PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE));
} }
void max2837_mode_standby(void) { void max2837_mode_standby(max2837_driver_t* const drv) {
(void)drv;
/* Used to enable the frequency synthesizer block while the rest of the /* Used to enable the frequency synthesizer block while the rest of the
* device is powered down. In this mode, PLL, VCO, and LO generator * device is powered down. In this mode, PLL, VCO, and LO generator
* are on, so that Tx or Rx modes can be quickly enabled from this mode. * are on, so that Tx or Rx modes can be quickly enabled from this mode.
@ -99,7 +101,8 @@ void max2837_mode_standby(void) {
gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE); gpio_set(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE);
} }
void max2837_mode_tx(void) { void max2837_mode_tx(max2837_driver_t* const drv) {
(void)drv;
/* All Tx circuit blocks are powered on. The external PA is powered on /* All Tx circuit blocks are powered on. The external PA is powered on
* after a programmable delay using the on-chip PA bias DAC. The slow- * after a programmable delay using the on-chip PA bias DAC. The slow-
* charging Rx circuits are in a precharged “idle-off” state for fast * charging Rx circuits are in a precharged “idle-off” state for fast
@ -110,7 +113,8 @@ void max2837_mode_tx(void) {
(PIN_XCVR_ENABLE | PIN_XCVR_TXENABLE)); (PIN_XCVR_ENABLE | PIN_XCVR_TXENABLE));
} }
void max2837_mode_rx(void) { void max2837_mode_rx(max2837_driver_t* const drv) {
(void)drv;
/* All Rx circuit blocks are powered on and active. Antenna signal is /* All Rx circuit blocks are powered on and active. Antenna signal is
* applied; RF is downconverted, filtered, and buffered at Rx BB I and Q * applied; RF is downconverted, filtered, and buffered at Rx BB I and Q
* outputs. The slow- charging Tx circuits are in a precharged “idle-off” * outputs. The slow- charging Tx circuits are in a precharged “idle-off”
@ -121,7 +125,8 @@ void max2837_mode_rx(void) {
(PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE)); (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE));
} }
max2837_mode_t max2837_mode(void) { max2837_mode_t max2837_mode(max2837_driver_t* const drv) {
(void)drv;
if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE) ) { if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_ENABLE) ) {
if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE) ) { if( gpio_get(PORT_XCVR_ENABLE, PIN_XCVR_TXENABLE) ) {
return MAX2837_MODE_TX; return MAX2837_MODE_TX;
@ -136,7 +141,8 @@ max2837_mode_t max2837_mode(void) {
} }
/* SPI register read. */ /* SPI register read. */
uint16_t max2837_spi_read(uint8_t r) { uint16_t max2837_spi_read(max2837_driver_t* const drv, uint8_t r) {
(void)drv;
gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS); gpio_clear(PORT_XCVR_CS, PIN_XCVR_CS);
const uint16_t value = ssp_transfer(SSP1_NUM, (uint16_t)((1 << 15) | (r << 10))); const uint16_t value = ssp_transfer(SSP1_NUM, (uint16_t)((1 << 15) | (r << 10)));
gpio_set(PORT_XCVR_CS, PIN_XCVR_CS); gpio_set(PORT_XCVR_CS, PIN_XCVR_CS);
@ -144,7 +150,8 @@ uint16_t max2837_spi_read(uint8_t r) {
} }
/* SPI register write */ /* SPI register write */
void max2837_spi_write(uint8_t r, uint16_t v) { void max2837_spi_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) {
(void)drv;
#ifdef BUS_PIRATE #ifdef BUS_PIRATE
LOG("{0x%02x 0x%02x]\n", 0x00 | ((uint16_t)r<<2) | ((v>>8) & 0x3), LOG("{0x%02x 0x%02x]\n", 0x00 | ((uint16_t)r<<2) | ((v>>8) & 0x3),

25
firmware/common/max2837_drv.h
View File

@ -25,6 +25,10 @@
#include <stdint.h> #include <stdint.h>
/* 32 registers, each containing 10 bits of data. */
#define MAX2837_NUM_REGS 32
#define MAX2837_DATA_REGS_MAX_VALUE 1024
typedef enum { typedef enum {
MAX2837_MODE_SHUTDOWN, MAX2837_MODE_SHUTDOWN,
MAX2837_MODE_STANDBY, MAX2837_MODE_STANDBY,
@ -32,14 +36,19 @@ typedef enum {
MAX2837_MODE_RX MAX2837_MODE_RX
} max2837_mode_t; } max2837_mode_t;
void max2837_pin_config(void); typedef struct {
void max2837_mode_shutdown(void); uint16_t regs[MAX2837_NUM_REGS];
void max2837_mode_standby(void); uint32_t regs_dirty;
void max2837_mode_tx(void); } max2837_driver_t;
void max2837_mode_rx(void);
max2837_mode_t max2837_mode(void);
uint16_t max2837_spi_read(uint8_t r); void max2837_pin_config(max2837_driver_t* const drv);
void max2837_spi_write(uint8_t r, uint16_t v); void max2837_mode_shutdown(max2837_driver_t* const drv);
void max2837_mode_standby(max2837_driver_t* const drv);
void max2837_mode_tx(max2837_driver_t* const drv);
void max2837_mode_rx(max2837_driver_t* const drv);
max2837_mode_t max2837_mode(max2837_driver_t* const drv);
uint16_t max2837_spi_read(max2837_driver_t* const drv, uint8_t r);
void max2837_spi_write(max2837_driver_t* const drv, uint8_t r, uint16_t v);
#endif // __MAX2837_DRV_H #endif // __MAX2837_DRV_H

15
firmware/common/max2837_regs.def
View File

@ -9,19 +9,22 @@
* (structs). This may be used in firmware, or on host predefined * (structs). This may be used in firmware, or on host predefined
* register loads. */ * register loads. */
#define MAX2837_REG_SET_CLEAN(_d, _r) (_d->regs_dirty &= ~(1UL<<_r))
#define MAX2837_REG_SET_DIRTY(_d, _r) (_d->regs_dirty |= (1UL<<_r))
/* On set_, register is always set dirty, even if nothing /* On set_, register is always set dirty, even if nothing
* changed. This makes sure that write that have side effects, * changed. This makes sure that write that have side effects,
* e.g. frequency setting, are not skipped. */ * e.g. frequency setting, are not skipped. */
/* n=name, r=regnum, o=offset (bits from LSB), l=length (bits) */ /* n=name, r=regnum, o=offset (bits from LSB), l=length (bits) */
#define __MREG__(n,r,o,l) \ #define __MREG__(n,r,o,l) \
static inline uint16_t get_##n(void) { \ static inline uint16_t get_##n(max2837_driver_t* const _d) { \
return (max2837_regs[r] >> (o-l+1)) & ((1<<l)-1); \ return (_d->regs[r] >> (o-l+1)) & ((1<<l)-1); \
} \ } \
static inline void set_##n(uint16_t v) { \ static inline void set_##n(max2837_driver_t* const _d, uint16_t v) { \
max2837_regs[r] &= ~(((1<<l)-1)<<(o-l+1)); \ _d->regs[r] &= ~(((1<<l)-1)<<(o-l+1)); \
max2837_regs[r] |= ((v&((1<<l)-1))<<(o-l+1)); \ _d->regs[r] |= ((v&((1<<l)-1))<<(o-l+1)); \
MAX2837_REG_SET_DIRTY(r); \ MAX2837_REG_SET_DIRTY(_d, r); \
} }
/* REG 0 */ /* REG 0 */

10
firmware/common/rf_path.c
View File

@ -212,8 +212,8 @@ void rf_path_init(void) {
max5864_shutdown(); max5864_shutdown();
ssp1_set_mode_max2837(); ssp1_set_mode_max2837();
max2837_setup(); max2837_setup(&max2837);
max2837_start(); max2837_start(&max2837);
rffc5071_setup(); rffc5071_setup();
switchctrl_set(switchctrl); switchctrl_set(switchctrl);
@ -238,7 +238,7 @@ void rf_path_set_direction(const rf_path_direction_t direction) {
ssp1_set_mode_max5864(); ssp1_set_mode_max5864();
max5864_tx(); max5864_tx();
ssp1_set_mode_max2837(); ssp1_set_mode_max2837();
max2837_tx(); max2837_tx(&max2837);
sgpio_configure(SGPIO_DIRECTION_TX); sgpio_configure(SGPIO_DIRECTION_TX);
break; break;
@ -257,7 +257,7 @@ void rf_path_set_direction(const rf_path_direction_t direction) {
ssp1_set_mode_max5864(); ssp1_set_mode_max5864();
max5864_rx(); max5864_rx();
ssp1_set_mode_max2837(); ssp1_set_mode_max2837();
max2837_rx(); max2837_rx(&max2837);
sgpio_configure(SGPIO_DIRECTION_RX); sgpio_configure(SGPIO_DIRECTION_RX);
break; break;
@ -272,7 +272,7 @@ void rf_path_set_direction(const rf_path_direction_t direction) {
ssp1_set_mode_max5864(); ssp1_set_mode_max5864();
max5864_standby(); max5864_standby();
ssp1_set_mode_max2837(); ssp1_set_mode_max2837();
max2837_set_mode(MAX2837_MODE_STANDBY); max2837_set_mode(&max2837, MAX2837_MODE_STANDBY);
sgpio_configure(SGPIO_DIRECTION_RX); sgpio_configure(SGPIO_DIRECTION_RX);
break; break;
} }

15
firmware/common/tuning.c
View File

@ -22,6 +22,7 @@
#include "tuning.h" #include "tuning.h"
#include <hackrf_core.h>
#include <rffc5071.h> #include <rffc5071.h>
#include <max2837.h> #include <max2837.h>
#include <sgpio.h> #include <sgpio.h>
@ -62,8 +63,8 @@ bool set_freq(const uint64_t freq)
success = true; success = true;
const max2837_mode_t prior_max2837_mode = max2837_mode(); const max2837_mode_t prior_max2837_mode = max2837_mode(&max2837);
max2837_mode_standby(); max2837_mode_standby(&max2837);
if(freq_mhz < MAX_LP_FREQ_MHZ) if(freq_mhz < MAX_LP_FREQ_MHZ)
{ {
rf_path_set_filter(RF_PATH_FILTER_LOW_PASS); rf_path_set_filter(RF_PATH_FILTER_LOW_PASS);
@ -72,14 +73,14 @@ bool set_freq(const uint64_t freq)
RFFC5071_freq_mhz = (max2837_freq_nominal_hz / FREQ_ONE_MHZ) + freq_mhz; RFFC5071_freq_mhz = (max2837_freq_nominal_hz / FREQ_ONE_MHZ) + freq_mhz;
/* Set Freq and read real freq */ /* Set Freq and read real freq */
real_RFFC5071_freq_hz = rffc5071_set_frequency(RFFC5071_freq_mhz); real_RFFC5071_freq_hz = rffc5071_set_frequency(RFFC5071_freq_mhz);
max2837_set_frequency(real_RFFC5071_freq_hz - freq); max2837_set_frequency(&max2837, real_RFFC5071_freq_hz - freq);
sgpio_cpld_stream_rx_set_q_invert(1); sgpio_cpld_stream_rx_set_q_invert(1);
}else if( (freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ) ) }else if( (freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ) )
{ {
rf_path_set_filter(RF_PATH_FILTER_BYPASS); rf_path_set_filter(RF_PATH_FILTER_BYPASS);
MAX2837_freq_hz = (freq_mhz * FREQ_ONE_MHZ) + freq_hz; MAX2837_freq_hz = (freq_mhz * FREQ_ONE_MHZ) + freq_hz;
/* RFFC5071_freq_mhz <= not used in Bypass mode */ /* RFFC5071_freq_mhz <= not used in Bypass mode */
max2837_set_frequency(MAX2837_freq_hz); max2837_set_frequency(&max2837, MAX2837_freq_hz);
sgpio_cpld_stream_rx_set_q_invert(0); sgpio_cpld_stream_rx_set_q_invert(0);
}else if( (freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ) ) }else if( (freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ) )
{ {
@ -97,14 +98,14 @@ bool set_freq(const uint64_t freq)
RFFC5071_freq_mhz = freq_mhz - (max2837_freq_nominal_hz / FREQ_ONE_MHZ); RFFC5071_freq_mhz = freq_mhz - (max2837_freq_nominal_hz / FREQ_ONE_MHZ);
/* Set Freq and read real freq */ /* Set Freq and read real freq */
real_RFFC5071_freq_hz = rffc5071_set_frequency(RFFC5071_freq_mhz); real_RFFC5071_freq_hz = rffc5071_set_frequency(RFFC5071_freq_mhz);
max2837_set_frequency(freq - real_RFFC5071_freq_hz); max2837_set_frequency(&max2837, freq - real_RFFC5071_freq_hz);
sgpio_cpld_stream_rx_set_q_invert(0); sgpio_cpld_stream_rx_set_q_invert(0);
}else }else
{ {
/* Error freq_mhz too high */ /* Error freq_mhz too high */
success = false; success = false;
} }
max2837_set_mode(prior_max2837_mode); max2837_set_mode(&max2837, prior_max2837_mode);
if( success ) { if( success ) {
freq_cache = freq; freq_cache = freq;
} }
@ -129,7 +130,7 @@ bool set_freq_explicit(const uint64_t if_freq_hz, const uint64_t lo_freq_hz,
} }
rf_path_set_filter(path); rf_path_set_filter(path);
max2837_set_frequency(if_freq_hz); max2837_set_frequency(&max2837, if_freq_hz);
if (lo_freq_hz > if_freq_hz) { if (lo_freq_hz > if_freq_hz) {
sgpio_cpld_stream_rx_set_q_invert(1); sgpio_cpld_stream_rx_set_q_invert(1);
} else { } else {

6
firmware/hackrf_usb/usb_api_register.c
View File

@ -30,6 +30,8 @@
#include <stddef.h> #include <stddef.h>
#include <stdint.h> #include <stdint.h>
#include <hackrf_core.h>
usb_request_status_t usb_vendor_request_write_max2837( usb_request_status_t usb_vendor_request_write_max2837(
usb_endpoint_t* const endpoint, usb_endpoint_t* const endpoint,
const usb_transfer_stage_t stage const usb_transfer_stage_t stage
@ -37,7 +39,7 @@ usb_request_status_t usb_vendor_request_write_max2837(
if( stage == USB_TRANSFER_STAGE_SETUP ) { if( stage == USB_TRANSFER_STAGE_SETUP ) {
if( endpoint->setup.index < MAX2837_NUM_REGS ) { if( endpoint->setup.index < MAX2837_NUM_REGS ) {
if( endpoint->setup.value < MAX2837_DATA_REGS_MAX_VALUE ) { if( endpoint->setup.value < MAX2837_DATA_REGS_MAX_VALUE ) {
max2837_reg_write(endpoint->setup.index, endpoint->setup.value); max2837_reg_write(&max2837, endpoint->setup.index, endpoint->setup.value);
usb_transfer_schedule_ack(endpoint->in); usb_transfer_schedule_ack(endpoint->in);
return USB_REQUEST_STATUS_OK; return USB_REQUEST_STATUS_OK;
} }
@ -54,7 +56,7 @@ usb_request_status_t usb_vendor_request_read_max2837(
) { ) {
if( stage == USB_TRANSFER_STAGE_SETUP ) { if( stage == USB_TRANSFER_STAGE_SETUP ) {
if( endpoint->setup.index < MAX2837_NUM_REGS ) { if( endpoint->setup.index < MAX2837_NUM_REGS ) {
const uint16_t value = max2837_reg_read(endpoint->setup.index); const uint16_t value = max2837_reg_read(&max2837, endpoint->setup.index);
endpoint->buffer[0] = value & 0xff; endpoint->buffer[0] = value & 0xff;
endpoint->buffer[1] = value >> 8; endpoint->buffer[1] = value >> 8;
usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 2, usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 2,

6
firmware/hackrf_usb/usb_api_transceiver.c
View File

@ -145,7 +145,7 @@ usb_request_status_t usb_vendor_request_set_lna_gain(
const usb_transfer_stage_t stage) const usb_transfer_stage_t stage)
{ {
if( stage == USB_TRANSFER_STAGE_SETUP ) { if( stage == USB_TRANSFER_STAGE_SETUP ) {
const uint8_t value = max2837_set_lna_gain(endpoint->setup.index); const uint8_t value = max2837_set_lna_gain(&max2837, endpoint->setup.index);
endpoint->buffer[0] = value; endpoint->buffer[0] = value;
usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1,
NULL, NULL); NULL, NULL);
@ -159,7 +159,7 @@ usb_request_status_t usb_vendor_request_set_vga_gain(
usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage)
{ {
if( stage == USB_TRANSFER_STAGE_SETUP ) { if( stage == USB_TRANSFER_STAGE_SETUP ) {
const uint8_t value = max2837_set_vga_gain(endpoint->setup.index); const uint8_t value = max2837_set_vga_gain(&max2837, endpoint->setup.index);
endpoint->buffer[0] = value; endpoint->buffer[0] = value;
usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1,
NULL, NULL); NULL, NULL);
@ -173,7 +173,7 @@ usb_request_status_t usb_vendor_request_set_txvga_gain(
usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage)
{ {
if( stage == USB_TRANSFER_STAGE_SETUP ) { if( stage == USB_TRANSFER_STAGE_SETUP ) {
const uint8_t value = max2837_set_txvga_gain(endpoint->setup.index); const uint8_t value = max2837_set_txvga_gain(&max2837, endpoint->setup.index);
endpoint->buffer[0] = value; endpoint->buffer[0] = value;
usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1,
NULL, NULL); NULL, NULL);

10
firmware/mixertx/mixertx.c
View File

@ -43,16 +43,16 @@ int main(void)
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */ gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
ssp1_set_mode_max2837(); ssp1_set_mode_max2837();
max2837_setup(); max2837_setup(&max2837);
rffc5071_setup(); rffc5071_setup();
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */ gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
max2837_set_frequency(freq); max2837_set_frequency(&max2837, freq);
max2837_start(); max2837_start(&max2837);
max2837_tx(); max2837_tx(&max2837);
gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */ gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
while (1); while (1);
max2837_stop(); max2837_stop(&max2837);
return 0; return 0;
} }

10
firmware/simpletx/simpletx.c
View File

@ -42,14 +42,14 @@ int main(void)
gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */ gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
ssp1_set_mode_max2837(); ssp1_set_mode_max2837();
max2837_setup(); max2837_setup(&max2837);
gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */ gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
max2837_set_frequency(freq); max2837_set_frequency(&max2837, freq);
max2837_start(); max2837_start(&max2837);
max2837_tx(); max2837_tx(&max2837);
gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */ gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
while (1); while (1);
max2837_stop(); max2837_stop(&max2837);
return 0; return 0;
} }