Break off a chunk of local RAM to serve the M0 processor.

This commit is contained in:
Jared Boone
2013-09-20 20:03:24 -07:00
parent e2d4a501be
commit 43596e07c5
2 changed files with 4 additions and 2 deletions

View File

@ -27,7 +27,8 @@ MEMORY
/* rom is really the shadow region that points to SPI flash or elsewhere */
rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M
ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K
ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K
ram_m0 (rwx) : ORIGIN = 0x10090000, LENGTH = 8K
/* there are some additional RAM regions */
ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
/* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM

View File

@ -30,7 +30,8 @@ MEMORY
/* rom is really the shadow region that points to SPI flash or elsewhere */
rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M
ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K
ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K
ram_m0 (rwx) : ORIGIN = 0x10090000, LENGTH = 8K
ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
/* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM
* to get performance benefit of having two USB buffers addressable