Break off a chunk of local RAM to serve the M0 processor.
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@ -27,7 +27,8 @@ MEMORY
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/* rom is really the shadow region that points to SPI flash or elsewhere */
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rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M
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ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
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ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K
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ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K
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ram_m0 (rwx) : ORIGIN = 0x10090000, LENGTH = 8K
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/* there are some additional RAM regions */
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ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
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/* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM
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@ -30,7 +30,8 @@ MEMORY
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/* rom is really the shadow region that points to SPI flash or elsewhere */
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rom (rx) : ORIGIN = 0x00000000, LENGTH = 1M
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ram_local1 (rwx) : ORIGIN = 0x10000000, LENGTH = 128K
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ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 72K
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ram_local2 (rwx) : ORIGIN = 0x10080000, LENGTH = 64K
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ram_m0 (rwx) : ORIGIN = 0x10090000, LENGTH = 8K
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ram_ahb1 (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
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/* Removed 32K of AHB SRAM for USB buffer. Straddles two blocks of RAM
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* to get performance benefit of having two USB buffers addressable
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