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LNA915: make easier to assemble

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This commit is contained in:
Michael Ossmann
2020-08-03 10:55:07 -06:00
parent 6e4f738c6c
commit 33a1f366bf
4 changed files with 1061 additions and 618 deletions
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1647
hardware/LNA915/LNA915.kicad_pcb
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File diff suppressed because it is too large Load Diff

26
hardware/LNA915/LNA915.pro
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@ -1,4 +1,4 @@
update=Mon 22 Jun 2020 12:25:41 AM MDT update=Mon 03 Aug 2020 07:51:01 AM MDT
version=1 version=1
last_client=kicad last_client=kicad
[cvpcb] [cvpcb]
@ -25,7 +25,7 @@ ERC_TestSimilarLabels=1
version=1 version=1
PageLayoutDescrFile= PageLayoutDescrFile=
LastNetListRead= LastNetListRead=
CopperLayerCount=2 CopperLayerCount=4
BoardThickness=0.8 BoardThickness=0.8
AllowMicroVias=0 AllowMicroVias=0
AllowBlindVias=0 AllowBlindVias=0
@ -37,16 +37,14 @@ MinViaDrill=0.254
MinMicroViaDiameter=0.4572 MinMicroViaDiameter=0.4572
MinMicroViaDrill=0.127 MinMicroViaDrill=0.127
MinHoleToHole=0.127 MinHoleToHole=0.127
TrackWidth1=0.1524 TrackWidth1=0.29337
TrackWidth2=0.2032 TrackWidth2=0.2
TrackWidth3=0.24
TrackWidth4=0.3048
ViaDiameter1=0.635 ViaDiameter1=0.635
ViaDrill1=0.3048 ViaDrill1=0.3048
ViaDiameter2=0.508 ViaDiameter2=0.508
ViaDrill2=0.254 ViaDrill2=0.254
dPairWidth1=0.2 dPairWidth1=0.2032
dPairGap1=0.25 dPairGap1=0.2032
dPairViaGap1=0.25 dPairViaGap1=0.25
SilkLineWidth=0.15 SilkLineWidth=0.15
SilkTextSizeV=1 SilkTextSizeV=1
@ -71,7 +69,7 @@ OthersTextUpright=1
SolderMaskClearance=0.0508 SolderMaskClearance=0.0508
SolderMaskMinWidth=0 SolderMaskMinWidth=0
SolderPasteClearance=0 SolderPasteClearance=0
SolderPasteRatio=-0.05 SolderPasteRatio=-0.02
[pcbnew/Layer.F.Cu] [pcbnew/Layer.F.Cu]
Name=F.Cu Name=F.Cu
Type=0 Type=0
@ -79,11 +77,11 @@ Enabled=1
[pcbnew/Layer.In1.Cu] [pcbnew/Layer.In1.Cu]
Name=In1.Cu Name=In1.Cu
Type=0 Type=0
Enabled=0 Enabled=1
[pcbnew/Layer.In2.Cu] [pcbnew/Layer.In2.Cu]
Name=In2.Cu Name=In2.Cu
Type=0 Type=0
Enabled=0 Enabled=1
[pcbnew/Layer.In3.Cu] [pcbnew/Layer.In3.Cu]
Name=In3.Cu Name=In3.Cu
Type=0 Type=0
@ -242,11 +240,11 @@ Enabled=0
[pcbnew/Netclasses/Default] [pcbnew/Netclasses/Default]
Name=Default Name=Default
Clearance=0.127 Clearance=0.127
TrackWidth=0.1524 TrackWidth=0.29337
ViaDiameter=0.635 ViaDiameter=0.635
ViaDrill=0.3048 ViaDrill=0.3048
uViaDiameter=0.508 uViaDiameter=0.508
uViaDrill=0.127 uViaDrill=0.127
dPairWidth=0.2 dPairWidth=0.2032
dPairGap=0.25 dPairGap=0.2032
dPairViaGap=0.25 dPairViaGap=0.25

4
hardware/LNA915/LNA915.sch
View File

@ -110,7 +110,7 @@ U 1 1 52F44412
P 2900 3900 P 2900 3900
F 0 "U2" V 2900 3900 60 0000 C CNN F 0 "U2" V 2900 3900 60 0000 C CNN
F 1 "SAW" V 3150 3900 60 0000 C CNN F 1 "SAW" V 3150 3900 60 0000 C CNN
F 2 "hackrf:GSG-F5Q" H 2900 3900 60 0001 C CNN F 2 "LNA915:F5Q" H 2900 3900 60 0001 C CNN
F 3 "~" H 2900 3900 60 0000 C CNN F 3 "~" H 2900 3900 60 0000 C CNN
F 4 "Taiyo Yuden" H 2900 3900 60 0001 C CNN "Manufacturer" F 4 "Taiyo Yuden" H 2900 3900 60 0001 C CNN "Manufacturer"
F 5 "FAR-F5QA-915M00-M2AK-J" H 2900 3900 60 0001 C CNN "Part Number" F 5 "FAR-F5QA-915M00-M2AK-J" H 2900 3900 60 0001 C CNN "Part Number"
@ -178,7 +178,7 @@ U 1 1 52F68792
P 6250 3150 P 6250 3150
F 0 "U3" V 6250 3050 60 0000 C CNN F 0 "U3" V 6250 3050 60 0000 C CNN
F 1 "LNA" H 6250 2900 60 0000 C CNN F 1 "LNA" H 6250 2900 60 0000 C CNN
F 2 "hackrf:GSG-TSLP-7-1" H 6250 3150 60 0001 C CNN F 2 "LNA915:TSLP-7-1" H 6250 3150 60 0001 C CNN
F 3 "~" H 6250 3150 60 0000 C CNN F 3 "~" H 6250 3150 60 0000 C CNN
F 4 "Infineon" H 6250 3150 60 0001 C CNN "Manufacturer" F 4 "Infineon" H 6250 3150 60 0001 C CNN "Manufacturer"
F 5 "BGB 741L7ESD E6327" H 6250 3150 60 0001 C CNN "Part Number" F 5 "BGB 741L7ESD E6327" H 6250 3150 60 0001 C CNN "Part Number"

2
hardware/gsg-kicad-lib

Submodule hardware/gsg-kicad-lib updated: e02e7855c2...2eba4383d5