From 2fab6c40cd3f326aaa27a3d9f087095b5c09b9d5 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Sun, 8 Dec 2013 12:21:41 -0800 Subject: [PATCH] Extract SGPIO multi_slice configuration argument into an init-time function, so it doesn't need to be passed each time the SGPIO interface direction is changed. --- firmware/common/rf_path.c | 6 +++--- firmware/common/sgpio.c | 24 +++++++++++++++--------- firmware/common/sgpio.h | 6 ++++-- 3 files changed, 22 insertions(+), 14 deletions(-) diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c index 4a52af8c..d462f217 100644 --- a/firmware/common/rf_path.c +++ b/firmware/common/rf_path.c @@ -225,7 +225,7 @@ void rf_path_set_direction(const rf_path_direction_t direction) { max5864_tx(); ssp1_set_mode_max2837(); max2837_tx(); - sgpio_configure(SGPIO_DIRECTION_TX, true); + sgpio_configure(SGPIO_DIRECTION_TX); break; case RF_PATH_DIRECTION_RX: @@ -244,7 +244,7 @@ void rf_path_set_direction(const rf_path_direction_t direction) { max5864_rx(); ssp1_set_mode_max2837(); max2837_rx(); - sgpio_configure(SGPIO_DIRECTION_RX, true); + sgpio_configure(SGPIO_DIRECTION_RX); break; case RF_PATH_DIRECTION_OFF: @@ -256,7 +256,7 @@ void rf_path_set_direction(const rf_path_direction_t direction) { max5864_standby(); ssp1_set_mode_max2837(); max2837_set_mode(MAX2837_MODE_STANDBY); - sgpio_configure(SGPIO_DIRECTION_RX, true); + sgpio_configure(SGPIO_DIRECTION_RX); break; } diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c index 0e196e80..d0d634e6 100644 --- a/firmware/common/sgpio.c +++ b/firmware/common/sgpio.c @@ -28,6 +28,8 @@ #include +static bool sgpio_slice_mode_multislice = true; + void sgpio_configure_pin_functions() { scu_pinmux(SCU_PINMUX_SGPIO0, SCU_GPIO_FAST | SCU_CONF_FUNCTION3); scu_pinmux(SCU_PINMUX_SGPIO1, SCU_GPIO_FAST | SCU_CONF_FUNCTION3); @@ -95,6 +97,11 @@ void sgpio_test_interface() { } } +void sgpio_set_slice_mode( + const bool multi_slice +) { + sgpio_slice_mode_multislice = multi_slice; +} /* SGPIO0 to 7 = DAC/ADC data bits 0 to 7 (Nota: DAC is 10bits but only bit9 to bit2 are used bit1 & 0 are forced to 0 by CPLD) @@ -109,8 +116,7 @@ void sgpio_test_interface() { SGPIO11 Direction Output (1/High=TX mode LPC43xx=>CPLD=>DAC, 0/Low=RX mode LPC43xx<=CPLD<=ADC) */ void sgpio_configure( - const sgpio_direction_t direction, - const bool multi_slice + const sgpio_direction_t direction ) { // Disable all counters during configuration SGPIO_CTRL_ENABLE = 0; @@ -159,7 +165,7 @@ void sgpio_configure( ; const uint_fast8_t output_multiplexing_mode = - multi_slice ? 11 : 9; + sgpio_slice_mode_multislice ? 11 : 9; /* SGPIO0 to SGPIO7 */ for(uint_fast8_t i=0; i<8; i++) { // SGPIO pin 0 outputs slice A bit "i". @@ -181,13 +187,13 @@ void sgpio_configure( }; const uint_fast8_t slice_gpdma = SGPIO_SLICE_H; - const uint_fast8_t pos = multi_slice ? 0x1f : 0x03; - const bool single_slice = !multi_slice; - const uint_fast8_t slice_count = multi_slice ? 8 : 1; + const uint_fast8_t pos = sgpio_slice_mode_multislice ? 0x1f : 0x03; + const bool single_slice = !sgpio_slice_mode_multislice; + const uint_fast8_t slice_count = sgpio_slice_mode_multislice ? 8 : 1; const uint_fast8_t clk_capture_mode = (direction == SGPIO_DIRECTION_TX) ? 0 : 1; uint32_t slice_enable_mask = 0; - /* Configure Slice A, I, E, J, C, K, F, L (multi_slice mode) */ + /* Configure Slice A, I, E, J, C, K, F, L (sgpio_slice_mode_multislice mode) */ for(uint_fast8_t i=0; i