Merge remote-tracking branch 'mossmann/master'

Conflicts: hardware/jellybean/sgpio_if/default.svf hardware/jellybean/sgpio_if/default.xsvf hardware/jellybean/sgpio_if/top.jed hardware/jellybean/sgpio_if/top.vhd
2013-05-10 16:07:44 -07:00
parent 2455ba92c0 6f0ae9bc99
commit 29b081f78a
41 changed files with 6590 additions and 6427 deletions
--- a/doc/hardware/jawbreaker_boot_mode.ods
+++ b/doc/hardware/jawbreaker_boot_mode.ods
--- a/doc/hardware/jawbreaker_boot_mode.pdf
+++ b/doc/hardware/jawbreaker_boot_mode.pdf
--- a/firmware/Makefile
+++ b/firmware/Makefile
@ -21,6 +21,7 @@
 #

 TARGETS = blinky \
+		  blinky_rom_to_ram \
 		  mixertx \
 		  sgpio \
 		  sgpio-rx \
@ -28,7 +29,8 @@ TARGETS = blinky \
 		  startup \
 		  startup_systick \
 		  startup_systick_perfo \
-		  usb_performance
+		  usb_performance \
+		  usb_performance_rom_to_ram

 #	      blinky_rom_to_ram
 #		  sgpio_passthrough_rom_to_ram
--- a/firmware/blinky_rom_to_ram/Makefile
+++ b/firmware/blinky_rom_to_ram/Makefile
@ -1,7 +1,6 @@
 # Hey Emacs, this is a -*- makefile -*-
 #
-# Copyright 2012 Michael Ossmann <mike@ossmann.com>
-# Copyright 2012 Jared Boone <jared@sharebrained.com>
+# Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
 #
 # This file is part of HackRF.
 #
@ -21,12 +20,19 @@
 # Boston, MA 02110-1301, USA.
 #

-BINARY = blinky
+BINARY = blinky_rom_to_ram

-SRC = $(BINARY).c \
+SRC_DIR = blinky
+
+SRC = blinky.c \
 	../common/hackrf_core.c \
 	../common/si5351c.c \
 	../common/max2837.c

 LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
+
+%.o: ../$(SRC_DIR)/%.c  Makefile
+	@printf "  CC      $(subst $(shell pwd)/,,$(@))\n"
+	$(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
 include ../common/Makefile_inc.mk
--- a/firmware/blinky_rom_to_ram/blinky.c
+++ b/firmware/blinky_rom_to_ram/blinky.c
@ -1,54 +0,0 @@
-/*
- * Copyright 2010 - 2012 Michael Ossmann
- *
- * This file is part of HackRF.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.  If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-
-#include <libopencm3/lpc43xx/gpio.h>
-#include <libopencm3/lpc43xx/scu.h>
-
-#include "hackrf_core.h"
-
-u32 boot0, boot1, boot2, boot3;
-
-int main(void)
-{
-	int i;
-	pin_setup();
-
-	/* Set 1V8 */
-	gpio_set(PORT_EN1V8, PIN_EN1V8);
-
-	/* Blink LED1/2/3 on the board and Read BOOT0/1/2/3 pins. */
-	while (1) 
-	{
-		boot0 = BOOT0_STATE;
-		boot1 = BOOT1_STATE;
-		boot2 = BOOT2_STATE;
-		boot3 = BOOT3_STATE;
-
-		gpio_set(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LEDs on */
-		for (i = 0; i < 2000000; i++)	/* Wait a bit. */
-			__asm__("nop");
-		gpio_clear(PORT_LED1_3, (PIN_LED1|PIN_LED2|PIN_LED3)); /* LED off */
-		for (i = 0; i < 2000000; i++)	/* Wait a bit. */
-			__asm__("nop");
-	}
-
-	return 0;
-}
--- a/firmware/common/LPC4330_M4_rom_to_ram.ld
+++ b/firmware/common/LPC4330_M4_rom_to_ram.ld
--- a/firmware/common/fault_handler.c
+++ b/firmware/common/fault_handler.c
@ -1,5 +1,6 @@
 /*
 * Copyright 2012 Jared Boone <jared@sharebrained.com>
+ * Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
 *
 * This file is part of HackRF.
 *
@ -23,6 +24,18 @@

 #include "fault_handler.h"

+typedef struct
+{
+	uint32_t r0;
+	uint32_t r1;
+	uint32_t r2;
+	uint32_t r3;
+	uint32_t r12;
+	uint32_t lr; /* Link Register. */
+	uint32_t pc; /* Program Counter. */
+	uint32_t psr;/* Program Status Register. */
+} hard_fault_stack_t;
+
 __attribute__((naked))
 void hard_fault_handler(void) {
 	__asm__("TST LR, #4");
@ -32,9 +45,13 @@ void hard_fault_handler(void) {
 	__asm__("B hard_fault_handler_c");
 }

+volatile hard_fault_stack_t* hard_fault_stack_pt;
+
+void hard_fault_handler_c(uint32_t* args) 
+{
+	/* hard_fault_stack_pt contains registers saved before the hard fault */
+	hard_fault_stack_pt = (hard_fault_stack_t*)args;
 	
-void hard_fault_handler_c(uint32_t* args) {
-	(void)args;
 	// args[0-7]: r0, r1, r2, r3, r12, lr, pc, psr
 	// Other interesting registers to examine:
 	//	CFSR: Configurable Fault Status Register
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@ -312,8 +312,14 @@ void ssp1_init(void)
 void ssp1_set_mode_max2837(void)
 {
 	/* FIXME speed up once everything is working reliably */
+	/*
+	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
 	const uint8_t serial_clock_rate = 32;
 	const uint8_t clock_prescale_rate = 128;
+	*/
+	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	const uint8_t serial_clock_rate = 21;
+	const uint8_t clock_prescale_rate = 2;
 	
 	ssp_init(SSP1_NUM,
 		SSP_DATA_16BITS,
@ -329,8 +335,14 @@ void ssp1_set_mode_max2837(void)
 void ssp1_set_mode_max5864(void)
 {
 	/* FIXME speed up once everything is working reliably */
+	/*
+	// Freq About 0.0498MHz / 49.8KHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
 	const uint8_t serial_clock_rate = 32;
 	const uint8_t clock_prescale_rate = 128;
+	*/
+	// Freq About 4.857MHz => Freq = PCLK / (CPSDVSR * [SCR+1]) with PCLK=PLL1=204MHz
+	const uint8_t serial_clock_rate = 21;
+	const uint8_t clock_prescale_rate = 2;
 	
 	ssp_init(SSP1_NUM,
 		SSP_DATA_8BITS,
--- a/firmware/common/rom_iap.c
+++ b/firmware/common/rom_iap.c
@ -23,12 +23,12 @@
 #include <stdint.h>

 #include "rom_iap.h"
+#include "w25q80bv.h"

 #define ROM_IAP_ADDR (0x10400100)
 #define ROM_IAP_UNDEF_ADDR (0x12345678)

 #define ROM_OTP_PART_ID_ADDR (0x40045000)
-#define ROM_OTP_SERIAL_NO_ADDR (0x40045050) /* To be confirmed */

 typedef void (* IAP_t)(uint32_t [],uint32_t[]);

@ -73,7 +73,12 @@ isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res)
 		pROM_API->IAP( (uint32_t*)&iap_cmd_res->cmd_param, (uint32_t*)&iap_cmd_res->status_res);
 	}else
 	{
-		/* Alternative way to retrieve Part Id & Serial No on MCU with no IAP */
+		/* 
+		  Alternative way to retrieve Part Id on MCU with no IAP 
+		  Read Serial No => Read Unique ID in SPIFI (only compatible with W25Q80BV
+		*/
+		w25q80bv_setup();
+
 		switch(iap_cmd_res->cmd_param.command_code)
 		{
 			case IAP_CMD_READ_PART_ID_NO:
@ -84,11 +89,10 @@ isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res)
 			break;
 			
 			case IAP_CMD_READ_SERIAL_NO:
-				p_u32_data = (uint32_t*)ROM_OTP_SERIAL_NO_ADDR;
-				iap_cmd_res->status_res.iap_result[0] = p_u32_data[0];
-				iap_cmd_res->status_res.iap_result[1] = p_u32_data[1];
-				iap_cmd_res->status_res.iap_result[2] = p_u32_data[2];
-				iap_cmd_res->status_res.iap_result[3] = p_u32_data[3];
+			/* Only 64bits used */
+			iap_cmd_res->status_res.iap_result[0] = 0;
+			iap_cmd_res->status_res.iap_result[1] = 0;
+			w25q80bv_get_unique_id( (w25q80bv_unique_id_t*)&iap_cmd_res->status_res.iap_result[2] );
 				iap_cmd_res->status_res.status_ret = CMD_SUCCESS;
 			break;
 			
--- a/firmware/common/sgpio.c
+++ b/firmware/common/sgpio.c
@ -1,5 +1,6 @@
 /*
 * Copyright 2012 Jared Boone <jared@sharebrained.com>
+ * Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
 *
 * This file is part of HackRF.
 *
@ -89,6 +90,19 @@ void sgpio_test_interface() {
 	}
 }

+
+/*
+ SGPIO0 to 7 = DAC/ADC data bits 0 to 7 (Nota: DAC is 10bits but only bit9 to bit2 are used bit1 & 0 are forced to 0 by CPLD)
+ ADC=> CLK x 2=CLKx2 with CLKx2(0)rising=D0Q, CLKx2(1)rising=D1I (corresponds to CLK(0)falling+tD0Q=>D0Q, CLK(1)rising+tDOI=>D1I, CLK(1)falling+tD0Q=>D1Q, CLK(1)rising+tDOI=>D2I ...)
+ tDOI(CLK Rise to I-ADC Channel-I Output Data Valid)=7.4 to 9ns, tD0Q(CLK Fall to Q-ADC Channel-Q Output Data Valid)=6.9 to 9ns
+ DAC=> CLK x 2=CLKx2 with CLKx2(0)rising=Q:N-2, CLKx2(1)rising=I:N-1(corresponds to CLK(0)rising=>Q:N-2, CLK(0)falling I:N-1, CLK(1)rising=>Q:N-1, CLK(1)falling I:N ...)
+ tDSI(I-DAC Data to CLK Fall Setup Time)=min 10ns, tDSQ(Q-DAC Data to CLK Rise Setup Time)=min 10ns
+ 
+ SGPIO8 Clock Input (External Clock)
+ SGPIO9 Capture Input (Capture/ChipSelect, 1=Enable Capture, 0=Disable capture)
+ SGPIO10 Disable Output (1/High=Disable codec data stream, 0/Low=Enable codec data stream)
+ SGPIO11 Direction Output (1/High=TX mode LPC43xx=>CPLD=>DAC, 0/Low=RX mode LPC43xx<=CPLD<=ADC)
+*/
 void sgpio_configure(
 	const transceiver_mode_t transceiver_mode,
 	const bool multi_slice
@ -102,8 +116,8 @@ void sgpio_configure(
 	const uint_fast8_t cpld_direction =
 		(transceiver_mode == TRANSCEIVER_MODE_TX) ? 1 : 0;
    SGPIO_GPIO_OUTREG =
-          (cpld_direction << 11)
-        | (1L << 10)	// disable
+          (cpld_direction << 11) /* 1=Output SGPIO11 High(TX mode), 0=Output SGPIO11 Low(RX mode)*/
+        | (1L << 10)	// disable codec data stream during configuration (Output SGPIO10 High)
 		;

 	// Enable SGPIO pin outputs.
@ -112,37 +126,38 @@ void sgpio_configure(
 		? (0xFF << 0)
 		: (0x00 << 0);
 	SGPIO_GPIO_OENREG =
-		  (1L << 11)	// direction
-	    | (1L << 10)	// disable
-	    | (0L <<  9)	// capture
-	    | (0L <<  8)	// clock
-        | sgpio_gpio_data_direction
+		  (1L << 11)	// direction output SGPIO11 active 
+	    | (1L << 10)	// disable output SGPIO10 active
+	    | (0L <<  9)	// capture input SGPIO9 (output i is tri-stated)
+	    | (0L <<  8)	// clock input SGPIO8 (output i is tri-stated)
+        | sgpio_gpio_data_direction // 0xFF=Output all SGPIO High(TX mode), 0x00=Output all SPGIO Low(RX mode)
 		;

-	SGPIO_OUT_MUX_CFG( 8) =		// SGPIO: Input: clock
-		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0)
-		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(0)
+	SGPIO_OUT_MUX_CFG( 8) =		// SGPIO8: Input: clock
+		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
+		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) /* 0x0 dout_doutm1 (1-bit mode) */ 
 		;
-	SGPIO_OUT_MUX_CFG( 9) =		// SGPIO: Input: qualifier
-		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0)
-		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(0)
+	SGPIO_OUT_MUX_CFG( 9) =		// SGPIO9: Input: qualifier
+		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
+		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) /* 0x0 dout_doutm1 (1-bit mode) */
 		;
-    SGPIO_OUT_MUX_CFG(10) =		// GPIO: Output: disable
-		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0)
-		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4)
+    SGPIO_OUT_MUX_CFG(10) =		// GPIO10: Output: disable
+		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
+		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) /* 0x4=gpio_out (level set by GPIO_OUTREG) */
 		;
-    SGPIO_OUT_MUX_CFG(11) =		// GPIO: Output: direction
-		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0)
-		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4)
+    SGPIO_OUT_MUX_CFG(11) =		// GPIO11: Output: direction
+		  SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */
+		| SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) /* 0x4=gpio_out (level set by GPIO_OUTREG) */
 		;

 	const uint_fast8_t output_multiplexing_mode =
 		multi_slice ? 11 : 9;
+	/* SGPIO0 to SGPIO7 */
 	for(uint_fast8_t i=0; i<8; i++) {
 		// SGPIO pin 0 outputs slice A bit "i".
 		SGPIO_OUT_MUX_CFG(i) =
 		      SGPIO_OUT_MUX_CFG_P_OE_CFG(0)
-		    | SGPIO_OUT_MUX_CFG_P_OUT_CFG(output_multiplexing_mode)
+		    | SGPIO_OUT_MUX_CFG_P_OUT_CFG(output_multiplexing_mode) /* 11/0xB=dout_doutm8c (8-bit mode 8c)(multislice L0/7, N0/7), 9=dout_doutm8a (8-bit mode 8a)(A0/7,B0/7) */
 			;
 	}

@ -162,32 +177,34 @@ void sgpio_configure(
 	const uint_fast8_t slice_count = multi_slice ? 8 : 1;
 	
 	uint32_t slice_enable_mask = 0;
-	for(uint_fast8_t i=0; i<slice_count; i++) {
+	/* Configure Slice A, I, E, J, C, K, F, L (multi_slice mode) */
+	for(uint_fast8_t i=0; i<slice_count; i++)
+	{
 		const uint_fast8_t slice_index = slice_indices[i];
-		const bool input_slice = (i == 0) && (transceiver_mode == TRANSCEIVER_MODE_RX);
-		const uint_fast8_t concat_order = (input_slice || single_slice) ? 0 : 3;
-		const uint_fast8_t concat_enable = (input_slice || single_slice) ? 0 : 1;
+		const bool input_slice = (i == 0) && (transceiver_mode == TRANSCEIVER_MODE_RX); /* Only for slice0/A and RX mode set input_slice to 1 */
+		const uint_fast8_t concat_order = (input_slice || single_slice) ? 0 : 3; /* 0x0=Self-loop(slice0/A RX mode), 0x3=8 slices */
+		const uint_fast8_t concat_enable = (input_slice || single_slice) ? 0 : 1; /* 0x0=External data pin(slice0/A RX mode), 0x1=Concatenate data */
 		const uint_fast8_t clk_capture_mode = (transceiver_mode == TRANSCEIVER_MODE_RX) ? 1 : 0;
 		
 		SGPIO_MUX_CFG(slice_index) =
 		      SGPIO_MUX_CFG_CONCAT_ORDER(concat_order)
 		    | SGPIO_MUX_CFG_CONCAT_ENABLE(concat_enable)
-		    | SGPIO_MUX_CFG_QUALIFIER_SLICE_MODE(0)
-		    | SGPIO_MUX_CFG_QUALIFIER_PIN_MODE(1)
-		    | SGPIO_MUX_CFG_QUALIFIER_MODE(3)
-		    | SGPIO_MUX_CFG_CLK_SOURCE_SLICE_MODE(0)
-		    | SGPIO_MUX_CFG_CLK_SOURCE_PIN_MODE(0)
-			| SGPIO_MUX_CFG_EXT_CLK_ENABLE(1)
+		    | SGPIO_MUX_CFG_QUALIFIER_SLICE_MODE(0) /* Select qualifier slice A(0x0) */
+		    | SGPIO_MUX_CFG_QUALIFIER_PIN_MODE(1) /* Select qualifier pin SGPIO9(0x1) */
+		    | SGPIO_MUX_CFG_QUALIFIER_MODE(3) /* External SGPIO */
+		    | SGPIO_MUX_CFG_CLK_SOURCE_SLICE_MODE(0) /* Select clock source slice D(0x0) */
+		    | SGPIO_MUX_CFG_CLK_SOURCE_PIN_MODE(0) /* Source Clock Pin 0x0 = SGPIO8 */
+			| SGPIO_MUX_CFG_EXT_CLK_ENABLE(1) /* External clock signal(pin) selected */
 			;

 		SGPIO_SLICE_MUX_CFG(slice_index) =
-		      SGPIO_SLICE_MUX_CFG_INV_QUALIFIER(0)
-		    | SGPIO_SLICE_MUX_CFG_PARALLEL_MODE(3)
-		    | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0)
-		    | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0)
-		    | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1)
-		    | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(clk_capture_mode)
-		    | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0)
+		      SGPIO_SLICE_MUX_CFG_INV_QUALIFIER(0) /* 0x0=Use normal qualifier. */
+		    | SGPIO_SLICE_MUX_CFG_PARALLEL_MODE(3) /* 0x3=Shift 1 byte(8bits) per clock. */
+		    | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) /* 0x0=Detect rising edge. (Condition for input bit match interrupt) */
+		    | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) /* 0x0=Normal clock. */
+		    | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) /* 0x1=Use external clock from a pin or other slice */
+		    | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(clk_capture_mode) /* 0x0=Use rising clock edge, 0x1=Use falling clock edge */
+		    | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) /* 0x0=Do not match data */
 			;

 		SGPIO_PRESET(slice_index) = 0;			// External clock, don't care
@ -208,14 +225,14 @@ void sgpio_configure(

 void sgpio_cpld_stream_enable() {
 	// Enable codec data stream.
-	SGPIO_GPIO_OUTREG &= ~(1L << 10);
+	SGPIO_GPIO_OUTREG &= ~(1L << 10); /* SGPIO10 */
 }

 void sgpio_cpld_stream_disable() {
 	// Disable codec data stream.
-	SGPIO_GPIO_OUTREG |= (1L << 10);
+	SGPIO_GPIO_OUTREG |= (1L << 10); /* SGPIO10 */
 }

 bool sgpio_cpld_stream_is_enabled() {
-	return (SGPIO_GPIO_OUTREG & (1L << 10)) == 0;
+	return (SGPIO_GPIO_OUTREG & (1L << 10)) == 0; /* SGPIO10 */
 }
--- a/firmware/common/w25q80bv.c
+++ b/firmware/common/w25q80bv.c
@ -1,5 +1,6 @@
 /*
 * Copyright 2013 Michael Ossmann
+ * Copyright 2013 Benjamin Vernoux
 *
 * This file is part of HackRF.
 *
@ -31,6 +32,7 @@
 #include <libopencm3/lpc43xx/ssp.h>
 #include <libopencm3/lpc43xx/scu.h>
 #include <libopencm3/lpc43xx/gpio.h>
+#include <libopencm3/lpc43xx/rgu.h>

 /*
 * Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI.
@ -39,9 +41,21 @@

 void w25q80bv_setup(void)
 {
+	uint8_t device_id;
 	const uint8_t serial_clock_rate = 2;
 	const uint8_t clock_prescale_rate = 2;

+	/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
+	RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
+	
+	/* Init SPIFI GPIO to Normal GPIO */
+	scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2));    // P3_3 SPIFI_SCK => SSP0_SCK
+	scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14]
+	scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15]
+	scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_MISO IO1 => GPIO0[6]
+	scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_MOSI IO0 => GPIO5[10]
+	scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11]
+	
 	/* configure SSP pins */
 	scu_pinmux(SCU_SSP0_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
 	scu_pinmux(SCU_SSP0_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5));
@ -70,6 +84,12 @@ void w25q80bv_setup(void)
 			SSP_MODE_NORMAL,
 			SSP_MASTER,
 			SSP_SLAVE_OUT_ENABLE);
+
+	device_id = 0;
+	while(device_id != W25Q80BV_DEVICE_ID_RES)
+	{
+		device_id = w25q80bv_get_device_id();
+	}
 }

 uint8_t w25q80bv_get_status(void)
@ -84,6 +104,48 @@ uint8_t w25q80bv_get_status(void)
 	return value;
 }

+/* Release power down / Device ID */  
+uint8_t w25q80bv_get_device_id(void)
+{
+	uint8_t value;
+
+	gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
+	ssp_transfer(SSP0_NUM, W25Q80BV_DEVICE_ID);
+
+	/* Read 3 dummy bytes */
+	value = ssp_transfer(SSP0_NUM, 0xFF);
+	value = ssp_transfer(SSP0_NUM, 0xFF);
+	value = ssp_transfer(SSP0_NUM, 0xFF);
+	/* Read Device ID shall return 0x13 for W25Q80BV */
+	value = ssp_transfer(SSP0_NUM, 0xFF);
+	
+	gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
+
+	return value;
+}
+
+void w25q80bv_get_unique_id(w25q80bv_unique_id_t* unique_id)
+{
+	int i;
+	uint8_t value;
+
+	gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
+	ssp_transfer(SSP0_NUM, W25Q80BV_UNIQUE_ID);
+
+	/* Read 4 dummy bytes */
+	for(i=0; i<4; i++)
+		value = ssp_transfer(SSP0_NUM, 0xFF);
+
+	/* Read Unique ID 64bits (8*8) */
+	for(i=0; i<8; i++)
+	{
+		value = ssp_transfer(SSP0_NUM, 0xFF);
+		unique_id->id_8b[i]  = value;
+	}
+
+	gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
+}
+
 void w25q80bv_wait_while_busy(void)
 {
 	while (w25q80bv_get_status() & W25Q80BV_STATUS_BUSY);
@ -99,6 +161,14 @@ void w25q80bv_write_enable(void)

 void w25q80bv_chip_erase(void)
 {
+	uint8_t device_id;
+
+	device_id = 0;
+	while(device_id != W25Q80BV_DEVICE_ID_RES)
+	{
+		device_id = w25q80bv_get_device_id();
+	}
+
 	w25q80bv_write_enable();
 	w25q80bv_wait_while_busy();
 	gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
@ -136,6 +206,13 @@ void w25q80bv_page_program(const uint32_t addr, const uint16_t len, const uint8_
 void w25q80bv_program(uint32_t addr, uint32_t len, const uint8_t* data)
 {
 	uint16_t first_block_len;
+	uint8_t device_id;
+
+	device_id = 0;
+	while(device_id != W25Q80BV_DEVICE_ID_RES)
+	{
+		device_id = w25q80bv_get_device_id();
+	}	
 	
 	/* do nothing if we would overflow the flash */
 	if ((len > W25Q80BV_NUM_BYTES) || (addr > W25Q80BV_NUM_BYTES)
--- a/firmware/common/w25q80bv.h
+++ b/firmware/common/w25q80bv.h
@ -1,5 +1,6 @@
 /*
 * Copyright 2013 Michael Ossmann
+ * Copyright 2013 Benjamin Vernoux
 *
 * This file is part of HackRF.
 *
@ -30,11 +31,25 @@
 #define W25Q80BV_CHIP_ERASE   0xC7
 #define W25Q80BV_READ_STATUS1 0x05
 #define W25Q80BV_PAGE_PROGRAM 0x02
+#define W25Q80BV_DEVICE_ID    0xAB
+#define W25Q80BV_UNIQUE_ID    0x4B

 #define W25Q80BV_STATUS_BUSY  0x01

+
+#define W25Q80BV_DEVICE_ID_RES  0x13 /* Expected device_id for W25Q80BV */
+
+typedef union
+{
+	uint64_t id_64b;
+	uint32_t id_32b[2]; /* 2*32bits 64bits Unique ID */
+	uint8_t id_8b[8]; /* 8*8bits 64bits Unique ID */
+} w25q80bv_unique_id_t;
+
 void w25q80bv_setup(void);
 void w25q80bv_chip_erase(void);
 void w25q80bv_program(uint32_t addr, uint32_t len, const uint8_t* data);
+uint8_t w25q80bv_get_device_id(void);
+void w25q80bv_get_unique_id(w25q80bv_unique_id_t* unique_id);

 #endif//__W25Q80BV_H__
--- a/firmware/cpldjtagprog/cpldjtagprog.c
+++ b/firmware/cpldjtagprog/cpldjtagprog.c
@ -34,7 +34,6 @@ int main(void)
 {
 	int i;
 	int error;
-	int LED;
 	
 	pin_setup();

@ -46,27 +45,23 @@ int main(void)
 	/* program test bitstream to CPLD */
 	error = cpld_jtag_program(sgpio_if_xsvf_len, &sgpio_if_xsvf[0]);

-	if(error == 0)
-	{
-		/* blink only LED1 (Green) on success */
-		LED = PIN_LED1;
-	}else
-	{
-		/* blink LED3 (Red) on error */
-		LED = PIN_LED3;
-	}
-
 	gpio_clear(PORT_LED1_3, ALL_LEDS); /* All LEDs off */

-	while (1)
-	{
-		gpio_set(PORT_LED1_3, LED); /* LEDs on */
+	if (error == 0) {
+		/* blink LED1, LED2, and LED3 on success */
+		while (1) {
+			gpio_set(PORT_LED1_3, ALL_LEDS); /* LEDs on */
 			for (i = 0; i < WAIT_LOOP_DELAY; i++)	/* Wait a bit. */
 				__asm__("nop");
-		gpio_clear(PORT_LED1_3, LED); /* LED off */
+			gpio_clear(PORT_LED1_3, ALL_LEDS); /* LEDs off */
 			for (i = 0; i < WAIT_LOOP_DELAY; i++)	/* Wait a bit. */
 				__asm__("nop");
 		}
+	} else {
+		/* LED3 (Red) steady on error */
+		gpio_set(PORT_LED1_3, PIN_LED3); /* LEDs on */
+		while (1);
+	}

 	return 0;
 }
--- a/firmware/cpldjtagprog/sgpio_if_xsvf.h
+++ b/firmware/cpldjtagprog/sgpio_if_xsvf.h
--- a/firmware/cpldjtagprog_rom_to_ram/Makefile
+++ b/firmware/cpldjtagprog_rom_to_ram/Makefile
@ -1,7 +1,6 @@
 # Hey Emacs, this is a -*- makefile -*-
 #
-# Copyright 2012 Michael Ossmann <mike@ossmann.com>
-# Copyright 2012 Jared Boone <jared@sharebrained.com>
+# Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
 #
 # This file is part of HackRF.
 #
@ -23,7 +22,9 @@

 BINARY = cpldjtagprog_rom_to_ram

-SRC = $(BINARY).c \
+SRC_DIR = cpldjtagprog
+
+SRC = cpldjtagprog.c \
 	../common/hackrf_core.c \
 	../common/si5351c.c \
 	../common/max2837.c \
@ -33,4 +34,9 @@ SRC = $(BINARY).c \
 	../common/xapp058/ports.c

 LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
+
+%.o: ../$(SRC_DIR)/%.c  Makefile
+	@printf "  CC      $(subst $(shell pwd)/,,$(@))\n"
+	$(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
 include ../common/Makefile_inc.mk
--- a/firmware/cpldjtagprog_rom_to_ram/cpldjtagprog_rom_to_ram.c
+++ b/firmware/cpldjtagprog_rom_to_ram/cpldjtagprog_rom_to_ram.c
@ -1,72 +0,0 @@
-/*
- * Copyright 2010 - 2013 Michael Ossmann
- *
- * This file is part of HackRF.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.  If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-
-#include <libopencm3/lpc43xx/gpio.h>
-#include <libopencm3/lpc43xx/scu.h>
-
-#include "hackrf_core.h"
-#include "cpld_jtag.h"
-#include "../cpldjtagprog/sgpio_if_xsvf.h"
-
-#define WAIT_LOOP_DELAY (6000000)
-
-#define ALL_LEDS	(PIN_LED1|PIN_LED2|PIN_LED3)
-
-int main(void)
-{
-	int i;
-	int error;
-	int LED;
-	
-	pin_setup();
-
-	/* Set 1V8 */
-	gpio_set(PORT_EN1V8, PIN_EN1V8);
-
-	cpu_clock_init();
-	
-	/* program test bitstream to CPLD */
-	error = cpld_jtag_program(sgpio_if_xsvf_len, &sgpio_if_xsvf[0]);
-
-	if(error == 0)
-	{
-		/* blink only LED1 (Green) on success */
-		LED = PIN_LED1;
-	}else
-	{
-		/* blink LED3 (Red) on error */
-		LED = PIN_LED3;
-	}
-
-	gpio_clear(PORT_LED1_3, ALL_LEDS); /* All LEDs off */
-
-	while (1)
-	{
-		gpio_set(PORT_LED1_3, LED); /* LEDs on */
-		for (i = 0; i < WAIT_LOOP_DELAY; i++)	/* Wait a bit. */
-			__asm__("nop");
-		gpio_clear(PORT_LED1_3, LED); /* LED off */
-		for (i = 0; i < WAIT_LOOP_DELAY; i++)	/* Wait a bit. */
-			__asm__("nop");
-	}
-
-	return 0;
-}
--- a/firmware/startup_systick_perfo_rom_to_ram/Makefile
+++ b/firmware/startup_systick_perfo_rom_to_ram/Makefile
@ -1,12 +1,38 @@
 # Hey Emacs, this is a -*- makefile -*-
+#
+# Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
+#
+# This file is part of HackRF.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; see the file COPYING.  If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+#

 BINARY = startup_systick_perfo_rom_to_ram

+SRC_DIR = startup_systick_perfo
+
 SRC = startup_systick.c \
 	perf_mips.c \
 	../common/hackrf_core.c \
 	../common/si5351c.c \
 	../common/max2837.c
-
 LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
+
+%.o: ../$(SRC_DIR)/%.c  Makefile
+	@printf "  CC      $(subst $(shell pwd)/,,$(@))\n"
+	$(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
 include ../common/Makefile_inc.mk
--- a/firmware/startup_systick_perfo_rom_to_ram/perf_mips.c
+++ b/firmware/startup_systick_perfo_rom_to_ram/perf_mips.c
--- a/firmware/startup_systick_perfo_rom_to_ram/startup_systick.c
+++ b/firmware/startup_systick_perfo_rom_to_ram/startup_systick.c
@ -1,209 +0,0 @@
-/*
- * Copyright 2010 - 2012 Michael Ossmann
- *
- * This file is part of HackRF.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.  If not, write to
- * the Free Software Foundation, Inc., 51 Franklin Street,
- * Boston, MA 02110-1301, USA.
- */
-
-#include <libopencm3/lpc43xx/gpio.h>
-#include <libopencm3/lpc43xx/scu.h>
-#include <libopencm3/lpc43xx/i2c.h>
-#include <libopencm3/lpc43xx/nvic.h>
-#include <libopencm3/lpc43xx/systick.h>
-#include <libopencm3/cm3/scs.h>
-
-#include "hackrf_core.h"
-
-/* Global counter incremented by SysTick Interrupt each millisecond */
-volatile u32 g_ulSysTickCount;
-u32 g_NbCyclePerSecond;
-
-void systick_setup(void)
-{
-	u32 systick_reload_val;
-	g_ulSysTickCount = 0;
-
-	/* Disable IRQ globally */
-	__asm__("cpsid i");
-
-	/* Set processor Clock as Source Clock */
-	systick_set_clocksource(STK_CTRL_CLKSOURCE);
-
-	/* Get SysTick calibration value to obtain by default 1 tick = 10ms */
-	systick_reload_val = systick_get_calib();
-	/*
-     * Calibration seems wrong on LPC43xx(TBC) for default Freq it assume System Clock is 12MHz but it is 12*17=204MHz
-	 * Fix the Calibration value bu multiplication by 17
-     */
-	systick_reload_val = (systick_reload_val*17);
-
-	/* To obtain 1ms per tick just divide by 10 the 10ms base tick and set the reload */
-	systick_reload_val = systick_reload_val/10;
-	systick_set_reload(systick_reload_val);
-
-	systick_interrupt_enable();
-
-	/* Start counting. */
-	systick_counter_enable();
-
-	/* Set SysTick Priority to maximum */
-	nvic_set_priority(NVIC_SYSTICK_IRQ, 0xFF);
-
-	/* Enable IRQ globally */
-	__asm__("cpsie i");
-}
-
-void scs_dwt_cycle_counter_enabled(void)
-{
-	SCS_DEMCR |= SCS_DEMCR_TRCENA;
-	SCS_DWT_CTRL  |= SCS_DWT_CTRL_CYCCNTENA;
-}
-
-u32 sys_tick_get_time_ms(void)
-{
-    return g_ulSysTickCount;
-}
-
-u32 sys_tick_delta_time_ms(u32 start, u32 end)
-{
-	#define MAX_T_U32 ((2^32)-1)
-    u32 diff;
-
-    if(end > start)
-    {
-        diff=end-start;
-    }else
-    {
-        diff=MAX_T_U32-(start-end)+1;
-    }
-    
-    return diff;
-}
-
-void sys_tick_wait_time_ms(u32 wait_ms)
-{
-    u32 start, end;
-    u32 tickms;
-
-    start = sys_tick_get_time_ms();
-
-    do
-    {
-        end = sys_tick_get_time_ms();
-        tickms = sys_tick_delta_time_ms(start, end);
-    }while(tickms < wait_ms);
-}
-
-/* Called each 1ms/1000Hz by interrupt
- 1) Count the number of cycle per second.
- 2) Increment g_ulSysTickCount counter.
-*/
-void sys_tick_handler(void)
-{
-	if(g_ulSysTickCount==0)
-	{
-		/* Clear Cycle Counter*/
-		SCS_DWT_CYCCNT = 0;
-	}else if(g_ulSysTickCount==1000)
-	{
-		/* Capture number of cycle elapsed during 1 second */
-		g_NbCyclePerSecond = SCS_DWT_CYCCNT;
-	}
-
-	g_ulSysTickCount++;
-}
-
-u32 nb_inst_per_sec[16];
-
-extern u32 test_nb_instruction_per_sec_100_nop_asm();
-extern u32 test_nb_instruction_per_sec_105_nop_asm();
-extern u32 test_nb_instruction_per_sec_110_nop_asm();
-extern u32 test_nb_instruction_per_sec_115_nop_asm();
-extern u32 test_nb_instruction_per_sec_120_nop_asm();
-extern u32 test_nb_instruction_per_sec_150_nop_asm();
-extern u32 test_nb_instruction_per_sec_200_nop_asm();
-extern u32 test_nb_instruction_per_sec_1000_nop_asm();
-
-#define LED1_TOGGLE()	(gpio_toggle(PORT_LED1_3, (PIN_LED1)))
-
-int main(void)
-{
-	pin_setup();
-
-	gpio_set(PORT_EN1V8, PIN_EN1V8); /* 1V8 on */
-
-	cpu_clock_init();
-
-	scs_dwt_cycle_counter_enabled();
-
-	systick_setup();
-
-	gpio_clear(PORT_LED1_3, (PIN_LED1)); /* LED1 off */
-
-	/* Test number of instruction per second (MIPS) slow blink ON 1s, OFF 1s */
-LED1_TOGGLE();
-	nb_inst_per_sec[0] = test_nb_instruction_per_sec_100_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[1]= test_nb_instruction_per_sec_105_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[2]= test_nb_instruction_per_sec_110_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[3]= test_nb_instruction_per_sec_115_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[4] = test_nb_instruction_per_sec_120_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[5] = test_nb_instruction_per_sec_150_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[6] = test_nb_instruction_per_sec_200_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[7] = test_nb_instruction_per_sec_1000_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[8] = test_nb_instruction_per_sec_100_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[9]= test_nb_instruction_per_sec_105_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[10]= test_nb_instruction_per_sec_110_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[11]= test_nb_instruction_per_sec_115_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[12] = test_nb_instruction_per_sec_120_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[13] = test_nb_instruction_per_sec_150_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[14] = test_nb_instruction_per_sec_200_nop_asm();
-LED1_TOGGLE();
-	nb_inst_per_sec[15] = test_nb_instruction_per_sec_1000_nop_asm();
-LED1_TOGGLE();
-
-	/* Test finished fast blink */
-	while (1) 
-	{
-		gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */
-		gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */
-		gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */
-
-		sys_tick_wait_time_ms(250);
-
-		gpio_clear(PORT_LED1_3, (PIN_LED3)); /* LED3 off */
-		gpio_clear(PORT_LED1_3, (PIN_LED2)); /* LED2 off */
-		gpio_clear(PORT_LED1_3, (PIN_LED1)); /* LED1 off  */
-
-		sys_tick_wait_time_ms(250);
-	}
-
-	return 0;
-}
--- a/firmware/usb_performance/usb_performance.c
+++ b/firmware/usb_performance/usb_performance.c
@ -808,20 +808,28 @@ void sgpio_irqhandler() {
 	if( transceiver_mode == TRANSCEIVER_MODE_RX ) {
 		__asm__(
 			"ldr r0, [%[SGPIO_REG_SS], #44]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #0]\n\t"
 			"ldr r0, [%[SGPIO_REG_SS], #20]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #4]\n\t"
 			"ldr r0, [%[SGPIO_REG_SS], #40]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #8]\n\t"
 			"ldr r0, [%[SGPIO_REG_SS], #8]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #12]\n\t"
 			"ldr r0, [%[SGPIO_REG_SS], #36]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #16]\n\t"
 			"ldr r0, [%[SGPIO_REG_SS], #16]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #20]\n\t"
 			"ldr r0, [%[SGPIO_REG_SS], #32]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #24]\n\t"
 			"ldr r0, [%[SGPIO_REG_SS], #0]\n\t"
+			"rev16 r0, r0\n\t" /* Swap QI -> IQ */
 			"str r0, [%[p], #28]\n\t"
 			:
 			: [SGPIO_REG_SS] "l" (SGPIO_PORT_BASE + 0x100),
--- a/firmware/usb_performance_rom_to_ram/Makefile
+++ b/firmware/usb_performance_rom_to_ram/Makefile
@ -0,0 +1,53 @@
+# Hey Emacs, this is a -*- makefile -*-
+#
+# Copyright 2013 Benjamin Vernoux <titanmkd@gmail.com>
+#
+# This file is part of HackRF.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; see the file COPYING.  If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+#
+
+BINARY = usb_performance_rom_to_ram
+
+SRC_DIR = usb_performance
+
+SRC = usb_performance.c \
+	usb.c \
+	usb_request.c \
+	usb_standard_request.c \
+	usb_descriptor.c \
+	../common/fault_handler.c \
+	../common/hackrf_core.c \
+	../common/sgpio.c \
+	../common/si5351c.c \
+	../common/max2837.c \
+	../common/max5864.c \
+	../common/rffc5071.c \
+	../common/w25q80bv.c \
+	../common/cpld_jtag.c \
+	../common/xapp058/lenval.c \
+	../common/xapp058/micro.c \
+	../common/xapp058/ports.c \
+	../common/rom_iap.c
+
+LDSCRIPT = ../common/LPC4330_M4_rom_to_ram.ld
+
+%.o: ../$(SRC_DIR)/%.c  Makefile
+	@printf "  CC      $(subst $(shell pwd)/,,$(@))\n"
+	$(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
+include ../common/Makefile_inc.mk
+
--- a/hardware/jawbreaker/baseband.sch
+++ b/hardware/jawbreaker/baseband.sch
@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu Dec  6 15:37:44 2012
+EESchema Schematic File Version 2  date Wed Mar 27 01:00:29 2013
 LIBS:power
 LIBS:device
 LIBS:transistors
@ -37,7 +37,7 @@ $Descr User 17000 11000
 encoding utf-8
 Sheet 3 4
 Title "jawbreaker baseband"
-Date "6 dec 2012"
+Date "27 mar 2013"
 Rev ""
 Comp "Copyright 2012 Michael Ossmann"
 Comment1 "License: GPL v2"
@ -987,8 +987,8 @@ L C C117
 U 1 1 5047BE90
 P 4950 3400
 F 0 "C117" H 5000 3500 50  0000 L CNN
-F 1 "C" H 5000 3300 50  0000 L CNN
-F 4 "DNP" V 5150 3350 60  0000 C CNN "Note"
+F 1 "DNP" H 5000 3300 50  0000 L CNN
+F 4 "DNP" V 4800 3400 60  0000 C CNN "Note"
 	1    4950 3400
 	1    0    0    -1  
 $EndComp
@ -2570,7 +2570,7 @@ U 1 1 4F5D6AAA
 P 5300 4500
 F 0 "L6" V 5250 4500 40  0000 C CNN
 F 1 "DNP" V 5400 4500 40  0000 C CNN
-F 4 "DNP" H 5300 4500 60  0001 C CNN "Note"
+F 4 "DNP" V 5500 4450 60  0000 C CNN "Note"
 	1    5300 4500
 	1    0    0    -1  
 $EndComp
--- a/hardware/jawbreaker/frontend.sch
+++ b/hardware/jawbreaker/frontend.sch
@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu Dec  6 15:37:44 2012
+EESchema Schematic File Version 2  date Wed Mar 27 01:00:29 2013
 LIBS:power
 LIBS:device
 LIBS:transistors
@ -37,7 +37,7 @@ $Descr User 17000 11000
 encoding utf-8
 Sheet 2 4
 Title "jawbreaker frontend"
-Date "6 dec 2012"
+Date "27 mar 2013"
 Rev ""
 Comp "Copyright 2012 Michael Ossmann"
 Comment1 "License: GPL v2"
@ -2058,6 +2058,7 @@ U 1 1 4FB55E30
 P 5300 5550
 F 0 "L4" V 5250 5550 40  0000 C CNN
 F 1 "DNP" V 5400 5550 40  0000 C CNN
+F 4 "DNP" V 5150 5550 60  0000 C CNN "Note"
 	1    5300 5550
 	1    0    0    -1  
 $EndComp
@ -2154,6 +2155,7 @@ U 1 1 502AFA8C
 P 3900 3750
 F 0 "L1" V 3850 3750 40  0000 C CNN
 F 1 "DNP" V 4000 3750 40  0000 C CNN
+F 4 "DNP" V 4050 3600 60  0000 C CNN "Note"
 	1    3900 3750
 	1    0    0    -1  
 $EndComp
@ -3150,7 +3152,6 @@ F 1 "ANTENNA" H 16100 8300 60  0000 C CNN
 F 4 "TE Connectivity" H 16100 8450 60  0001 C CNN "Manufacturer"
 F 5 "2081233-1" H 16100 8450 60  0001 C CNN "Part Number"
 F 6 "CONN JACK SMA PCB VERT" H 16100 8450 60  0001 C CNN "Description"
-F 7 "DNP" H 15850 8450 60  0000 C CNN "Note"
 	1    16100 8450
 	-1   0    0    -1  
 $EndComp
--- a/hardware/jawbreaker/jawbreaker-cache.lib
+++ b/hardware/jawbreaker/jawbreaker-cache.lib
@ -1,4 +1,4 @@
-EESchema-LIBRARY Version 2.3  Date: Thu Dec  6 15:37:44 2012
+EESchema-LIBRARY Version 2.3  Date: Wed Mar 27 01:00:29 2013
 #encoding utf-8
 #
 # +1.8V
@ -79,8 +79,8 @@ $FPLIST
 C1-1
 $ENDFPLIST
 DRAW
-P 2 0 1 10  -100 -30  100 -30 N
-P 2 0 1 10  -100 30  100 30 N
+P 2 0 1 20  -100 -30  100 -30 N
+P 2 0 1 20  -100 30  100 30 N
 X ~ 1 0 200 170 D 40 40 1 1 P
 X ~ 2 0 -200 170 U 40 40 1 1 P
 ENDDRAW
@ -937,6 +937,7 @@ $FPLIST
 SM0603
 SM0805
 R?-*
+ SM1206
 $ENDFPLIST
 DRAW
 S -40 150 40 -150 0 1 12 N
@ -1096,7 +1097,7 @@ ENDDEF
 #
 # VAA
 #
-DEF VAA #PWR 0 0 Y Y 1 F N
+DEF VAA #PWR 0 0 Y Y 1 F P
 F0 "#PWR" 0 60 30 H I C CNN
 F1 "VAA" 0 110 30 H V C CNN
 DRAW
--- a/hardware/jawbreaker/jawbreaker.brd
+++ b/hardware/jawbreaker/jawbreaker.brd
--- a/hardware/jawbreaker/jawbreaker.pro
+++ b/hardware/jawbreaker/jawbreaker.pro
@ -1,4 +1,4 @@
-update=Tue Nov  6 19:23:45 2012
+update=Wed Mar 27 00:13:41 2013
 version=1
 last_client=eeschema
 [cvpcb]
@ -46,30 +46,7 @@ LibName11=hackrf
 [eeschema]
 version=1
 LibDir=../kicad
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
+NetFmtName=
 RptD_X=0
 RptD_Y=100
 RptLab=1
--- a/hardware/jawbreaker/jawbreaker.sch
+++ b/hardware/jawbreaker/jawbreaker.sch
@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu Dec  6 15:37:44 2012
+EESchema Schematic File Version 2  date Wed Mar 27 01:00:29 2013
 LIBS:power
 LIBS:device
 LIBS:transistors
@ -37,7 +37,7 @@ $Descr User 17000 11000
 encoding utf-8
 Sheet 1 4
 Title "jawbreaker"
-Date "6 dec 2012"
+Date "27 mar 2013"
 Rev ""
 Comp "Copyright 2012 Michael Ossmann"
 Comment1 "License: GPL v2"
--- a/hardware/jawbreaker/mcu.sch
+++ b/hardware/jawbreaker/mcu.sch
@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu Dec  6 15:37:44 2012
+EESchema Schematic File Version 2  date Wed Mar 27 01:00:29 2013
 LIBS:power
 LIBS:device
 LIBS:transistors
@ -37,7 +37,7 @@ $Descr User 17000 11000
 encoding utf-8
 Sheet 4 4
 Title "jawbreaker mcu/usb/power"
-Date "6 dec 2012"
+Date "27 mar 2013"
 Rev ""
 Comp "Copyright 2012 Michael Ossmann"
 Comment1 "License: GPL v2"
--- a/hardware/jellybean/sgpio_if/default.svf
+++ b/hardware/jellybean/sgpio_if/default.svf
@ -1,5 +1,5 @@
-// Created using Xilinx Cse Software [ISE - 13.4]
-// Date: Wed Feb 27 16:39:56 2013
+// Created using Xilinx Cse Software [ISE - 14.1]
+// Date: Thu Apr 04 19:24:32 2013

 TRST OFF;
 ENDIR IDLE;
@ -164,7 +164,7 @@ SDR 281 TDI (0083c1fffffffffffffffffffffffffffffddf7ffffffffffbfffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (00c2f9fffffffffffffffffffffffffffffddf7fffffffffffffbffffffffffffffffe7f) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (01c201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffffe7c) ;
+SDR 281 TDI (01c201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffff27c) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (0143c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
 RUNTEST 10000 TCK;
@ -184,7 +184,7 @@ SDR 281 TDI (01a2f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (012201fffffffffffffffffffffffffffffd7f7fffffffffffffffffffff7ffffffffe81) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (0023c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
+SDR 281 TDI (0023c1fffffffffffffffffffffffffffff5ff7ffffffffffffffffffffffffffffff24f) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (0032f9fffffffffffffffffffffffffffffd7f7fffffeffffffffffffffffffffffffe7c) ;
 RUNTEST 10000 TCK;
@ -202,7 +202,7 @@ SDR 281 TDI (0172f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (007201ffffffffffffffffffffffffffffffe587fffffffffffffffffffffffffffffe7c) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (0053c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
+SDR 281 TDI (0053c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffea4f) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (0152f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
 RUNTEST 10000 TCK;
@ -210,9 +210,9 @@ SDR 281 TDI (01d201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (00d3c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (0092f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
+SDR 281 TDI (0092f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe65) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (019201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
+SDR 281 TDI (019201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (0113c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ;
 RUNTEST 10000 TCK;
@ -254,7 +254,7 @@ SDR 281 TDI (002bc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (0128fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (01aa01ffffefffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) ;
+SDR 281 TDI (01aa01fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (00abc1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
 RUNTEST 10000 TCK;
@ -264,7 +264,7 @@ SDR 281 TDI (01e8f9fffbfffffffffffffffffffffffffbbefffffffffffffffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (016bc9fffffffffff7fffffffffffffffffbeefffffffffffffffffffffffffffffffe0f) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (0068e1ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe1d) ;
+SDR 281 TDI (0068e1fffff7fffffffffffffffffffffffffefafffffffffffffffffffffffffffffe1d) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (004ac5ffffffffffffffffffdffffffffffbeefffffffffffffffffffffffffffffffe7c) ;
 RUNTEST 10000 TCK;
@ -272,7 +272,7 @@ SDR 281 TDI (014bc1ffffffff7ffffffffffffffffffffbeefffffffffffffffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (01cbf9ffffffffffffffffffffffffdffffbeefffffffffffffffffffffffffffffffe1d) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (00c8f8fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7c) ;
+SDR 281 TDI (00c8f9ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe7c) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (008bc9ffffffffffffff7ffffffffffffffbbefffffffffffffffffffffffffffffffe0f) ;
 RUNTEST 10000 TCK;
@ -330,7 +330,7 @@ SDR 281 TDI (017cf9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
 RUNTEST 10000 TCK;
 SDR 281 TDI (007fc9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) ;
 RUNTEST 10000 TCK;
-SDR 281 TDI (005ce1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) ;
+SDR 281 TDI (005ce0fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7d) ;
 RUNTEST 10000 TCK;
 SDR 281 TDI (015ec5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) ;
 RUNTEST 10000 TCK;
@ -425,7 +425,7 @@ SDR 7 TDI (70) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffff27c) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -505,7 +505,7 @@ SDR 7 TDI (08) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffff5ff7ffffffffffffffffffffffffffffff24f) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -577,7 +577,7 @@ SDR 7 TDI (14) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffea4f) MASK (
 03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -609,7 +609,7 @@ SDR 7 TDI (24) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe65) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -617,7 +617,7 @@ SDR 7 TDI (64) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -785,7 +785,7 @@ SDR 7 TDI (6a) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffefffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -825,7 +825,7 @@ SDR 7 TDI (1a) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe1d) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffff7fffffffffffffffffffffffffefafffffffffffffffffffffffffffffe1d) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -857,7 +857,7 @@ SDR 7 TDI (32) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f8fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe7c) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1089,7 +1089,7 @@ SDR 7 TDI (17) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e0fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7d) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1306,7 +1306,7 @@ SDR 7 TDI (70) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffff27c) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1386,7 +1386,7 @@ SDR 7 TDI (08) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffff5ff7ffffffffffffffffffffffffffffff24f) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1458,7 +1458,7 @@ SDR 7 TDI (14) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffea4f) MASK (
 03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1490,7 +1490,7 @@ SDR 7 TDI (24) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe65) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1498,7 +1498,7 @@ SDR 7 TDI (64) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1666,7 +1666,7 @@ SDR 7 TDI (6a) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffefffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1706,7 +1706,7 @@ SDR 7 TDI (1a) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe1d) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffff7fffffffffffffffffffffffffefafffffffffffffffffffffffffffffe1d) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1738,7 +1738,7 @@ SDR 7 TDI (32) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f8fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7c) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe7c) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
@ -1970,7 +1970,7 @@ SDR 7 TDI (17) SMASK (7f) ;
 RUNTEST DRPAUSE 20 TCK;
 ENDDR IDLE;
 RUNTEST IDLE 100 TCK;
-SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK (
+SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e0fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7d) MASK (
 03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ;
 RUNTEST 100 TCK;
 ENDDR DRPAUSE;
--- a/hardware/jellybean/sgpio_if/default.xsvf
+++ b/hardware/jellybean/sgpio_if/default.xsvf
--- a/hardware/jellybean/sgpio_if/sgpio_if.xise
+++ b/hardware/jellybean/sgpio_if/sgpio_if.xise
@ -9,22 +9,22 @@
    <!-- along with the project source files, is sufficient to open and    -->
    <!-- implement in ISE Project Navigator.                               -->
    <!--                                                                   -->
-    <!-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved. -->
+    <!-- Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved. -->
  </header>

-  <version xil_pn:ise_version="13.4" xil_pn:schema_version="2"/>
+  <version xil_pn:ise_version="14.1" xil_pn:schema_version="2"/>

  <files>
    <file xil_pn:name="top.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/>
      <association xil_pn:name="Implementation" xil_pn:seqID="1"/>
    </file>
-    <file xil_pn:name="top.ucf" xil_pn:type="FILE_UCF">
-      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
-    </file>
    <file xil_pn:name="top_tb.vhd" xil_pn:type="FILE_VHDL">
      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/>
-      <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="38"/>
+      <association xil_pn:name="PostRouteSimulation" xil_pn:seqID="2"/>
+    </file>
+    <file xil_pn:name="top.ucf" xil_pn:type="FILE_UCF">
+      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
    </file>
  </files>

@ -97,6 +97,9 @@
    <property xil_pn:name="Keep Hierarchy" xil_pn:value="No" xil_pn:valueState="default"/>
    <property xil_pn:name="Keep Hierarchy CPLD" xil_pn:value="Yes" xil_pn:valueState="default"/>
    <property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
+    <property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
+    <property xil_pn:name="Last Applied Strategy" xil_pn:value="Xilinx Default (unlocked)" xil_pn:valueState="default"/>
+    <property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
    <property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
    <property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
    <property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
@ -200,6 +203,7 @@
    <property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
    <property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
    <property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="User Browsed Strategy Files" xil_pn:value="E:/Xilinx/14.1/ISE_DS/ISE/data/default.xds" xil_pn:valueState="non-default"/>
    <property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/>
    <property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
    <property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/>
--- a/hardware/jellybean/sgpio_if/top.jed
+++ b/hardware/jellybean/sgpio_if/top.jed
@ -1,5 +1,5 @@
 Programmer Jedec Bit Map
-Date Extracted: Wed Feb 27 16:34:46 2013
+Date Extracted: Thu Apr 04 19:23:47 2013

 QF25812*
 QP100*
@ -7,7 +7,7 @@ QV0*
 F0*
 X0*
 J0 0*
-N VERSION O.87xd*
+N VERSION P.15xf*
 N DEVICE XC2C64A-7-VQ100*

 Note Block 0 *
@ -205,7 +205,7 @@ L006624 1111111111111111*
 L006640 1111111111111111*
 L006656 1111111111111111*
 L006672 1111111011100111*
-L006688 1111111111111111*
+L006688 1111111011110011*
 L006704 1111111011100111*
 L006720 1111111111111111*
 L006736 1111111111111111*
@ -232,8 +232,8 @@ L007056 1111111111111111*
 L007072 1111111111111111*

 Note Block 1 PLA AND array *
-L007088 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
-L007168 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
+L007088 11111111110111111111111111111101111111111111111111111111111111111111111111111111*
+L007168 11111111111011111111111111111110111111111111111111111111111111111111111111111111*
 L007248 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L007328 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L007408 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
@ -290,8 +290,8 @@ L011408 111111111111111111111111111111111111111111111111111111111111111111111111
 L011488 11111111111111111111111111111111111111111111111111111111111111111111111111111111*

 Note Block 1 PLA OR array *
-L011568 1111111111111111*
-L011584 1111111111111111*
+L011568 1111111110111111*
+L011584 1111111110111111*
 L011600 1111111111111111*
 L011616 1111111111111111*
 L011632 1111111111111111*
@ -358,7 +358,7 @@ L012599 000101111001111101000000001*
 L012626 000001111001111110011111100*
 L012653 000001111000011100011111100*
 L012680 000101111001111101000000001*
-L012707 000001111001111100011111100*
+L012707 000001111001100100011111101*
 L012734 000101111001111101000000001*
 L012761 000101111001111101000000001*
 L012788 000101111001111101000000001*
@ -370,16 +370,16 @@ Note Block 2 *
 Note Block 2 ZIA *
 L012896 1111111111111111*
 L012912 1111111111111111*
-L012928 1111111011110011*
+L012928 1111111111111111*
 L012944 1111111111111111*
 L012960 1111111010110111*
 L012976 1111111011010111*
 L012992 1111111010110111*
-L013008 1111111011010111*
+L013008 1110011011111111*
 L013024 1111111010110111*
 L013040 1111111010110111*
 L013056 1111111010110111*
-L013072 1111111011100111*
+L013072 1111111011010111*
 L013088 1111111011010111*
 L013104 1111111111111111*
 L013120 1111111111111111*
@ -400,7 +400,7 @@ L013344 1111111111111111*
 L013360 1111111111111111*
 L013376 1111111111111111*
 L013392 1111111111111111*
-L013408 1111111111111111*
+L013408 1111111011100111*
 L013424 1111111111111111*
 L013440 1111111111111111*
 L013456 1111111111111111*
@ -410,7 +410,7 @@ L013504 1111111111111111*
 L013520 1111111111111111*

 Note Block 2 PLA AND array *
-L013536 11111111111111111111111011111111111111111111111111111111111111111111111111111111*
+L013536 11111111111111111111111111111111111111111111111111111111111111111011111111111111*
 L013616 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L013696 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L013776 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
@ -420,7 +420,7 @@ L014016 111111111111111111111111111111111111111111111111111111111111111111111111
 L014096 11111111111011111111111111111111111111111111111111111111111111111111111111111111*
 L014176 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L014256 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
-L014336 11111011111111111111111111111111111111111111111111111111111111111111111111111111*
+L014336 11111111111111011111111111111111111111111111111111111111111111111111111111111111*
 L014416 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L014496 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L014576 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
@ -462,7 +462,7 @@ L017376 111111111111111111111111111111111111111111111111111111111111111111111111
 L017456 11111111111111111111011111111111111111111111111111111111111111111111111111111111*
 L017536 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L017616 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
-L017696 11111111111111011111111111111111111111111111111111111111111111111111111111111111*
+L017696 11111111111111111111110111111111111111111111111111111111111111111111111111111111*
 L017776 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L017856 11111111111111111111111111111111111111111111111111111111111111111111111111111111*
 L017936 11111111111111111111111111111101111111111111111111111111111111111111111111111111*
@ -753,5 +753,5 @@ L025810 0*
 Note I/O Bank 1 Vcco *
 L025811 0*

-C0A93*
-D0B1
+C09A6*
+D0A4
--- a/hardware/jellybean/sgpio_if/top.vhd
+++ b/hardware/jellybean/sgpio_if/top.vhd
@ -1,5 +1,6 @@
 --
 -- Copyright 2012 Jared Boone
+-- Copyright 2013 Benjamin Vernoux
 --
 -- This file is part of HackRF.
 --
@ -116,10 +117,16 @@ begin
    process(host_clk_i, codec_clk_i)
    begin
        if rising_edge(host_clk_i) then
+            if transfer_direction_i = to_dac then
+                if codec_clk_i = '1' then
+                    host_data_capture_o <= host_data_enable_i;
+                end if;
+            else
                if codec_clk_i = '0' then
                    host_data_capture_o <= host_data_enable_i;
                end if;
            end if;
+        end if;
    end process;
    
 end Behavioral;
--- a/host/libhackrf/examples/hackrf_max2837.c
+++ b/host/libhackrf/examples/hackrf_max2837.c
@ -82,9 +82,10 @@ int dump_register(hackrf_device* device, const uint16_t register_number) {
 }

 int dump_registers(hackrf_device* device) {
+	uint16_t register_number;
 	int result = HACKRF_SUCCESS;
 	
-	for(uint16_t register_number=0; register_number<32; register_number++) {
+	for(register_number=0; register_number<32; register_number++) {
 		result = dump_register(device, register_number);
 		if( result != HACKRF_SUCCESS ) {
 			break;
--- a/host/libhackrf/examples/hackrf_rffc5071.c
+++ b/host/libhackrf/examples/hackrf_rffc5071.c
@ -83,9 +83,10 @@ int dump_register(hackrf_device* device, const uint16_t register_number) {
 }

 int dump_registers(hackrf_device* device) {
+	uint16_t register_number;
 	int result = HACKRF_SUCCESS;
 	
-	for(uint16_t register_number=0; register_number<31; register_number++) {
+	for(register_number=0; register_number<31; register_number++) {
 		result = dump_register(device, register_number);
 		if( result != HACKRF_SUCCESS ) {
 			break;
--- a/host/libhackrf/examples/hackrf_si5351c.c
+++ b/host/libhackrf/examples/hackrf_si5351c.c
@ -70,9 +70,10 @@ int dump_register(hackrf_device* device, const uint16_t register_number) {
 }

 int dump_registers(hackrf_device* device) {
+	uint16_t register_number;
 	int result = HACKRF_SUCCESS;
 	
-	for(uint16_t register_number=0; register_number<256; register_number++) {
+	for(register_number=0; register_number<256; register_number++) {
 		result = dump_register(device, register_number);
 		if( result != HACKRF_SUCCESS ) {
 			break;
@ -102,9 +103,12 @@ int write_register(
 #define REGISTER_INVALID 32767

 int dump_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number) {
+	uint_fast8_t i;
+	uint_fast8_t reg_base;
 	uint16_t parameters[8];
-	uint_fast8_t reg_base = 42 + (ms_number * 8);
-	for(uint_fast8_t i=0; i<8; i++) {
+	
+	reg_base = 42 + (ms_number * 8);
+	for(i=0; i<8; i++) {
 		uint_fast8_t reg_number = reg_base + i;
 		int result = hackrf_si5351c_read(device, reg_number, &parameters[i]);
 		if( result != HACKRF_SUCCESS ) {
@ -141,8 +145,11 @@ int dump_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number)
 }

 int dump_configuration(hackrf_device* device) {
-	for(uint_fast8_t ms_number=0; ms_number<8; ms_number++) {
-		int result = dump_multisynth_config(device, ms_number);
+	uint_fast8_t ms_number;
+	int result;
+			
+	for(ms_number=0; ms_number<8; ms_number++) {
+		result = dump_multisynth_config(device, ms_number);
 		if( result != HACKRF_SUCCESS ) {
 			return result;
 		}
--- a/host/libhackrf/examples/hackrf_spiflash.c
+++ b/host/libhackrf/examples/hackrf_spiflash.c
@ -70,7 +70,7 @@ static void usage()
 {
 	printf("Usage:\n");
 	printf("\t-a, --address <n>: starting address (default: 0)\n");
-	printf("\t-l, --length <n>: number of bytes to read or write (default: 0)\n");
+	printf("\t-l, --length <n>: number of bytes to read (default: 0)\n");
 	printf("\t-r <filename>: Read data into file.\n");
 	printf("\t-w <filename>: Write data from file.\n");
 }
@ -137,8 +137,27 @@ int main(int argc, char** argv)
 		return EXIT_FAILURE;
 	}
 	
+	if (path == NULL) {
+		fprintf(stderr, "Specify a path to a file.\n");
+		usage();
+		return EXIT_FAILURE;
+	}	
+	
+	if( write )
+	{
+		fd = fopen(path, "rb");
+		/* Get size of the file  */
+		fseek(fd, 0, SEEK_END); /* Not really portable but work on major OS Linux/Win32 */
+		length = ftell(fd);
+		/* Move to start */
+		rewind(fd);
+		printf("File size %d bytes.\n", length);
+	}
+
 	if (length == 0) {
 		fprintf(stderr, "Requested transfer of zero bytes.\n");
+		if(fd != NULL)
+			fclose(fd);
 		usage();
 		return EXIT_FAILURE;
 	}
@ -146,20 +165,14 @@ int main(int argc, char** argv)
 	if ((length > MAX_LENGTH) || (address > MAX_LENGTH)
 			|| ((address + length) > MAX_LENGTH)) {
 		fprintf(stderr, "Request exceeds size of flash memory.\n");
-		usage();
-		return EXIT_FAILURE;
-	}
-
-	if (path == NULL) {
-		fprintf(stderr, "Specify a path to a file.\n");
+		if(fd != NULL)
+			fclose(fd);
 		usage();
 		return EXIT_FAILURE;
 	}

 	if (read) {
 		fd = fopen(path, "wb");
-	} else {
-		fd = fopen(path, "rb");
 	}

 	if (fd == NULL) {
--- a/host/libhackrf/examples/hackrf_transfer.c
+++ b/host/libhackrf/examples/hackrf_transfer.c
@ -27,6 +27,7 @@
 #include <stdbool.h>
 #include <string.h>
 #include <getopt.h>
+#include <time.h>

 #include <sys/types.h>
 #include <sys/stat.h>
@ -42,13 +43,89 @@
 #include <sys/time.h>
 #include <signal.h>

+#define FD_BUFFER_SIZE (8*1024)
+
+#define FREQ_ONE_MHZ (1000000ull)
+
+#define DEFAULT_FREQ_HZ (900000000ull) /* 900MHz */
 #define FREQ_MIN_HZ	(30000000ull) /* 30MHz */
 #define FREQ_MAX_HZ	(6000000000ull) /* 6000MHz */

+#define DEFAULT_SAMPLE_RATE_HZ (10000000) /* 10MHz default sample rate */
+
+#define DEFAULT_BASEBAND_FILTER_BANDWIDTH (5000000) /* 5MHz default */
+
+#define SAMPLES_TO_XFER_MAX (0x8000000000000000ull) /* Max value */
+
+#define BASEBAND_FILTER_BW_MIN (1750000)  /* 1.75 MHz min value */
+#define BASEBAND_FILTER_BW_MAX (28000000) /* 28 MHz max value */
+
 #if defined _WIN32
 	#define sleep(a) Sleep( (a*1000) )
 #endif

+/* WAVE or RIFF WAVE file format containing IQ 2x8bits data for HackRF compatible with SDR# Wav IQ file */
+typedef struct 
+{
+    char groupID[4]; /* 'RIFF' */
+    uint32_t size; /* File size + 8bytes */
+    char riffType[4]; /* 'WAVE'*/
+} t_WAVRIFF_hdr;
+
+#define FormatID "fmt "   /* chunkID for Format Chunk. NOTE: There is a space at the end of this ID. */
+
+typedef struct {
+  char		chunkID[4]; /* 'fmt ' */
+  uint32_t	chunkSize; /* 16 fixed */
+
+  uint16_t	wFormatTag; /* 1 fixed */
+  uint16_t	wChannels;  /* 2 fixed */
+  uint32_t	dwSamplesPerSec; /* Freq Hz sampling */
+  uint32_t	dwAvgBytesPerSec; /* Freq Hz sampling x 2 */
+  uint16_t	wBlockAlign; /* 2 fixed */
+  uint16_t	wBitsPerSample; /* 8 fixed */
+} t_FormatChunk;
+
+typedef struct 
+{
+    char		chunkID[4]; /* 'data' */
+    uint32_t	chunkSize; /* Size of data in bytes */
+	/* Samples I(8bits) then Q(8bits), I, Q ... */
+} t_DataChunk;
+
+typedef struct
+{
+	t_WAVRIFF_hdr hdr;
+	t_FormatChunk fmt_chunk;
+	t_DataChunk data_chunk;
+} t_wav_file_hdr;
+
+t_wav_file_hdr wave_file_hdr = 
+{
+	/* t_WAVRIFF_hdr */
+	{
+		{ 'R', 'I', 'F', 'F' }, /* groupID */
+		0, /* size to update later */
+		{ 'W', 'A', 'V', 'E' }
+	},
+	/* t_FormatChunk */
+	{
+		{ 'f', 'm', 't', ' ' }, /* char		chunkID[4];  */
+		16, /* uint32_t	chunkSize; */
+		1, /* uint16_t	wFormatTag; 1 fixed */
+		2, /* uint16_t	wChannels; 2 fixed */
+		0, /* uint32_t	dwSamplesPerSec; Freq Hz sampling to update later */
+		0, /* uint32_t	dwAvgBytesPerSec; Freq Hz sampling x 2 to update later */
+		2, /* uint16_t	wBlockAlign; 2 fixed */
+		8, /* uint16_t	wBitsPerSample; 8 fixed */
+	},
+	/* t_DataChunk */
+	{
+	    { 'd', 'a', 't', 'a' }, /* char chunkID[4]; */
+		0, /* uint32_t	chunkSize; to update later */
+	}
+};
+
 typedef enum {
 	TRANSCEIVER_MODE_OFF = 0,
 	TRANSCEIVER_MODE_RX = 1,
@ -86,7 +163,7 @@ int parse_u64(char* s, uint64_t* const value) {
 	}
 }

-int parse_int(char* s, uint32_t* const value) {
+int parse_u32(char* s, uint32_t* const value) {
 	uint_fast8_t base = 10;
 	if( strlen(s) > 2 ) {
 		if( s[0] == '0' ) {
@ -110,10 +187,14 @@ int parse_int(char* s, uint32_t* const value) {
 	}
 }

+volatile bool do_exit = false;
+
 FILE* fd = NULL;
 volatile uint32_t byte_count = 0;

 bool receive = false;
+bool receive_wav = false;
+
 bool transmit = false;
 struct timeval time_start;
 struct timeval t_start;
@ -124,17 +205,37 @@ uint64_t freq_hz;
 bool amp = false;
 uint32_t amp_enable;

+bool sample_rate = false;
+uint32_t sample_rate_hz;
+
+bool limit_num_samples = false;
+uint64_t samples_to_xfer = 0;
+uint64_t bytes_to_xfer = 0;
+
+bool baseband_filter_bw = false;
+uint32_t baseband_filter_bw_hz = 0;
+
 int rx_callback(hackrf_transfer* transfer) {
+	int bytes_to_write;
+
 	if( fd != NULL ) 
 	{
 		byte_count += transfer->valid_length;
-		const ssize_t bytes_written = fwrite(transfer->buffer, 1, transfer->valid_length, fd);
-		if( bytes_written == transfer->valid_length ) {
-       		return 0;
-		} else {
+		bytes_to_write = transfer->valid_length;
+		if (limit_num_samples) {
+			if (bytes_to_write >= bytes_to_xfer) {
+				bytes_to_write = bytes_to_xfer;
+			}
+			bytes_to_xfer -= bytes_to_write;
+		}
+		const ssize_t bytes_written = fwrite(transfer->buffer, 1, bytes_to_write, fd);
+		if ((bytes_written != bytes_to_write)
+				|| (limit_num_samples && (bytes_to_xfer == 0))) {
 			fclose(fd);
 			fd = NULL;
 			return -1;
+		} else {
+			return 0;
 		}
 	} else {
 		return -1;
@ -142,16 +243,30 @@ int rx_callback(hackrf_transfer* transfer) {
 }

 int tx_callback(hackrf_transfer* transfer) {
+	int bytes_to_read;
+
 	if( fd != NULL )
 	{
 		byte_count += transfer->valid_length;
-		const ssize_t bytes_read = fread(transfer->buffer, 1, transfer->valid_length, fd);
-		if( bytes_read == transfer->valid_length ) {
-			return 0;
-		} else {
+		bytes_to_read = transfer->valid_length;
+		if (limit_num_samples) {
+			if (bytes_to_read >= bytes_to_xfer) {
+				/*
+				 * In this condition, we probably tx some of the previous
+				 * buffer contents at the end.  :-(
+				 */
+				bytes_to_read = bytes_to_xfer;
+			}
+			bytes_to_xfer -= bytes_to_read;
+		}
+		const ssize_t bytes_read = fread(transfer->buffer, 1, bytes_to_read, fd);
+		if ((bytes_read != bytes_to_read)
+				|| (limit_num_samples && (bytes_to_xfer == 0))) {
 			fclose(fd);
 			fd = NULL;
 			return -1;
+		} else {
+			return 0;
 		}
 	} else {
 		return -1;
@ -160,18 +275,335 @@ int tx_callback(hackrf_transfer* transfer) {

 static void usage() {
 	printf("Usage:\n");
+	printf("\t-w # Receive data into file with WAV header and automatic name.\n");
 	printf("\t-r <filename> # Receive data into file.\n");
 	printf("\t-t <filename> # Transmit data from file.\n");
-	printf("\t[-f set_freq_hz] # Set Freq in Hz (between [%lld, %lld[).\n", FREQ_MIN_HZ, FREQ_MAX_HZ);
+	printf("\t[-f set_freq_hz] # Set Freq in Hz between [%lluMHz, %lluMHz[.\n", FREQ_MIN_HZ/FREQ_ONE_MHZ, FREQ_MAX_HZ/FREQ_ONE_MHZ);
 	printf("\t[-a set_amp] # Set Amp 1=Enable, 0=Disable.\n");
+	printf("\t[-s sample_rate_hz] # Set sample rate in Hz (5/10/12.5/16/20MHz, default %lldMHz).\n", DEFAULT_SAMPLE_RATE_HZ/FREQ_ONE_MHZ);
+	printf("\t[-n num_samples] # Number of samples to transfer (default is unlimited).\n");
+	printf("\t[-b baseband_filter_bw_hz] # Set baseband filter bandwidth in MHz.\n\tPossible values: 1.75/2.5/3.5/5/5.5/6/7/8/9/10/12/14/15/20/24/28MHz, default < sample_rate_hz.\n" );
 }

 static hackrf_device* device = NULL;

 void sigint_callback_handler(int signum) 
 {
+	fprintf(stdout, "Caught signal %d\n", signum);
+	do_exit = true;
+}
+
+#define PATH_FILE_MAX_LEN (FILENAME_MAX)
+#define DATE_TIME_MAX_LEN (32)
+
+int main(int argc, char** argv) {
+	int opt;
+	char path_file[PATH_FILE_MAX_LEN];
+	char date_time[DATE_TIME_MAX_LEN];
+	const char* path = NULL;
 	int result;
-	printf("Caught signal %d\n", signum);
+	time_t rawtime;
+	struct tm * timeinfo;
+	long int file_pos;
+	int exit_code = EXIT_SUCCESS;
+  
+	while( (opt = getopt(argc, argv, "wr:t:f:a:s:n:b:")) != EOF )
+	{
+		result = HACKRF_SUCCESS;
+		switch( opt ) 
+		{
+		case 'w':
+			receive_wav = true;
+			break;
+		
+		case 'r':
+			receive = true;
+			path = optarg;
+			break;
+		
+		case 't':
+			transmit = true;
+			path = optarg;
+			break;
+		
+		case 'f':
+			freq = true;
+			result = parse_u64(optarg, &freq_hz);
+			break;
+
+		case 'a':
+			amp = true;
+			result = parse_u32(optarg, &amp_enable);
+			break;
+
+		case 's':
+			sample_rate = true;
+			result = parse_u32(optarg, &sample_rate_hz);
+			break;
+
+		case 'n':
+			limit_num_samples = true;
+			result = parse_u64(optarg, &samples_to_xfer);
+			bytes_to_xfer = samples_to_xfer * 2ull;
+			break;
+
+		case 'b':
+			baseband_filter_bw = true;
+			result = parse_u32(optarg, &baseband_filter_bw_hz);
+			break;
+
+		default:
+			printf("unknown argument '-%c %s'\n", opt, optarg);
+			usage();
+			return EXIT_FAILURE;
+		}
+		
+		if( result != HACKRF_SUCCESS ) {
+			printf("argument error: '-%c %s' %s (%d)\n", opt, optarg, hackrf_error_name(result), result);
+			usage();
+			return EXIT_FAILURE;
+		}		
+	}
+
+	if (samples_to_xfer >= SAMPLES_TO_XFER_MAX) {
+		printf("argument error: num_samples must be less than %llu/%lluMio\n",
+				SAMPLES_TO_XFER_MAX, SAMPLES_TO_XFER_MAX/FREQ_ONE_MHZ);
+		usage();
+		return EXIT_FAILURE;
+	}
+
+	if( freq ) {
+		if( (freq_hz >= FREQ_MAX_HZ) || (freq_hz < FREQ_MIN_HZ) )
+		{
+			printf("argument error: set_freq_hz shall be between [%llu, %llu[.\n", FREQ_MIN_HZ, FREQ_MAX_HZ);
+			usage();
+			return EXIT_FAILURE;
+		}
+	}else
+	{
+		/* Use default freq */
+		freq_hz = DEFAULT_FREQ_HZ;
+	}
+
+	if( amp ) {
+		if( amp_enable > 1 )
+		{
+			printf("argument error: set_amp shall be 0 or 1.\n");
+			usage();
+			return EXIT_FAILURE;
+		}
+	}
+
+	if( sample_rate == false ) 
+	{
+		sample_rate_hz = DEFAULT_SAMPLE_RATE_HZ;
+	}
+
+	if( baseband_filter_bw )
+	{
+		/* Compute nearest freq for bw filter */
+		baseband_filter_bw_hz = hackrf_compute_baseband_filter_bw(baseband_filter_bw_hz);
+	}else
+	{
+		/* Compute default value depending on sample rate */
+		baseband_filter_bw_hz = hackrf_compute_baseband_filter_bw_round_down_lt(sample_rate_hz);
+	}
+
+	if (baseband_filter_bw_hz > BASEBAND_FILTER_BW_MAX) {
+		printf("argument error: baseband_filter_bw_hz must be less or equal to %u Hz/%.03f MHz\n",
+				BASEBAND_FILTER_BW_MAX, (float)(BASEBAND_FILTER_BW_MAX/FREQ_ONE_MHZ));
+		usage();
+		return EXIT_FAILURE;
+	}
+
+	if (baseband_filter_bw_hz < BASEBAND_FILTER_BW_MIN) {
+		printf("argument error: baseband_filter_bw_hz must be greater or equal to %u Hz/%.03f MHz\n",
+				BASEBAND_FILTER_BW_MIN, (float)(BASEBAND_FILTER_BW_MIN/FREQ_ONE_MHZ));
+		usage();
+		return EXIT_FAILURE;
+	}
+
+	if( (transmit == false) && (receive == receive_wav) )
+	{
+		printf("receive -r and receive_wav -w options are mutually exclusive\n");
+		usage();
+		return EXIT_FAILURE;
+	}
+	
+	if( receive_wav == false )
+	{
+		if( transmit == receive ) 
+		{
+			if( transmit == true ) 
+			{
+				printf("receive -r and transmit -t options are mutually exclusive\n");
+			} else
+			{
+				printf("specify either transmit -t or receive -r or receive_wav -w option\n");
+			}
+			usage();
+			return EXIT_FAILURE;
+		}
+	}
+	
+	if( receive ) {
+		transceiver_mode = TRANSCEIVER_MODE_RX;
+	}
+	
+	if( transmit ) {
+		transceiver_mode = TRANSCEIVER_MODE_TX;
+	}
+
+	if( receive_wav ) 
+	{
+		time (&rawtime);
+		timeinfo = localtime (&rawtime);
+		transceiver_mode = TRANSCEIVER_MODE_RX;
+		/* File format HackRF Year(2013), Month(11), Day(28), Hour Min Sec+Z, Freq kHz, IQ.wav */
+		strftime(date_time, DATE_TIME_MAX_LEN, "%Y%m%d_%H%M%S", timeinfo);
+		snprintf(path_file, PATH_FILE_MAX_LEN, "HackRF_%sZ_%ukHz_IQ.wav", date_time, (uint32_t)(freq_hz/(1000ull)) );
+		path = path_file;
+		printf("Receive wav file: %s\n", path);
+	}	
+
+	if( path == NULL ) {
+		printf("specify a path to a file to transmit/receive\n");
+		usage();
+		return EXIT_FAILURE;
+	}
+	
+	result = hackrf_init();
+	if( result != HACKRF_SUCCESS ) {
+		printf("hackrf_init() failed: %s (%d)\n", hackrf_error_name(result), result);
+		usage();
+		return EXIT_FAILURE;
+	}
+	
+	result = hackrf_open(&device);
+	if( result != HACKRF_SUCCESS ) {
+		printf("hackrf_open() failed: %s (%d)\n", hackrf_error_name(result), result);
+		usage();
+		return EXIT_FAILURE;
+	}
+	
+	if( transceiver_mode == TRANSCEIVER_MODE_RX ) 
+	{
+		fd = fopen(path, "wb");
+	} else {
+		fd = fopen(path, "rb");
+	}
+	
+	if( fd == NULL ) {
+		printf("Failed to open file: %s\n", path);
+		return EXIT_FAILURE;
+	}
+	/* Change fd buffer to have bigger one to store or read data on/to HDD */
+	result = setvbuf(fd , NULL , _IOFBF , FD_BUFFER_SIZE);
+	if( result != 0 ) {
+		printf("setvbuf() failed: %d\n", result);
+		usage();
+		return EXIT_FAILURE;
+	}
+	
+	/* Write Wav header */
+	if( receive_wav ) 
+	{
+		fwrite(&wave_file_hdr, 1, sizeof(t_wav_file_hdr), fd);
+	}
+	
+	signal(SIGINT, &sigint_callback_handler);
+	signal(SIGILL, &sigint_callback_handler);
+	signal(SIGFPE, &sigint_callback_handler);
+	signal(SIGSEGV, &sigint_callback_handler);
+	signal(SIGTERM, &sigint_callback_handler);
+	signal(SIGABRT, &sigint_callback_handler);
+
+	printf("call hackrf_sample_rate_set(%u Hz/%.03f MHz)\n", sample_rate_hz,((float)sample_rate_hz/(float)FREQ_ONE_MHZ));
+	result = hackrf_sample_rate_set(device, sample_rate_hz);
+	if( result != HACKRF_SUCCESS ) {
+		printf("hackrf_sample_rate_set() failed: %s (%d)\n", hackrf_error_name(result), result);
+		usage();
+		return EXIT_FAILURE;
+	}
+
+	printf("call hackrf_baseband_filter_bandwidth_set(%d Hz/%.03f MHz)\n",
+			baseband_filter_bw_hz, ((float)baseband_filter_bw_hz/(float)FREQ_ONE_MHZ));
+	result = hackrf_baseband_filter_bandwidth_set(device, baseband_filter_bw_hz);
+	if( result != HACKRF_SUCCESS ) {
+		printf("hackrf_baseband_filter_bandwidth_set() failed: %s (%d)\n", hackrf_error_name(result), result);
+		usage();
+		return EXIT_FAILURE;
+	}
+
+	if( transceiver_mode == TRANSCEIVER_MODE_RX ) {
+		result = hackrf_start_rx(device, rx_callback, NULL);
+	} else {
+		result = hackrf_start_tx(device, tx_callback, NULL);
+	}
+	if( result != HACKRF_SUCCESS ) {
+		printf("hackrf_start_?x() failed: %s (%d)\n", hackrf_error_name(result), result);
+		usage();
+		return EXIT_FAILURE;
+	}
+
+	printf("call hackrf_set_freq(%llu Hz/%.03f MHz)\n", freq_hz, ((float)freq_hz/(float)FREQ_ONE_MHZ) );
+	result = hackrf_set_freq(device, freq_hz);
+	if( result != HACKRF_SUCCESS ) {
+		printf("hackrf_set_freq() failed: %s (%d)\n", hackrf_error_name(result), result);
+		usage();
+		return EXIT_FAILURE;
+	}
+
+	if( amp ) {
+		printf("call hackrf_set_amp_enable(%u)\n", amp_enable);
+		result = hackrf_set_amp_enable(device, (uint8_t)amp_enable);
+		if( result != HACKRF_SUCCESS ) {
+			printf("hackrf_set_amp_enable() failed: %s (%d)\n", hackrf_error_name(result), result);
+			usage();
+			return EXIT_FAILURE;
+		}
+	}
+	
+	if( limit_num_samples ) {
+		printf("samples_to_xfer %llu/%lluMio\n", samples_to_xfer, (samples_to_xfer/FREQ_ONE_MHZ) );
+	}
+	
+	gettimeofday(&t_start, NULL);
+	gettimeofday(&time_start, NULL);
+
+	printf("Stop with Ctrl-C\n");
+	while( (hackrf_is_streaming(device) == HACKRF_TRUE) &&
+			(do_exit == false) ) 
+	{
+		sleep(1);
+		
+		struct timeval time_now;
+		gettimeofday(&time_now, NULL);
+		
+		uint32_t byte_count_now = byte_count;
+		byte_count = 0;
+		
+		const float time_difference = TimevalDiff(&time_now, &time_start);
+		const float rate = (float)byte_count_now / time_difference;
+		printf("%4.1f MiB / %5.3f sec = %4.1f MiB/second\n",
+				(byte_count_now / 1e6f), time_difference, (rate / 1e6f) );
+
+		time_start = time_now;
+
+		if (byte_count_now == 0) {
+			exit_code = EXIT_FAILURE;
+			printf("\nCouldn't transfer any bytes for one second.\n");
+			break;
+		}
+	}
+	
+	result = hackrf_is_streaming(device);	
+	if (do_exit)
+	{
+		printf("\nUser cancel, exiting...\n");
+	} else {
+		printf("\nExiting... hackrf_is_streaming() result: %s (%d)\n", hackrf_error_name(result), result);
+	}
 	
 	struct timeval t_end;
 	gettimeofday(&t_end, NULL);
@ -182,7 +614,6 @@ void sigint_callback_handler(int signum)
 	{
 		if( receive ) 
 		{
-			printf("hackrf_stop_rx \n");
 			result = hackrf_stop_rx(device);
 			if( result != HACKRF_SUCCESS ) {
 				printf("hackrf_stop_rx() failed: %s (%d)\n", hackrf_error_name(result), result);
@ -205,209 +636,33 @@ void sigint_callback_handler(int signum)
 		if( result != HACKRF_SUCCESS ) 
 		{
 			printf("hackrf_close() failed: %s (%d)\n", hackrf_error_name(result), result);
+		}else {
+			printf("hackrf_close() done\n");
 		}
 		
-		printf("hackrf_close() done\n");
-		
 		hackrf_exit();
+		printf("hackrf_exit() done\n");
 	}
 		
 	if(fd != NULL)
 	{
+		if( receive_wav ) 
+		{
+			/* Get size of file */
+			file_pos = ftell(fd);
+			/* Update Wav Header */
+			wave_file_hdr.hdr.size = file_pos+8;
+			wave_file_hdr.fmt_chunk.dwSamplesPerSec = sample_rate_hz;
+			wave_file_hdr.fmt_chunk.dwAvgBytesPerSec = wave_file_hdr.fmt_chunk.dwSamplesPerSec*2;
+			wave_file_hdr.data_chunk.chunkSize = file_pos - sizeof(t_wav_file_hdr);
+			/* Overwrite header with updated data */
+			rewind(fd);
+			fwrite(&wave_file_hdr, 1, sizeof(t_wav_file_hdr), fd);
+		}	
 		fclose(fd);
 		fd = NULL;
-		printf("fclose() file handle done\n");
+		printf("fclose(fd) done\n");
 	}
-	
-	printf("Exit\n");	
-	/* Terminate program */
-	exit(signum);
-}
-
-int main(int argc, char** argv) {
-	int opt;
-	const char* path = NULL;
-	int result;
-	
-	while( (opt = getopt(argc, argv, "r:t:f:a:")) != EOF ) {
-		result = HACKRF_SUCCESS;
-		switch( opt ) {
-		case 'r':
-			receive = true;
-			path = optarg;
-			break;
-		
-		case 't':
-			transmit = true;
-			path = optarg;
-			break;
-		
-		case 'f':
-			freq = true;
-			result = parse_u64(optarg, &freq_hz);
-			break;
-
-		case 'a':
-			amp = true;
-			result = parse_int(optarg, &amp_enable);
-			break;
-
-		default:
-			usage();
-			return EXIT_FAILURE;
-		}
-		
-		if( result != HACKRF_SUCCESS ) {
-			printf("argument error: %s (%d)\n", hackrf_error_name(result), result);
-			usage();
-			break;
-		}		
-	}
-
-	if( freq ) {
-		if( (freq_hz >= FREQ_MAX_HZ) || (freq_hz < FREQ_MIN_HZ) )
-		{
-			printf("argument error: set_freq_hz shall be between [%lld, %lld[.\n", FREQ_MIN_HZ, FREQ_MAX_HZ);
-			usage();
-			return EXIT_FAILURE;
-		}
-	}
-	
-	if( amp ) {
-		if( amp_enable > 1 )
-		{
-			printf("argument error: set_amp shall be 0 or 1.\n");
-			usage();
-			return EXIT_FAILURE;
-		}
-	}	
-	
-	if( transmit == receive ) 
-	{
-		if( transmit == true ) 
-		{
-			fprintf(stderr, "receive and transmit options are mutually exclusive\n");
-		} else {
-			fprintf(stderr, "specify either transmit or receive option\n");
-		}
-		usage();
-		return EXIT_FAILURE;
-	}
-
-	if( receive ) {
-		transceiver_mode = TRANSCEIVER_MODE_RX;
-	}
-	
-	if( transmit ) {
-		transceiver_mode = TRANSCEIVER_MODE_TX;
-	}
-	
-	if( path == NULL ) {
-		fprintf(stderr, "specify a path to a file to transmit/receive\n");
-		usage();
-		return EXIT_FAILURE;
-	}
-	
-	result = hackrf_init();
-	if( result != HACKRF_SUCCESS ) {
-		printf("hackrf_init() failed: %s (%d)\n", hackrf_error_name(result), result);
-		usage();
-		return EXIT_FAILURE;
-	}
-	
-	result = hackrf_open(&device);
-	if( result != HACKRF_SUCCESS ) {
-		printf("hackrf_open() failed: %s (%d)\n", hackrf_error_name(result), result);
-		return EXIT_FAILURE;
-	}
-	
-	if( transceiver_mode == TRANSCEIVER_MODE_RX ) 
-	{
-		fd = fopen(path, "wb");
-	} else {
-		fd = fopen(path, "rb");
-	}
-	
-	if( fd == NULL ) {
-		printf("Failed to open file: %s\n", path);
-		return EXIT_FAILURE;
-	}
-
-	signal(SIGINT, sigint_callback_handler);
-	
-	result = hackrf_sample_rate_set(device, 10000000);
-	if( result != HACKRF_SUCCESS ) {
-		printf("hackrf_sample_rate_set() failed: %s (%d)\n", hackrf_error_name(result), result);
-		return EXIT_FAILURE;
-	}
-	
-	result = hackrf_baseband_filter_bandwidth_set(device, 5000000);
-	if( result != HACKRF_SUCCESS ) {
-		printf("hackrf_baseband_filter_bandwidth_set() failed: %s (%d)\n", hackrf_error_name(result), result);
-		return EXIT_FAILURE;
-	}
-	
-	if( transceiver_mode == TRANSCEIVER_MODE_RX ) {
-		result = hackrf_start_rx(device, rx_callback);
-	} else {
-		result = hackrf_start_tx(device, tx_callback);
-	}
-	if( result != HACKRF_SUCCESS ) {
-		printf("hackrf_start_?x() failed: %s (%d)\n", hackrf_error_name(result), result);
-		return EXIT_FAILURE;
-	}
-
-	if( freq ) {
-		printf("call hackrf_set_freq(%lld Hz)\n", freq_hz);
-		result = hackrf_set_freq(device, freq_hz);
-		if( result != HACKRF_SUCCESS ) {
-			printf("hackrf_set_freq() failed: %s (%d)\n", hackrf_error_name(result), result);
-			return EXIT_FAILURE;
-		}
-	}
-
-	if( amp ) {
-		printf("call hackrf_set_amp_enable(%ld)\n", amp_enable);
-		result = hackrf_set_amp_enable(device, (uint8_t)amp_enable);
-		if( result != HACKRF_SUCCESS ) {
-			printf("hackrf_set_amp_enable() failed: %s (%d)\n", hackrf_error_name(result), result);
-			return EXIT_FAILURE;
-		}
-	}
-	
-	gettimeofday(&t_start, NULL);
-	gettimeofday(&time_start, NULL);
-
-	while( hackrf_is_streaming(device) ) 
-	{
-		sleep(1);
-		
-		struct timeval time_now;
-		gettimeofday(&time_now, NULL);
-		
-		uint32_t byte_count_now = byte_count;
-		byte_count = 0;
-		
-		const float time_difference = TimevalDiff(&time_now, &time_start);
-		const float rate = (float)byte_count_now / time_difference;
-		printf("%4.1f MiB / %5.3f sec = %4.1f MiB/second\n",
-				(byte_count_now / 1e6f), time_difference, (rate / 1e6f) );
-
-		time_start = time_now;
-	}
-
-	result = hackrf_close(device);
-	if( result != HACKRF_SUCCESS ) {
-		printf("hackrf_close() failed: %s (%d)\n", hackrf_error_name(result), result);
-		return -1;
-	}
-	
-	hackrf_exit();
-	
-	if(fd != NULL)
-	{
-		fclose(fd);
-	}
-
-	return EXIT_SUCCESS;
+	printf("exit\n");
+	return exit_code;
 }
--- a/host/libhackrf/src/CMakeLists.txt
+++ b/host/libhackrf/src/CMakeLists.txt
@ -25,6 +25,9 @@
 set(c_sources ${CMAKE_CURRENT_SOURCE_DIR}/hackrf.c CACHE INTERNAL "List of C sources")
 set(c_headers ${CMAKE_CURRENT_SOURCE_DIR}/hackrf.h CACHE INTERNAL "List of C headers")

+set_source_files_properties(hackrf.c PROPERTIES LANGUAGE CXX )
+set_source_files_properties(hackrf.h PROPERTIES LANGUAGE CXX )
+
 # Dynamic library
 add_library(hackrf SHARED ${c_sources})
 set_target_properties(hackrf PROPERTIES VERSION ${MAJOR_VERSION}.${MINOR_VERSION}.0 SOVERSION 0)
--- a/host/libhackrf/src/hackrf.c
+++ b/host/libhackrf/src/hackrf.c
--- a/host/libhackrf/src/hackrf.h
+++ b/host/libhackrf/src/hackrf.h
@ -26,14 +26,39 @@
 #include <stdint.h>
 #include <stdbool.h>

+#ifdef _WIN32
+   #define ADD_EXPORTS
+   
+  /* You should define ADD_EXPORTS *only* when building the DLL. */
+  #ifdef ADD_EXPORTS
+    #define ADDAPI __declspec(dllexport)
+  #else
+    #define ADDAPI __declspec(dllimport)
+  #endif
+
+  /* Define calling convention in one place, for convenience. */
+  #define ADDCALL __cdecl
+
+#else /* _WIN32 not defined. */
+
+  /* Define with no value on non-Windows OSes. */
+  #define ADDAPI
+  #define ADDCALL
+
+#endif
+
 enum hackrf_error {
 	HACKRF_SUCCESS = 0,
+	HACKRF_TRUE = 1,
 	HACKRF_ERROR_INVALID_PARAM = -2,
 	HACKRF_ERROR_NOT_FOUND = -5,
 	HACKRF_ERROR_BUSY = -6,
 	HACKRF_ERROR_NO_MEM = -11,
 	HACKRF_ERROR_LIBUSB = -1000,
 	HACKRF_ERROR_THREAD = -1001,
+	HACKRF_ERROR_STREAMING_THREAD_ERR = -1002,
+	HACKRF_ERROR_STREAMING_STOPPED = -1003,
+	HACKRF_ERROR_STREAMING_EXIT_CALLED = -1004,
 	HACKRF_ERROR_OTHER = -9999,
 };

@ -50,6 +75,8 @@ typedef struct {
 	uint8_t* buffer;
 	int buffer_length;
 	int valid_length;
+	void* rx_ctx;
+	void* tx_ctx;
 } hackrf_transfer;

 typedef struct {
@ -59,52 +86,63 @@ typedef struct {

 typedef int (*hackrf_sample_block_cb_fn)(hackrf_transfer* transfer);

-int hackrf_init();
-int hackrf_exit();
+#ifdef __cplusplus
+extern "C"
+{
+#endif

-int hackrf_open(hackrf_device** device);
-int hackrf_close(hackrf_device* device);
+extern ADDAPI int ADDCALL hackrf_init();
+extern ADDAPI int ADDCALL hackrf_exit();
 
-int hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback);
-int hackrf_stop_rx(hackrf_device* device);
+extern ADDAPI int ADDCALL hackrf_open(hackrf_device** device);
+extern ADDAPI int ADDCALL hackrf_close(hackrf_device* device);
 
-int hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback);
-int hackrf_stop_tx(hackrf_device* device);
+extern ADDAPI int ADDCALL hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx);
+extern ADDAPI int ADDCALL hackrf_stop_rx(hackrf_device* device);
 
-bool hackrf_is_streaming(hackrf_device* device);
+extern ADDAPI int ADDCALL hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* tx_ctx);
+extern ADDAPI int ADDCALL hackrf_stop_tx(hackrf_device* device);

-int hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value);
-int hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value);
+/* return HACKRF_TRUE if success */
+extern ADDAPI int ADDCALL hackrf_is_streaming(hackrf_device* device);
 
-int hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value);
-int hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value);
+extern ADDAPI int ADDCALL hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value);
+extern ADDAPI int ADDCALL hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value);
 
-int hackrf_sample_rate_set(hackrf_device* device, const uint32_t sampling_rate_hz);
-int hackrf_baseband_filter_bandwidth_set(hackrf_device* device, const uint32_t bandwidth_hz);
+extern ADDAPI int ADDCALL hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value);
+extern ADDAPI int ADDCALL hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value);
 
-int hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value);
-int hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value);
+extern ADDAPI int ADDCALL hackrf_sample_rate_set(hackrf_device* device, const uint32_t sampling_rate_hz);
+extern ADDAPI int ADDCALL hackrf_baseband_filter_bandwidth_set(hackrf_device* device, const uint32_t bandwidth_hz);
 
-int hackrf_spiflash_erase(hackrf_device* device);
-int hackrf_spiflash_write(hackrf_device* device, const uint32_t address,
-		const uint16_t length, unsigned char* const data);
-int hackrf_spiflash_read(hackrf_device* device, const uint32_t address,
-		const uint16_t length, unsigned char* data);
+extern ADDAPI int ADDCALL hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value);
+extern ADDAPI int ADDCALL hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value);
 
-int hackrf_cpld_write(hackrf_device* device, const uint16_t length,
-		unsigned char* const data);
+extern ADDAPI int ADDCALL hackrf_spiflash_erase(hackrf_device* device);
+extern ADDAPI int ADDCALL hackrf_spiflash_write(hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* const data);
+extern ADDAPI int ADDCALL hackrf_spiflash_read(hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* data);
     
-int hackrf_board_id_read(hackrf_device* device, uint8_t* value);
-int hackrf_version_string_read(hackrf_device* device, char* version,
-		uint8_t length);
+extern ADDAPI int ADDCALL hackrf_cpld_write(hackrf_device* device, const uint16_t length, unsigned char* const data);

-int hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz);
+extern ADDAPI int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value);
+extern ADDAPI int ADDCALL hackrf_version_string_read(hackrf_device* device, char* version, uint8_t length);

-int hackrf_set_amp_enable(hackrf_device* device, const uint8_t value);
+extern ADDAPI int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz);

-int hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno);
+extern ADDAPI int ADDCALL hackrf_set_amp_enable(hackrf_device* device, const uint8_t value);

-const char* hackrf_error_name(enum hackrf_error errcode);
-const char* hackrf_board_id_name(enum hackrf_board_id board_id);
+extern ADDAPI int ADDCALL hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno);
+
+extern ADDAPI const char* ADDCALL hackrf_error_name(enum hackrf_error errcode);
+extern ADDAPI const char* ADDCALL hackrf_board_id_name(enum hackrf_board_id board_id);
+
+/* Compute nearest freq for bw filter (manual filter) */
+extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt(const uint32_t bandwidth_hz);
+/* Compute best default value depending on sample rate (auto filter) */
+extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw(const uint32_t bandwidth_hz);
+
+#ifdef __cplusplus
+} // __cplusplus defined.
+#endif

 #endif//__HACKRF_H__