From fea87d8de53620e1b2581b8cd502c69a46d59faa Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Mon, 23 Jul 2012 15:35:44 -0600 Subject: [PATCH 1/7] sgpio-rx test firmware --- firmware/sgpio-rx/Makefile | 11 ++ firmware/sgpio-rx/README | 1 + firmware/sgpio-rx/sgpio-rx.c | 340 +++++++++++++++++++++++++++++++++++ firmware/sgpio-rx/table.py | 57 ++++++ 4 files changed, 409 insertions(+) create mode 100644 firmware/sgpio-rx/Makefile create mode 100644 firmware/sgpio-rx/README create mode 100644 firmware/sgpio-rx/sgpio-rx.c create mode 100644 firmware/sgpio-rx/table.py diff --git a/firmware/sgpio-rx/Makefile b/firmware/sgpio-rx/Makefile new file mode 100644 index 00000000..ac4d565c --- /dev/null +++ b/firmware/sgpio-rx/Makefile @@ -0,0 +1,11 @@ +# Hey Emacs, this is a -*- makefile -*- + +BINARY = sgpio-rx + +SRC = $(BINARY).c \ + ../common/hackrf_core.c \ + ../common/si5351c.c \ + ../common/max2837.c \ + ../common/max5864.c + +include ../common/Makefile_inc.mk diff --git a/firmware/sgpio-rx/README b/firmware/sgpio-rx/README new file mode 100644 index 00000000..6c8cfec5 --- /dev/null +++ b/firmware/sgpio-rx/README @@ -0,0 +1 @@ +This is a variation of sgpio.c for testing RX. diff --git a/firmware/sgpio-rx/sgpio-rx.c b/firmware/sgpio-rx/sgpio-rx.c new file mode 100644 index 00000000..b06f023e --- /dev/null +++ b/firmware/sgpio-rx/sgpio-rx.c @@ -0,0 +1,340 @@ +/* + * Copyright 2012 Michael Ossmann + * Copyright (C) 2012 Jared Boone + * + * This file is part of HackRF. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, Inc., 51 Franklin Street, + * Boston, MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +void pin_setup(void) { + /* Configure SCU Pin Mux as GPIO */ + scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED2, SCU_GPIO_FAST); + scu_pinmux(SCU_PINMUX_LED3, SCU_GPIO_FAST); + + scu_pinmux(SCU_PINMUX_EN1V8, SCU_GPIO_FAST); + + /* Configure all GPIO as Input (safe state) */GPIO0_DIR = 0; + GPIO1_DIR = 0; + GPIO2_DIR = 0; + GPIO3_DIR = 0; + GPIO4_DIR = 0; + GPIO5_DIR = 0; + GPIO6_DIR = 0; + GPIO7_DIR = 0; + + /* Configure GPIO2[1/2/8] (P4_1/2 P6_12) as output. */ + GPIO2_DIR |= (PIN_LED1 | PIN_LED2 | PIN_LED3); + + /* GPIO3[6] on P6_10 as output. */ + GPIO3_DIR |= PIN_EN1V8; + + /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ + scu_pinmux(SCU_SSP1_MISO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_MOSI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); + scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); + scu_pinmux(SCU_SSP1_SSEL, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); +} + +void enable_1v8_power() { + gpio_set(PORT_EN1V8, PIN_EN1V8); +} + +void release_cpld_jtag_pins() { + scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); + + GPIO_DIR(PORT_CPLD_TDO) &= ~PIN_CPLD_TDO; + GPIO_DIR(PORT_CPLD_TCK) &= ~PIN_CPLD_TCK; + GPIO_DIR(PORT_CPLD_TMS) &= ~PIN_CPLD_TMS; + GPIO_DIR(PORT_CPLD_TDI) &= ~PIN_CPLD_TDI; +} + +void configure_sgpio_pin_functions() { + scu_pinmux(SCU_PINMUX_SGPIO0, SCU_GPIO_FAST | SCU_CONF_FUNCTION3); + scu_pinmux(SCU_PINMUX_SGPIO1, SCU_GPIO_FAST | SCU_CONF_FUNCTION3); + scu_pinmux(SCU_PINMUX_SGPIO2, SCU_GPIO_FAST | SCU_CONF_FUNCTION2); + scu_pinmux(SCU_PINMUX_SGPIO3, SCU_GPIO_FAST | SCU_CONF_FUNCTION2); + scu_pinmux(SCU_PINMUX_SGPIO4, SCU_GPIO_FAST | SCU_CONF_FUNCTION2); + scu_pinmux(SCU_PINMUX_SGPIO5, SCU_GPIO_FAST | SCU_CONF_FUNCTION2); + scu_pinmux(SCU_PINMUX_SGPIO6, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_PINMUX_SGPIO7, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); + scu_pinmux(SCU_PINMUX_SGPIO8, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); + scu_pinmux(SCU_PINMUX_SGPIO9, SCU_GPIO_FAST | SCU_CONF_FUNCTION7); + scu_pinmux(SCU_PINMUX_SGPIO10, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); + scu_pinmux(SCU_PINMUX_SGPIO11, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); + scu_pinmux(SCU_PINMUX_SGPIO12, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); + scu_pinmux(SCU_PINMUX_SGPIO13, SCU_GPIO_FAST | SCU_CONF_FUNCTION7); + scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION7); + scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION7); +} + +void test_sgpio_interface() { + const uint_fast8_t host_clock_sgpio_pin = 8; // Input + const uint_fast8_t host_capture_sgpio_pin = 9; // Input + const uint_fast8_t host_disable_sgpio_pin = 10; // Output + const uint_fast8_t host_direction_sgpio_pin = 11; // Output + + SGPIO_GPIO_OENREG = 0; // All inputs for the moment. + + // Disable all counters during configuration + SGPIO_CTRL_ENABLE = 0; + + configure_sgpio_pin_functions(); + + // Make all SGPIO controlled by SGPIO's "GPIO" registers + for (uint_fast8_t i = 0; i < 16; i++) { + SGPIO_OUT_MUX_CFG(i) = (0L << 4) | (4L << 0); + } + + // Set SGPIO output values. + SGPIO_GPIO_OUTREG = (1L << host_direction_sgpio_pin) + | (1L << host_disable_sgpio_pin); + + // Enable SGPIO pin outputs. + SGPIO_GPIO_OENREG = (1L << host_direction_sgpio_pin) + | (1L << host_disable_sgpio_pin) | (0L << host_capture_sgpio_pin) + | (0L << host_clock_sgpio_pin) | (0xFF << 0); + + // Configure SGPIO slices. + + // Enable codec data stream. + SGPIO_GPIO_OUTREG &= ~(1L << host_disable_sgpio_pin); + + while (1) { + for (uint_fast8_t i = 0; i < 8; i++) { + SGPIO_GPIO_OUTREG ^= (1L << i); + } + } +} + +void configure_sgpio_test_tx() { + // Disable all counters during configuration + SGPIO_CTRL_ENABLE = 0; + + configure_sgpio_pin_functions(); + + // Set SGPIO output values. + SGPIO_GPIO_OUTREG = + (1L << 11) | // direction + (1L << 10); // disable + + // Enable SGPIO pin outputs. + SGPIO_GPIO_OENREG = + (1L << 11) | // direction: TX: data to CPLD + (1L << 10) | // disable + (0L << 9) | // capture + (0L << 8) | // clock + 0xFF; // data: output + + SGPIO_OUT_MUX_CFG( 8) = 0; // SGPIO: Input: clock + SGPIO_OUT_MUX_CFG( 9) = 0; // SGPIO: Input: qualifier + SGPIO_OUT_MUX_CFG(10) = (0L << 4) | (4L << 0); // GPIO: Output: disable + SGPIO_OUT_MUX_CFG(11) = (0L << 4) | (4L << 0); // GPIO: Output: direction + + for(uint_fast8_t i=0; i<8; i++) { + // SGPIO pin 0 outputs slice A bit "i". + SGPIO_OUT_MUX_CFG(i) = + (0L << 4) | // P_OE_CFG = 0 + (9L << 0); // P_OUT_CFG = 9, dout_doutm8a (8-bit mode 8a) + } + + // Slice A + SGPIO_MUX_CFG(SGPIO_SLICE_A) = + (0L << 12) | // CONCAT_ORDER = 0 (self-loop) + (1L << 11) | // CONCAT_ENABLE = 1 (concatenate data) + (0L << 9) | // QUALIFIER_SLICE_MODE = X + (1L << 7) | // QUALIFIER_PIN_MODE = 1 (SGPIO9) + (3L << 5) | // QUALIFIER_MODE = 3 (external SGPIO pin) + (0L << 3) | // CLK_SOURCE_SLICE_MODE = X + (0L << 1) | // CLK_SOURCE_PIN_MODE = 0 (SGPIO8) + (1L << 0); // EXT_CLK_ENABLE = 1, external clock signal (slice) + + SGPIO_SLICE_MUX_CFG(SGPIO_SLICE_A) = + (0L << 8) | // INV_QUALIFIER = 0 (use normal qualifier) + (3L << 6) | // PARALLEL_MODE = 3 (shift 8 bits per clock) + (0L << 4) | // DATA_CAPTURE_MODE = 0 (detect rising edge) + (0L << 3) | // INV_OUT_CLK = 0 (normal clock) + (1L << 2) | // CLKGEN_MODE = 1 (use external pin clock) + (0L << 1) | // CLK_CAPTURE_MODE = 0 (use rising clock edge) + (0L << 0); // MATCH_MODE = 0 (do not match data) + + SGPIO_PRESET(SGPIO_SLICE_A) = 0; + SGPIO_COUNT(SGPIO_SLICE_A) = 0; + SGPIO_POS(SGPIO_SLICE_A) = (0x3L << 8) | (0x3L << 0); + SGPIO_REG(SGPIO_SLICE_A) = 0x80808080; // Primary output data register + SGPIO_REG_SS(SGPIO_SLICE_A) = 0x80808080; // Shadow output data register + + // Start SGPIO operation by enabling slice clocks. + SGPIO_CTRL_ENABLE = + (1L << SGPIO_SLICE_A) + ; + + // LSB goes out first, samples are 0x + volatile uint32_t buffer[] = { + 0xda808080, + 0xda80ff80, + 0x26808080, + 0x26800180, + }; + uint32_t i = 0; + + // Enable codec data stream. + SGPIO_GPIO_OUTREG &= ~(1L << 10); + + while(true) { + while(SGPIO_STATUS_1 == 0); + SGPIO_REG_SS(SGPIO_SLICE_A) = buffer[(i++) & 3]; + SGPIO_CLR_STATUS_1 = 1; + } +} + +void configure_sgpio_test_rx() { + // Disable all counters during configuration + SGPIO_CTRL_ENABLE = 0; + + configure_sgpio_pin_functions(); + + // Set SGPIO output values. + SGPIO_GPIO_OUTREG = + (0L << 11) | // direction + (1L << 10); // disable + + // Enable SGPIO pin outputs. + SGPIO_GPIO_OENREG = + (1L << 11) | // direction: RX: data from CPLD + (1L << 10) | // disable + (0L << 9) | // capture + (0L << 8) | // clock + 0x00; // data: input + + SGPIO_OUT_MUX_CFG( 8) = 0; // SGPIO: Input: clock + SGPIO_OUT_MUX_CFG( 9) = 0; // SGPIO: Input: qualifier + SGPIO_OUT_MUX_CFG(10) = (0L << 4) | (4L << 0); // GPIO: Output: disable + SGPIO_OUT_MUX_CFG(11) = (0L << 4) | (4L << 0); // GPIO: Output: direction + + for(uint_fast8_t i=0; i<8; i++) { + SGPIO_OUT_MUX_CFG(i) = + (0L << 4) | // P_OE_CFG = 0 + (9L << 0); // P_OUT_CFG = 9, dout_doutm8a (8-bit mode 8a) + } + + // Slice A + SGPIO_MUX_CFG(SGPIO_SLICE_A) = + (0L << 12) | // CONCAT_ORDER = X + (0L << 11) | // CONCAT_ENABLE = 0 (concatenate data) + (0L << 9) | // QUALIFIER_SLICE_MODE = X + (1L << 7) | // QUALIFIER_PIN_MODE = 1 (SGPIO9) + (3L << 5) | // QUALIFIER_MODE = 3 (external SGPIO pin) + (0L << 3) | // CLK_SOURCE_SLICE_MODE = X + (0L << 1) | // CLK_SOURCE_PIN_MODE = 0 (SGPIO8) + (1L << 0); // EXT_CLK_ENABLE = 1, external clock signal (slice) + + SGPIO_SLICE_MUX_CFG(SGPIO_SLICE_A) = + (0L << 8) | // INV_QUALIFIER = 0 (use normal qualifier) + (3L << 6) | // PARALLEL_MODE = 3 (shift 8 bits per clock) + (0L << 4) | // DATA_CAPTURE_MODE = 0 (detect rising edge) + (0L << 3) | // INV_OUT_CLK = X + (1L << 2) | // CLKGEN_MODE = 1 (use external pin clock) + (0L << 1) | // CLK_CAPTURE_MODE = 0 (use rising clock edge) + (0L << 0); // MATCH_MODE = 0 (do not match data) + + SGPIO_PRESET(SGPIO_SLICE_A) = 0; + SGPIO_COUNT(SGPIO_SLICE_A) = 0; + SGPIO_POS(SGPIO_SLICE_A) = (0x3L << 8) | (0x3L << 0); + SGPIO_REG(SGPIO_SLICE_A) = 0xCAFEBABE; // Primary output data register + SGPIO_REG_SS(SGPIO_SLICE_A) = 0xDEADBEEF; // Shadow output data register + + // Start SGPIO operation by enabling slice clocks. + SGPIO_CTRL_ENABLE = (1L << SGPIO_SLICE_A); + + volatile uint32_t buffer[4096]; + uint32_t i = 0; + int16_t magsq; + int8_t sigi, sigq; + + // Enable codec data stream. + SGPIO_GPIO_OUTREG &= ~(1L << 10); + + gpio_set(PORT_LED1_3, (PIN_LED2)); /* LED2 on */ + while(true) { + while(SGPIO_STATUS_1 == 0); + gpio_set(PORT_LED1_3, (PIN_LED1)); /* LED1 on */ + SGPIO_CLR_STATUS_1 = 1; + buffer[i & 4095] = SGPIO_REG_SS(SGPIO_SLICE_A); + + /* find the magnitude squared */ + sigi = (buffer[i & 4095] & 0xff) - 0x80; + sigq = ((buffer[i & 4095] >> 8) & 0xff) - 0x80; + magsq = sigi * sigq; + if ((uint16_t)magsq & 0x8000) { + magsq ^= 0xffff; + magsq++; + } + + /* illuminate LED3 only when magsq exceeds threshold */ + if (magsq > 0x3c00) + gpio_set(PORT_LED1_3, (PIN_LED3)); /* LED3 on */ + else + gpio_clear(PORT_LED1_3, (PIN_LED3)); /* LED3 off */ + i++; + } +} + +int main(void) { + + const uint32_t freq = 2483000000U; + + pin_setup(); + enable_1v8_power(); + cpu_clock_init(); + ssp1_init(); + + ssp1_set_mode_max2837(); + max2837_setup(); + max2837_set_frequency(freq); + max2837_start(); + max2837_rx(); + + CGU_BASE_PERIPH_CLK = (CGU_BASE_CLK_AUTOBLOCK + | (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT)); + + CGU_BASE_APB1_CLK = (CGU_BASE_CLK_AUTOBLOCK + | (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT)); + + ssp1_set_mode_max5864(); + max5864_xcvr(); + configure_sgpio_test_rx(); + + while (1) { + + } + + return 0; +} diff --git a/firmware/sgpio-rx/table.py b/firmware/sgpio-rx/table.py new file mode 100644 index 00000000..b7319a2c --- /dev/null +++ b/firmware/sgpio-rx/table.py @@ -0,0 +1,57 @@ +mossmann@grumio ~/github/hackrf/firmware/simpletx $ python +Python 2.7.3 (default, Jun 22 2012, 11:10:47) +[GCC 4.5.3] on linux2 +Type "help", "copyright", "credits" or "license" for more information. +>>> import math +>>> def y(i,max): +... return int(127.5*(math.sin(tau*i/max)+1)) +... +>>> tau=math.pi*2 +>>> def x(i,max): +... return int(127.5*(math.cos(tau*i/max)+1)) +... +>>> def table(max): +... for i in range(0, max, 2): +... print "%02x%02x%02x%02x," % (y(i+1,max), x(i+1,max), y(i,max), x(i,max)) +... +>>> table(32) +98fc7fff, +c6e9b0f5, +e9c6d9d9, +fc98f5b0, +fc66ff7f, +e938f54e, +c615d925, +9802b009, +66027f00, +38154e09, +15382525, +0266094e, +0298007f, +15c609b0, +38e925d9, +66fc4ef5, + + +>>> def table(max): +... for i in range(0, max, 2): +... print "0x%02x%02x%02x%02x," % (y(i+1,max), x(i+1,max), y(i,max), x(i,max)) +... +>>> table(32) +0x98fc7fff, +0xc6e9b0f5, +0xe9c6d9d9, +0xfc98f5b0, +0xfc66ff7f, +0xe938f54e, +0xc615d925, +0x9802b009, +0x66027f00, +0x38154e09, +0x15382525, +0x0266094e, +0x0298007f, +0x15c609b0, +0x38e925d9, +0x66fc4ef5, + From 18587e37322c8e232633166aeff6a977503bf617 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Tue, 24 Jul 2012 12:45:46 -0700 Subject: [PATCH 2/7] Change all IO on CPLD to LVCMOS33 until we make the move to 1V8 supplies on the MAX5864 and Si5351C. --- hardware/jellybean/sgpio_if/top.ucf | 58 ++++++++++++++--------------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/hardware/jellybean/sgpio_if/top.ucf b/hardware/jellybean/sgpio_if/top.ucf index a593ec52..0f733498 100755 --- a/hardware/jellybean/sgpio_if/top.ucf +++ b/hardware/jellybean/sgpio_if/top.ucf @@ -18,41 +18,41 @@ # the Free Software Foundation, Inc., 51 Franklin Street, # Boston, MA 02110-1301, USA. -NET "CODEC_CLK" LOC="23" |FAST |IOSTANDARD=LVCMOS18; -NET "CODEC_X2_CLK" LOC="27" |FAST |IOSTANDARD=LVCMOS18; -#NET "GCLK0" LOC="22" |FAST |IOSTANDARD=LVCMOS18; +NET "CODEC_CLK" LOC="23" |FAST |IOSTANDARD=LVCMOS33; +NET "CODEC_X2_CLK" LOC="27" |FAST |IOSTANDARD=LVCMOS33; +#NET "GCLK0" LOC="22" |FAST |IOSTANDARD=LVCMOS33; NET "CODEC_X2_CLK" TNM_NET = CODEC_X2_CLK; TIMESPEC TS_codec_x2_data = PERIOD "CODEC_X2_CLK" 50 ns; -NET "DA<7>" LOC="35" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<6>" LOC="36" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<5>" LOC="37" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<4>" LOC="39" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<3>" LOC="40" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<2>" LOC="41" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<1>" LOC="42" |FAST |IOSTANDARD=LVCMOS18; -NET "DA<0>" LOC="43" |FAST |IOSTANDARD=LVCMOS18; +NET "DA<7>" LOC="35" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<6>" LOC="36" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<5>" LOC="37" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<4>" LOC="39" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<3>" LOC="40" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<2>" LOC="41" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<1>" LOC="42" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<0>" LOC="43" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<9>" LOC="17" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<8>" LOC="18" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<7>" LOC="19" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<6>" LOC="24" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<5>" LOC="28" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<4>" LOC="29" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<3>" LOC="30" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<2>" LOC="32" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<1>" LOC="33" |FAST |IOSTANDARD=LVCMOS18; -NET "DD<0>" LOC="34" |FAST |IOSTANDARD=LVCMOS18; +NET "DD<9>" LOC="17" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<8>" LOC="18" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<7>" LOC="19" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<6>" LOC="24" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<5>" LOC="28" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<4>" LOC="29" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<3>" LOC="30" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<2>" LOC="32" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<1>" LOC="33" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<0>" LOC="34" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<16>" LOC="60" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<15>" LOC="58" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<14>" LOC="56" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<13>" LOC="55" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<12>" LOC="53" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<11>" LOC="52" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<10>" LOC="50" |FAST |IOSTANDARD=LVCMOS18; -NET "B1AUX<9>" LOC="49" |FAST |IOSTANDARD=LVCMOS18; +NET "B1AUX<16>" LOC="60" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<15>" LOC="58" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<14>" LOC="56" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<13>" LOC="55" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<12>" LOC="53" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<11>" LOC="52" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<10>" LOC="50" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<9>" LOC="49" |FAST |IOSTANDARD=LVCMOS33; #NET "SGPIO<15>" LOC="78" |FAST |IOSTANDARD=LVCMOS33; #NET "SGPIO<14>" LOC="81" |FAST |IOSTANDARD=LVCMOS33; From 5ab31b84e0b8b4cf29d13b031db4115e0d9378d4 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Tue, 24 Jul 2012 12:48:08 -0700 Subject: [PATCH 3/7] Remove FAST attribute from all CPLD I/O, since it changes slew rate by less than 1ns -- not enough to be important at 20MHz or so. Will re-examine later, if we try to push bus speed higher on the final board rev. --- hardware/jellybean/sgpio_if/top.ucf | 122 ++++++++++++++-------------- 1 file changed, 61 insertions(+), 61 deletions(-) diff --git a/hardware/jellybean/sgpio_if/top.ucf b/hardware/jellybean/sgpio_if/top.ucf index 0f733498..9e9387c5 100755 --- a/hardware/jellybean/sgpio_if/top.ucf +++ b/hardware/jellybean/sgpio_if/top.ucf @@ -18,75 +18,75 @@ # the Free Software Foundation, Inc., 51 Franklin Street, # Boston, MA 02110-1301, USA. -NET "CODEC_CLK" LOC="23" |FAST |IOSTANDARD=LVCMOS33; -NET "CODEC_X2_CLK" LOC="27" |FAST |IOSTANDARD=LVCMOS33; -#NET "GCLK0" LOC="22" |FAST |IOSTANDARD=LVCMOS33; +NET "CODEC_CLK" LOC="23" |IOSTANDARD=LVCMOS33; +NET "CODEC_X2_CLK" LOC="27" |IOSTANDARD=LVCMOS33; +#NET "GCLK0" LOC="22" |IOSTANDARD=LVCMOS33; NET "CODEC_X2_CLK" TNM_NET = CODEC_X2_CLK; TIMESPEC TS_codec_x2_data = PERIOD "CODEC_X2_CLK" 50 ns; -NET "DA<7>" LOC="35" |FAST |IOSTANDARD=LVCMOS33; -NET "DA<6>" LOC="36" |FAST |IOSTANDARD=LVCMOS33; -NET "DA<5>" LOC="37" |FAST |IOSTANDARD=LVCMOS33; -NET "DA<4>" LOC="39" |FAST |IOSTANDARD=LVCMOS33; -NET "DA<3>" LOC="40" |FAST |IOSTANDARD=LVCMOS33; -NET "DA<2>" LOC="41" |FAST |IOSTANDARD=LVCMOS33; -NET "DA<1>" LOC="42" |FAST |IOSTANDARD=LVCMOS33; -NET "DA<0>" LOC="43" |FAST |IOSTANDARD=LVCMOS33; +NET "DA<7>" LOC="35" |IOSTANDARD=LVCMOS33; +NET "DA<6>" LOC="36" |IOSTANDARD=LVCMOS33; +NET "DA<5>" LOC="37" |IOSTANDARD=LVCMOS33; +NET "DA<4>" LOC="39" |IOSTANDARD=LVCMOS33; +NET "DA<3>" LOC="40" |IOSTANDARD=LVCMOS33; +NET "DA<2>" LOC="41" |IOSTANDARD=LVCMOS33; +NET "DA<1>" LOC="42" |IOSTANDARD=LVCMOS33; +NET "DA<0>" LOC="43" |IOSTANDARD=LVCMOS33; -NET "DD<9>" LOC="17" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<8>" LOC="18" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<7>" LOC="19" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<6>" LOC="24" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<5>" LOC="28" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<4>" LOC="29" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<3>" LOC="30" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<2>" LOC="32" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<1>" LOC="33" |FAST |IOSTANDARD=LVCMOS33; -NET "DD<0>" LOC="34" |FAST |IOSTANDARD=LVCMOS33; +NET "DD<9>" LOC="17" |IOSTANDARD=LVCMOS33; +NET "DD<8>" LOC="18" |IOSTANDARD=LVCMOS33; +NET "DD<7>" LOC="19" |IOSTANDARD=LVCMOS33; +NET "DD<6>" LOC="24" |IOSTANDARD=LVCMOS33; +NET "DD<5>" LOC="28" |IOSTANDARD=LVCMOS33; +NET "DD<4>" LOC="29" |IOSTANDARD=LVCMOS33; +NET "DD<3>" LOC="30" |IOSTANDARD=LVCMOS33; +NET "DD<2>" LOC="32" |IOSTANDARD=LVCMOS33; +NET "DD<1>" LOC="33" |IOSTANDARD=LVCMOS33; +NET "DD<0>" LOC="34" |IOSTANDARD=LVCMOS33; -NET "B1AUX<16>" LOC="60" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<15>" LOC="58" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<14>" LOC="56" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<13>" LOC="55" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<12>" LOC="53" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<11>" LOC="52" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<10>" LOC="50" |FAST |IOSTANDARD=LVCMOS33; -NET "B1AUX<9>" LOC="49" |FAST |IOSTANDARD=LVCMOS33; +NET "B1AUX<16>" LOC="60" |IOSTANDARD=LVCMOS33; +NET "B1AUX<15>" LOC="58" |IOSTANDARD=LVCMOS33; +NET "B1AUX<14>" LOC="56" |IOSTANDARD=LVCMOS33; +NET "B1AUX<13>" LOC="55" |IOSTANDARD=LVCMOS33; +NET "B1AUX<12>" LOC="53" |IOSTANDARD=LVCMOS33; +NET "B1AUX<11>" LOC="52" |IOSTANDARD=LVCMOS33; +NET "B1AUX<10>" LOC="50" |IOSTANDARD=LVCMOS33; +NET "B1AUX<9>" LOC="49" |IOSTANDARD=LVCMOS33; -#NET "SGPIO<15>" LOC="78" |FAST |IOSTANDARD=LVCMOS33; -#NET "SGPIO<14>" LOC="81" |FAST |IOSTANDARD=LVCMOS33; -#NET "SGPIO<13>" LOC="90" |FAST |IOSTANDARD=LVCMOS33; -#NET "SGPIO<12>" LOC="70" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DIRECTION" LOC="71" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DISABLE" LOC="76" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_CAPTURE" LOC="91" |FAST |IOSTANDARD=LVCMOS33; -#NET "HOST_CLK" LOC="68" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<7>" LOC="77" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<6>" LOC="61" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<5>" LOC="64" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<4>" LOC="67" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<3>" LOC="72" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<2>" LOC="74" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<1>" LOC="79" |FAST |IOSTANDARD=LVCMOS33; -NET "HOST_DATA<0>" LOC="89" |FAST |IOSTANDARD=LVCMOS33; +#NET "SGPIO<15>" LOC="78" |IOSTANDARD=LVCMOS33; +#NET "SGPIO<14>" LOC="81" |IOSTANDARD=LVCMOS33; +#NET "SGPIO<13>" LOC="90" |IOSTANDARD=LVCMOS33; +#NET "SGPIO<12>" LOC="70" |IOSTANDARD=LVCMOS33; +NET "HOST_DIRECTION" LOC="71" |IOSTANDARD=LVCMOS33; +NET "HOST_DISABLE" LOC="76" |IOSTANDARD=LVCMOS33; +NET "HOST_CAPTURE" LOC="91" |IOSTANDARD=LVCMOS33; +#NET "HOST_CLK" LOC="68" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<7>" LOC="77" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<6>" LOC="61" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<5>" LOC="64" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<4>" LOC="67" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<3>" LOC="72" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<2>" LOC="74" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<1>" LOC="79" |IOSTANDARD=LVCMOS33; +NET "HOST_DATA<0>" LOC="89" |IOSTANDARD=LVCMOS33; -NET "B2AUX<16>" LOC="92" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<15>" LOC="94" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<14>" LOC="97" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<13>" LOC="99" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<12>" LOC="1" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<11>" LOC="2" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<10>" LOC="3" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<9>" LOC="4" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<8>" LOC="6" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<7>" LOC="7" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<6>" LOC="8" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<5>" LOC="9" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<4>" LOC="10" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<3>" LOC="11" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<2>" LOC="12" |FAST |IOSTANDARD=LVCMOS33; -NET "B2AUX<1>" LOC="13" |FAST |IOSTANDARD=LVCMOS33; +NET "B2AUX<16>" LOC="92" |IOSTANDARD=LVCMOS33; +NET "B2AUX<15>" LOC="94" |IOSTANDARD=LVCMOS33; +NET "B2AUX<14>" LOC="97" |IOSTANDARD=LVCMOS33; +NET "B2AUX<13>" LOC="99" |IOSTANDARD=LVCMOS33; +NET "B2AUX<12>" LOC="1" |IOSTANDARD=LVCMOS33; +NET "B2AUX<11>" LOC="2" |IOSTANDARD=LVCMOS33; +NET "B2AUX<10>" LOC="3" |IOSTANDARD=LVCMOS33; +NET "B2AUX<9>" LOC="4" |IOSTANDARD=LVCMOS33; +NET "B2AUX<8>" LOC="6" |IOSTANDARD=LVCMOS33; +NET "B2AUX<7>" LOC="7" |IOSTANDARD=LVCMOS33; +NET "B2AUX<6>" LOC="8" |IOSTANDARD=LVCMOS33; +NET "B2AUX<5>" LOC="9" |IOSTANDARD=LVCMOS33; +NET "B2AUX<4>" LOC="10" |IOSTANDARD=LVCMOS33; +NET "B2AUX<3>" LOC="11" |IOSTANDARD=LVCMOS33; +NET "B2AUX<2>" LOC="12" |IOSTANDARD=LVCMOS33; +NET "B2AUX<1>" LOC="13" |IOSTANDARD=LVCMOS33; INST "DA<0>" TNM=adc_data; INST "DA<1>" TNM=adc_data; From 4878be8213874bbbe781e57cc52b95fb47bacc03 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Tue, 24 Jul 2012 13:27:19 -0700 Subject: [PATCH 4/7] New .svf to reflect slew rate and IO standard changes in prior commits. Changed name of .svf file to "default.svf" to match what ISE iMPACT wants to write out from "One Step SVF" (a.k.a. "Expresssvf"). --- .../sgpio_if/{sgpio_if.svf => default.svf} | 983 +----------------- hardware/jellybean/sgpio_if/program | 2 +- 2 files changed, 14 insertions(+), 971 deletions(-) rename hardware/jellybean/sgpio_if/{sgpio_if.svf => default.svf} (53%) diff --git a/hardware/jellybean/sgpio_if/sgpio_if.svf b/hardware/jellybean/sgpio_if/default.svf similarity index 53% rename from hardware/jellybean/sgpio_if/sgpio_if.svf rename to hardware/jellybean/sgpio_if/default.svf index afe8e3a2..5e1f0422 100755 --- a/hardware/jellybean/sgpio_if/sgpio_if.svf +++ b/hardware/jellybean/sgpio_if/default.svf @@ -1,5 +1,5 @@ // Created using Xilinx Cse Software [ISE - 13.4] -// Date: Thu Jun 14 19:14:18 2012 +// Date: Tue Jul 24 12:55:56 2012 TRST OFF; ENDIR IDLE; @@ -7,7 +7,6 @@ ENDDR IDLE; STATE RESET; STATE IDLE; FREQUENCY 1E6 HZ; -//Operation: Erase -p 0 TIR 0 ; HIR 0 ; TDR 0 ; @@ -40,86 +39,13 @@ SIR 8 TDI (01) ; SDR 32 TDI (00000000) TDO (f6e5f093) ; //Check for Read/Write Protect. SIR 8 TDI (ff) TDO (01) MASK (03) ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -// Loading devices with 'enable' or 'bypass' instruction. -SIR 8 TDI (e8) ; -// Loading devices with 'erase' or 'bypass' instruction. -ENDIR IRPAUSE; -SIR 8 TDI (ed) SMASK (ff) ; -ENDIR IDLE; -STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRPAUSE; -RUNTEST DRPAUSE 20 TCK; -STATE IDLE; -RUNTEST IDLE 100000 TCK; -STATE DRPAUSE; -RUNTEST DRPAUSE 5000 TCK; -RUNTEST IDLE 1 TCK; -// Loading devices with 'init' or 'bypass' instruction. -ENDIR IRPAUSE; -SIR 8 TDI (f0) SMASK (ff) ; -STATE IDLE; -RUNTEST IDLE 20 TCK; -// Loading devices with 'init' or 'bypass' instruction. -ENDIR IRPAUSE; -SIR 8 TDI (f0) SMASK (ff) ; -STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE; -RUNTEST 800 TCK; -ENDIR IDLE; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (c0) ; -RUNTEST 100 TCK; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (c0) ; -RUNTEST 100 TCK; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; +//Loading device with 'bypass' instruction. SIR 8 TDI (ff) ; -SDR 1 TDI (00) SMASK (01) ; -//Operation: Program -p 0 -e -v -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -//Loading device with 'idcode' instruction. -SIR 8 TDI (01) ; -SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f6e5f093) MASK (0fff8fff) ; -//Check for Read/Write Protect. -SIR 8 TDI (ff) TDO (01) MASK (03) ; -//Boundary Scan Chain Contents -//Position 1: xc2c64a -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -//Loading device with 'idcode' instruction. -SIR 8 TDI (01) ; -SDR 32 TDI (00000000) TDO (f6e5f093) ; -//Check for Read/Write Protect. -SIR 8 TDI (ff) TDO (01) MASK (03) ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -// Loading devices with 'enable' or 'bypass' instruction. +//Loading device with 'enable' instruction. SIR 8 TDI (e8) ; -// Loading devices with 'erase' or 'bypass' instruction. +//Loading device with 'enable' instruction. +SIR 8 TDI (e8) ; +// Loading device with a 'erase' instruction. ENDIR IRPAUSE; SIR 8 TDI (ed) SMASK (ff) ; ENDIR IDLE; @@ -129,28 +55,22 @@ STATE IDLE; RUNTEST IDLE 100000 TCK; STATE DRPAUSE; RUNTEST DRPAUSE 5000 TCK; -RUNTEST IDLE 1 TCK; -// Loading devices with 'init' or 'bypass' instruction. ENDIR IRPAUSE; SIR 8 TDI (f0) SMASK (ff) ; STATE IDLE; RUNTEST IDLE 20 TCK; -// Loading devices with 'init' or 'bypass' instruction. ENDIR IRPAUSE; SIR 8 TDI (f0) SMASK (ff) ; STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE; RUNTEST 800 TCK; ENDIR IDLE; -// Loading devices with 'conld' or 'bypass' instruction. +//Loading device with 'conld' instruction. SIR 8 TDI (c0) ; -RUNTEST 100 TCK; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (c0) ; -RUNTEST 100 TCK; -// Loading devices with 'enable' or 'bypass' instruction. +RUNTEST IDLE 100 TCK; +//Loading device with 'enable' instruction. SIR 8 TDI (e8) ; -// Programming. -// Loading devices with 'program' instruction. +// Programming. +// Loading device with a 'program' instruction. ENDIR IRPAUSE; SIR 8 TDI (ea) ; SDR 281 TDI (0003c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) SMASK (01ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; @@ -200,7 +120,7 @@ SDR 281 TDI (01f3c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff RUNTEST 10000 TCK; SDR 281 TDI (0172f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) ; RUNTEST 10000 TCK; -SDR 281 TDI (007201ffffffffffffffffffffffffffffffe5e7fffffffffffffffffffffffffffffe7c) ; +SDR 281 TDI (007201ffffffffffffffffffffffffffffffe587fffffffffffffffffffffffffffffe7c) ; RUNTEST 10000 TCK; SDR 281 TDI (0053c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) ; RUNTEST 10000 TCK; @@ -350,27 +270,14 @@ SDR 281 TDI (0017fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff RUNTEST 10000 TCK; SDR 281 TDI (0117ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; RUNTEST 10000 TCK; -// Loading devices with 'init' or 'bypass' instruction. -ENDIR IRPAUSE; SIR 8 TDI (f0) SMASK (ff) ; STATE IDLE; RUNTEST IDLE 20 TCK; -// Loading devices with 'init' or 'bypass' instruction. ENDIR IRPAUSE; SIR 8 TDI (f0) SMASK (ff) ; STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE; RUNTEST 800 TCK; ENDIR IDLE; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (c0) ; -RUNTEST 100 TCK; -// Loading devices with 'conld' or 'bypass' instruction. -SIR 8 TDI (c0) ; -RUNTEST 100 TCK; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; //Loading device with 'enable' instruction. SIR 8 TDI (e8) ; //Loading device with 'enable' instruction. @@ -569,7 +476,7 @@ SDR 7 TDI (1c) SMASK (7f) ; RUNTEST DRPAUSE 20 TCK; ENDDR IDLE; RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffffffffffffffffffffffffffffe5e7fffffffffffffffffffffffffffffe7c) MASK ( +SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffffffffffffffffffffffffffffe587fffffffffffffffffffffffffffffe7c) MASK ( 03fffffffffffffffffffffffffffffe001ff801ffffffffffffffffffffffffffffff) ; RUNTEST 100 TCK; ENDDR DRPAUSE; @@ -1201,870 +1108,6 @@ SIR 8 TDI (01) ; SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f6e5f093) MASK (0fff8fff) ; //Check for Done bit. SIR 8 TDI (ff) TDO (05) MASK (07) ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -SIR 8 TDI (ff) ; -SDR 1 TDI (00) SMASK (01) ; -//Operation: Verify -p 0 -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -//Loading device with 'idcode' instruction. -SIR 8 TDI (01) ; -SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f6e5f093) MASK (0fff8fff) ; -//Check for Read/Write Protect. -SIR 8 TDI (ff) TDO (01) MASK (03) ; -//Boundary Scan Chain Contents -//Position 1: xc2c64a -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -TDR 0 ; -HDR 0 ; -TIR 0 ; -HIR 0 ; -HDR 0 ; -TDR 0 ; -//Loading device with 'idcode' instruction. -SIR 8 TDI (01) ; -SDR 32 TDI (00000000) TDO (f6e5f093) ; -//Check for Read/Write Protect. -SIR 8 TDI (ff) TDO (01) MASK (03) ; -//Loading device with 'bypass' instruction. -SIR 8 TDI (ff) ; -//Loading device with 'enable' instruction. -SIR 8 TDI (e8) ; -//Loading device with 'enable' instruction. -SIR 8 TDI (e8) ; -//Loading device with 'enable' instruction. -SIR 8 TDI (e8) ; -// Verification. -// Loading device with a 'verify' instruction. -ENDIR IRPAUSE; -SIR 8 TDI (ee) ; -ENDDR DRPAUSE; -SDR 7 TDI (00) SMASK (7f) ; -ENDIR IDLE; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (40) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffddf7fffffffffffffffffffbffffffffffe7f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (60) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffffffffffffffeffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (20) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffddf7ffffffffffbfffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (30) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffddf7fffffffffffffbffffffffffffffffe7f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (70) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffddf7fffffefbefbffbfffefbefffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (50) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (10) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (18) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (58) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffddf7ffffffffefffffffffffffffffffffe4f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (78) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffd7f7fffffffbffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (38) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (28) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (68) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (48) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffd7f7fffffffffffffffffffff7ffffffffe81) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (08) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (0c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffd7f7fffffeffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (4c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe81) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (6c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (2c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (3c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (7c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (5c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (1c) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201ffffffffffffffffffffffffffffffe5e7fffffffffffffffffffffffffffffe7c) MASK ( -03fffffffffffffffffffffffffffffe001ff801ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (14) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( -03fffffffffffffffffffffffffffffe001f8001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (54) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (74) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe81) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (34) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (24) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (64) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (44) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (04) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (06) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe81) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (46) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (66) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (26) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe81) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (36) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (76) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (56) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe81) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (16) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe4f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (1e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (5e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe81) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (7e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (3e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (2e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (6e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (4e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (0e) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (0a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (4a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (6a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (0201fffff7ffffffffffffffffffffffebfefffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (2a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (3a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffff7fffffffffffbeefffffffffffffffffffffffffffffffe1d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (7a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffbfffffffffffffffffffffffffbbefffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (5a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffff7fffffffffffffffffbeefffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (1a) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1ffffffffffffffffffffffffff7ffbbefffffffffffffffffffffffffffffffe1d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (12) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5ffffffffffffffffffdffffffffffbeefffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (52) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1ffffffff7ffffffffffffffffffffbeefffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (72) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9ffffffffffffffffffffffffdffffbeefffffffffffffffffffffffffffffffe1d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (32) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f8fffffffffffffffffffffffffffffafefffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (22) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9ffffffffffffff7ffffffffffffffbbefffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (62) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (42) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (02) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffdfbbefffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (03) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (43) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (63) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (23) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (33) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c4fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (73) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (53) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe1d) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (13) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7c) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (1b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (5b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffff9fffffffffffffffffffffffffffffffe7d) MASK ( -03fffffffffffffffffffffffffffffe00078001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (7b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (3b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03fffffffffffffffffffffffffffffe00000001ffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (2b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (6b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (4b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (0b) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (0f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (4f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (6f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (2f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (3f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (7f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (5f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00f9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (1f) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (17) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (57) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (77) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (37) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (27) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (67) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03c9fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0f) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (47) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (00e1fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe7d) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (07) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (02c5fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe01) MASK ( -03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (05) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) MASK ( -0000000000000000000000000000000000000000000000000000000000000000000000) ; -RUNTEST 100 TCK; -ENDDR DRPAUSE; -SDR 7 TDI (45) SMASK (7f) ; -RUNTEST DRPAUSE 20 TCK; -ENDDR IDLE; -RUNTEST IDLE 100 TCK; -// masking lower UES bits. -SDR 274 TDI (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) SMASK (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) TDO (03ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff) MASK ( -0000000000000000000000000000000000000000000000000000000000000000000000) ; -RUNTEST 100 TCK; -SIR 8 TDI (f0) SMASK (ff) ; -STATE IDLE; -RUNTEST IDLE 20 TCK; -ENDIR IRPAUSE; -SIR 8 TDI (f0) SMASK (ff) ; -STATE IREXIT2 IRUPDATE DRSELECT DRCAPTURE DREXIT1 DRUPDATE IDLE; -RUNTEST 800 TCK; -ENDIR IDLE; -//Loading device with 'conld' instruction. -SIR 8 TDI (c0) ; -RUNTEST IDLE 100 TCK; -//Loading device with 'idcode' instruction. -SIR 8 TDI (01) ; -SDR 32 TDI (00000000) SMASK (ffffffff) TDO (f6e5f093) MASK (0fff8fff) ; -//Check for Done bit. -SIR 8 TDI (ff) TDO (05) MASK (07) ; -//Loading device with 'conld' instruction. -SIR 8 TDI (c0) ; -RUNTEST IDLE 100 TCK; //Loading device with 'bypass' instruction. SIR 8 TDI (ff) ; TIR 0 ; diff --git a/hardware/jellybean/sgpio_if/program b/hardware/jellybean/sgpio_if/program index 9404a3c0..d0b097ca 100755 --- a/hardware/jellybean/sgpio_if/program +++ b/hardware/jellybean/sgpio_if/program @@ -6,5 +6,5 @@ jtag < Date: Tue, 24 Jul 2012 13:29:03 -0700 Subject: [PATCH 5/7] Corrected typo regarding SGPIO external clock configuration. --- firmware/sgpio-rx/sgpio-rx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/firmware/sgpio-rx/sgpio-rx.c b/firmware/sgpio-rx/sgpio-rx.c index b06f023e..5874b127 100644 --- a/firmware/sgpio-rx/sgpio-rx.c +++ b/firmware/sgpio-rx/sgpio-rx.c @@ -174,7 +174,7 @@ void configure_sgpio_test_tx() { (3L << 5) | // QUALIFIER_MODE = 3 (external SGPIO pin) (0L << 3) | // CLK_SOURCE_SLICE_MODE = X (0L << 1) | // CLK_SOURCE_PIN_MODE = 0 (SGPIO8) - (1L << 0); // EXT_CLK_ENABLE = 1, external clock signal (slice) + (1L << 0); // EXT_CLK_ENABLE = 1, external clock signal SGPIO_SLICE_MUX_CFG(SGPIO_SLICE_A) = (0L << 8) | // INV_QUALIFIER = 0 (use normal qualifier) @@ -254,7 +254,7 @@ void configure_sgpio_test_rx() { (3L << 5) | // QUALIFIER_MODE = 3 (external SGPIO pin) (0L << 3) | // CLK_SOURCE_SLICE_MODE = X (0L << 1) | // CLK_SOURCE_PIN_MODE = 0 (SGPIO8) - (1L << 0); // EXT_CLK_ENABLE = 1, external clock signal (slice) + (1L << 0); // EXT_CLK_ENABLE = 1, external clock signal SGPIO_SLICE_MUX_CFG(SGPIO_SLICE_A) = (0L << 8) | // INV_QUALIFIER = 0 (use normal qualifier) From c8c0028d274acc3ef4fc5298395d505245122afe Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Tue, 24 Jul 2012 13:29:54 -0700 Subject: [PATCH 6/7] Moved CGU peripheral and APB1 base clock configurations to before SSP1 configuration. --- firmware/sgpio-rx/sgpio-rx.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/firmware/sgpio-rx/sgpio-rx.c b/firmware/sgpio-rx/sgpio-rx.c index 5874b127..1b443a01 100644 --- a/firmware/sgpio-rx/sgpio-rx.c +++ b/firmware/sgpio-rx/sgpio-rx.c @@ -314,6 +314,13 @@ int main(void) { pin_setup(); enable_1v8_power(); cpu_clock_init(); + + CGU_BASE_PERIPH_CLK = (CGU_BASE_CLK_AUTOBLOCK + | (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT)); + + CGU_BASE_APB1_CLK = (CGU_BASE_CLK_AUTOBLOCK + | (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT)); + ssp1_init(); ssp1_set_mode_max2837(); @@ -322,12 +329,6 @@ int main(void) { max2837_start(); max2837_rx(); - CGU_BASE_PERIPH_CLK = (CGU_BASE_CLK_AUTOBLOCK - | (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT)); - - CGU_BASE_APB1_CLK = (CGU_BASE_CLK_AUTOBLOCK - | (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT)); - ssp1_set_mode_max5864(); max5864_xcvr(); configure_sgpio_test_rx(); From 9a8e5dcdf02572f89b6a8d74d4f5da265bddece2 Mon Sep 17 00:00:00 2001 From: Jared Boone Date: Tue, 24 Jul 2012 13:31:57 -0700 Subject: [PATCH 7/7] Flip sense of capture clock on SGPIO, which seems to solve the RX data corruption issues. TODO: I wish I had more than empirical evidence that this fix is correct... --- firmware/sgpio-rx/sgpio-rx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/sgpio-rx/sgpio-rx.c b/firmware/sgpio-rx/sgpio-rx.c index 1b443a01..c2e00ee3 100644 --- a/firmware/sgpio-rx/sgpio-rx.c +++ b/firmware/sgpio-rx/sgpio-rx.c @@ -262,7 +262,7 @@ void configure_sgpio_test_rx() { (0L << 4) | // DATA_CAPTURE_MODE = 0 (detect rising edge) (0L << 3) | // INV_OUT_CLK = X (1L << 2) | // CLKGEN_MODE = 1 (use external pin clock) - (0L << 1) | // CLK_CAPTURE_MODE = 0 (use rising clock edge) + (1L << 1) | // CLK_CAPTURE_MODE = 1 (use falling clock edge) (0L << 0); // MATCH_MODE = 0 (do not match data) SGPIO_PRESET(SGPIO_SLICE_A) = 0;