From 6b5193198b9dbaa2a20c035579a78c619acaeff0 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 12:27:03 +0100 Subject: [PATCH 01/22] Realign GPIO assignments with spaces rather than tabs. --- firmware/common/hackrf_core.c | 98 +++++++++++++++++------------------ firmware/common/mixer.c | 20 +++---- 2 files changed, 59 insertions(+), 59 deletions(-) diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index d5243c0d..fce7e8da 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -56,85 +56,85 @@ static struct gpio_t gpio_led[] = { #endif }; -static struct gpio_t gpio_1v8_enable = GPIO(3, 6); +static struct gpio_t gpio_1v8_enable = GPIO(3, 6); /* MAX2837 GPIO (XCVR_CTL) PinMux */ -static struct gpio_t gpio_max2837_select = GPIO(0, 15); -static struct gpio_t gpio_max2837_enable = GPIO(2, 6); -static struct gpio_t gpio_max2837_rx_enable = GPIO(2, 5); -static struct gpio_t gpio_max2837_tx_enable = GPIO(2, 4); +static struct gpio_t gpio_max2837_select = GPIO(0, 15); +static struct gpio_t gpio_max2837_enable = GPIO(2, 6); +static struct gpio_t gpio_max2837_rx_enable = GPIO(2, 5); +static struct gpio_t gpio_max2837_tx_enable = GPIO(2, 4); /* MAX5864 SPI chip select (AD_CS) GPIO PinMux */ -static struct gpio_t gpio_max5864_select = GPIO(2, 7); +static struct gpio_t gpio_max5864_select = GPIO(2, 7); /* RFFC5071 GPIO serial interface PinMux */ // #ifdef RAD1O -// static struct gpio_t gpio_rffc5072_select = GPIO(2, 13); -// static struct gpio_t gpio_rffc5072_clock = GPIO(5, 6); -// static struct gpio_t gpio_rffc5072_data = GPIO(3, 3); -// static struct gpio_t gpio_rffc5072_reset = GPIO(2, 14); +// static struct gpio_t gpio_rffc5072_select = GPIO(2, 13); +// static struct gpio_t gpio_rffc5072_clock = GPIO(5, 6); +// static struct gpio_t gpio_rffc5072_data = GPIO(3, 3); +// static struct gpio_t gpio_rffc5072_reset = GPIO(2, 14); // #endif /* RF supply (VAA) control */ #ifdef HACKRF_ONE -static struct gpio_t gpio_vaa_disable = GPIO(2, 9); +static struct gpio_t gpio_vaa_disable = GPIO(2, 9); #endif #ifdef RAD1O -static struct gpio_t gpio_vaa_enable = GPIO(2, 9); +static struct gpio_t gpio_vaa_enable = GPIO(2, 9); #endif -static struct gpio_t gpio_w25q80bv_hold = GPIO(1, 14); -static struct gpio_t gpio_w25q80bv_wp = GPIO(1, 15); -static struct gpio_t gpio_w25q80bv_select = GPIO(5, 11); +static struct gpio_t gpio_w25q80bv_hold = GPIO(1, 14); +static struct gpio_t gpio_w25q80bv_wp = GPIO(1, 15); +static struct gpio_t gpio_w25q80bv_select = GPIO(5, 11); /* RF switch control */ #ifdef HACKRF_ONE -static struct gpio_t gpio_hp = GPIO(2, 0); -static struct gpio_t gpio_lp = GPIO(2, 10); -static struct gpio_t gpio_tx_mix_bp = GPIO(2, 11); -static struct gpio_t gpio_no_mix_bypass = GPIO(1, 0); -static struct gpio_t gpio_rx_mix_bp = GPIO(2, 12); -static struct gpio_t gpio_tx_amp = GPIO(2, 15); -static struct gpio_t gpio_tx = GPIO(5, 15); -static struct gpio_t gpio_mix_bypass = GPIO(5, 16); -static struct gpio_t gpio_rx = GPIO(5, 5); -static struct gpio_t gpio_no_tx_amp_pwr = GPIO(3, 5); -static struct gpio_t gpio_amp_bypass = GPIO(0, 14); -static struct gpio_t gpio_rx_amp = GPIO(1, 11); -static struct gpio_t gpio_no_rx_amp_pwr = GPIO(1, 12); +static struct gpio_t gpio_hp = GPIO(2, 0); +static struct gpio_t gpio_lp = GPIO(2, 10); +static struct gpio_t gpio_tx_mix_bp = GPIO(2, 11); +static struct gpio_t gpio_no_mix_bypass = GPIO(1, 0); +static struct gpio_t gpio_rx_mix_bp = GPIO(2, 12); +static struct gpio_t gpio_tx_amp = GPIO(2, 15); +static struct gpio_t gpio_tx = GPIO(5, 15); +static struct gpio_t gpio_mix_bypass = GPIO(5, 16); +static struct gpio_t gpio_rx = GPIO(5, 5); +static struct gpio_t gpio_no_tx_amp_pwr = GPIO(3, 5); +static struct gpio_t gpio_amp_bypass = GPIO(0, 14); +static struct gpio_t gpio_rx_amp = GPIO(1, 11); +static struct gpio_t gpio_no_rx_amp_pwr = GPIO(1, 12); #endif #ifdef RAD1O -static struct gpio_t gpio_tx_rx_n = GPIO(1, 11); -static struct gpio_t gpio_tx_rx = GPIO(0, 14); -static struct gpio_t gpio_by_mix = GPIO(1, 12); -static struct gpio_t gpio_by_mix_n = GPIO(2, 10); -static struct gpio_t gpio_by_amp = GPIO(1, 0); -static struct gpio_t gpio_by_amp_n = GPIO(5, 5); -static struct gpio_t gpio_mixer_en = GPIO(5, 16); -static struct gpio_t gpio_low_high_filt = GPIO(2, 11); -static struct gpio_t gpio_low_high_filt_n = GPIO(2, 12); -static struct gpio_t gpio_tx_amp = GPIO(2, 15); -static struct gpio_t gpio_rx_lna = GPIO(5, 15); +static struct gpio_t gpio_tx_rx_n = GPIO(1, 11); +static struct gpio_t gpio_tx_rx = GPIO(0, 14); +static struct gpio_t gpio_by_mix = GPIO(1, 12); +static struct gpio_t gpio_by_mix_n = GPIO(2, 10); +static struct gpio_t gpio_by_amp = GPIO(1, 0); +static struct gpio_t gpio_by_amp_n = GPIO(5, 5); +static struct gpio_t gpio_mixer_en = GPIO(5, 16); +static struct gpio_t gpio_low_high_filt = GPIO(2, 11); +static struct gpio_t gpio_low_high_filt_n = GPIO(2, 12); +static struct gpio_t gpio_tx_amp = GPIO(2, 15); +static struct gpio_t gpio_rx_lna = GPIO(5, 15); #endif /* CPLD JTAG interface GPIO pins */ -static struct gpio_t gpio_cpld_tdo = GPIO(5, 18); -static struct gpio_t gpio_cpld_tck = GPIO(3, 0); +static struct gpio_t gpio_cpld_tdo = GPIO(5, 18); +static struct gpio_t gpio_cpld_tck = GPIO(3, 0); #if (defined HACKRF_ONE || defined RAD1O) -static struct gpio_t gpio_cpld_tms = GPIO(3, 4); -static struct gpio_t gpio_cpld_tdi = GPIO(3, 1); +static struct gpio_t gpio_cpld_tms = GPIO(3, 4); +static struct gpio_t gpio_cpld_tdi = GPIO(3, 1); #else -static struct gpio_t gpio_cpld_tms = GPIO(3, 1); -static struct gpio_t gpio_cpld_tdi = GPIO(3, 4); +static struct gpio_t gpio_cpld_tms = GPIO(3, 1); +static struct gpio_t gpio_cpld_tdi = GPIO(3, 4); #endif #ifdef HACKRF_ONE -static struct gpio_t gpio_cpld_pp_tms = GPIO(1, 1); -static struct gpio_t gpio_cpld_pp_tdo = GPIO(1, 8); +static struct gpio_t gpio_cpld_pp_tms = GPIO(1, 1); +static struct gpio_t gpio_cpld_pp_tdo = GPIO(1, 8); #endif -static struct gpio_t gpio_hw_sync_enable = GPIO(5,12); -static struct gpio_t gpio_rx_q_invert = GPIO(0, 13); +static struct gpio_t gpio_hw_sync_enable = GPIO(5,12); +static struct gpio_t gpio_rx_q_invert = GPIO(0, 13); i2c_bus_t i2c0 = { .obj = (void*)I2C0_BASE, diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c index 5db296bf..6d2b5870 100644 --- a/firmware/common/mixer.c +++ b/firmware/common/mixer.c @@ -6,18 +6,18 @@ /* RFFC5071 GPIO serial interface PinMux */ #if (defined JAWBREAKER || defined HACKRF_ONE) -static struct gpio_t gpio_rffc5072_select = GPIO(2, 13); -static struct gpio_t gpio_rffc5072_clock = GPIO(5, 6); -static struct gpio_t gpio_rffc5072_data = GPIO(3, 3); -static struct gpio_t gpio_rffc5072_reset = GPIO(2, 14); +static struct gpio_t gpio_rffc5072_select = GPIO(2, 13); +static struct gpio_t gpio_rffc5072_clock = GPIO(5, 6); +static struct gpio_t gpio_rffc5072_data = GPIO(3, 3); +static struct gpio_t gpio_rffc5072_reset = GPIO(2, 14); #endif #ifdef RAD1O -static struct gpio_t gpio_vco_ce = GPIO(2, 13); -static struct gpio_t gpio_vco_sclk = GPIO(5, 6); -static struct gpio_t gpio_vco_sdata = GPIO(3, 3); -static struct gpio_t gpio_vco_le = GPIO(2, 14); -static struct gpio_t gpio_vco_mux = GPIO(5, 25); -static struct gpio_t gpio_synt_rfout_en = GPIO(3, 5); +static struct gpio_t gpio_vco_ce = GPIO(2, 13); +static struct gpio_t gpio_vco_sclk = GPIO(5, 6); +static struct gpio_t gpio_vco_sdata = GPIO(3, 3); +static struct gpio_t gpio_vco_le = GPIO(2, 14); +static struct gpio_t gpio_vco_mux = GPIO(5, 25); +static struct gpio_t gpio_synt_rfout_en = GPIO(3, 5); #endif #if (defined JAWBREAKER || defined HACKRF_ONE) From 1acc71bebf7599fd7e65ae709b0d853585fd55dc Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 12:28:35 +0100 Subject: [PATCH 02/22] rf_path: Realign scu_pinmux calls. --- firmware/common/portapack.c | 16 +++++++------ firmware/common/rf_path.c | 48 ++++++++++++++++++------------------- 2 files changed, 33 insertions(+), 31 deletions(-) diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c index 2931ff80..0a2edbae 100644 --- a/firmware/common/portapack.c +++ b/firmware/common/portapack.c @@ -31,13 +31,15 @@ static void portapack_sleep_milliseconds(const uint32_t milliseconds) { delay(milliseconds * 40800); } -static struct gpio_t gpio_io_stbx = GPIO(5, 0); /* P2_0 */ -static struct gpio_t gpio_addr = GPIO(5, 1); /* P2_1 */ -__attribute__((unused)) static struct gpio_t gpio_lcd_te = GPIO(5, 3); /* P2_3 */ -__attribute__((unused)) static struct gpio_t gpio_unused = GPIO(5, 7); /* P2_8 */ -static struct gpio_t gpio_lcd_rdx = GPIO(5, 4); /* P2_4 */ -static struct gpio_t gpio_lcd_wrx = GPIO(1, 10); /* P2_9 */ -static struct gpio_t gpio_dir = GPIO(1, 13); /* P2_13 */ +static struct gpio_t gpio_io_stbx = GPIO(5, 0); /* P2_0 */ +static struct gpio_t gpio_addr = GPIO(5, 1); /* P2_1 */ +__attribute__((unused)) +static struct gpio_t gpio_lcd_te = GPIO(5, 3); /* P2_3 */ +__attribute__((unused)) +static struct gpio_t gpio_unused = GPIO(5, 7); /* P2_8 */ +static struct gpio_t gpio_lcd_rdx = GPIO(5, 4); /* P2_4 */ +static struct gpio_t gpio_lcd_wrx = GPIO(1, 10); /* P2_9 */ +static struct gpio_t gpio_dir = GPIO(1, 13); /* P2_13 */ typedef struct portapack_if_t { gpio_t gpio_dir; diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c index daae972f..6394726b 100644 --- a/firmware/common/rf_path.c +++ b/firmware/common/rf_path.c @@ -240,19 +240,19 @@ static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo) { void rf_path_pin_setup(rf_path_t* const rf_path) { #ifdef HACKRF_ONE /* Configure RF switch control signals */ - scu_pinmux(SCU_HP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_LP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_TX_MIX_BP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_NO_MIX_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_RX_MIX_BP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_TX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_TX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - scu_pinmux(SCU_MIX_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - scu_pinmux(SCU_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - scu_pinmux(SCU_NO_TX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_AMP_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_RX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_HP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_LP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_TX_MIX_BP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_NO_MIX_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_RX_MIX_BP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_TX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_TX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_MIX_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_NO_TX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_AMP_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_RX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); /* Configure RF power supply (VAA) switch */ scu_pinmux(SCU_NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); @@ -279,17 +279,17 @@ void rf_path_pin_setup(rf_path_t* const rf_path) { switchctrl_set(rf_path, SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_MIX_BYPASS); #elif RAD1O /* Configure RF switch control signals */ - scu_pinmux(SCU_BY_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_BY_AMP_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - scu_pinmux(SCU_TX_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_TX_RX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_BY_MIX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_BY_MIX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_LOW_HIGH_FILT, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_LOW_HIGH_FILT_N,SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_TX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_RX_LNA, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); - scu_pinmux(SCU_MIXER_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_BY_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_BY_AMP_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_TX_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_TX_RX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_BY_MIX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_BY_MIX_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_LOW_HIGH_FILT, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_LOW_HIGH_FILT_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_TX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_RX_LNA, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_MIXER_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* Configure RF power supply (VAA) switch */ scu_pinmux(SCU_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); From a66492b8b71c4199439749c4da3a3f8fe9a7779c Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 12:29:55 +0100 Subject: [PATCH 03/22] rom_iap: Clean up comments and realign with spaces. --- firmware/common/rom_iap.h | 79 +++++++++++++++++++-------------------- 1 file changed, 39 insertions(+), 40 deletions(-) diff --git a/firmware/common/rom_iap.h b/firmware/common/rom_iap.h index 69761dbe..0f487586 100644 --- a/firmware/common/rom_iap.h +++ b/firmware/common/rom_iap.h @@ -24,72 +24,71 @@ #include -typedef enum -{ +typedef enum { /* TODO define other commands */ IAP_CMD_INIT_IAP = 49, /* Command Init IAP - Input Command code: 49 (decimal) - Return Code CMD_SUCCESS - Result None + Input: Command code: 49 (decimal) + Return Code: CMD_SUCCESS + Result: None Description Initializes and prepares the flash for erase and write operations. Stack usage 88 B */ - IAP_CMD_READ_PART_ID_NO = 54, + IAP_CMD_READ_PART_ID_NO = 54, /* Read part identification number - Command Read part identification number - Input Command code: 54 (decimal) - Parameters:None - Return Code CMD_SUCCESS | - Result Result0:Part Identification Number. - Result1:Part Identification Number. - Description This command is used to read the part identification number. See Table 1082 - “LPC43xx part identification numbers”. - The command returns two words: word0 followed by word1. Word 0 corresponds - to the part id and word1 indicates the flash configuration or contains 0x0 for - flashless parts. - Stack usage 8 B */ + Input: Command code: 54 (decimal) + Parameters:None + Return Code: CMD_SUCCESS + Result Result0:Part Identification Number. + Result1:Part Identification Number. + Description: This command is used to read the part identification number. See Table 1082 + 'LPC43xx part identification numbers'. The command returns two words: word0 + followed by word1. Word 0 corresponds to the part id and word1 indicates the flash + configuration or contains 0x0 for flashless parts. + Stack usage: 8 B */ IAP_CMD_READ_SERIAL_NO = 58 /* Read device serial number - Input Command code: 58 (decimal) - Parameters: None - Return Code CMD_SUCCESS - Result Result0:First 32-bit word of Device Identification Number (at the lowest address) - Result1:Second 32-bit word of Device Identification Number - Result2:Third 32-bit word of Device Identification Number - Result3:Fourth 32-bit word of Device Identification Number - Description This command is used to read the device identification number. The serial number - may be used to uniquely identify a single unit among all LPC43xx devices. - Stack usage 8 B */ + Input: Command code: 58 (decimal) + Parameters: None + Return Code: CMD_SUCCESS + Result: Result0: First 32-bit word of Device Identification Number (at the lowest address) + Result1: Second 32-bit word of Device Identification Number + Result2: Third 32-bit word of Device Identification Number + Result3: Fourth 32-bit word of Device Identification Number + Description: This command is used to read the device identification number. The serial number + may be used to uniquely identify a single unit among all LPC43xx devices. + Stack usage: 8 B */ } iap_cmd_code_t; /* ISP/IAP Return Code */ typedef enum { - CMD_SUCCESS = 0x00000000, /* CMD_SUCCESS Command is executed successfully. Sent by ISP handler only when command given by the host has been completely and successfully executed. */ - INVALID_COMMAND = 0x00000001, /* Invalid command. */ - SRC_ADDR_ERROR = 0x00000002, /* Source address is not on word boundary. */ - DST_ADDR_ERROR = 0x00000003, /* Destination address not on word or 256 byte boundary. */ - SRC_ADDR_NOT_MAPPED = 0x00000004, /* Source address is not mapped in the memory map. Count value is taken into consideration where applicable. */ - DST_ADDR_NOT_MAPPED = 0x00000005, /* Destination address is not mapped in the memory map. Count value is taken into consideration where applicable.*/ + CMD_SUCCESS = 0x00000000, /* CMD_SUCCESS Command is executed successfully. + Sent by ISP handler only when command given by the host has been completely and successfully executed. */ + + INVALID_COMMAND = 0x00000001, /* Invalid command. */ + SRC_ADDR_ERROR = 0x00000002, /* Source address is not on word boundary. */ + DST_ADDR_ERROR = 0x00000003, /* Destination address not on word or 256 byte boundary. */ + SRC_ADDR_NOT_MAPPED = 0x00000004, /* Source address is not mapped in the memory map. Count value is taken into consideration where applicable. */ + DST_ADDR_NOT_MAPPED = 0x00000005, /* Destination address is not mapped in the memory map. Count value is taken into consideration where applicable.*/ COUNT_ERROR = 0x00000006, /* Byte count is not multiple of 4 or is not a permitted value. */ INVALID_SECTOR = 0x00000007, /* Sector number is invalid or end sector number is greater than start sector number. */ SECTOR_NOT_BLANK = 0x00000008, /* Sector is not blank. */ SECTOR_NOT_PREP_WRITE_OP = 0x00000009, /* Command to prepare sector for write operation was not executed. */ COMPARE_ERROR = 0x0000000A, /* Source and destination data not equal. */ - BUSY = 0x0000000B, /* Flash programming hardware interface is busy. */ + BUSY = 0x0000000B, /* Flash programming hardware interface is busy. */ PARAM_ERROR = 0x0000000C, /* Insufficient number of parameters or invalid parameter. */ ADDR_ERROR = 0x0000000D, /* Address is not on word boundary. */ - ADDR_NOT_MAPPED = 0x0000000E, /* Address is not mapped in the memory map. Count value is taken in to consideration where applicable. */ + ADDR_NOT_MAPPED = 0x0000000E, /* Address is not mapped in the memory map. Count value is taken in to consideration where applicable. */ CMD_LOCKED = 0x0000000F, /* Command is locked. */ INVALID_CODE = 0x00000010, /* Unlock code is invalid. */ - INVALID_BAUD_RATE = 0x00000011, /* Invalid baud rate setting. */ - INVALID_STOP_BIT = 0x00000012, /* Invalid stop bit setting. */ + INVALID_BAUD_RATE = 0x00000011, /* Invalid baud rate setting. */ + INVALID_STOP_BIT = 0x00000012, /* Invalid stop bit setting. */ CODE_READ_PROTECTION_ENABLED = 0x00000013, /* Code read protection enabled. */ - INVALID_FLASH_UNIT = 0x00000014, /* Invalid flash unit. */ - USER_CODE_CHECKSUM = 0x00000015, + INVALID_FLASH_UNIT = 0x00000014, /* Invalid flash unit. */ + USER_CODE_CHECKSUM = 0x00000015, ERROR_SETTING_ACTIVE_PARTITION = 0x00000016, /* Special Error */ From 445253be1e43137e0f1adb47bc3f4655057c9cdf Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 12:31:36 +0100 Subject: [PATCH 04/22] usb_descriptor: Realign descriptor comments. --- firmware/hackrf_usb/usb_descriptor.c | 50 ++++++++++++++-------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c index aa40db3f..92bcb798 100644 --- a/firmware/hackrf_usb/usb_descriptor.c +++ b/firmware/hackrf_usb/usb_descriptor.c @@ -160,8 +160,8 @@ uint8_t usb_descriptor_string_languages[] = { }; uint8_t usb_descriptor_string_manufacturer[] = { - 40, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + 40, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType 'G', 0x00, 'r', 0x00, 'e', 0x00, @@ -185,8 +185,8 @@ uint8_t usb_descriptor_string_manufacturer[] = { uint8_t usb_descriptor_string_product[] = { #ifdef HACKRF_ONE - 22, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + 22, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType 'H', 0x00, 'a', 0x00, 'c', 0x00, @@ -198,8 +198,8 @@ uint8_t usb_descriptor_string_product[] = { 'n', 0x00, 'e', 0x00, #elif JAWBREAKER - 36, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + 36, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType 'H', 0x00, 'a', 0x00, 'c', 0x00, @@ -218,16 +218,16 @@ uint8_t usb_descriptor_string_product[] = { 'e', 0x00, 'r', 0x00, #elif RAD1O - 12, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + 12, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType 'r', 0x00, 'a', 0x00, 'd', 0x00, '1', 0x00, 'o', 0x00, #else - 14, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + 14, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType 'H', 0x00, 'a', 0x00, 'c', 0x00, @@ -238,8 +238,8 @@ uint8_t usb_descriptor_string_product[] = { }; uint8_t usb_descriptor_string_config_description[] = { - 24, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + 24, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType 'T', 0x00, 'r', 0x00, 'a', 0x00, @@ -255,8 +255,8 @@ uint8_t usb_descriptor_string_config_description[] = { #ifdef DFU_MODE uint8_t usb_descriptor_string_serial_number[] = { - 30, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + 30, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType 'R', 0x00, 'u', 0x00, 'n', 0x00, @@ -282,7 +282,7 @@ uint8_t* usb_descriptor_strings[] = { usb_descriptor_string_product, usb_descriptor_string_config_description, usb_descriptor_string_serial_number, - 0, // TERMINATOR + 0, // TERMINATOR }; uint8_t wcid_string_descriptor[] = { @@ -300,14 +300,14 @@ uint8_t wcid_string_descriptor[] = { }; uint8_t wcid_feature_descriptor[] = { - 0x28, 0x00, 0x00, 0x00, // bLength - USB_WORD(0x0100), // WCID version - USB_WORD(0x0004), // WICD descriptor index - 0x01, //bNumSections - 0x00,0x00,0x00,0x00,0x00,0x00,0x00, //Reserved - 0x00, //bInterfaceNumber - 0x01, //Reserved - 'W', 'I', 'N', 'U', 'S', 'B', 0x00,0x00, //Compatible ID, padded with zeros - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, //Sub-compatible ID - 0x00,0x00,0x00,0x00,0x00,0x00 //Reserved + 0x28, 0x00, 0x00, 0x00, // bLength + USB_WORD(0x0100), // WCID version + USB_WORD(0x0004), // WICD descriptor index + 0x01, // bNumSections + 0x00,0x00,0x00,0x00,0x00,0x00,0x00, // Reserved + 0x00, // bInterfaceNumber + 0x01, // Reserved + 'W', 'I', 'N', 'U', 'S', 'B', 0x00,0x00, // Compatible ID, padded with zeros + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // Sub-compatible ID + 0x00,0x00,0x00,0x00,0x00,0x00 // Reserved }; From efd5603c805237f0253265eb2c35bf948a75cc66 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 11:16:40 +0100 Subject: [PATCH 05/22] Reformat sct.h to avoid long lines. --- firmware/common/sct.h | 2267 ++++++++++++++++++++++++++--------------- 1 file changed, 1427 insertions(+), 840 deletions(-) diff --git a/firmware/common/sct.h b/firmware/common/sct.h index 31d6ff1e..7617bd96 100644 --- a/firmware/common/sct.h +++ b/firmware/common/sct.h @@ -15,1220 +15,1675 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* -- SCT_CONFIG_UNIFY: SCT operation */ #define SCT_CONFIG_UNIFY_SHIFT (0) -#define SCT_CONFIG_UNIFY_MASK (0x01 << SCT_CONFIG_UNIFY_SHIFT) -#define SCT_CONFIG_UNIFY(x) ((x) << SCT_CONFIG_UNIFY_SHIFT) +#define SCT_CONFIG_UNIFY_MASK (0x01 << SCT_CONFIG_UNIFY_SHIFT) +#define SCT_CONFIG_UNIFY(x) ((x) << SCT_CONFIG_UNIFY_SHIFT) /* SCT_CONFIG_UNIFY_UNIFY values */ -#define SCT_CONFIG_UNIFY_16_BIT SCT_CONFIG_UNIFY(0x00) /* 16-bit.The SCT operates as two 16-bit counters named L and H. */ -#define SCT_CONFIG_UNIFY_32_BIT SCT_CONFIG_UNIFY(0x01) /* 32-bit. The SCT operates as a unified 32-bit counter. */ +/* 16-bit.The SCT operates as two 16-bit counters named L and H. */ +#define SCT_CONFIG_UNIFY_16_BIT SCT_CONFIG_UNIFY(0x00) +/* 32-bit. The SCT operates as a unified 32-bit counter. */ +#define SCT_CONFIG_UNIFY_32_BIT SCT_CONFIG_UNIFY(0x01) /* -- SCT_CONFIG_CLKMODE: SCT clock mode */ #define SCT_CONFIG_CLKMODE_SHIFT (1) -#define SCT_CONFIG_CLKMODE_MASK (0x03 << SCT_CONFIG_CLKMODE_SHIFT) -#define SCT_CONFIG_CLKMODE(x) ((x) << SCT_CONFIG_CLKMODE_SHIFT) +#define SCT_CONFIG_CLKMODE_MASK (0x03 << SCT_CONFIG_CLKMODE_SHIFT) +#define SCT_CONFIG_CLKMODE(x) ((x) << SCT_CONFIG_CLKMODE_SHIFT) /* SCT_CONFIG_CLKMODE_CLKMODE values */ -#define SCT_CONFIG_CLKMODE_BUS_CLOCK SCT_CONFIG_CLKMODE(0x00) /* Bus clock. The bus clock clocks the SCT and prescalers. */ -#define SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK SCT_CONFIG_CLKMODE(0x01) /* Prescaled bus clock. The SCT clock is the bus clock, but the prescalers are enabled to count only when sampling of the input selected by the CKSEL field finds the selected edge. The minimum pulse width on the clock input is 1 bus clock period. This mode is the high-performance sampled-clock mode. */ -#define SCT_CONFIG_CLKMODE_SCT_INPUT SCT_CONFIG_CLKMODE(0x02) /* SCT Input. The input selected by CKSEL clocks the SCT and prescalers. The input is synchronized to the bus clock and possibly inverted. The minimum pulse width on the clock input is 1 bus clock period. This mode is the low-power sampled-clock mode. */ -#define SCT_CONFIG_CLKMODE_RESERVED SCT_CONFIG_CLKMODE(0x03) /* Reserved. */ +/* Bus clock. The bus clock clocks the SCT and prescalers. */ +#define SCT_CONFIG_CLKMODE_BUS_CLOCK SCT_CONFIG_CLKMODE(0x00) +/* Prescaled bus clock. The SCT clock is the bus clock, but the prescalers are + * enabled to count only when sampling of the input selected by the CKSEL field + * finds the selected edge. The minimum pulse width on the clock input is 1 bus + * clock period. This mode is the high-performance sampled-clock mode. */ +#define SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK SCT_CONFIG_CLKMODE(0x01) +/* SCT Input. The input selected by CKSEL clocks the SCT and prescalers. The + * input is synchronized to the bus clock and possibly inverted. The minimum + * pulse width on the clock input is 1 bus clock period. This mode is the + * low-power sampled-clock mode. */ +#define SCT_CONFIG_CLKMODE_SCT_INPUT SCT_CONFIG_CLKMODE(0x02) +/* Reserved. */ +#define SCT_CONFIG_CLKMODE_RESERVED SCT_CONFIG_CLKMODE(0x03) /* -- SCT_CONFIG_CKSEL: SCT clock select */ #define SCT_CONFIG_CKSEL_SHIFT (3) -#define SCT_CONFIG_CKSEL_MASK (0x0F << SCT_CONFIG_CKSEL_SHIFT) -#define SCT_CONFIG_CKSEL(x) ((x) << SCT_CONFIG_CKSEL_SHIFT) +#define SCT_CONFIG_CKSEL_MASK (0x0F << SCT_CONFIG_CKSEL_SHIFT) +#define SCT_CONFIG_CKSEL(x) ((x) << SCT_CONFIG_CKSEL_SHIFT) /* SCT_CONFIG_CKSEL_CKSEL values */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_0 SCT_CONFIG_CKSEL(0x00) /* Rising edges on input 0. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_0 SCT_CONFIG_CKSEL(0x01) /* Falling edges on input 0. */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1 SCT_CONFIG_CKSEL(0x02) /* Rising edges on input 1. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_1 SCT_CONFIG_CKSEL(0x03) /* Falling edges on input 1. */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_2 SCT_CONFIG_CKSEL(0x04) /* Rising edges on input 2. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_2 SCT_CONFIG_CKSEL(0x05) /* Falling edges on input 2. */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_3 SCT_CONFIG_CKSEL(0x06) /* Rising edges on input 3. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_3 SCT_CONFIG_CKSEL(0x07) /* Falling edges on input 3. */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_4 SCT_CONFIG_CKSEL(0x08) /* Rising edges on input 4. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_4 SCT_CONFIG_CKSEL(0x09) /* Falling edges on input 4. */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_5 SCT_CONFIG_CKSEL(0x0A) /* Rising edges on input 5. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_5 SCT_CONFIG_CKSEL(0x0B) /* Falling edges on input 5. */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_6 SCT_CONFIG_CKSEL(0x0C) /* Rising edges on input 6. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_6 SCT_CONFIG_CKSEL(0x0D) /* Falling edges on input 6. */ -#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_7 SCT_CONFIG_CKSEL(0x0E) /* Rising edges on input 7. */ -#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_7 SCT_CONFIG_CKSEL(0x0F) /* Falling edges on input 7. */ +/* Rising edges on input 0. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_0 SCT_CONFIG_CKSEL(0x00) +/* Falling edges on input 0. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_0 SCT_CONFIG_CKSEL(0x01) +/* Rising edges on input 1. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1 SCT_CONFIG_CKSEL(0x02) +/* Falling edges on input 1. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_1 SCT_CONFIG_CKSEL(0x03) +/* Rising edges on input 2. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_2 SCT_CONFIG_CKSEL(0x04) +/* Falling edges on input 2. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_2 SCT_CONFIG_CKSEL(0x05) +/* Rising edges on input 3. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_3 SCT_CONFIG_CKSEL(0x06) +/* Falling edges on input 3. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_3 SCT_CONFIG_CKSEL(0x07) +/* Rising edges on input 4. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_4 SCT_CONFIG_CKSEL(0x08) +/* Falling edges on input 4. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_4 SCT_CONFIG_CKSEL(0x09) +/* Rising edges on input 5. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_5 SCT_CONFIG_CKSEL(0x0A) +/* Falling edges on input 5. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_5 SCT_CONFIG_CKSEL(0x0B) +/* Rising edges on input 6. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_6 SCT_CONFIG_CKSEL(0x0C) +/* Falling edges on input 6. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_6 SCT_CONFIG_CKSEL(0x0D) +/* Rising edges on input 7. */ +#define SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_7 SCT_CONFIG_CKSEL(0x0E) +/* Falling edges on input 7. */ +#define SCT_CONFIG_CKSEL_FALLING_EDGES_ON_INPUT_7 SCT_CONFIG_CKSEL(0x0F) -/* -- SCT_CONFIG_NORELAOD_L: A 1 in this bit prevents the lower match and fractional match registers from being reloaded from their respective reload registers. Software can write to set or clear this bit at any time. This bit applies to both the higher and lower registers when the UNIFY bit is set. */ +/* -- SCT_CONFIG_NORELAOD_L: A 1 in this bit prevents the lower match and + * fractional match registers from being reloaded from their respective reload + * registers. Software can write to set or clear this bit at any time. This bit + * applies to both the higher and lower registers when the UNIFY bit is set. */ #define SCT_CONFIG_NORELAOD_L_SHIFT (7) -#define SCT_CONFIG_NORELAOD_L_MASK (0x01 << SCT_CONFIG_NORELAOD_L_SHIFT) -#define SCT_CONFIG_NORELAOD_L(x) ((x) << SCT_CONFIG_NORELAOD_L_SHIFT) +#define SCT_CONFIG_NORELAOD_L_MASK (0x01 << SCT_CONFIG_NORELAOD_L_SHIFT) +#define SCT_CONFIG_NORELAOD_L(x) ((x) << SCT_CONFIG_NORELAOD_L_SHIFT) -/* -- SCT_CONFIG_NORELOAD_H: A 1 in this bit prevents the higher match and fractional match registers from being reloaded from their respective reload registers. Software can write to set or clear this bit at any time. This bit is not used when the UNIFY bit is set. */ +/* -- SCT_CONFIG_NORELOAD_H: A 1 in this bit prevents the higher match and + * fractional match registers from being reloaded from their respective reload + * registers. Software can write to set or clear this bit at any time. This bit + * is not used when the UNIFY bit is set. */ #define SCT_CONFIG_NORELOAD_H_SHIFT (8) -#define SCT_CONFIG_NORELOAD_H_MASK (0x01 << SCT_CONFIG_NORELOAD_H_SHIFT) -#define SCT_CONFIG_NORELOAD_H(x) ((x) << SCT_CONFIG_NORELOAD_H_SHIFT) +#define SCT_CONFIG_NORELOAD_H_MASK (0x01 << SCT_CONFIG_NORELOAD_H_SHIFT) +#define SCT_CONFIG_NORELOAD_H(x) ((x) << SCT_CONFIG_NORELOAD_H_SHIFT) -/* -- SCT_CONFIG_INSYNC: Synchronization for input n (bit 9 = input 0, bit 10 = input 1,..., bit 16 = input 7). A 1 in one of these bits subjects the corresponding input to synchronization to the SCT clock, before it is used to create an event. If an input is synchronous to the SCT clock, keep its bit 0 for faster response. When the CKMODE field is 1x, the bit in this field, corresponding to the input selected by the CKSEL field, is not used. */ +/* -- SCT_CONFIG_INSYNC: Synchronization for input n (bit 9 = input 0, bit 10 = + * input 1,..., bit 16 = input 7). A 1 in one of these bits subjects the + * corresponding input to synchronization to the SCT clock, before it is used + * to create an event. If an input is synchronous to the SCT clock, keep its bit + * 0 for faster response. When the CKMODE field is 1x, the bit in this field, + * corresponding to the input selected by the CKSEL field, is not used. */ #define SCT_CONFIG_INSYNC_SHIFT (9) -#define SCT_CONFIG_INSYNC_MASK (0xFF << SCT_CONFIG_INSYNC_SHIFT) -#define SCT_CONFIG_INSYNC(x) ((x) << SCT_CONFIG_INSYNC_SHIFT) +#define SCT_CONFIG_INSYNC_MASK (0xFF << SCT_CONFIG_INSYNC_SHIFT) +#define SCT_CONFIG_INSYNC(x) ((x) << SCT_CONFIG_INSYNC_SHIFT) -/* -- SCT_CONFIG_AUTOLIMIT_L: A one in this bit causes a match on match register 0 to be treated as a de-facto LIMIT condition without the need to define an associated event. As with any LIMIT event, this automatic limit causes the counter to be cleared to zero in uni-directional mode or to change the direction of count in bi-directional mode. Software can write to set or clear this bit at any time. This bit applies to both the higher and lower registers when the UNIFY bit is set. */ +/* -- SCT_CONFIG_AUTOLIMIT_L: A one in this bit causes a match on match register + * 0 to be treated as a de-facto LIMIT condition without the need to define an + * associated event. As with any LIMIT event, this automatic limit causes the + * counter to be cleared to zero in uni-directional mode or to change the + * direction of count in bi-directional mode. Software can write to set or clear + * this bit at any time. This bit applies to both the higher and lower + * registers when the UNIFY bit is set. */ #define SCT_CONFIG_AUTOLIMIT_L_SHIFT (17) -#define SCT_CONFIG_AUTOLIMIT_L_MASK (0x01 << SCT_CONFIG_AUTOLIMIT_L_SHIFT) -#define SCT_CONFIG_AUTOLIMIT_L(x) ((x) << SCT_CONFIG_AUTOLIMIT_L_SHIFT) +#define SCT_CONFIG_AUTOLIMIT_L_MASK (0x01 << SCT_CONFIG_AUTOLIMIT_L_SHIFT) +#define SCT_CONFIG_AUTOLIMIT_L(x) ((x) << SCT_CONFIG_AUTOLIMIT_L_SHIFT) -/* -- SCT_CONFIG_AUTOLIMIT_H: A one in this bit will cause a match on match register 0 to be treated as a de-facto LIMIT condition without the need to define an associated event. As with any LIMIT event, this automatic limit causes the counter to be cleared to zero in uni-directional mode or to change the direction of count in bi-directional mode. Software can write to set or clear this bit at any time. This bit is not used when the UNIFY bit is set. */ +/* -- SCT_CONFIG_AUTOLIMIT_H: A one in this bit will cause a match on match + * register 0 to be treated as a de-facto LIMIT condition without the need to + * define an associated event. As with any LIMIT event, this automatic limit + * causes the counter to be cleared to zero in uni-directional mode or to + * change the direction of count in bi-directional mode. Software can write to + * set or clear this bit at any time. This bit is not used when the UNIFY bit + * is set. */ #define SCT_CONFIG_AUTOLIMIT_H_SHIFT (18) -#define SCT_CONFIG_AUTOLIMIT_H_MASK (0x01 << SCT_CONFIG_AUTOLIMIT_H_SHIFT) -#define SCT_CONFIG_AUTOLIMIT_H(x) ((x) << SCT_CONFIG_AUTOLIMIT_H_SHIFT) +#define SCT_CONFIG_AUTOLIMIT_H_MASK (0x01 << SCT_CONFIG_AUTOLIMIT_H_SHIFT) +#define SCT_CONFIG_AUTOLIMIT_H(x) ((x) << SCT_CONFIG_AUTOLIMIT_H_SHIFT) /* --- SCT_CTRL ------------------------------------------ */ #define SCT_CTRL MMIO32(SCT_BASE + 0x04) -/* -- SCT_CTRL_DOWN_L: This bit is 1 when the L or unified counter is counting down. Hardware sets this bit when the counter limit is reached and BIDIR is 1. Hardware clears this bit when the counter reaches 0 or when the counter is counting down and a limit condition occurs. */ +/* -- SCT_CTRL_DOWN_L: This bit is 1 when the L or unified counter is counting + * down. Hardware sets this bit when the counter limit is reached and BIDIR + * is 1. Hardware clears this bit when the counter reaches 0 or when the counter + * is counting down and a limit condition occurs. */ #define SCT_CTRL_DOWN_L_SHIFT (0) -#define SCT_CTRL_DOWN_L_MASK (0x01 << SCT_CTRL_DOWN_L_SHIFT) -#define SCT_CTRL_DOWN_L(x) ((x) << SCT_CTRL_DOWN_L_SHIFT) +#define SCT_CTRL_DOWN_L_MASK (0x01 << SCT_CTRL_DOWN_L_SHIFT) +#define SCT_CTRL_DOWN_L(x) ((x) << SCT_CTRL_DOWN_L_SHIFT) -/* -- SCT_CTRL_STOP_L: When this bit is 1 and HALT is 0, the L or unified counter does not run but I/O events related to the counter can occur. If such an event matches the mask in the Start register, this bit is cleared and counting resumes. */ +/* -- SCT_CTRL_STOP_L: When this bit is 1 and HALT is 0, the L or unified + * counter does not run but I/O events related to the counter can occur. If + * such an event matches the mask in the Start register, this bit is cleared + * and counting resumes. */ #define SCT_CTRL_STOP_L_SHIFT (1) -#define SCT_CTRL_STOP_L_MASK (0x01 << SCT_CTRL_STOP_L_SHIFT) -#define SCT_CTRL_STOP_L(x) ((x) << SCT_CTRL_STOP_L_SHIFT) +#define SCT_CTRL_STOP_L_MASK (0x01 << SCT_CTRL_STOP_L_SHIFT) +#define SCT_CTRL_STOP_L(x) ((x) << SCT_CTRL_STOP_L_SHIFT) -/* -- SCT_CTRL_HALT_L: When this bit is 1, the L or unified counter does not run and no events can occur. A reset sets this bit. When the HALT_L bit is one, the STOP_L bit is cleared. If you want to remove the halt condition and keep the SCT in the stop condition (not running), then you can change the halt and stop condition with one single write to this register. Once set, only software can clear this bit to restore counter operation. */ +/* -- SCT_CTRL_HALT_L: When this bit is 1, the L or unified counter does not run + * and no events can occur. A reset sets this bit. When the HALT_L bit is one, + * the STOP_L bit is cleared. If you want to remove the halt condition and keep + * the SCT in the stop condition (not running), then you can change the halt and + * stop condition with one single write to this register. Once set, only + * software can clear this bit to restore counter operation. */ #define SCT_CTRL_HALT_L_SHIFT (2) -#define SCT_CTRL_HALT_L_MASK (0x01 << SCT_CTRL_HALT_L_SHIFT) -#define SCT_CTRL_HALT_L(x) ((x) << SCT_CTRL_HALT_L_SHIFT) +#define SCT_CTRL_HALT_L_MASK (0x01 << SCT_CTRL_HALT_L_SHIFT) +#define SCT_CTRL_HALT_L(x) ((x) << SCT_CTRL_HALT_L_SHIFT) -/* -- SCT_CTRL_CLRCTR_L: Writing a 1 to this bit clears the L or unified counter. This bit always reads as 0. */ +/* -- SCT_CTRL_CLRCTR_L: Writing a 1 to this bit clears the L or unified + * counter. This bit always reads as 0. */ #define SCT_CTRL_CLRCTR_L_SHIFT (3) -#define SCT_CTRL_CLRCTR_L_MASK (0x01 << SCT_CTRL_CLRCTR_L_SHIFT) -#define SCT_CTRL_CLRCTR_L(x) ((x) << SCT_CTRL_CLRCTR_L_SHIFT) +#define SCT_CTRL_CLRCTR_L_MASK (0x01 << SCT_CTRL_CLRCTR_L_SHIFT) +#define SCT_CTRL_CLRCTR_L(x) ((x) << SCT_CTRL_CLRCTR_L_SHIFT) /* -- SCT_CTRL_BIDIR_L: L or unified counter direction select */ #define SCT_CTRL_BIDIR_L_SHIFT (4) -#define SCT_CTRL_BIDIR_L_MASK (0x01 << SCT_CTRL_BIDIR_L_SHIFT) -#define SCT_CTRL_BIDIR_L(x) ((x) << SCT_CTRL_BIDIR_L_SHIFT) +#define SCT_CTRL_BIDIR_L_MASK (0x01 << SCT_CTRL_BIDIR_L_SHIFT) +#define SCT_CTRL_BIDIR_L(x) ((x) << SCT_CTRL_BIDIR_L_SHIFT) /* SCT_CTRL_BIDIR_L_BIDIR_L values */ -#define SCT_CTRL_BIDIR_L_UP SCT_CTRL_BIDIR_L(0x00) /* Up. The counter counts up to its limit condition, then is cleared to zero. */ -#define SCT_CTRL_BIDIR_L_UPDOWN SCT_CTRL_BIDIR_L(0x01) /* Up-down. The counter counts up to its limit, then counts down to a limit condition or to 0. */ +/* Up. The counter counts up to its limit condition, then is cleared to zero. */ +#define SCT_CTRL_BIDIR_L_UP SCT_CTRL_BIDIR_L(0x00) +/* Up-down. The counter counts up to its limit, then counts down to a limit + * condition or to 0. */ +#define SCT_CTRL_BIDIR_L_UPDOWN SCT_CTRL_BIDIR_L(0x01) -/* -- SCT_CTRL_PRE_L: Specifies the factor by which the SCT clock is prescaled to produce the L or unified counter clock. The counter clock is clocked at the rate of the SCT clock divided by PRE_L+1. Clear the counter (by writing a 1 to the CLRCTR bit) whenever changing the PRE value. */ +/* -- SCT_CTRL_PRE_L: Specifies the factor by which the SCT clock is prescaled + * to produce the L or unified counter clock. The counter clock is clocked at + * the rate of the SCT clock divided by PRE_L+1. Clear the counter (by writing + * a 1 to the CLRCTR bit) whenever changing the PRE value. */ #define SCT_CTRL_PRE_L_SHIFT (5) -#define SCT_CTRL_PRE_L_MASK (0xFF << SCT_CTRL_PRE_L_SHIFT) -#define SCT_CTRL_PRE_L(x) ((x) << SCT_CTRL_PRE_L_SHIFT) +#define SCT_CTRL_PRE_L_MASK (0xFF << SCT_CTRL_PRE_L_SHIFT) +#define SCT_CTRL_PRE_L(x) ((x) << SCT_CTRL_PRE_L_SHIFT) -/* -- SCT_CTRL_DOWN_H: This bit is 1 when the H counter is counting down. Hardware sets this bit when the counter limit is reached and BIDIR is 1. Hardware clears this bit when the counter reaches 0 or when the counter is counting down and a limit condition occurs. */ +/* -- SCT_CTRL_DOWN_H: This bit is 1 when the H counter is counting down. + * Hardware sets this bit when the counter limit is reached and BIDIR is 1. + * Hardware clears this bit when the counter reaches 0 or when the counter is + * counting down and a limit condition occurs. */ #define SCT_CTRL_DOWN_H_SHIFT (16) -#define SCT_CTRL_DOWN_H_MASK (0x01 << SCT_CTRL_DOWN_H_SHIFT) -#define SCT_CTRL_DOWN_H(x) ((x) << SCT_CTRL_DOWN_H_SHIFT) +#define SCT_CTRL_DOWN_H_MASK (0x01 << SCT_CTRL_DOWN_H_SHIFT) +#define SCT_CTRL_DOWN_H(x) ((x) << SCT_CTRL_DOWN_H_SHIFT) -/* -- SCT_CTRL_STOP_H: When this bit is 1 and HALT is 0, the H counter does not run but I/O events related to the counter can occur. If such an event matches the mask in the Start register, this bit is cleared and counting resumes. */ +/* -- SCT_CTRL_STOP_H: When this bit is 1 and HALT is 0, the H counter does not + * run but I/O events related to the counter can occur. If such an event matches + * the mask in the Start register, this bit is cleared and counting resumes. */ #define SCT_CTRL_STOP_H_SHIFT (17) -#define SCT_CTRL_STOP_H_MASK (0x01 << SCT_CTRL_STOP_H_SHIFT) -#define SCT_CTRL_STOP_H(x) ((x) << SCT_CTRL_STOP_H_SHIFT) +#define SCT_CTRL_STOP_H_MASK (0x01 << SCT_CTRL_STOP_H_SHIFT) +#define SCT_CTRL_STOP_H(x) ((x) << SCT_CTRL_STOP_H_SHIFT) -/* -- SCT_CTRL_HALT_H: When this bit is 1, the H counter does not run and no events can occur. A reset sets this bit. When the HALT_H bit is one, the STOP_H bit is cleared. If you want to remove the halt condition and keep the SCT in the stop condition (not running), then you can change the halt and stop condition with one single write to this register. Once set, this bit can only be cleared by software to restore counter operation. */ +/* -- SCT_CTRL_HALT_H: When this bit is 1, the H counter does not run and no + * events can occur. A reset sets this bit. When the HALT_H bit is one, the + * STOP_H bit is cleared. If you want to remove the halt condition and keep the + * SCT in the stop condition (not running), then you can change the halt and + * stop condition with one single write to this register. Once set, this bit can + * only be cleared by software to restore counter operation. */ #define SCT_CTRL_HALT_H_SHIFT (18) -#define SCT_CTRL_HALT_H_MASK (0x01 << SCT_CTRL_HALT_H_SHIFT) -#define SCT_CTRL_HALT_H(x) ((x) << SCT_CTRL_HALT_H_SHIFT) +#define SCT_CTRL_HALT_H_MASK (0x01 << SCT_CTRL_HALT_H_SHIFT) +#define SCT_CTRL_HALT_H(x) ((x) << SCT_CTRL_HALT_H_SHIFT) -/* -- SCT_CTRL_CLRCTR_H: Writing a 1 to this bit clears the H counter. This bit always reads as 0. */ +/* -- SCT_CTRL_CLRCTR_H: Writing a 1 to this bit clears the H counter. This bit + * always reads as 0. */ #define SCT_CTRL_CLRCTR_H_SHIFT (19) -#define SCT_CTRL_CLRCTR_H_MASK (0x01 << SCT_CTRL_CLRCTR_H_SHIFT) -#define SCT_CTRL_CLRCTR_H(x) ((x) << SCT_CTRL_CLRCTR_H_SHIFT) +#define SCT_CTRL_CLRCTR_H_MASK (0x01 << SCT_CTRL_CLRCTR_H_SHIFT) +#define SCT_CTRL_CLRCTR_H(x) ((x) << SCT_CTRL_CLRCTR_H_SHIFT) /* -- SCT_CTRL_BIDIR_H: Direction select */ #define SCT_CTRL_BIDIR_H_SHIFT (20) -#define SCT_CTRL_BIDIR_H_MASK (0x01 << SCT_CTRL_BIDIR_H_SHIFT) -#define SCT_CTRL_BIDIR_H(x) ((x) << SCT_CTRL_BIDIR_H_SHIFT) +#define SCT_CTRL_BIDIR_H_MASK (0x01 << SCT_CTRL_BIDIR_H_SHIFT) +#define SCT_CTRL_BIDIR_H(x) ((x) << SCT_CTRL_BIDIR_H_SHIFT) /* SCT_CTRL_BIDIR_H_BIDIR_H values */ -#define SCT_CTRL_BIDIR_H_UP SCT_CTRL_BIDIR_H(0x00) /* Up. The H counter counts up to its limit condition, then is cleared to zero. */ -#define SCT_CTRL_BIDIR_H_UPDOWN SCT_CTRL_BIDIR_H(0x01) /* Up-down. The H counter counts up to its limit, then counts down to a limit condition or to 0. */ +/* Up. The H counter counts up to its limit condition, then is cleared to zero. + */ +#define SCT_CTRL_BIDIR_H_UP SCT_CTRL_BIDIR_H(0x00) +/* Up-down. The H counter counts up to its limit, then counts down to a limit + * condition or to 0. */ +#define SCT_CTRL_BIDIR_H_UPDOWN SCT_CTRL_BIDIR_H(0x01) -/* -- SCT_CTRL_PRE_H: Specifies the factor by which the SCT clock is prescaled to produce the H counter clock. The counter clock is clocked at the rate of the SCT clock divided by PRELH+1. Clear the counter (by writing a 1 to the CLRCTR bit) whenever changing the PRE value. */ +/* -- SCT_CTRL_PRE_H: Specifies the factor by which the SCT clock is prescaled + * to produce the H counter clock. The counter clock is clocked at the rate of + * the SCT clock divided by PRELH+1. Clear the counter (by writing a 1 to the + * CLRCTR bit) whenever changing the PRE value. */ #define SCT_CTRL_PRE_H_SHIFT (21) -#define SCT_CTRL_PRE_H_MASK (0xFF << SCT_CTRL_PRE_H_SHIFT) -#define SCT_CTRL_PRE_H(x) ((x) << SCT_CTRL_PRE_H_SHIFT) +#define SCT_CTRL_PRE_H_MASK (0xFF << SCT_CTRL_PRE_H_SHIFT) +#define SCT_CTRL_PRE_H(x) ((x) << SCT_CTRL_PRE_H_SHIFT) /* --- SCT_LIMIT ----------------------------------------- */ #define SCT_LIMIT MMIO32(SCT_BASE + 0x08) -/* -- SCT_LIMIT_LIMMSK_L: If bit n is one, event n is used as a counter limit event for the L or unified counter (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). */ +/* -- SCT_LIMIT_LIMMSK_L: If bit n is one, event n is used as a counter limit + * event for the L or unified counter (event 0 = bit 0, event 1 = bit 1, event + * 15 = bit 15). */ #define SCT_LIMIT_LIMMSK_L_SHIFT (0) -#define SCT_LIMIT_LIMMSK_L_MASK (0xFFFF << SCT_LIMIT_LIMMSK_L_SHIFT) -#define SCT_LIMIT_LIMMSK_L(x) ((x) << SCT_LIMIT_LIMMSK_L_SHIFT) +#define SCT_LIMIT_LIMMSK_L_MASK (0xFFFF << SCT_LIMIT_LIMMSK_L_SHIFT) +#define SCT_LIMIT_LIMMSK_L(x) ((x) << SCT_LIMIT_LIMMSK_L_SHIFT) -/* -- SCT_LIMIT_LIMMSK_H: If bit n is one, event n is used as a counter limit event for the H counter (event 0 = bit 16, event 1 = bit 17, event 15 = bit 31). */ +/* -- SCT_LIMIT_LIMMSK_H: If bit n is one, event n is used as a counter limit + * event for the H counter (event 0 = bit 16, event 1 = bit 17, event 15 = bit + * 31). */ #define SCT_LIMIT_LIMMSK_H_SHIFT (16) -#define SCT_LIMIT_LIMMSK_H_MASK (0xFFFF << SCT_LIMIT_LIMMSK_H_SHIFT) -#define SCT_LIMIT_LIMMSK_H(x) ((x) << SCT_LIMIT_LIMMSK_H_SHIFT) +#define SCT_LIMIT_LIMMSK_H_MASK (0xFFFF << SCT_LIMIT_LIMMSK_H_SHIFT) +#define SCT_LIMIT_LIMMSK_H(x) ((x) << SCT_LIMIT_LIMMSK_H_SHIFT) /* --- SCT_HALT ------------------------------------------ */ #define SCT_HALT MMIO32(SCT_BASE + 0x0C) -/* -- SCT_HALT_HALTMSK_L: If bit n is one, event n sets the HALT_L bit in the CTRL register (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). */ +/* -- SCT_HALT_HALTMSK_L: If bit n is one, event n sets the HALT_L bit in the + * CTRL register (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). */ #define SCT_HALT_HALTMSK_L_SHIFT (0) -#define SCT_HALT_HALTMSK_L_MASK (0xFFFF << SCT_HALT_HALTMSK_L_SHIFT) -#define SCT_HALT_HALTMSK_L(x) ((x) << SCT_HALT_HALTMSK_L_SHIFT) +#define SCT_HALT_HALTMSK_L_MASK (0xFFFF << SCT_HALT_HALTMSK_L_SHIFT) +#define SCT_HALT_HALTMSK_L(x) ((x) << SCT_HALT_HALTMSK_L_SHIFT) -/* -- SCT_HALT_HALTMSK_H: If bit n is one, event n sets the HALT_H bit in the CTRL register (event 0 = bit 16, event 1 = bit 17, event 15 = bit 31). */ +/* -- SCT_HALT_HALTMSK_H: If bit n is one, event n sets the HALT_H bit in the + * CTRL register (event 0 = bit 16, event 1 = bit 17, event 15 = bit 31). */ #define SCT_HALT_HALTMSK_H_SHIFT (16) -#define SCT_HALT_HALTMSK_H_MASK (0xFFFF << SCT_HALT_HALTMSK_H_SHIFT) -#define SCT_HALT_HALTMSK_H(x) ((x) << SCT_HALT_HALTMSK_H_SHIFT) +#define SCT_HALT_HALTMSK_H_MASK (0xFFFF << SCT_HALT_HALTMSK_H_SHIFT) +#define SCT_HALT_HALTMSK_H(x) ((x) << SCT_HALT_HALTMSK_H_SHIFT) /* --- SCT_STOP ------------------------------------------ */ #define SCT_STOP MMIO32(SCT_BASE + 0x10) -/* -- SCT_STOP_STOPMSK_L: If bit n is one, event n sets the STOP_L bit in the CTRL register (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). */ +/* -- SCT_STOP_STOPMSK_L: If bit n is one, event n sets the STOP_L bit in the + * CTRL register (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). */ #define SCT_STOP_STOPMSK_L_SHIFT (0) -#define SCT_STOP_STOPMSK_L_MASK (0xFFFF << SCT_STOP_STOPMSK_L_SHIFT) -#define SCT_STOP_STOPMSK_L(x) ((x) << SCT_STOP_STOPMSK_L_SHIFT) +#define SCT_STOP_STOPMSK_L_MASK (0xFFFF << SCT_STOP_STOPMSK_L_SHIFT) +#define SCT_STOP_STOPMSK_L(x) ((x) << SCT_STOP_STOPMSK_L_SHIFT) -/* -- SCT_STOP_STOPMSK_H: If bit n is one, event n sets the STOP_H bit in the CTRL register (event 0 = bit 16, event 1 = bit 17, event 15 = bit 31). */ +/* -- SCT_STOP_STOPMSK_H: If bit n is one, event n sets the STOP_H bit in the + * CTRL register (event 0 = bit 16, event 1 = bit 17, event 15 = bit 31). */ #define SCT_STOP_STOPMSK_H_SHIFT (16) -#define SCT_STOP_STOPMSK_H_MASK (0xFFFF << SCT_STOP_STOPMSK_H_SHIFT) -#define SCT_STOP_STOPMSK_H(x) ((x) << SCT_STOP_STOPMSK_H_SHIFT) +#define SCT_STOP_STOPMSK_H_MASK (0xFFFF << SCT_STOP_STOPMSK_H_SHIFT) +#define SCT_STOP_STOPMSK_H(x) ((x) << SCT_STOP_STOPMSK_H_SHIFT) /* --- SCT_START ----------------------------------------- */ #define SCT_START MMIO32(SCT_BASE + 0x14) -/* -- SCT_START_STARTMSK_L: If bit n is one, event n clears the STOP_L bit in the CTRL register (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). */ +/* -- SCT_START_STARTMSK_L: If bit n is one, event n clears the STOP_L bit in + * the CTRL register (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). */ #define SCT_START_STARTMSK_L_SHIFT (0) -#define SCT_START_STARTMSK_L_MASK (0xFFFF << SCT_START_STARTMSK_L_SHIFT) -#define SCT_START_STARTMSK_L(x) ((x) << SCT_START_STARTMSK_L_SHIFT) +#define SCT_START_STARTMSK_L_MASK (0xFFFF << SCT_START_STARTMSK_L_SHIFT) +#define SCT_START_STARTMSK_L(x) ((x) << SCT_START_STARTMSK_L_SHIFT) -/* -- SCT_START_STARTMSK_H: If bit n is one, event n clears the STOP_H bit in the CTRL register (event 0 = bit 16, event 1 = bit 17, event 15 = bit 31). */ +/* -- SCT_START_STARTMSK_H: If bit n is one, event n clears the STOP_H bit in + * the CTRL register (event 0 = bit 16, event 1 = bit 17, event 15 = bit 31). */ #define SCT_START_STARTMSK_H_SHIFT (16) -#define SCT_START_STARTMSK_H_MASK (0xFFFF << SCT_START_STARTMSK_H_SHIFT) -#define SCT_START_STARTMSK_H(x) ((x) << SCT_START_STARTMSK_H_SHIFT) +#define SCT_START_STARTMSK_H_MASK (0xFFFF << SCT_START_STARTMSK_H_SHIFT) +#define SCT_START_STARTMSK_H(x) ((x) << SCT_START_STARTMSK_H_SHIFT) /* --- SCT_DITHER ---------------------------------------- */ #define SCT_DITHER MMIO32(SCT_BASE + 0x18) -/* -- SCT_DITHER_DITHMSK_L: If bit n is one, the event n causes the dither engine to advance to the next element in the dither pattern at the start of the next counter cycle of the 16-bit low counter or the unified counter (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). If all bits are set to 0, the dither pattern automatically advances at the start of every new counter cycle. */ +/* -- SCT_DITHER_DITHMSK_L: If bit n is one, the event n causes the dither engine + * to advance to the next element in the dither pattern at the start of the next + * counter cycle of the 16-bit low counter or the unified counter (event 0 = bit + * 0, event 1 = bit 1, event 15 = bit 15). If all bits are set to 0, the dither + * pattern automatically advances at the start of every new counter cycle. */ #define SCT_DITHER_DITHMSK_L_SHIFT (0) -#define SCT_DITHER_DITHMSK_L_MASK (0xFFFF << SCT_DITHER_DITHMSK_L_SHIFT) -#define SCT_DITHER_DITHMSK_L(x) ((x) << SCT_DITHER_DITHMSK_L_SHIFT) +#define SCT_DITHER_DITHMSK_L_MASK (0xFFFF << SCT_DITHER_DITHMSK_L_SHIFT) +#define SCT_DITHER_DITHMSK_L(x) ((x) << SCT_DITHER_DITHMSK_L_SHIFT) -/* -- SCT_DITHER_DITHMSK_H: If bit n is one, the event n causes the dither engine to advance to the next element in the dither pattern at the start of the next counter cycle of the 16-bit high counter (event 0 = bit 0, event 1 = bit 1, event 15 = bit 15). If all bits are set to 0, the dither pattern automatically advances at the start of every new counter cycle. */ +/* -- SCT_DITHER_DITHMSK_H: If bit n is one, the event n causes the dither + * engine to advance to the next element in the dither pattern at the start of + * the next counter cycle of the 16-bit high counter (event 0 = bit 0, event 1 = + * bit 1, event 15 = bit 15). If all bits are set to 0, the dither pattern + * automatically advances at the start of every new counter cycle. */ #define SCT_DITHER_DITHMSK_H_SHIFT (16) -#define SCT_DITHER_DITHMSK_H_MASK (0xFFFF << SCT_DITHER_DITHMSK_H_SHIFT) -#define SCT_DITHER_DITHMSK_H(x) ((x) << SCT_DITHER_DITHMSK_H_SHIFT) +#define SCT_DITHER_DITHMSK_H_MASK (0xFFFF << SCT_DITHER_DITHMSK_H_SHIFT) +#define SCT_DITHER_DITHMSK_H(x) ((x) << SCT_DITHER_DITHMSK_H_SHIFT) /* --- SCT_COUNT ----------------------------------------- */ #define SCT_COUNT MMIO32(SCT_BASE + 0x40) -/* -- SCT_COUNT_CTR_L: When UNIFY = 0, read or write the 16-bit L counter value. When UNIFY = 1, read or write the lower 16 bits of the 32-bit unified counter. */ +/* -- SCT_COUNT_CTR_L: When UNIFY = 0, read or write the 16-bit L counter value. + * When UNIFY = 1, read or write the lower 16 bits of the 32-bit unified + * counter. */ #define SCT_COUNT_CTR_L_SHIFT (0) -#define SCT_COUNT_CTR_L_MASK (0xFFFF << SCT_COUNT_CTR_L_SHIFT) -#define SCT_COUNT_CTR_L(x) ((x) << SCT_COUNT_CTR_L_SHIFT) +#define SCT_COUNT_CTR_L_MASK (0xFFFF << SCT_COUNT_CTR_L_SHIFT) +#define SCT_COUNT_CTR_L(x) ((x) << SCT_COUNT_CTR_L_SHIFT) -/* -- SCT_COUNT_CTR_H: When UNIFY = 0, read or write the 16-bit H counter value. When UNIFY = 1, read or write the upper 16 bits of the 32-bit unified counter. */ +/* -- SCT_COUNT_CTR_H: When UNIFY = 0, read or write the 16-bit H counter value. + * When UNIFY = 1, read or write the upper 16 bits of the 32-bit unified + * counter. */ #define SCT_COUNT_CTR_H_SHIFT (16) -#define SCT_COUNT_CTR_H_MASK (0xFFFF << SCT_COUNT_CTR_H_SHIFT) -#define SCT_COUNT_CTR_H(x) ((x) << SCT_COUNT_CTR_H_SHIFT) +#define SCT_COUNT_CTR_H_MASK (0xFFFF << SCT_COUNT_CTR_H_SHIFT) +#define SCT_COUNT_CTR_H(x) ((x) << SCT_COUNT_CTR_H_SHIFT) /* --- SCT_STATE ----------------------------------------- */ #define SCT_STATE MMIO32(SCT_BASE + 0x44) /* -- SCT_STATE_STATE_L: State variable. */ #define SCT_STATE_STATE_L_SHIFT (0) -#define SCT_STATE_STATE_L_MASK (0x1F << SCT_STATE_STATE_L_SHIFT) -#define SCT_STATE_STATE_L(x) ((x) << SCT_STATE_STATE_L_SHIFT) +#define SCT_STATE_STATE_L_MASK (0x1F << SCT_STATE_STATE_L_SHIFT) +#define SCT_STATE_STATE_L(x) ((x) << SCT_STATE_STATE_L_SHIFT) /* -- SCT_STATE_STATE_H: State variable. */ #define SCT_STATE_STATE_H_SHIFT (16) -#define SCT_STATE_STATE_H_MASK (0x1F << SCT_STATE_STATE_H_SHIFT) -#define SCT_STATE_STATE_H(x) ((x) << SCT_STATE_STATE_H_SHIFT) +#define SCT_STATE_STATE_H_MASK (0x1F << SCT_STATE_STATE_H_SHIFT) +#define SCT_STATE_STATE_H(x) ((x) << SCT_STATE_STATE_H_SHIFT) /* --- SCT_INPUT ----------------------------------------- */ #define SCT_INPUT MMIO32(SCT_BASE + 0x48) /* -- SCT_INPUT_AIN0: Real-time status of input 0. */ #define SCT_INPUT_AIN0_SHIFT (0) -#define SCT_INPUT_AIN0_MASK (0x01 << SCT_INPUT_AIN0_SHIFT) -#define SCT_INPUT_AIN0(x) ((x) << SCT_INPUT_AIN0_SHIFT) +#define SCT_INPUT_AIN0_MASK (0x01 << SCT_INPUT_AIN0_SHIFT) +#define SCT_INPUT_AIN0(x) ((x) << SCT_INPUT_AIN0_SHIFT) /* -- SCT_INPUT_AIN1: Real-time status of input 1. */ #define SCT_INPUT_AIN1_SHIFT (1) -#define SCT_INPUT_AIN1_MASK (0x01 << SCT_INPUT_AIN1_SHIFT) -#define SCT_INPUT_AIN1(x) ((x) << SCT_INPUT_AIN1_SHIFT) +#define SCT_INPUT_AIN1_MASK (0x01 << SCT_INPUT_AIN1_SHIFT) +#define SCT_INPUT_AIN1(x) ((x) << SCT_INPUT_AIN1_SHIFT) /* -- SCT_INPUT_AIN2: Real-time status of input 2. */ #define SCT_INPUT_AIN2_SHIFT (2) -#define SCT_INPUT_AIN2_MASK (0x01 << SCT_INPUT_AIN2_SHIFT) -#define SCT_INPUT_AIN2(x) ((x) << SCT_INPUT_AIN2_SHIFT) +#define SCT_INPUT_AIN2_MASK (0x01 << SCT_INPUT_AIN2_SHIFT) +#define SCT_INPUT_AIN2(x) ((x) << SCT_INPUT_AIN2_SHIFT) /* -- SCT_INPUT_AIN3: Real-time status of input 3. */ #define SCT_INPUT_AIN3_SHIFT (3) -#define SCT_INPUT_AIN3_MASK (0x01 << SCT_INPUT_AIN3_SHIFT) -#define SCT_INPUT_AIN3(x) ((x) << SCT_INPUT_AIN3_SHIFT) +#define SCT_INPUT_AIN3_MASK (0x01 << SCT_INPUT_AIN3_SHIFT) +#define SCT_INPUT_AIN3(x) ((x) << SCT_INPUT_AIN3_SHIFT) /* -- SCT_INPUT_AIN4: Real-time status of input 4. */ #define SCT_INPUT_AIN4_SHIFT (4) -#define SCT_INPUT_AIN4_MASK (0x01 << SCT_INPUT_AIN4_SHIFT) -#define SCT_INPUT_AIN4(x) ((x) << SCT_INPUT_AIN4_SHIFT) +#define SCT_INPUT_AIN4_MASK (0x01 << SCT_INPUT_AIN4_SHIFT) +#define SCT_INPUT_AIN4(x) ((x) << SCT_INPUT_AIN4_SHIFT) /* -- SCT_INPUT_AIN5: Real-time status of input 5. */ #define SCT_INPUT_AIN5_SHIFT (5) -#define SCT_INPUT_AIN5_MASK (0x01 << SCT_INPUT_AIN5_SHIFT) -#define SCT_INPUT_AIN5(x) ((x) << SCT_INPUT_AIN5_SHIFT) +#define SCT_INPUT_AIN5_MASK (0x01 << SCT_INPUT_AIN5_SHIFT) +#define SCT_INPUT_AIN5(x) ((x) << SCT_INPUT_AIN5_SHIFT) /* -- SCT_INPUT_AIN6: Real-time status of input 6. */ #define SCT_INPUT_AIN6_SHIFT (6) -#define SCT_INPUT_AIN6_MASK (0x01 << SCT_INPUT_AIN6_SHIFT) -#define SCT_INPUT_AIN6(x) ((x) << SCT_INPUT_AIN6_SHIFT) +#define SCT_INPUT_AIN6_MASK (0x01 << SCT_INPUT_AIN6_SHIFT) +#define SCT_INPUT_AIN6(x) ((x) << SCT_INPUT_AIN6_SHIFT) /* -- SCT_INPUT_AIN7: Real-time status of input 7. */ #define SCT_INPUT_AIN7_SHIFT (7) -#define SCT_INPUT_AIN7_MASK (0x01 << SCT_INPUT_AIN7_SHIFT) -#define SCT_INPUT_AIN7(x) ((x) << SCT_INPUT_AIN7_SHIFT) +#define SCT_INPUT_AIN7_MASK (0x01 << SCT_INPUT_AIN7_SHIFT) +#define SCT_INPUT_AIN7(x) ((x) << SCT_INPUT_AIN7_SHIFT) /* -- SCT_INPUT_SIN0: Input 0 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN0_SHIFT (16) -#define SCT_INPUT_SIN0_MASK (0x01 << SCT_INPUT_SIN0_SHIFT) -#define SCT_INPUT_SIN0(x) ((x) << SCT_INPUT_SIN0_SHIFT) +#define SCT_INPUT_SIN0_MASK (0x01 << SCT_INPUT_SIN0_SHIFT) +#define SCT_INPUT_SIN0(x) ((x) << SCT_INPUT_SIN0_SHIFT) /* -- SCT_INPUT_SIN1: Input 1 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN1_SHIFT (17) -#define SCT_INPUT_SIN1_MASK (0x01 << SCT_INPUT_SIN1_SHIFT) -#define SCT_INPUT_SIN1(x) ((x) << SCT_INPUT_SIN1_SHIFT) +#define SCT_INPUT_SIN1_MASK (0x01 << SCT_INPUT_SIN1_SHIFT) +#define SCT_INPUT_SIN1(x) ((x) << SCT_INPUT_SIN1_SHIFT) /* -- SCT_INPUT_SIN2: Input 2 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN2_SHIFT (18) -#define SCT_INPUT_SIN2_MASK (0x01 << SCT_INPUT_SIN2_SHIFT) -#define SCT_INPUT_SIN2(x) ((x) << SCT_INPUT_SIN2_SHIFT) +#define SCT_INPUT_SIN2_MASK (0x01 << SCT_INPUT_SIN2_SHIFT) +#define SCT_INPUT_SIN2(x) ((x) << SCT_INPUT_SIN2_SHIFT) /* -- SCT_INPUT_SIN3: Input 3 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN3_SHIFT (19) -#define SCT_INPUT_SIN3_MASK (0x01 << SCT_INPUT_SIN3_SHIFT) -#define SCT_INPUT_SIN3(x) ((x) << SCT_INPUT_SIN3_SHIFT) +#define SCT_INPUT_SIN3_MASK (0x01 << SCT_INPUT_SIN3_SHIFT) +#define SCT_INPUT_SIN3(x) ((x) << SCT_INPUT_SIN3_SHIFT) /* -- SCT_INPUT_SIN4: Input 4 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN4_SHIFT (20) -#define SCT_INPUT_SIN4_MASK (0x01 << SCT_INPUT_SIN4_SHIFT) -#define SCT_INPUT_SIN4(x) ((x) << SCT_INPUT_SIN4_SHIFT) +#define SCT_INPUT_SIN4_MASK (0x01 << SCT_INPUT_SIN4_SHIFT) +#define SCT_INPUT_SIN4(x) ((x) << SCT_INPUT_SIN4_SHIFT) /* -- SCT_INPUT_SIN5: Input 5 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN5_SHIFT (21) -#define SCT_INPUT_SIN5_MASK (0x01 << SCT_INPUT_SIN5_SHIFT) -#define SCT_INPUT_SIN5(x) ((x) << SCT_INPUT_SIN5_SHIFT) +#define SCT_INPUT_SIN5_MASK (0x01 << SCT_INPUT_SIN5_SHIFT) +#define SCT_INPUT_SIN5(x) ((x) << SCT_INPUT_SIN5_SHIFT) /* -- SCT_INPUT_SIN6: Input 6 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN6_SHIFT (22) -#define SCT_INPUT_SIN6_MASK (0x01 << SCT_INPUT_SIN6_SHIFT) -#define SCT_INPUT_SIN6(x) ((x) << SCT_INPUT_SIN6_SHIFT) +#define SCT_INPUT_SIN6_MASK (0x01 << SCT_INPUT_SIN6_SHIFT) +#define SCT_INPUT_SIN6(x) ((x) << SCT_INPUT_SIN6_SHIFT) /* -- SCT_INPUT_SIN7: Input 7 state synchronized to the SCT clock. */ #define SCT_INPUT_SIN7_SHIFT (23) -#define SCT_INPUT_SIN7_MASK (0x01 << SCT_INPUT_SIN7_SHIFT) -#define SCT_INPUT_SIN7(x) ((x) << SCT_INPUT_SIN7_SHIFT) +#define SCT_INPUT_SIN7_MASK (0x01 << SCT_INPUT_SIN7_SHIFT) +#define SCT_INPUT_SIN7(x) ((x) << SCT_INPUT_SIN7_SHIFT) /* --- SCT_REGMODE --------------------------------------- */ #define SCT_REGMODE MMIO32(SCT_BASE + 0x4C) -/* -- SCT_REGMODE_REGMOD_L: Each bit controls one pair of match/capture registers (register 0 = bit 0, register 1 = bit 1,..., register 15 = bit 15). 0 = registers operate as match registers. 1 = registers operate as capture registers. */ +/* -- SCT_REGMODE_REGMOD_L: Each bit controls one pair of match/capture + * registers (register 0 = bit 0, register 1 = bit 1,..., register 15 = bit 15). + * 0 = registers operate as match registers. 1 = registers operate as capture + * registers. */ #define SCT_REGMODE_REGMOD_L_SHIFT (0) -#define SCT_REGMODE_REGMOD_L_MASK (0xFFFF << SCT_REGMODE_REGMOD_L_SHIFT) -#define SCT_REGMODE_REGMOD_L(x) ((x) << SCT_REGMODE_REGMOD_L_SHIFT) +#define SCT_REGMODE_REGMOD_L_MASK (0xFFFF << SCT_REGMODE_REGMOD_L_SHIFT) +#define SCT_REGMODE_REGMOD_L(x) ((x) << SCT_REGMODE_REGMOD_L_SHIFT) -/* -- SCT_REGMODE_REGMOD_H: Each bit controls one pair of match/capture registers (register 0 = bit 16, register 1 = bit 17,..., register 15 = bit 31). 0 = registers operate as match registers. 1 = registers operate as capture registers. */ +/* -- SCT_REGMODE_REGMOD_H: Each bit controls one pair of match/capture + * registers (register 0 = bit 16, register 1 = bit 17,..., register 15 = bit + * 31). 0 = registers operate as match registers. 1 = registers operate as + * capture registers. */ #define SCT_REGMODE_REGMOD_H_SHIFT (16) -#define SCT_REGMODE_REGMOD_H_MASK (0xFFFF << SCT_REGMODE_REGMOD_H_SHIFT) -#define SCT_REGMODE_REGMOD_H(x) ((x) << SCT_REGMODE_REGMOD_H_SHIFT) +#define SCT_REGMODE_REGMOD_H_MASK (0xFFFF << SCT_REGMODE_REGMOD_H_SHIFT) +#define SCT_REGMODE_REGMOD_H(x) ((x) << SCT_REGMODE_REGMOD_H_SHIFT) /* --- SCT_OUTPUT ---------------------------------------- */ #define SCT_OUTPUT MMIO32(SCT_BASE + 0x50) -/* -- SCT_OUTPUT_OUT: Writing a 1 to bit n makes the corresponding output HIGH. 0 makes the corresponding output LOW (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_OUTPUT_OUT: Writing a 1 to bit n makes the corresponding output HIGH. + * 0 makes the corresponding output LOW (output 0 = bit 0, output 1 = bit 1,..., + * output 15 = bit 15). */ #define SCT_OUTPUT_OUT_SHIFT (0) -#define SCT_OUTPUT_OUT_MASK (0xFFFF << SCT_OUTPUT_OUT_SHIFT) -#define SCT_OUTPUT_OUT(x) ((x) << SCT_OUTPUT_OUT_SHIFT) +#define SCT_OUTPUT_OUT_MASK (0xFFFF << SCT_OUTPUT_OUT_SHIFT) +#define SCT_OUTPUT_OUT(x) ((x) << SCT_OUTPUT_OUT_SHIFT) /* --- SCT_OUTPUTDIRCTRL --------------------------------- */ #define SCT_OUTPUTDIRCTRL MMIO32(SCT_BASE + 0x54) -/* -- SCT_OUTPUTDIRCTRL_SETCLR0: Set/clear operation on output 0. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR0: Set/clear operation on output 0. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR0_SHIFT (0) -#define SCT_OUTPUTDIRCTRL_SETCLR0_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR0_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR0(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR0_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR0_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR0_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR0(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR0_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR0_SETCLR0 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR0_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR0(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR0_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR0(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR0_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR0(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR0_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR0(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR0_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR0(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR0_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR0(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR1: Set/clear operation on output 1. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR1: Set/clear operation on output 1. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR1_SHIFT (2) -#define SCT_OUTPUTDIRCTRL_SETCLR1_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR1_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR1(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR1_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR1_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR1_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR1(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR1_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR1_SETCLR1 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR1_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR1(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR1_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR1(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR1_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR1(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR1_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR1(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR1_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR1(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR1_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR1(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR2: Set/clear operation on output 2. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR2: Set/clear operation on output 2. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR2_SHIFT (4) -#define SCT_OUTPUTDIRCTRL_SETCLR2_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR2_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR2(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR2_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR2_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR2_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR2(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR2_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR2_SETCLR2 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR2_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR2(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR2_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR2(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR2_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR2(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR2_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR2(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR2_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR2(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR2_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR2(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR3: Set/clear operation on output 3. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR3: Set/clear operation on output 3. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR3_SHIFT (6) -#define SCT_OUTPUTDIRCTRL_SETCLR3_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR3_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR3(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR3_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR3_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR3_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR3(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR3_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR3_SETCLR3 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR3_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR3(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR3_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR3(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR3_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR3(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR3_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR3(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR3_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR3(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR3_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR3(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR4: Set/clear operation on output 4. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR4: Set/clear operation on output 4. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR4_SHIFT (8) -#define SCT_OUTPUTDIRCTRL_SETCLR4_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR4_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR4(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR4_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR4_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR4_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR4(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR4_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR4_SETCLR4 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR4_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR4(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR4_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR4(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR4_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR4(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR4_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR4(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR4_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR4(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR4_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR4(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR5: Set/clear operation on output 5. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR5: Set/clear operation on output 5. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR5_SHIFT (10) -#define SCT_OUTPUTDIRCTRL_SETCLR5_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR5_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR5(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR5_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR5_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR5_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR5(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR5_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR5_SETCLR5 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR5_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR5(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR5_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR5(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR5_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR5(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR5_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR5(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR5_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR5(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR5_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR5(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR6: Set/clear operation on output 6. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR6: Set/clear operation on output 6. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR6_SHIFT (12) -#define SCT_OUTPUTDIRCTRL_SETCLR6_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR6_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR6(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR6_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR6_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR6_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR6(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR6_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR6_SETCLR6 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR6_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR6(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR6_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR6(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR6_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR6(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR6_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR6(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR6_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR6(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR6_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR6(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR7: Set/clear operation on output 7. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR7: Set/clear operation on output 7. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR7_SHIFT (14) -#define SCT_OUTPUTDIRCTRL_SETCLR7_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR7_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR7(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR7_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR7_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR7_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR7(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR7_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR7_SETCLR7 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR7_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR7(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR7_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR7(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR7_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR7(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR7_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR7(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR7_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR7(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR7_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR7(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR8: Set/clear operation on output 8. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR8: Set/clear operation on output 8. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR8_SHIFT (16) -#define SCT_OUTPUTDIRCTRL_SETCLR8_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR8_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR8(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR8_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR8_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR8_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR8(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR8_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR8_SETCLR8 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR8_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR8(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR8_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR8(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR8_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR8(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR8_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR8(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR8_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR8(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR8_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR8(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR9: Set/clear operation on output 9. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR9: Set/clear operation on output 9. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR9_SHIFT (18) -#define SCT_OUTPUTDIRCTRL_SETCLR9_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR9_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR9(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR9_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR9_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR9_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR9(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR9_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR9_SETCLR9 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR9_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR9(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR9_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR9(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR9_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR9(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR9_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR9(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR9_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR9(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR9_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR9(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR10: Set/clear operation on output 5. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR10: Set/clear operation on output 5. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT (20) -#define SCT_OUTPUTDIRCTRL_SETCLR10_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR10_MASK \ + (0x03 << SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT) #define SCT_OUTPUTDIRCTRL_SETCLR10(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR10_SETCLR10 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR10_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR10(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR10_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR10(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR10_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR10(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR10_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR10(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR10_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR10(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR10_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR10(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR11: Set/clear operation on output 11. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR11: Set/clear operation on output 11. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT (22) -#define SCT_OUTPUTDIRCTRL_SETCLR11_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR11_MASK \ + (0x03 << SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT) #define SCT_OUTPUTDIRCTRL_SETCLR11(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR11_SETCLR11 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR11_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR11(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR11_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR11(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR11_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR11(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR11_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR11(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR11_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR11(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR11_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR11(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR12: Set/clear operation on output 12. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR12: Set/clear operation on output 12. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT (24) -#define SCT_OUTPUTDIRCTRL_SETCLR12_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR12_MASK \ + (0x03 << SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT) #define SCT_OUTPUTDIRCTRL_SETCLR12(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR12_SETCLR12 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR12_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR12(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR12_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR12(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR12_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR12(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR12_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR12(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR12_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR12(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR12_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR12(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR13: Set/clear operation on output 13. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR13: Set/clear operation on output 13. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT (26) -#define SCT_OUTPUTDIRCTRL_SETCLR13_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR13_MASK \ + (0x03 << SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT) #define SCT_OUTPUTDIRCTRL_SETCLR13(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR13_SETCLR13 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR13_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR13(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR13_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR13(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR13_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR13(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR13_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR13(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR13_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR13(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR13_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR13(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR14: Set/clear operation on output 14. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR14: Set/clear operation on output 14. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT (28) -#define SCT_OUTPUTDIRCTRL_SETCLR14_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR14_MASK \ + (0x03 << SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT) #define SCT_OUTPUTDIRCTRL_SETCLR14(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR14_SETCLR14 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR14_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR14(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR14_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR14(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR14_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR14(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR14_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR14(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR14_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR14(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR14_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR14(0x02) -/* -- SCT_OUTPUTDIRCTRL_SETCLR15: Set/clear operation on output 15. Value 0x3 is reserved. Do not program this value. */ +/* -- SCT_OUTPUTDIRCTRL_SETCLR15: Set/clear operation on output 15. Value 0x3 is + * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT (30) -#define SCT_OUTPUTDIRCTRL_SETCLR15_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR15_MASK \ + (0x03 << SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT) #define SCT_OUTPUTDIRCTRL_SETCLR15(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR15_SETCLR15 values */ -#define SCT_OUTPUTDIRCTRL_SETCLR15_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR15(0x00) /* Independent. Set and clear do not depend on any counter. */ -#define SCT_OUTPUTDIRCTRL_SETCLR15_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR15(0x01) /* L counter. Set and clear are reversed when counter L or the unified counter is counting down. */ -#define SCT_OUTPUTDIRCTRL_SETCLR15_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR15(0x02) /* H counter. Set and clear are reversed when counter H is counting down. Do not use if UNIFY = 1. */ +/* Independent. Set and clear do not depend on any counter. */ +#define SCT_OUTPUTDIRCTRL_SETCLR15_INDEPENDENT SCT_OUTPUTDIRCTRL_SETCLR15(0x00) +/* L counter. Set and clear are reversed when counter L or the unified counter + * is counting down. */ +#define SCT_OUTPUTDIRCTRL_SETCLR15_L_COUNTER SCT_OUTPUTDIRCTRL_SETCLR15(0x01) +/* H counter. Set and clear are reversed when counter H is counting down. Do + * not use if UNIFY = 1. */ +#define SCT_OUTPUTDIRCTRL_SETCLR15_H_COUNTER SCT_OUTPUTDIRCTRL_SETCLR15(0x02) /* --- SCT_RES ------------------------------------------- */ #define SCT_RES MMIO32(SCT_BASE + 0x58) /* -- SCT_RES_O0RES: Effect of simultaneous set and clear on output 0. */ #define SCT_RES_O0RES_SHIFT (0) -#define SCT_RES_O0RES_MASK (0x03 << SCT_RES_O0RES_SHIFT) -#define SCT_RES_O0RES(x) ((x) << SCT_RES_O0RES_SHIFT) +#define SCT_RES_O0RES_MASK (0x03 << SCT_RES_O0RES_SHIFT) +#define SCT_RES_O0RES(x) ((x) << SCT_RES_O0RES_SHIFT) /* SCT_RES_O0RES_O0RES values */ -#define SCT_RES_O0RES_NO_CHANGE SCT_RES_O0RES(0x00) /* No change. */ -#define SCT_RES_O0RES_SET_OUTPUT_OR_CLEAR SCT_RES_O0RES(0x01) /* Set output (or clear based on the SETCLR0 field). */ -#define SCT_RES_O0RES_CLEAR_OUTPUT_OR_SET SCT_RES_O0RES(0x02) /* Clear output (or set based on the SETCLR0 field). */ -#define SCT_RES_O0RES_TOGGLE_OUTPUT SCT_RES_O0RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O0RES_NO_CHANGE SCT_RES_O0RES(0x00) +/* Set output (or clear based on the SETCLR0 field). */ +#define SCT_RES_O0RES_SET_OUTPUT_OR_CLEAR SCT_RES_O0RES(0x01) +/* Clear output (or set based on the SETCLR0 field). */ +#define SCT_RES_O0RES_CLEAR_OUTPUT_OR_SET SCT_RES_O0RES(0x02) +/* Toggle output. */ +#define SCT_RES_O0RES_TOGGLE_OUTPUT SCT_RES_O0RES(0x03) /* -- SCT_RES_O1RES: Effect of simultaneous set and clear on output 1. */ #define SCT_RES_O1RES_SHIFT (2) -#define SCT_RES_O1RES_MASK (0x03 << SCT_RES_O1RES_SHIFT) -#define SCT_RES_O1RES(x) ((x) << SCT_RES_O1RES_SHIFT) +#define SCT_RES_O1RES_MASK (0x03 << SCT_RES_O1RES_SHIFT) +#define SCT_RES_O1RES(x) ((x) << SCT_RES_O1RES_SHIFT) /* SCT_RES_O1RES_O1RES values */ -#define SCT_RES_O1RES_NO_CHANGE SCT_RES_O1RES(0x00) /* No change. */ -#define SCT_RES_O1RES_SET_OUTPUT_OR_CLEAR SCT_RES_O1RES(0x01) /* Set output (or clear based on the SETCLR1 field). */ -#define SCT_RES_O1RES_CLEAR_OUTPUT_OR_SET SCT_RES_O1RES(0x02) /* Clear output (or set based on the SETCLR1 field). */ -#define SCT_RES_O1RES_TOGGLE_OUTPUT SCT_RES_O1RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O1RES_NO_CHANGE SCT_RES_O1RES(0x00) +/* Set output (or clear based on the SETCLR1 field). */ +#define SCT_RES_O1RES_SET_OUTPUT_OR_CLEAR SCT_RES_O1RES(0x01) +/* Clear output (or set based on the SETCLR1 field). */ +#define SCT_RES_O1RES_CLEAR_OUTPUT_OR_SET SCT_RES_O1RES(0x02) +/* Toggle output. */ +#define SCT_RES_O1RES_TOGGLE_OUTPUT SCT_RES_O1RES(0x03) /* -- SCT_RES_O2RES: Effect of simultaneous set and clear on output 2. */ #define SCT_RES_O2RES_SHIFT (4) -#define SCT_RES_O2RES_MASK (0x03 << SCT_RES_O2RES_SHIFT) -#define SCT_RES_O2RES(x) ((x) << SCT_RES_O2RES_SHIFT) +#define SCT_RES_O2RES_MASK (0x03 << SCT_RES_O2RES_SHIFT) +#define SCT_RES_O2RES(x) ((x) << SCT_RES_O2RES_SHIFT) /* SCT_RES_O2RES_O2RES values */ -#define SCT_RES_O2RES_NO_CHANGE SCT_RES_O2RES(0x00) /* No change. */ -#define SCT_RES_O2RES_SET_OUTPUT_OR_CLEAR SCT_RES_O2RES(0x01) /* Set output (or clear based on the SETCLR2 field). */ -#define SCT_RES_O2RES_CLEAR_OUTPUT_N_OR_S SCT_RES_O2RES(0x02) /* Clear output n (or set based on the SETCLR2 field). */ -#define SCT_RES_O2RES_TOGGLE_OUTPUT SCT_RES_O2RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O2RES_NO_CHANGE SCT_RES_O2RES(0x00) +/* Set output (or clear based on the SETCLR2 field). */ +#define SCT_RES_O2RES_SET_OUTPUT_OR_CLEAR SCT_RES_O2RES(0x01) +/* Clear output n (or set based on the SETCLR2 field). */ +#define SCT_RES_O2RES_CLEAR_OUTPUT_N_OR_S SCT_RES_O2RES(0x02) +/* Toggle output. */ +#define SCT_RES_O2RES_TOGGLE_OUTPUT SCT_RES_O2RES(0x03) /* -- SCT_RES_O3RES: Effect of simultaneous set and clear on output 3. */ #define SCT_RES_O3RES_SHIFT (6) -#define SCT_RES_O3RES_MASK (0x03 << SCT_RES_O3RES_SHIFT) -#define SCT_RES_O3RES(x) ((x) << SCT_RES_O3RES_SHIFT) +#define SCT_RES_O3RES_MASK (0x03 << SCT_RES_O3RES_SHIFT) +#define SCT_RES_O3RES(x) ((x) << SCT_RES_O3RES_SHIFT) /* SCT_RES_O3RES_O3RES values */ -#define SCT_RES_O3RES_NO_CHANGE SCT_RES_O3RES(0x00) /* No change. */ -#define SCT_RES_O3RES_SET_OUTPUT_OR_CLEAR SCT_RES_O3RES(0x01) /* Set output (or clear based on the SETCLR3 field). */ -#define SCT_RES_O3RES_CLEAR_OUTPUT_OR_SET SCT_RES_O3RES(0x02) /* Clear output (or set based on the SETCLR3 field). */ -#define SCT_RES_O3RES_TOGGLE_OUTPUT SCT_RES_O3RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O3RES_NO_CHANGE SCT_RES_O3RES(0x00) +/* Set output (or clear based on the SETCLR3 field). */ +#define SCT_RES_O3RES_SET_OUTPUT_OR_CLEAR SCT_RES_O3RES(0x01) +/* Clear output (or set based on the SETCLR3 field). */ +#define SCT_RES_O3RES_CLEAR_OUTPUT_OR_SET SCT_RES_O3RES(0x02) +/* Toggle output. */ +#define SCT_RES_O3RES_TOGGLE_OUTPUT SCT_RES_O3RES(0x03) /* -- SCT_RES_O4RES: Effect of simultaneous set and clear on output 4. */ #define SCT_RES_O4RES_SHIFT (8) -#define SCT_RES_O4RES_MASK (0x03 << SCT_RES_O4RES_SHIFT) -#define SCT_RES_O4RES(x) ((x) << SCT_RES_O4RES_SHIFT) +#define SCT_RES_O4RES_MASK (0x03 << SCT_RES_O4RES_SHIFT) +#define SCT_RES_O4RES(x) ((x) << SCT_RES_O4RES_SHIFT) /* SCT_RES_O4RES_O4RES values */ -#define SCT_RES_O4RES_NO_CHANGE SCT_RES_O4RES(0x00) /* No change. */ -#define SCT_RES_O4RES_SET_OUTPUT_OR_CLEAR SCT_RES_O4RES(0x01) /* Set output (or clear based on the SETCLR4 field). */ -#define SCT_RES_O4RES_CLEAR_OUTPUT_OR_SET SCT_RES_O4RES(0x02) /* Clear output (or set based on the SETCLR4 field). */ -#define SCT_RES_O4RES_TOGGLE_OUTPUT SCT_RES_O4RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O4RES_NO_CHANGE SCT_RES_O4RES(0x00) +/* Set output (or clear based on the SETCLR4 field). */ +#define SCT_RES_O4RES_SET_OUTPUT_OR_CLEAR SCT_RES_O4RES(0x01) +/* Clear output (or set based on the SETCLR4 field). */ +#define SCT_RES_O4RES_CLEAR_OUTPUT_OR_SET SCT_RES_O4RES(0x02) +/* Toggle output. */ +#define SCT_RES_O4RES_TOGGLE_OUTPUT SCT_RES_O4RES(0x03) /* -- SCT_RES_O5RES: Effect of simultaneous set and clear on output 5. */ #define SCT_RES_O5RES_SHIFT (10) -#define SCT_RES_O5RES_MASK (0x03 << SCT_RES_O5RES_SHIFT) -#define SCT_RES_O5RES(x) ((x) << SCT_RES_O5RES_SHIFT) +#define SCT_RES_O5RES_MASK (0x03 << SCT_RES_O5RES_SHIFT) +#define SCT_RES_O5RES(x) ((x) << SCT_RES_O5RES_SHIFT) /* SCT_RES_O5RES_O5RES values */ -#define SCT_RES_O5RES_NO_CHANGE SCT_RES_O5RES(0x00) /* No change. */ -#define SCT_RES_O5RES_SET_OUTPUT_OR_CLEAR SCT_RES_O5RES(0x01) /* Set output (or clear based on the SETCLR5 field). */ -#define SCT_RES_O5RES_CLEAR_OUTPUT_OR_SET SCT_RES_O5RES(0x02) /* Clear output (or set based on the SETCLR5 field). */ -#define SCT_RES_O5RES_TOGGLE_OUTPUT SCT_RES_O5RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O5RES_NO_CHANGE SCT_RES_O5RES(0x00) +/* Set output (or clear based on the SETCLR5 field). */ +#define SCT_RES_O5RES_SET_OUTPUT_OR_CLEAR SCT_RES_O5RES(0x01) +/* Clear output (or set based on the SETCLR5 field). */ +#define SCT_RES_O5RES_CLEAR_OUTPUT_OR_SET SCT_RES_O5RES(0x02) +/* Toggle output. */ +#define SCT_RES_O5RES_TOGGLE_OUTPUT SCT_RES_O5RES(0x03) /* -- SCT_RES_O6RES: Effect of simultaneous set and clear on output 6. */ #define SCT_RES_O6RES_SHIFT (12) -#define SCT_RES_O6RES_MASK (0x03 << SCT_RES_O6RES_SHIFT) -#define SCT_RES_O6RES(x) ((x) << SCT_RES_O6RES_SHIFT) +#define SCT_RES_O6RES_MASK (0x03 << SCT_RES_O6RES_SHIFT) +#define SCT_RES_O6RES(x) ((x) << SCT_RES_O6RES_SHIFT) /* SCT_RES_O6RES_O6RES values */ -#define SCT_RES_O6RES_NO_CHANGE SCT_RES_O6RES(0x00) /* No change. */ -#define SCT_RES_O6RES_SET_OUTPUT_OR_CLEAR SCT_RES_O6RES(0x01) /* Set output (or clear based on the SETCLR6 field). */ -#define SCT_RES_O6RES_CLEAR_OUTPUT_OR_SET SCT_RES_O6RES(0x02) /* Clear output (or set based on the SETCLR6 field). */ -#define SCT_RES_O6RES_TOGGLE_OUTPUT SCT_RES_O6RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O6RES_NO_CHANGE SCT_RES_O6RES(0x00) +/* Set output (or clear based on the SETCLR6 field). */ +#define SCT_RES_O6RES_SET_OUTPUT_OR_CLEAR SCT_RES_O6RES(0x01) +/* Clear output (or set based on the SETCLR6 field). */ +#define SCT_RES_O6RES_CLEAR_OUTPUT_OR_SET SCT_RES_O6RES(0x02) +/* Toggle output. */ +#define SCT_RES_O6RES_TOGGLE_OUTPUT SCT_RES_O6RES(0x03) /* -- SCT_RES_O7RES: Effect of simultaneous set and clear on output 7. */ #define SCT_RES_O7RES_SHIFT (14) -#define SCT_RES_O7RES_MASK (0x03 << SCT_RES_O7RES_SHIFT) -#define SCT_RES_O7RES(x) ((x) << SCT_RES_O7RES_SHIFT) +#define SCT_RES_O7RES_MASK (0x03 << SCT_RES_O7RES_SHIFT) +#define SCT_RES_O7RES(x) ((x) << SCT_RES_O7RES_SHIFT) /* SCT_RES_O7RES_O7RES values */ -#define SCT_RES_O7RES_NO_CHANGE SCT_RES_O7RES(0x00) /* No change. */ -#define SCT_RES_O7RES_SET_OUTPUT_OR_CLEAR SCT_RES_O7RES(0x01) /* Set output (or clear based on the SETCLR7 field). */ -#define SCT_RES_O7RES_CLEAR_OUTPUT_OR_SET SCT_RES_O7RES(0x02) /* Clear output (or set based on the SETCLR7 field). */ -#define SCT_RES_O7RES_TOGGLE_OUTPUT SCT_RES_O7RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O7RES_NO_CHANGE SCT_RES_O7RES(0x00) +/* Set output (or clear based on the SETCLR7 field). */ +#define SCT_RES_O7RES_SET_OUTPUT_OR_CLEAR SCT_RES_O7RES(0x01) +/* Clear output (or set based on the SETCLR7 field). */ +#define SCT_RES_O7RES_CLEAR_OUTPUT_OR_SET SCT_RES_O7RES(0x02) +/* Toggle output. */ +#define SCT_RES_O7RES_TOGGLE_OUTPUT SCT_RES_O7RES(0x03) /* -- SCT_RES_O8RES: Effect of simultaneous set and clear on output 8. */ #define SCT_RES_O8RES_SHIFT (16) -#define SCT_RES_O8RES_MASK (0x03 << SCT_RES_O8RES_SHIFT) -#define SCT_RES_O8RES(x) ((x) << SCT_RES_O8RES_SHIFT) +#define SCT_RES_O8RES_MASK (0x03 << SCT_RES_O8RES_SHIFT) +#define SCT_RES_O8RES(x) ((x) << SCT_RES_O8RES_SHIFT) /* SCT_RES_O8RES_O8RES values */ -#define SCT_RES_O8RES_NO_CHANGE SCT_RES_O8RES(0x00) /* No change. */ -#define SCT_RES_O8RES_SET_OUTPUT_OR_CLEAR SCT_RES_O8RES(0x01) /* Set output (or clear based on the SETCLR8 field). */ -#define SCT_RES_O8RES_CLEAR_OUTPUT_OR_SET SCT_RES_O8RES(0x02) /* Clear output (or set based on the SETCLR8 field). */ -#define SCT_RES_O8RES_TOGGLE_OUTPUT SCT_RES_O8RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O8RES_NO_CHANGE SCT_RES_O8RES(0x00) +/* Set output (or clear based on the SETCLR8 field). */ +#define SCT_RES_O8RES_SET_OUTPUT_OR_CLEAR SCT_RES_O8RES(0x01) +/* Clear output (or set based on the SETCLR8 field). */ +#define SCT_RES_O8RES_CLEAR_OUTPUT_OR_SET SCT_RES_O8RES(0x02) +/* Toggle output. */ +#define SCT_RES_O8RES_TOGGLE_OUTPUT SCT_RES_O8RES(0x03) /* -- SCT_RES_O9RES: Effect of simultaneous set and clear on output 9. */ #define SCT_RES_O9RES_SHIFT (18) -#define SCT_RES_O9RES_MASK (0x03 << SCT_RES_O9RES_SHIFT) -#define SCT_RES_O9RES(x) ((x) << SCT_RES_O9RES_SHIFT) +#define SCT_RES_O9RES_MASK (0x03 << SCT_RES_O9RES_SHIFT) +#define SCT_RES_O9RES(x) ((x) << SCT_RES_O9RES_SHIFT) /* SCT_RES_O9RES_O9RES values */ -#define SCT_RES_O9RES_NO_CHANGE SCT_RES_O9RES(0x00) /* No change. */ -#define SCT_RES_O9RES_SET_OUTPUT_OR_CLEAR SCT_RES_O9RES(0x01) /* Set output (or clear based on the SETCLR9 field). */ -#define SCT_RES_O9RES_CLEAR_OUTPUT_OR_SET SCT_RES_O9RES(0x02) /* Clear output (or set based on the SETCLR9 field). */ -#define SCT_RES_O9RES_TOGGLE_OUTPUT SCT_RES_O9RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O9RES_NO_CHANGE SCT_RES_O9RES(0x00) +/* Set output (or clear based on the SETCLR9 field). */ +#define SCT_RES_O9RES_SET_OUTPUT_OR_CLEAR SCT_RES_O9RES(0x01) +/* Clear output (or set based on the SETCLR9 field). */ +#define SCT_RES_O9RES_CLEAR_OUTPUT_OR_SET SCT_RES_O9RES(0x02) +/* Toggle output. */ +#define SCT_RES_O9RES_TOGGLE_OUTPUT SCT_RES_O9RES(0x03) /* -- SCT_RES_O10RES: Effect of simultaneous set and clear on output 10. */ #define SCT_RES_O10RES_SHIFT (20) -#define SCT_RES_O10RES_MASK (0x03 << SCT_RES_O10RES_SHIFT) -#define SCT_RES_O10RES(x) ((x) << SCT_RES_O10RES_SHIFT) +#define SCT_RES_O10RES_MASK (0x03 << SCT_RES_O10RES_SHIFT) +#define SCT_RES_O10RES(x) ((x) << SCT_RES_O10RES_SHIFT) /* SCT_RES_O10RES_O10RES values */ -#define SCT_RES_O10RES_NO_CHANGE SCT_RES_O10RES(0x00) /* No change. */ -#define SCT_RES_O10RES_SET_OUTPUT_OR_CLEAR SCT_RES_O10RES(0x01) /* Set output (or clear based on the SETCLR10 field). */ -#define SCT_RES_O10RES_CLEAR_OUTPUT_OR_SET SCT_RES_O10RES(0x02) /* Clear output (or set based on the SETCLR10 field). */ -#define SCT_RES_O10RES_TOGGLE_OUTPUT SCT_RES_O10RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O10RES_NO_CHANGE SCT_RES_O10RES(0x00) +/* Set output (or clear based on the SETCLR10 field). */ +#define SCT_RES_O10RES_SET_OUTPUT_OR_CLEAR SCT_RES_O10RES(0x01) +/* Clear output (or set based on the SETCLR10 field). */ +#define SCT_RES_O10RES_CLEAR_OUTPUT_OR_SET SCT_RES_O10RES(0x02) +/* Toggle output. */ +#define SCT_RES_O10RES_TOGGLE_OUTPUT SCT_RES_O10RES(0x03) /* -- SCT_RES_O11RES: Effect of simultaneous set and clear on output 11. */ #define SCT_RES_O11RES_SHIFT (22) -#define SCT_RES_O11RES_MASK (0x03 << SCT_RES_O11RES_SHIFT) -#define SCT_RES_O11RES(x) ((x) << SCT_RES_O11RES_SHIFT) +#define SCT_RES_O11RES_MASK (0x03 << SCT_RES_O11RES_SHIFT) +#define SCT_RES_O11RES(x) ((x) << SCT_RES_O11RES_SHIFT) /* SCT_RES_O11RES_O11RES values */ -#define SCT_RES_O11RES_NO_CHANGE SCT_RES_O11RES(0x00) /* No change. */ -#define SCT_RES_O11RES_SET_OUTPUT_OR_CLEAR SCT_RES_O11RES(0x01) /* Set output (or clear based on the SETCLR11 field). */ -#define SCT_RES_O11RES_CLEAR_OUTPUT_OR_SET SCT_RES_O11RES(0x02) /* Clear output (or set based on the SETCLR11 field). */ -#define SCT_RES_O11RES_TOGGLE_OUTPUT SCT_RES_O11RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O11RES_NO_CHANGE SCT_RES_O11RES(0x00) +/* Set output (or clear based on the SETCLR11 field). */ +#define SCT_RES_O11RES_SET_OUTPUT_OR_CLEAR SCT_RES_O11RES(0x01) +/* Clear output (or set based on the SETCLR11 field). */ +#define SCT_RES_O11RES_CLEAR_OUTPUT_OR_SET SCT_RES_O11RES(0x02) +/* Toggle output. */ +#define SCT_RES_O11RES_TOGGLE_OUTPUT SCT_RES_O11RES(0x03) /* -- SCT_RES_O12RES: Effect of simultaneous set and clear on output 12. */ #define SCT_RES_O12RES_SHIFT (24) -#define SCT_RES_O12RES_MASK (0x03 << SCT_RES_O12RES_SHIFT) -#define SCT_RES_O12RES(x) ((x) << SCT_RES_O12RES_SHIFT) +#define SCT_RES_O12RES_MASK (0x03 << SCT_RES_O12RES_SHIFT) +#define SCT_RES_O12RES(x) ((x) << SCT_RES_O12RES_SHIFT) /* SCT_RES_O12RES_O12RES values */ -#define SCT_RES_O12RES_NO_CHANGE SCT_RES_O12RES(0x00) /* No change. */ -#define SCT_RES_O12RES_SET_OUTPUT_OR_CLEAR SCT_RES_O12RES(0x01) /* Set output (or clear based on the SETCLR12 field). */ -#define SCT_RES_O12RES_CLEAR_OUTPUT_OR_SET SCT_RES_O12RES(0x02) /* Clear output (or set based on the SETCLR12 field). */ -#define SCT_RES_O12RES_TOGGLE_OUTPUT SCT_RES_O12RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O12RES_NO_CHANGE SCT_RES_O12RES(0x00) +/* Set output (or clear based on the SETCLR12 field). */ +#define SCT_RES_O12RES_SET_OUTPUT_OR_CLEAR SCT_RES_O12RES(0x01) +/* Clear output (or set based on the SETCLR12 field). */ +#define SCT_RES_O12RES_CLEAR_OUTPUT_OR_SET SCT_RES_O12RES(0x02) +/* Toggle output. */ +#define SCT_RES_O12RES_TOGGLE_OUTPUT SCT_RES_O12RES(0x03) /* -- SCT_RES_O13RES: Effect of simultaneous set and clear on output 13. */ #define SCT_RES_O13RES_SHIFT (26) -#define SCT_RES_O13RES_MASK (0x03 << SCT_RES_O13RES_SHIFT) -#define SCT_RES_O13RES(x) ((x) << SCT_RES_O13RES_SHIFT) +#define SCT_RES_O13RES_MASK (0x03 << SCT_RES_O13RES_SHIFT) +#define SCT_RES_O13RES(x) ((x) << SCT_RES_O13RES_SHIFT) /* SCT_RES_O13RES_O13RES values */ -#define SCT_RES_O13RES_NO_CHANGE SCT_RES_O13RES(0x00) /* No change. */ -#define SCT_RES_O13RES_SET_OUTPUT_OR_CLEAR SCT_RES_O13RES(0x01) /* Set output (or clear based on the SETCLR13 field). */ -#define SCT_RES_O13RES_CLEAR_OUTPUT_OR_SET SCT_RES_O13RES(0x02) /* Clear output (or set based on the SETCLR13 field). */ -#define SCT_RES_O13RES_TOGGLE_OUTPUT SCT_RES_O13RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O13RES_NO_CHANGE SCT_RES_O13RES(0x00) +/* Set output (or clear based on the SETCLR13 field). */ +#define SCT_RES_O13RES_SET_OUTPUT_OR_CLEAR SCT_RES_O13RES(0x01) +/* Clear output (or set based on the SETCLR13 field). */ +#define SCT_RES_O13RES_CLEAR_OUTPUT_OR_SET SCT_RES_O13RES(0x02) +/* Toggle output. */ +#define SCT_RES_O13RES_TOGGLE_OUTPUT SCT_RES_O13RES(0x03) /* -- SCT_RES_O14RES: Effect of simultaneous set and clear on output 14. */ #define SCT_RES_O14RES_SHIFT (28) -#define SCT_RES_O14RES_MASK (0x03 << SCT_RES_O14RES_SHIFT) -#define SCT_RES_O14RES(x) ((x) << SCT_RES_O14RES_SHIFT) +#define SCT_RES_O14RES_MASK (0x03 << SCT_RES_O14RES_SHIFT) +#define SCT_RES_O14RES(x) ((x) << SCT_RES_O14RES_SHIFT) /* SCT_RES_O14RES_O14RES values */ -#define SCT_RES_O14RES_NO_CHANGE SCT_RES_O14RES(0x00) /* No change. */ -#define SCT_RES_O14RES_SET_OUTPUT_OR_CLEAR SCT_RES_O14RES(0x01) /* Set output (or clear based on the SETCLR14 field). */ -#define SCT_RES_O14RES_CLEAR_OUTPUT_OR_SET SCT_RES_O14RES(0x02) /* Clear output (or set based on the SETCLR14 field). */ -#define SCT_RES_O14RES_TOGGLE_OUTPUT SCT_RES_O14RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O14RES_NO_CHANGE SCT_RES_O14RES(0x00) +/* Set output (or clear based on the SETCLR14 field). */ +#define SCT_RES_O14RES_SET_OUTPUT_OR_CLEAR SCT_RES_O14RES(0x01) +/* Clear output (or set based on the SETCLR14 field). */ +#define SCT_RES_O14RES_CLEAR_OUTPUT_OR_SET SCT_RES_O14RES(0x02) +/* Toggle output. */ +#define SCT_RES_O14RES_TOGGLE_OUTPUT SCT_RES_O14RES(0x03) /* -- SCT_RES_O15RES: Effect of simultaneous set and clear on output 15. */ #define SCT_RES_O15RES_SHIFT (30) -#define SCT_RES_O15RES_MASK (0x03 << SCT_RES_O15RES_SHIFT) -#define SCT_RES_O15RES(x) ((x) << SCT_RES_O15RES_SHIFT) +#define SCT_RES_O15RES_MASK (0x03 << SCT_RES_O15RES_SHIFT) +#define SCT_RES_O15RES(x) ((x) << SCT_RES_O15RES_SHIFT) /* SCT_RES_O15RES_O15RES values */ -#define SCT_RES_O15RES_NO_CHANGE SCT_RES_O15RES(0x00) /* No change. */ -#define SCT_RES_O15RES_SET_OUTPUT_OR_CLEAR SCT_RES_O15RES(0x01) /* Set output (or clear based on the SETCLR15 field). */ -#define SCT_RES_O15RES_CLEAR_OUTPUT_OR_SET SCT_RES_O15RES(0x02) /* Clear output (or set based on the SETCLR15 field). */ -#define SCT_RES_O15RES_TOGGLE_OUTPUT SCT_RES_O15RES(0x03) /* Toggle output. */ +/* No change. */ +#define SCT_RES_O15RES_NO_CHANGE SCT_RES_O15RES(0x00) +/* Set output (or clear based on the SETCLR15 field). */ +#define SCT_RES_O15RES_SET_OUTPUT_OR_CLEAR SCT_RES_O15RES(0x01) +/* Clear output (or set based on the SETCLR15 field). */ +#define SCT_RES_O15RES_CLEAR_OUTPUT_OR_SET SCT_RES_O15RES(0x02) +/* Toggle output. */ +#define SCT_RES_O15RES_TOGGLE_OUTPUT SCT_RES_O15RES(0x03) /* --- SCT_DMAREQ0 --------------------------------------- */ #define SCT_DMAREQ0 MMIO32(SCT_BASE + 0x5C) -/* -- SCT_DMAREQ0_DEV_00: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_00: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_00_SHIFT (0) -#define SCT_DMAREQ0_DEV_00_MASK (0x01 << SCT_DMAREQ0_DEV_00_SHIFT) -#define SCT_DMAREQ0_DEV_00(x) ((x) << SCT_DMAREQ0_DEV_00_SHIFT) +#define SCT_DMAREQ0_DEV_00_MASK (0x01 << SCT_DMAREQ0_DEV_00_SHIFT) +#define SCT_DMAREQ0_DEV_00(x) ((x) << SCT_DMAREQ0_DEV_00_SHIFT) -/* -- SCT_DMAREQ0_DEV_01: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_01: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_01_SHIFT (1) -#define SCT_DMAREQ0_DEV_01_MASK (0x01 << SCT_DMAREQ0_DEV_01_SHIFT) -#define SCT_DMAREQ0_DEV_01(x) ((x) << SCT_DMAREQ0_DEV_01_SHIFT) +#define SCT_DMAREQ0_DEV_01_MASK (0x01 << SCT_DMAREQ0_DEV_01_SHIFT) +#define SCT_DMAREQ0_DEV_01(x) ((x) << SCT_DMAREQ0_DEV_01_SHIFT) -/* -- SCT_DMAREQ0_DEV_02: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_02: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_02_SHIFT (2) -#define SCT_DMAREQ0_DEV_02_MASK (0x01 << SCT_DMAREQ0_DEV_02_SHIFT) -#define SCT_DMAREQ0_DEV_02(x) ((x) << SCT_DMAREQ0_DEV_02_SHIFT) +#define SCT_DMAREQ0_DEV_02_MASK (0x01 << SCT_DMAREQ0_DEV_02_SHIFT) +#define SCT_DMAREQ0_DEV_02(x) ((x) << SCT_DMAREQ0_DEV_02_SHIFT) -/* -- SCT_DMAREQ0_DEV_03: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_03: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_03_SHIFT (3) -#define SCT_DMAREQ0_DEV_03_MASK (0x01 << SCT_DMAREQ0_DEV_03_SHIFT) -#define SCT_DMAREQ0_DEV_03(x) ((x) << SCT_DMAREQ0_DEV_03_SHIFT) +#define SCT_DMAREQ0_DEV_03_MASK (0x01 << SCT_DMAREQ0_DEV_03_SHIFT) +#define SCT_DMAREQ0_DEV_03(x) ((x) << SCT_DMAREQ0_DEV_03_SHIFT) -/* -- SCT_DMAREQ0_DEV_04: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_04: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_04_SHIFT (4) -#define SCT_DMAREQ0_DEV_04_MASK (0x01 << SCT_DMAREQ0_DEV_04_SHIFT) -#define SCT_DMAREQ0_DEV_04(x) ((x) << SCT_DMAREQ0_DEV_04_SHIFT) +#define SCT_DMAREQ0_DEV_04_MASK (0x01 << SCT_DMAREQ0_DEV_04_SHIFT) +#define SCT_DMAREQ0_DEV_04(x) ((x) << SCT_DMAREQ0_DEV_04_SHIFT) -/* -- SCT_DMAREQ0_DEV_05: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_05: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_05_SHIFT (5) -#define SCT_DMAREQ0_DEV_05_MASK (0x01 << SCT_DMAREQ0_DEV_05_SHIFT) -#define SCT_DMAREQ0_DEV_05(x) ((x) << SCT_DMAREQ0_DEV_05_SHIFT) +#define SCT_DMAREQ0_DEV_05_MASK (0x01 << SCT_DMAREQ0_DEV_05_SHIFT) +#define SCT_DMAREQ0_DEV_05(x) ((x) << SCT_DMAREQ0_DEV_05_SHIFT) -/* -- SCT_DMAREQ0_DEV_06: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_06: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_06_SHIFT (6) -#define SCT_DMAREQ0_DEV_06_MASK (0x01 << SCT_DMAREQ0_DEV_06_SHIFT) -#define SCT_DMAREQ0_DEV_06(x) ((x) << SCT_DMAREQ0_DEV_06_SHIFT) +#define SCT_DMAREQ0_DEV_06_MASK (0x01 << SCT_DMAREQ0_DEV_06_SHIFT) +#define SCT_DMAREQ0_DEV_06(x) ((x) << SCT_DMAREQ0_DEV_06_SHIFT) -/* -- SCT_DMAREQ0_DEV_07: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_07: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_07_SHIFT (7) -#define SCT_DMAREQ0_DEV_07_MASK (0x01 << SCT_DMAREQ0_DEV_07_SHIFT) -#define SCT_DMAREQ0_DEV_07(x) ((x) << SCT_DMAREQ0_DEV_07_SHIFT) +#define SCT_DMAREQ0_DEV_07_MASK (0x01 << SCT_DMAREQ0_DEV_07_SHIFT) +#define SCT_DMAREQ0_DEV_07(x) ((x) << SCT_DMAREQ0_DEV_07_SHIFT) -/* -- SCT_DMAREQ0_DEV_08: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_08: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_08_SHIFT (8) -#define SCT_DMAREQ0_DEV_08_MASK (0x01 << SCT_DMAREQ0_DEV_08_SHIFT) -#define SCT_DMAREQ0_DEV_08(x) ((x) << SCT_DMAREQ0_DEV_08_SHIFT) +#define SCT_DMAREQ0_DEV_08_MASK (0x01 << SCT_DMAREQ0_DEV_08_SHIFT) +#define SCT_DMAREQ0_DEV_08(x) ((x) << SCT_DMAREQ0_DEV_08_SHIFT) -/* -- SCT_DMAREQ0_DEV_09: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_09: If bit n is one, event n sets DMA request 0 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_09_SHIFT (9) -#define SCT_DMAREQ0_DEV_09_MASK (0x01 << SCT_DMAREQ0_DEV_09_SHIFT) -#define SCT_DMAREQ0_DEV_09(x) ((x) << SCT_DMAREQ0_DEV_09_SHIFT) +#define SCT_DMAREQ0_DEV_09_MASK (0x01 << SCT_DMAREQ0_DEV_09_SHIFT) +#define SCT_DMAREQ0_DEV_09(x) ((x) << SCT_DMAREQ0_DEV_09_SHIFT) -/* -- SCT_DMAREQ0_DEV_010: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_010: If bit n is one, event n sets DMA request 0 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_010_SHIFT (10) -#define SCT_DMAREQ0_DEV_010_MASK (0x01 << SCT_DMAREQ0_DEV_010_SHIFT) -#define SCT_DMAREQ0_DEV_010(x) ((x) << SCT_DMAREQ0_DEV_010_SHIFT) +#define SCT_DMAREQ0_DEV_010_MASK (0x01 << SCT_DMAREQ0_DEV_010_SHIFT) +#define SCT_DMAREQ0_DEV_010(x) ((x) << SCT_DMAREQ0_DEV_010_SHIFT) -/* -- SCT_DMAREQ0_DEV_011: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_011: If bit n is one, event n sets DMA request 0 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_011_SHIFT (11) -#define SCT_DMAREQ0_DEV_011_MASK (0x01 << SCT_DMAREQ0_DEV_011_SHIFT) -#define SCT_DMAREQ0_DEV_011(x) ((x) << SCT_DMAREQ0_DEV_011_SHIFT) +#define SCT_DMAREQ0_DEV_011_MASK (0x01 << SCT_DMAREQ0_DEV_011_SHIFT) +#define SCT_DMAREQ0_DEV_011(x) ((x) << SCT_DMAREQ0_DEV_011_SHIFT) -/* -- SCT_DMAREQ0_DEV_012: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_012: If bit n is one, event n sets DMA request 0 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_012_SHIFT (12) -#define SCT_DMAREQ0_DEV_012_MASK (0x01 << SCT_DMAREQ0_DEV_012_SHIFT) -#define SCT_DMAREQ0_DEV_012(x) ((x) << SCT_DMAREQ0_DEV_012_SHIFT) +#define SCT_DMAREQ0_DEV_012_MASK (0x01 << SCT_DMAREQ0_DEV_012_SHIFT) +#define SCT_DMAREQ0_DEV_012(x) ((x) << SCT_DMAREQ0_DEV_012_SHIFT) -/* -- SCT_DMAREQ0_DEV_013: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_013: If bit n is one, event n sets DMA request 0 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_013_SHIFT (13) -#define SCT_DMAREQ0_DEV_013_MASK (0x01 << SCT_DMAREQ0_DEV_013_SHIFT) -#define SCT_DMAREQ0_DEV_013(x) ((x) << SCT_DMAREQ0_DEV_013_SHIFT) +#define SCT_DMAREQ0_DEV_013_MASK (0x01 << SCT_DMAREQ0_DEV_013_SHIFT) +#define SCT_DMAREQ0_DEV_013(x) ((x) << SCT_DMAREQ0_DEV_013_SHIFT) -/* -- SCT_DMAREQ0_DEV_014: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_014: If bit n is one, event n sets DMA request 0 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_014_SHIFT (14) -#define SCT_DMAREQ0_DEV_014_MASK (0x01 << SCT_DMAREQ0_DEV_014_SHIFT) -#define SCT_DMAREQ0_DEV_014(x) ((x) << SCT_DMAREQ0_DEV_014_SHIFT) +#define SCT_DMAREQ0_DEV_014_MASK (0x01 << SCT_DMAREQ0_DEV_014_SHIFT) +#define SCT_DMAREQ0_DEV_014(x) ((x) << SCT_DMAREQ0_DEV_014_SHIFT) -/* -- SCT_DMAREQ0_DEV_015: If bit n is one, event n sets DMA request 0 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ0_DEV_015: If bit n is one, event n sets DMA request 0 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ0_DEV_015_SHIFT (15) -#define SCT_DMAREQ0_DEV_015_MASK (0x01 << SCT_DMAREQ0_DEV_015_SHIFT) -#define SCT_DMAREQ0_DEV_015(x) ((x) << SCT_DMAREQ0_DEV_015_SHIFT) +#define SCT_DMAREQ0_DEV_015_MASK (0x01 << SCT_DMAREQ0_DEV_015_SHIFT) +#define SCT_DMAREQ0_DEV_015(x) ((x) << SCT_DMAREQ0_DEV_015_SHIFT) -/* -- SCT_DMAREQ0_DRL0: A 1 in this bit makes the SCT set DMA request 0 when it loads the Match_L/Unified registers from the Reload_L/Unified registers. */ +/* -- SCT_DMAREQ0_DRL0: A 1 in this bit makes the SCT set DMA request 0 when it + * loads the Match_L/Unified registers from the Reload_L/Unified registers. */ #define SCT_DMAREQ0_DRL0_SHIFT (30) -#define SCT_DMAREQ0_DRL0_MASK (0x01 << SCT_DMAREQ0_DRL0_SHIFT) -#define SCT_DMAREQ0_DRL0(x) ((x) << SCT_DMAREQ0_DRL0_SHIFT) +#define SCT_DMAREQ0_DRL0_MASK (0x01 << SCT_DMAREQ0_DRL0_SHIFT) +#define SCT_DMAREQ0_DRL0(x) ((x) << SCT_DMAREQ0_DRL0_SHIFT) /* -- SCT_DMAREQ0_DRQ0: This read-only bit indicates the state of DMA Request 0 */ #define SCT_DMAREQ0_DRQ0_SHIFT (31) -#define SCT_DMAREQ0_DRQ0_MASK (0x01 << SCT_DMAREQ0_DRQ0_SHIFT) -#define SCT_DMAREQ0_DRQ0(x) ((x) << SCT_DMAREQ0_DRQ0_SHIFT) +#define SCT_DMAREQ0_DRQ0_MASK (0x01 << SCT_DMAREQ0_DRQ0_SHIFT) +#define SCT_DMAREQ0_DRQ0(x) ((x) << SCT_DMAREQ0_DRQ0_SHIFT) /* --- SCT_DMAREQ1 --------------------------------------- */ #define SCT_DMAREQ1 MMIO32(SCT_BASE + 0x60) -/* -- SCT_DMAREQ1_DEV_10: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_10: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_10_SHIFT (0) -#define SCT_DMAREQ1_DEV_10_MASK (0x01 << SCT_DMAREQ1_DEV_10_SHIFT) -#define SCT_DMAREQ1_DEV_10(x) ((x) << SCT_DMAREQ1_DEV_10_SHIFT) +#define SCT_DMAREQ1_DEV_10_MASK (0x01 << SCT_DMAREQ1_DEV_10_SHIFT) +#define SCT_DMAREQ1_DEV_10(x) ((x) << SCT_DMAREQ1_DEV_10_SHIFT) -/* -- SCT_DMAREQ1_DEV_11: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_11: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_11_SHIFT (1) -#define SCT_DMAREQ1_DEV_11_MASK (0x01 << SCT_DMAREQ1_DEV_11_SHIFT) -#define SCT_DMAREQ1_DEV_11(x) ((x) << SCT_DMAREQ1_DEV_11_SHIFT) +#define SCT_DMAREQ1_DEV_11_MASK (0x01 << SCT_DMAREQ1_DEV_11_SHIFT) +#define SCT_DMAREQ1_DEV_11(x) ((x) << SCT_DMAREQ1_DEV_11_SHIFT) -/* -- SCT_DMAREQ1_DEV_12: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_12: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_12_SHIFT (2) -#define SCT_DMAREQ1_DEV_12_MASK (0x01 << SCT_DMAREQ1_DEV_12_SHIFT) -#define SCT_DMAREQ1_DEV_12(x) ((x) << SCT_DMAREQ1_DEV_12_SHIFT) +#define SCT_DMAREQ1_DEV_12_MASK (0x01 << SCT_DMAREQ1_DEV_12_SHIFT) +#define SCT_DMAREQ1_DEV_12(x) ((x) << SCT_DMAREQ1_DEV_12_SHIFT) -/* -- SCT_DMAREQ1_DEV_13: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_13: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_13_SHIFT (3) -#define SCT_DMAREQ1_DEV_13_MASK (0x01 << SCT_DMAREQ1_DEV_13_SHIFT) -#define SCT_DMAREQ1_DEV_13(x) ((x) << SCT_DMAREQ1_DEV_13_SHIFT) +#define SCT_DMAREQ1_DEV_13_MASK (0x01 << SCT_DMAREQ1_DEV_13_SHIFT) +#define SCT_DMAREQ1_DEV_13(x) ((x) << SCT_DMAREQ1_DEV_13_SHIFT) -/* -- SCT_DMAREQ1_DEV_14: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_14: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_14_SHIFT (4) -#define SCT_DMAREQ1_DEV_14_MASK (0x01 << SCT_DMAREQ1_DEV_14_SHIFT) -#define SCT_DMAREQ1_DEV_14(x) ((x) << SCT_DMAREQ1_DEV_14_SHIFT) +#define SCT_DMAREQ1_DEV_14_MASK (0x01 << SCT_DMAREQ1_DEV_14_SHIFT) +#define SCT_DMAREQ1_DEV_14(x) ((x) << SCT_DMAREQ1_DEV_14_SHIFT) -/* -- SCT_DMAREQ1_DEV_15: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_15: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_15_SHIFT (5) -#define SCT_DMAREQ1_DEV_15_MASK (0x01 << SCT_DMAREQ1_DEV_15_SHIFT) -#define SCT_DMAREQ1_DEV_15(x) ((x) << SCT_DMAREQ1_DEV_15_SHIFT) +#define SCT_DMAREQ1_DEV_15_MASK (0x01 << SCT_DMAREQ1_DEV_15_SHIFT) +#define SCT_DMAREQ1_DEV_15(x) ((x) << SCT_DMAREQ1_DEV_15_SHIFT) -/* -- SCT_DMAREQ1_DEV_16: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_16: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_16_SHIFT (6) -#define SCT_DMAREQ1_DEV_16_MASK (0x01 << SCT_DMAREQ1_DEV_16_SHIFT) -#define SCT_DMAREQ1_DEV_16(x) ((x) << SCT_DMAREQ1_DEV_16_SHIFT) +#define SCT_DMAREQ1_DEV_16_MASK (0x01 << SCT_DMAREQ1_DEV_16_SHIFT) +#define SCT_DMAREQ1_DEV_16(x) ((x) << SCT_DMAREQ1_DEV_16_SHIFT) -/* -- SCT_DMAREQ1_DEV_17: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_17: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_17_SHIFT (7) -#define SCT_DMAREQ1_DEV_17_MASK (0x01 << SCT_DMAREQ1_DEV_17_SHIFT) -#define SCT_DMAREQ1_DEV_17(x) ((x) << SCT_DMAREQ1_DEV_17_SHIFT) +#define SCT_DMAREQ1_DEV_17_MASK (0x01 << SCT_DMAREQ1_DEV_17_SHIFT) +#define SCT_DMAREQ1_DEV_17(x) ((x) << SCT_DMAREQ1_DEV_17_SHIFT) -/* -- SCT_DMAREQ1_DEV_18: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_18: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_18_SHIFT (8) -#define SCT_DMAREQ1_DEV_18_MASK (0x01 << SCT_DMAREQ1_DEV_18_SHIFT) -#define SCT_DMAREQ1_DEV_18(x) ((x) << SCT_DMAREQ1_DEV_18_SHIFT) +#define SCT_DMAREQ1_DEV_18_MASK (0x01 << SCT_DMAREQ1_DEV_18_SHIFT) +#define SCT_DMAREQ1_DEV_18(x) ((x) << SCT_DMAREQ1_DEV_18_SHIFT) -/* -- SCT_DMAREQ1_DEV_19: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_19: If bit n is one, event n sets DMA request 1 (event 0 = + * bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_19_SHIFT (9) -#define SCT_DMAREQ1_DEV_19_MASK (0x01 << SCT_DMAREQ1_DEV_19_SHIFT) -#define SCT_DMAREQ1_DEV_19(x) ((x) << SCT_DMAREQ1_DEV_19_SHIFT) +#define SCT_DMAREQ1_DEV_19_MASK (0x01 << SCT_DMAREQ1_DEV_19_SHIFT) +#define SCT_DMAREQ1_DEV_19(x) ((x) << SCT_DMAREQ1_DEV_19_SHIFT) -/* -- SCT_DMAREQ1_DEV_110: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_110: If bit n is one, event n sets DMA request 1 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_110_SHIFT (10) -#define SCT_DMAREQ1_DEV_110_MASK (0x01 << SCT_DMAREQ1_DEV_110_SHIFT) -#define SCT_DMAREQ1_DEV_110(x) ((x) << SCT_DMAREQ1_DEV_110_SHIFT) +#define SCT_DMAREQ1_DEV_110_MASK (0x01 << SCT_DMAREQ1_DEV_110_SHIFT) +#define SCT_DMAREQ1_DEV_110(x) ((x) << SCT_DMAREQ1_DEV_110_SHIFT) -/* -- SCT_DMAREQ1_DEV_111: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_111: If bit n is one, event n sets DMA request 1 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_111_SHIFT (11) -#define SCT_DMAREQ1_DEV_111_MASK (0x01 << SCT_DMAREQ1_DEV_111_SHIFT) -#define SCT_DMAREQ1_DEV_111(x) ((x) << SCT_DMAREQ1_DEV_111_SHIFT) +#define SCT_DMAREQ1_DEV_111_MASK (0x01 << SCT_DMAREQ1_DEV_111_SHIFT) +#define SCT_DMAREQ1_DEV_111(x) ((x) << SCT_DMAREQ1_DEV_111_SHIFT) -/* -- SCT_DMAREQ1_DEV_112: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_112: If bit n is one, event n sets DMA request 1 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_112_SHIFT (12) -#define SCT_DMAREQ1_DEV_112_MASK (0x01 << SCT_DMAREQ1_DEV_112_SHIFT) -#define SCT_DMAREQ1_DEV_112(x) ((x) << SCT_DMAREQ1_DEV_112_SHIFT) +#define SCT_DMAREQ1_DEV_112_MASK (0x01 << SCT_DMAREQ1_DEV_112_SHIFT) +#define SCT_DMAREQ1_DEV_112(x) ((x) << SCT_DMAREQ1_DEV_112_SHIFT) -/* -- SCT_DMAREQ1_DEV_113: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_113: If bit n is one, event n sets DMA request 1 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_113_SHIFT (13) -#define SCT_DMAREQ1_DEV_113_MASK (0x01 << SCT_DMAREQ1_DEV_113_SHIFT) -#define SCT_DMAREQ1_DEV_113(x) ((x) << SCT_DMAREQ1_DEV_113_SHIFT) +#define SCT_DMAREQ1_DEV_113_MASK (0x01 << SCT_DMAREQ1_DEV_113_SHIFT) +#define SCT_DMAREQ1_DEV_113(x) ((x) << SCT_DMAREQ1_DEV_113_SHIFT) -/* -- SCT_DMAREQ1_DEV_114: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_114: If bit n is one, event n sets DMA request 1 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_114_SHIFT (14) -#define SCT_DMAREQ1_DEV_114_MASK (0x01 << SCT_DMAREQ1_DEV_114_SHIFT) -#define SCT_DMAREQ1_DEV_114(x) ((x) << SCT_DMAREQ1_DEV_114_SHIFT) +#define SCT_DMAREQ1_DEV_114_MASK (0x01 << SCT_DMAREQ1_DEV_114_SHIFT) +#define SCT_DMAREQ1_DEV_114(x) ((x) << SCT_DMAREQ1_DEV_114_SHIFT) -/* -- SCT_DMAREQ1_DEV_115: If bit n is one, event n sets DMA request 1 (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_DMAREQ1_DEV_115: If bit n is one, event n sets DMA request 1 (event 0 + * = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ #define SCT_DMAREQ1_DEV_115_SHIFT (15) -#define SCT_DMAREQ1_DEV_115_MASK (0x01 << SCT_DMAREQ1_DEV_115_SHIFT) -#define SCT_DMAREQ1_DEV_115(x) ((x) << SCT_DMAREQ1_DEV_115_SHIFT) +#define SCT_DMAREQ1_DEV_115_MASK (0x01 << SCT_DMAREQ1_DEV_115_SHIFT) +#define SCT_DMAREQ1_DEV_115(x) ((x) << SCT_DMAREQ1_DEV_115_SHIFT) -/* -- SCT_DMAREQ1_DRL1: A 1 in this bit makes the SCT set DMA request 1 when it loads the Match L/Unified registers from the Reload L/Unified registers. */ +/* -- SCT_DMAREQ1_DRL1: A 1 in this bit makes the SCT set DMA request 1 when it + * loads the Match L/Unified registers from the Reload L/Unified registers. */ #define SCT_DMAREQ1_DRL1_SHIFT (30) -#define SCT_DMAREQ1_DRL1_MASK (0x01 << SCT_DMAREQ1_DRL1_SHIFT) -#define SCT_DMAREQ1_DRL1(x) ((x) << SCT_DMAREQ1_DRL1_SHIFT) +#define SCT_DMAREQ1_DRL1_MASK (0x01 << SCT_DMAREQ1_DRL1_SHIFT) +#define SCT_DMAREQ1_DRL1(x) ((x) << SCT_DMAREQ1_DRL1_SHIFT) -/* -- SCT_DMAREQ1_DRQ1: This read-only bit indicates the state of DMA Request 1. */ +/* -- SCT_DMAREQ1_DRQ1: This read-only bit indicates the state of DMA Request 1. + */ #define SCT_DMAREQ1_DRQ1_SHIFT (31) -#define SCT_DMAREQ1_DRQ1_MASK (0x01 << SCT_DMAREQ1_DRQ1_SHIFT) -#define SCT_DMAREQ1_DRQ1(x) ((x) << SCT_DMAREQ1_DRQ1_SHIFT) +#define SCT_DMAREQ1_DRQ1_MASK (0x01 << SCT_DMAREQ1_DRQ1_SHIFT) +#define SCT_DMAREQ1_DRQ1(x) ((x) << SCT_DMAREQ1_DRQ1_SHIFT) /* --- SCT_EVEN ------------------------------------------ */ #define SCT_EVEN MMIO32(SCT_BASE + 0xF0) -/* -- SCT_EVEN_IEN0: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN0: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN0_SHIFT (0) -#define SCT_EVEN_IEN0_MASK (0x01 << SCT_EVEN_IEN0_SHIFT) -#define SCT_EVEN_IEN0(x) ((x) << SCT_EVEN_IEN0_SHIFT) +#define SCT_EVEN_IEN0_MASK (0x01 << SCT_EVEN_IEN0_SHIFT) +#define SCT_EVEN_IEN0(x) ((x) << SCT_EVEN_IEN0_SHIFT) -/* -- SCT_EVEN_IEN1: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN1: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN1_SHIFT (1) -#define SCT_EVEN_IEN1_MASK (0x01 << SCT_EVEN_IEN1_SHIFT) -#define SCT_EVEN_IEN1(x) ((x) << SCT_EVEN_IEN1_SHIFT) +#define SCT_EVEN_IEN1_MASK (0x01 << SCT_EVEN_IEN1_SHIFT) +#define SCT_EVEN_IEN1(x) ((x) << SCT_EVEN_IEN1_SHIFT) -/* -- SCT_EVEN_IEN2: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN2: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN2_SHIFT (2) -#define SCT_EVEN_IEN2_MASK (0x01 << SCT_EVEN_IEN2_SHIFT) -#define SCT_EVEN_IEN2(x) ((x) << SCT_EVEN_IEN2_SHIFT) +#define SCT_EVEN_IEN2_MASK (0x01 << SCT_EVEN_IEN2_SHIFT) +#define SCT_EVEN_IEN2(x) ((x) << SCT_EVEN_IEN2_SHIFT) -/* -- SCT_EVEN_IEN3: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN3: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN3_SHIFT (3) -#define SCT_EVEN_IEN3_MASK (0x01 << SCT_EVEN_IEN3_SHIFT) -#define SCT_EVEN_IEN3(x) ((x) << SCT_EVEN_IEN3_SHIFT) +#define SCT_EVEN_IEN3_MASK (0x01 << SCT_EVEN_IEN3_SHIFT) +#define SCT_EVEN_IEN3(x) ((x) << SCT_EVEN_IEN3_SHIFT) -/* -- SCT_EVEN_IEN4: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN4: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN4_SHIFT (4) -#define SCT_EVEN_IEN4_MASK (0x01 << SCT_EVEN_IEN4_SHIFT) -#define SCT_EVEN_IEN4(x) ((x) << SCT_EVEN_IEN4_SHIFT) +#define SCT_EVEN_IEN4_MASK (0x01 << SCT_EVEN_IEN4_SHIFT) +#define SCT_EVEN_IEN4(x) ((x) << SCT_EVEN_IEN4_SHIFT) -/* -- SCT_EVEN_IEN5: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN5: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN5_SHIFT (5) -#define SCT_EVEN_IEN5_MASK (0x01 << SCT_EVEN_IEN5_SHIFT) -#define SCT_EVEN_IEN5(x) ((x) << SCT_EVEN_IEN5_SHIFT) +#define SCT_EVEN_IEN5_MASK (0x01 << SCT_EVEN_IEN5_SHIFT) +#define SCT_EVEN_IEN5(x) ((x) << SCT_EVEN_IEN5_SHIFT) -/* -- SCT_EVEN_IEN6: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN6: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN6_SHIFT (6) -#define SCT_EVEN_IEN6_MASK (0x01 << SCT_EVEN_IEN6_SHIFT) -#define SCT_EVEN_IEN6(x) ((x) << SCT_EVEN_IEN6_SHIFT) +#define SCT_EVEN_IEN6_MASK (0x01 << SCT_EVEN_IEN6_SHIFT) +#define SCT_EVEN_IEN6(x) ((x) << SCT_EVEN_IEN6_SHIFT) -/* -- SCT_EVEN_IEN7: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN7: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN7_SHIFT (7) -#define SCT_EVEN_IEN7_MASK (0x01 << SCT_EVEN_IEN7_SHIFT) -#define SCT_EVEN_IEN7(x) ((x) << SCT_EVEN_IEN7_SHIFT) +#define SCT_EVEN_IEN7_MASK (0x01 << SCT_EVEN_IEN7_SHIFT) +#define SCT_EVEN_IEN7(x) ((x) << SCT_EVEN_IEN7_SHIFT) -/* -- SCT_EVEN_IEN8: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN8: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN8_SHIFT (8) -#define SCT_EVEN_IEN8_MASK (0x01 << SCT_EVEN_IEN8_SHIFT) -#define SCT_EVEN_IEN8(x) ((x) << SCT_EVEN_IEN8_SHIFT) +#define SCT_EVEN_IEN8_MASK (0x01 << SCT_EVEN_IEN8_SHIFT) +#define SCT_EVEN_IEN8(x) ((x) << SCT_EVEN_IEN8_SHIFT) -/* -- SCT_EVEN_IEN9: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN9: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN9_SHIFT (9) -#define SCT_EVEN_IEN9_MASK (0x01 << SCT_EVEN_IEN9_SHIFT) -#define SCT_EVEN_IEN9(x) ((x) << SCT_EVEN_IEN9_SHIFT) +#define SCT_EVEN_IEN9_MASK (0x01 << SCT_EVEN_IEN9_SHIFT) +#define SCT_EVEN_IEN9(x) ((x) << SCT_EVEN_IEN9_SHIFT) -/* -- SCT_EVEN_IEN10: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN10: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN10_SHIFT (10) -#define SCT_EVEN_IEN10_MASK (0x01 << SCT_EVEN_IEN10_SHIFT) -#define SCT_EVEN_IEN10(x) ((x) << SCT_EVEN_IEN10_SHIFT) +#define SCT_EVEN_IEN10_MASK (0x01 << SCT_EVEN_IEN10_SHIFT) +#define SCT_EVEN_IEN10(x) ((x) << SCT_EVEN_IEN10_SHIFT) -/* -- SCT_EVEN_IEN11: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN11: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN11_SHIFT (11) -#define SCT_EVEN_IEN11_MASK (0x01 << SCT_EVEN_IEN11_SHIFT) -#define SCT_EVEN_IEN11(x) ((x) << SCT_EVEN_IEN11_SHIFT) +#define SCT_EVEN_IEN11_MASK (0x01 << SCT_EVEN_IEN11_SHIFT) +#define SCT_EVEN_IEN11(x) ((x) << SCT_EVEN_IEN11_SHIFT) -/* -- SCT_EVEN_IEN12: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN12: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN12_SHIFT (12) -#define SCT_EVEN_IEN12_MASK (0x01 << SCT_EVEN_IEN12_SHIFT) -#define SCT_EVEN_IEN12(x) ((x) << SCT_EVEN_IEN12_SHIFT) +#define SCT_EVEN_IEN12_MASK (0x01 << SCT_EVEN_IEN12_SHIFT) +#define SCT_EVEN_IEN12(x) ((x) << SCT_EVEN_IEN12_SHIFT) -/* -- SCT_EVEN_IEN13: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN13: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN13_SHIFT (13) -#define SCT_EVEN_IEN13_MASK (0x01 << SCT_EVEN_IEN13_SHIFT) -#define SCT_EVEN_IEN13(x) ((x) << SCT_EVEN_IEN13_SHIFT) +#define SCT_EVEN_IEN13_MASK (0x01 << SCT_EVEN_IEN13_SHIFT) +#define SCT_EVEN_IEN13(x) ((x) << SCT_EVEN_IEN13_SHIFT) -/* -- SCT_EVEN_IEN14: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN14: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN14_SHIFT (14) -#define SCT_EVEN_IEN14_MASK (0x01 << SCT_EVEN_IEN14_SHIFT) -#define SCT_EVEN_IEN14(x) ((x) << SCT_EVEN_IEN14_SHIFT) +#define SCT_EVEN_IEN14_MASK (0x01 << SCT_EVEN_IEN14_SHIFT) +#define SCT_EVEN_IEN14(x) ((x) << SCT_EVEN_IEN14_SHIFT) -/* -- SCT_EVEN_IEN15: The SCT requests interrupt when bit n of this register and the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVEN_IEN15: The SCT requests interrupt when bit n of this register and + * the event flag register are both one (event 0 = bit 0, event 1 = bit 1,..., + * event 15 = bit 15). */ #define SCT_EVEN_IEN15_SHIFT (15) -#define SCT_EVEN_IEN15_MASK (0x01 << SCT_EVEN_IEN15_SHIFT) -#define SCT_EVEN_IEN15(x) ((x) << SCT_EVEN_IEN15_SHIFT) +#define SCT_EVEN_IEN15_MASK (0x01 << SCT_EVEN_IEN15_SHIFT) +#define SCT_EVEN_IEN15(x) ((x) << SCT_EVEN_IEN15_SHIFT) /* --- SCT_EVFLAG ---------------------------------------- */ #define SCT_EVFLAG MMIO32(SCT_BASE + 0xF4) -/* -- SCT_EVFLAG_FLAG0: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG0: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG0_SHIFT (0) -#define SCT_EVFLAG_FLAG0_MASK (0x01 << SCT_EVFLAG_FLAG0_SHIFT) -#define SCT_EVFLAG_FLAG0(x) ((x) << SCT_EVFLAG_FLAG0_SHIFT) +#define SCT_EVFLAG_FLAG0_MASK (0x01 << SCT_EVFLAG_FLAG0_SHIFT) +#define SCT_EVFLAG_FLAG0(x) ((x) << SCT_EVFLAG_FLAG0_SHIFT) -/* -- SCT_EVFLAG_FLAG1: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG1: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG1_SHIFT (1) -#define SCT_EVFLAG_FLAG1_MASK (0x01 << SCT_EVFLAG_FLAG1_SHIFT) -#define SCT_EVFLAG_FLAG1(x) ((x) << SCT_EVFLAG_FLAG1_SHIFT) +#define SCT_EVFLAG_FLAG1_MASK (0x01 << SCT_EVFLAG_FLAG1_SHIFT) +#define SCT_EVFLAG_FLAG1(x) ((x) << SCT_EVFLAG_FLAG1_SHIFT) -/* -- SCT_EVFLAG_FLAG2: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG2: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG2_SHIFT (2) -#define SCT_EVFLAG_FLAG2_MASK (0x01 << SCT_EVFLAG_FLAG2_SHIFT) -#define SCT_EVFLAG_FLAG2(x) ((x) << SCT_EVFLAG_FLAG2_SHIFT) +#define SCT_EVFLAG_FLAG2_MASK (0x01 << SCT_EVFLAG_FLAG2_SHIFT) +#define SCT_EVFLAG_FLAG2(x) ((x) << SCT_EVFLAG_FLAG2_SHIFT) -/* -- SCT_EVFLAG_FLAG3: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG3: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG3_SHIFT (3) -#define SCT_EVFLAG_FLAG3_MASK (0x01 << SCT_EVFLAG_FLAG3_SHIFT) -#define SCT_EVFLAG_FLAG3(x) ((x) << SCT_EVFLAG_FLAG3_SHIFT) +#define SCT_EVFLAG_FLAG3_MASK (0x01 << SCT_EVFLAG_FLAG3_SHIFT) +#define SCT_EVFLAG_FLAG3(x) ((x) << SCT_EVFLAG_FLAG3_SHIFT) -/* -- SCT_EVFLAG_FLAG4: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG4: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG4_SHIFT (4) -#define SCT_EVFLAG_FLAG4_MASK (0x01 << SCT_EVFLAG_FLAG4_SHIFT) -#define SCT_EVFLAG_FLAG4(x) ((x) << SCT_EVFLAG_FLAG4_SHIFT) +#define SCT_EVFLAG_FLAG4_MASK (0x01 << SCT_EVFLAG_FLAG4_SHIFT) +#define SCT_EVFLAG_FLAG4(x) ((x) << SCT_EVFLAG_FLAG4_SHIFT) -/* -- SCT_EVFLAG_FLAG5: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG5: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG5_SHIFT (5) -#define SCT_EVFLAG_FLAG5_MASK (0x01 << SCT_EVFLAG_FLAG5_SHIFT) -#define SCT_EVFLAG_FLAG5(x) ((x) << SCT_EVFLAG_FLAG5_SHIFT) +#define SCT_EVFLAG_FLAG5_MASK (0x01 << SCT_EVFLAG_FLAG5_SHIFT) +#define SCT_EVFLAG_FLAG5(x) ((x) << SCT_EVFLAG_FLAG5_SHIFT) -/* -- SCT_EVFLAG_FLAG6: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG6: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG6_SHIFT (6) -#define SCT_EVFLAG_FLAG6_MASK (0x01 << SCT_EVFLAG_FLAG6_SHIFT) -#define SCT_EVFLAG_FLAG6(x) ((x) << SCT_EVFLAG_FLAG6_SHIFT) +#define SCT_EVFLAG_FLAG6_MASK (0x01 << SCT_EVFLAG_FLAG6_SHIFT) +#define SCT_EVFLAG_FLAG6(x) ((x) << SCT_EVFLAG_FLAG6_SHIFT) -/* -- SCT_EVFLAG_FLAG7: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG7: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG7_SHIFT (7) -#define SCT_EVFLAG_FLAG7_MASK (0x01 << SCT_EVFLAG_FLAG7_SHIFT) -#define SCT_EVFLAG_FLAG7(x) ((x) << SCT_EVFLAG_FLAG7_SHIFT) +#define SCT_EVFLAG_FLAG7_MASK (0x01 << SCT_EVFLAG_FLAG7_SHIFT) +#define SCT_EVFLAG_FLAG7(x) ((x) << SCT_EVFLAG_FLAG7_SHIFT) -/* -- SCT_EVFLAG_FLAG8: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG8: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG8_SHIFT (8) -#define SCT_EVFLAG_FLAG8_MASK (0x01 << SCT_EVFLAG_FLAG8_SHIFT) -#define SCT_EVFLAG_FLAG8(x) ((x) << SCT_EVFLAG_FLAG8_SHIFT) +#define SCT_EVFLAG_FLAG8_MASK (0x01 << SCT_EVFLAG_FLAG8_SHIFT) +#define SCT_EVFLAG_FLAG8(x) ((x) << SCT_EVFLAG_FLAG8_SHIFT) -/* -- SCT_EVFLAG_FLAG9: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG9: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG9_SHIFT (9) -#define SCT_EVFLAG_FLAG9_MASK (0x01 << SCT_EVFLAG_FLAG9_SHIFT) -#define SCT_EVFLAG_FLAG9(x) ((x) << SCT_EVFLAG_FLAG9_SHIFT) +#define SCT_EVFLAG_FLAG9_MASK (0x01 << SCT_EVFLAG_FLAG9_SHIFT) +#define SCT_EVFLAG_FLAG9(x) ((x) << SCT_EVFLAG_FLAG9_SHIFT) -/* -- SCT_EVFLAG_FLAG10: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG10: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG10_SHIFT (10) -#define SCT_EVFLAG_FLAG10_MASK (0x01 << SCT_EVFLAG_FLAG10_SHIFT) -#define SCT_EVFLAG_FLAG10(x) ((x) << SCT_EVFLAG_FLAG10_SHIFT) +#define SCT_EVFLAG_FLAG10_MASK (0x01 << SCT_EVFLAG_FLAG10_SHIFT) +#define SCT_EVFLAG_FLAG10(x) ((x) << SCT_EVFLAG_FLAG10_SHIFT) -/* -- SCT_EVFLAG_FLAG11: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG11: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG11_SHIFT (11) -#define SCT_EVFLAG_FLAG11_MASK (0x01 << SCT_EVFLAG_FLAG11_SHIFT) -#define SCT_EVFLAG_FLAG11(x) ((x) << SCT_EVFLAG_FLAG11_SHIFT) +#define SCT_EVFLAG_FLAG11_MASK (0x01 << SCT_EVFLAG_FLAG11_SHIFT) +#define SCT_EVFLAG_FLAG11(x) ((x) << SCT_EVFLAG_FLAG11_SHIFT) -/* -- SCT_EVFLAG_FLAG12: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG12: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG12_SHIFT (12) -#define SCT_EVFLAG_FLAG12_MASK (0x01 << SCT_EVFLAG_FLAG12_SHIFT) -#define SCT_EVFLAG_FLAG12(x) ((x) << SCT_EVFLAG_FLAG12_SHIFT) +#define SCT_EVFLAG_FLAG12_MASK (0x01 << SCT_EVFLAG_FLAG12_SHIFT) +#define SCT_EVFLAG_FLAG12(x) ((x) << SCT_EVFLAG_FLAG12_SHIFT) -/* -- SCT_EVFLAG_FLAG13: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG13: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG13_SHIFT (13) -#define SCT_EVFLAG_FLAG13_MASK (0x01 << SCT_EVFLAG_FLAG13_SHIFT) -#define SCT_EVFLAG_FLAG13(x) ((x) << SCT_EVFLAG_FLAG13_SHIFT) +#define SCT_EVFLAG_FLAG13_MASK (0x01 << SCT_EVFLAG_FLAG13_SHIFT) +#define SCT_EVFLAG_FLAG13(x) ((x) << SCT_EVFLAG_FLAG13_SHIFT) -/* -- SCT_EVFLAG_FLAG14: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG14: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG14_SHIFT (14) -#define SCT_EVFLAG_FLAG14_MASK (0x01 << SCT_EVFLAG_FLAG14_SHIFT) -#define SCT_EVFLAG_FLAG14(x) ((x) << SCT_EVFLAG_FLAG14_SHIFT) +#define SCT_EVFLAG_FLAG14_MASK (0x01 << SCT_EVFLAG_FLAG14_SHIFT) +#define SCT_EVFLAG_FLAG14(x) ((x) << SCT_EVFLAG_FLAG14_SHIFT) -/* -- SCT_EVFLAG_FLAG15: Bit n is one if event n has occurred since reset or a 1 was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_EVFLAG_FLAG15: Bit n is one if event n has occurred since reset or a 1 + * was last written to this bit (event 0 = bit 0, event 1 = bit 1,..., event 15 + * = bit 15). */ #define SCT_EVFLAG_FLAG15_SHIFT (15) -#define SCT_EVFLAG_FLAG15_MASK (0x01 << SCT_EVFLAG_FLAG15_SHIFT) -#define SCT_EVFLAG_FLAG15(x) ((x) << SCT_EVFLAG_FLAG15_SHIFT) +#define SCT_EVFLAG_FLAG15_MASK (0x01 << SCT_EVFLAG_FLAG15_SHIFT) +#define SCT_EVFLAG_FLAG15(x) ((x) << SCT_EVFLAG_FLAG15_SHIFT) /* --- SCT_CONEN ----------------------------------------- */ #define SCT_CONEN MMIO32(SCT_BASE + 0xF8) -/* -- SCT_CONEN_NCEN0: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN0: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN0_SHIFT (0) -#define SCT_CONEN_NCEN0_MASK (0x01 << SCT_CONEN_NCEN0_SHIFT) -#define SCT_CONEN_NCEN0(x) ((x) << SCT_CONEN_NCEN0_SHIFT) +#define SCT_CONEN_NCEN0_MASK (0x01 << SCT_CONEN_NCEN0_SHIFT) +#define SCT_CONEN_NCEN0(x) ((x) << SCT_CONEN_NCEN0_SHIFT) -/* -- SCT_CONEN_NCEN1: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN1: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN1_SHIFT (1) -#define SCT_CONEN_NCEN1_MASK (0x01 << SCT_CONEN_NCEN1_SHIFT) -#define SCT_CONEN_NCEN1(x) ((x) << SCT_CONEN_NCEN1_SHIFT) +#define SCT_CONEN_NCEN1_MASK (0x01 << SCT_CONEN_NCEN1_SHIFT) +#define SCT_CONEN_NCEN1(x) ((x) << SCT_CONEN_NCEN1_SHIFT) -/* -- SCT_CONEN_NCEN2: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN2: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN2_SHIFT (2) -#define SCT_CONEN_NCEN2_MASK (0x01 << SCT_CONEN_NCEN2_SHIFT) -#define SCT_CONEN_NCEN2(x) ((x) << SCT_CONEN_NCEN2_SHIFT) +#define SCT_CONEN_NCEN2_MASK (0x01 << SCT_CONEN_NCEN2_SHIFT) +#define SCT_CONEN_NCEN2(x) ((x) << SCT_CONEN_NCEN2_SHIFT) -/* -- SCT_CONEN_NCEN3: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN3: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN3_SHIFT (3) -#define SCT_CONEN_NCEN3_MASK (0x01 << SCT_CONEN_NCEN3_SHIFT) -#define SCT_CONEN_NCEN3(x) ((x) << SCT_CONEN_NCEN3_SHIFT) +#define SCT_CONEN_NCEN3_MASK (0x01 << SCT_CONEN_NCEN3_SHIFT) +#define SCT_CONEN_NCEN3(x) ((x) << SCT_CONEN_NCEN3_SHIFT) -/* -- SCT_CONEN_NCEN4: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN4: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN4_SHIFT (4) -#define SCT_CONEN_NCEN4_MASK (0x01 << SCT_CONEN_NCEN4_SHIFT) -#define SCT_CONEN_NCEN4(x) ((x) << SCT_CONEN_NCEN4_SHIFT) +#define SCT_CONEN_NCEN4_MASK (0x01 << SCT_CONEN_NCEN4_SHIFT) +#define SCT_CONEN_NCEN4(x) ((x) << SCT_CONEN_NCEN4_SHIFT) -/* -- SCT_CONEN_NCEN5: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN5: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN5_SHIFT (5) -#define SCT_CONEN_NCEN5_MASK (0x01 << SCT_CONEN_NCEN5_SHIFT) -#define SCT_CONEN_NCEN5(x) ((x) << SCT_CONEN_NCEN5_SHIFT) +#define SCT_CONEN_NCEN5_MASK (0x01 << SCT_CONEN_NCEN5_SHIFT) +#define SCT_CONEN_NCEN5(x) ((x) << SCT_CONEN_NCEN5_SHIFT) -/* -- SCT_CONEN_NCEN6: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN6: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN6_SHIFT (6) -#define SCT_CONEN_NCEN6_MASK (0x01 << SCT_CONEN_NCEN6_SHIFT) -#define SCT_CONEN_NCEN6(x) ((x) << SCT_CONEN_NCEN6_SHIFT) +#define SCT_CONEN_NCEN6_MASK (0x01 << SCT_CONEN_NCEN6_SHIFT) +#define SCT_CONEN_NCEN6(x) ((x) << SCT_CONEN_NCEN6_SHIFT) -/* -- SCT_CONEN_NCEN7: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN7: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN7_SHIFT (7) -#define SCT_CONEN_NCEN7_MASK (0x01 << SCT_CONEN_NCEN7_SHIFT) -#define SCT_CONEN_NCEN7(x) ((x) << SCT_CONEN_NCEN7_SHIFT) +#define SCT_CONEN_NCEN7_MASK (0x01 << SCT_CONEN_NCEN7_SHIFT) +#define SCT_CONEN_NCEN7(x) ((x) << SCT_CONEN_NCEN7_SHIFT) -/* -- SCT_CONEN_NCEN8: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN8: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN8_SHIFT (8) -#define SCT_CONEN_NCEN8_MASK (0x01 << SCT_CONEN_NCEN8_SHIFT) -#define SCT_CONEN_NCEN8(x) ((x) << SCT_CONEN_NCEN8_SHIFT) +#define SCT_CONEN_NCEN8_MASK (0x01 << SCT_CONEN_NCEN8_SHIFT) +#define SCT_CONEN_NCEN8(x) ((x) << SCT_CONEN_NCEN8_SHIFT) -/* -- SCT_CONEN_NCEN9: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN9: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN9_SHIFT (9) -#define SCT_CONEN_NCEN9_MASK (0x01 << SCT_CONEN_NCEN9_SHIFT) -#define SCT_CONEN_NCEN9(x) ((x) << SCT_CONEN_NCEN9_SHIFT) +#define SCT_CONEN_NCEN9_MASK (0x01 << SCT_CONEN_NCEN9_SHIFT) +#define SCT_CONEN_NCEN9(x) ((x) << SCT_CONEN_NCEN9_SHIFT) -/* -- SCT_CONEN_NCEN10: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN10: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN10_SHIFT (10) -#define SCT_CONEN_NCEN10_MASK (0x01 << SCT_CONEN_NCEN10_SHIFT) -#define SCT_CONEN_NCEN10(x) ((x) << SCT_CONEN_NCEN10_SHIFT) +#define SCT_CONEN_NCEN10_MASK (0x01 << SCT_CONEN_NCEN10_SHIFT) +#define SCT_CONEN_NCEN10(x) ((x) << SCT_CONEN_NCEN10_SHIFT) -/* -- SCT_CONEN_NCEN11: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN11: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN11_SHIFT (11) -#define SCT_CONEN_NCEN11_MASK (0x01 << SCT_CONEN_NCEN11_SHIFT) -#define SCT_CONEN_NCEN11(x) ((x) << SCT_CONEN_NCEN11_SHIFT) +#define SCT_CONEN_NCEN11_MASK (0x01 << SCT_CONEN_NCEN11_SHIFT) +#define SCT_CONEN_NCEN11(x) ((x) << SCT_CONEN_NCEN11_SHIFT) -/* -- SCT_CONEN_NCEN12: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN12: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN12_SHIFT (12) -#define SCT_CONEN_NCEN12_MASK (0x01 << SCT_CONEN_NCEN12_SHIFT) -#define SCT_CONEN_NCEN12(x) ((x) << SCT_CONEN_NCEN12_SHIFT) +#define SCT_CONEN_NCEN12_MASK (0x01 << SCT_CONEN_NCEN12_SHIFT) +#define SCT_CONEN_NCEN12(x) ((x) << SCT_CONEN_NCEN12_SHIFT) -/* -- SCT_CONEN_NCEN13: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN13: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN13_SHIFT (13) -#define SCT_CONEN_NCEN13_MASK (0x01 << SCT_CONEN_NCEN13_SHIFT) -#define SCT_CONEN_NCEN13(x) ((x) << SCT_CONEN_NCEN13_SHIFT) +#define SCT_CONEN_NCEN13_MASK (0x01 << SCT_CONEN_NCEN13_SHIFT) +#define SCT_CONEN_NCEN13(x) ((x) << SCT_CONEN_NCEN13_SHIFT) -/* -- SCT_CONEN_NCEN14: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN14: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN14_SHIFT (14) -#define SCT_CONEN_NCEN14_MASK (0x01 << SCT_CONEN_NCEN14_SHIFT) -#define SCT_CONEN_NCEN14(x) ((x) << SCT_CONEN_NCEN14_SHIFT) +#define SCT_CONEN_NCEN14_MASK (0x01 << SCT_CONEN_NCEN14_SHIFT) +#define SCT_CONEN_NCEN14(x) ((x) << SCT_CONEN_NCEN14_SHIFT) -/* -- SCT_CONEN_NCEN15: The SCT requests interrupt when bit n of this register and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONEN_NCEN15: The SCT requests interrupt when bit n of this register + * and the SCT conflict flag register are both one (output 0 = bit 0, output 1 = + * bit 1,..., output 15 = bit 15). */ #define SCT_CONEN_NCEN15_SHIFT (15) -#define SCT_CONEN_NCEN15_MASK (0x01 << SCT_CONEN_NCEN15_SHIFT) -#define SCT_CONEN_NCEN15(x) ((x) << SCT_CONEN_NCEN15_SHIFT) +#define SCT_CONEN_NCEN15_MASK (0x01 << SCT_CONEN_NCEN15_SHIFT) +#define SCT_CONEN_NCEN15(x) ((x) << SCT_CONEN_NCEN15_SHIFT) /* --- SCT_CONFLAG --------------------------------------- */ #define SCT_CONFLAG MMIO32(SCT_BASE + 0xFC) -/* -- SCT_CONFLAG_NCFLAG0: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG0: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG0_SHIFT (0) -#define SCT_CONFLAG_NCFLAG0_MASK (0x01 << SCT_CONFLAG_NCFLAG0_SHIFT) -#define SCT_CONFLAG_NCFLAG0(x) ((x) << SCT_CONFLAG_NCFLAG0_SHIFT) +#define SCT_CONFLAG_NCFLAG0_MASK (0x01 << SCT_CONFLAG_NCFLAG0_SHIFT) +#define SCT_CONFLAG_NCFLAG0(x) ((x) << SCT_CONFLAG_NCFLAG0_SHIFT) -/* -- SCT_CONFLAG_NCFLAG1: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG1: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG1_SHIFT (1) -#define SCT_CONFLAG_NCFLAG1_MASK (0x01 << SCT_CONFLAG_NCFLAG1_SHIFT) -#define SCT_CONFLAG_NCFLAG1(x) ((x) << SCT_CONFLAG_NCFLAG1_SHIFT) +#define SCT_CONFLAG_NCFLAG1_MASK (0x01 << SCT_CONFLAG_NCFLAG1_SHIFT) +#define SCT_CONFLAG_NCFLAG1(x) ((x) << SCT_CONFLAG_NCFLAG1_SHIFT) -/* -- SCT_CONFLAG_NCFLAG2: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG2: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG2_SHIFT (2) -#define SCT_CONFLAG_NCFLAG2_MASK (0x01 << SCT_CONFLAG_NCFLAG2_SHIFT) -#define SCT_CONFLAG_NCFLAG2(x) ((x) << SCT_CONFLAG_NCFLAG2_SHIFT) +#define SCT_CONFLAG_NCFLAG2_MASK (0x01 << SCT_CONFLAG_NCFLAG2_SHIFT) +#define SCT_CONFLAG_NCFLAG2(x) ((x) << SCT_CONFLAG_NCFLAG2_SHIFT) -/* -- SCT_CONFLAG_NCFLAG3: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG3: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG3_SHIFT (3) -#define SCT_CONFLAG_NCFLAG3_MASK (0x01 << SCT_CONFLAG_NCFLAG3_SHIFT) -#define SCT_CONFLAG_NCFLAG3(x) ((x) << SCT_CONFLAG_NCFLAG3_SHIFT) +#define SCT_CONFLAG_NCFLAG3_MASK (0x01 << SCT_CONFLAG_NCFLAG3_SHIFT) +#define SCT_CONFLAG_NCFLAG3(x) ((x) << SCT_CONFLAG_NCFLAG3_SHIFT) -/* -- SCT_CONFLAG_NCFLAG4: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG4: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG4_SHIFT (4) -#define SCT_CONFLAG_NCFLAG4_MASK (0x01 << SCT_CONFLAG_NCFLAG4_SHIFT) -#define SCT_CONFLAG_NCFLAG4(x) ((x) << SCT_CONFLAG_NCFLAG4_SHIFT) +#define SCT_CONFLAG_NCFLAG4_MASK (0x01 << SCT_CONFLAG_NCFLAG4_SHIFT) +#define SCT_CONFLAG_NCFLAG4(x) ((x) << SCT_CONFLAG_NCFLAG4_SHIFT) -/* -- SCT_CONFLAG_NCFLAG5: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG5: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG5_SHIFT (5) -#define SCT_CONFLAG_NCFLAG5_MASK (0x01 << SCT_CONFLAG_NCFLAG5_SHIFT) -#define SCT_CONFLAG_NCFLAG5(x) ((x) << SCT_CONFLAG_NCFLAG5_SHIFT) +#define SCT_CONFLAG_NCFLAG5_MASK (0x01 << SCT_CONFLAG_NCFLAG5_SHIFT) +#define SCT_CONFLAG_NCFLAG5(x) ((x) << SCT_CONFLAG_NCFLAG5_SHIFT) -/* -- SCT_CONFLAG_NCFLAG6: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG6: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG6_SHIFT (6) -#define SCT_CONFLAG_NCFLAG6_MASK (0x01 << SCT_CONFLAG_NCFLAG6_SHIFT) -#define SCT_CONFLAG_NCFLAG6(x) ((x) << SCT_CONFLAG_NCFLAG6_SHIFT) +#define SCT_CONFLAG_NCFLAG6_MASK (0x01 << SCT_CONFLAG_NCFLAG6_SHIFT) +#define SCT_CONFLAG_NCFLAG6(x) ((x) << SCT_CONFLAG_NCFLAG6_SHIFT) -/* -- SCT_CONFLAG_NCFLAG7: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG7: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG7_SHIFT (7) -#define SCT_CONFLAG_NCFLAG7_MASK (0x01 << SCT_CONFLAG_NCFLAG7_SHIFT) -#define SCT_CONFLAG_NCFLAG7(x) ((x) << SCT_CONFLAG_NCFLAG7_SHIFT) +#define SCT_CONFLAG_NCFLAG7_MASK (0x01 << SCT_CONFLAG_NCFLAG7_SHIFT) +#define SCT_CONFLAG_NCFLAG7(x) ((x) << SCT_CONFLAG_NCFLAG7_SHIFT) -/* -- SCT_CONFLAG_NCFLAG8: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG8: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG8_SHIFT (8) -#define SCT_CONFLAG_NCFLAG8_MASK (0x01 << SCT_CONFLAG_NCFLAG8_SHIFT) -#define SCT_CONFLAG_NCFLAG8(x) ((x) << SCT_CONFLAG_NCFLAG8_SHIFT) +#define SCT_CONFLAG_NCFLAG8_MASK (0x01 << SCT_CONFLAG_NCFLAG8_SHIFT) +#define SCT_CONFLAG_NCFLAG8(x) ((x) << SCT_CONFLAG_NCFLAG8_SHIFT) -/* -- SCT_CONFLAG_NCFLAG9: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG9: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG9_SHIFT (9) -#define SCT_CONFLAG_NCFLAG9_MASK (0x01 << SCT_CONFLAG_NCFLAG9_SHIFT) -#define SCT_CONFLAG_NCFLAG9(x) ((x) << SCT_CONFLAG_NCFLAG9_SHIFT) +#define SCT_CONFLAG_NCFLAG9_MASK (0x01 << SCT_CONFLAG_NCFLAG9_SHIFT) +#define SCT_CONFLAG_NCFLAG9(x) ((x) << SCT_CONFLAG_NCFLAG9_SHIFT) -/* -- SCT_CONFLAG_NCFLAG10: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG10: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG10_SHIFT (10) -#define SCT_CONFLAG_NCFLAG10_MASK (0x01 << SCT_CONFLAG_NCFLAG10_SHIFT) -#define SCT_CONFLAG_NCFLAG10(x) ((x) << SCT_CONFLAG_NCFLAG10_SHIFT) +#define SCT_CONFLAG_NCFLAG10_MASK (0x01 << SCT_CONFLAG_NCFLAG10_SHIFT) +#define SCT_CONFLAG_NCFLAG10(x) ((x) << SCT_CONFLAG_NCFLAG10_SHIFT) -/* -- SCT_CONFLAG_NCFLAG11: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG11: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG11_SHIFT (11) -#define SCT_CONFLAG_NCFLAG11_MASK (0x01 << SCT_CONFLAG_NCFLAG11_SHIFT) -#define SCT_CONFLAG_NCFLAG11(x) ((x) << SCT_CONFLAG_NCFLAG11_SHIFT) +#define SCT_CONFLAG_NCFLAG11_MASK (0x01 << SCT_CONFLAG_NCFLAG11_SHIFT) +#define SCT_CONFLAG_NCFLAG11(x) ((x) << SCT_CONFLAG_NCFLAG11_SHIFT) -/* -- SCT_CONFLAG_NCFLAG12: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG12: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG12_SHIFT (12) -#define SCT_CONFLAG_NCFLAG12_MASK (0x01 << SCT_CONFLAG_NCFLAG12_SHIFT) -#define SCT_CONFLAG_NCFLAG12(x) ((x) << SCT_CONFLAG_NCFLAG12_SHIFT) +#define SCT_CONFLAG_NCFLAG12_MASK (0x01 << SCT_CONFLAG_NCFLAG12_SHIFT) +#define SCT_CONFLAG_NCFLAG12(x) ((x) << SCT_CONFLAG_NCFLAG12_SHIFT) -/* -- SCT_CONFLAG_NCFLAG13: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG13: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG13_SHIFT (13) -#define SCT_CONFLAG_NCFLAG13_MASK (0x01 << SCT_CONFLAG_NCFLAG13_SHIFT) -#define SCT_CONFLAG_NCFLAG13(x) ((x) << SCT_CONFLAG_NCFLAG13_SHIFT) +#define SCT_CONFLAG_NCFLAG13_MASK (0x01 << SCT_CONFLAG_NCFLAG13_SHIFT) +#define SCT_CONFLAG_NCFLAG13(x) ((x) << SCT_CONFLAG_NCFLAG13_SHIFT) -/* -- SCT_CONFLAG_NCFLAG14: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG14: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG14_SHIFT (14) -#define SCT_CONFLAG_NCFLAG14_MASK (0x01 << SCT_CONFLAG_NCFLAG14_SHIFT) -#define SCT_CONFLAG_NCFLAG14(x) ((x) << SCT_CONFLAG_NCFLAG14_SHIFT) +#define SCT_CONFLAG_NCFLAG14_MASK (0x01 << SCT_CONFLAG_NCFLAG14_SHIFT) +#define SCT_CONFLAG_NCFLAG14(x) ((x) << SCT_CONFLAG_NCFLAG14_SHIFT) -/* -- SCT_CONFLAG_NCFLAG15: Bit n is one if a no-change conflict event occurred on output n since reset or a 1 was last written to this bit (output 0 = bit 0, output 1 = bit 1,..., output 15 = bit 15). */ +/* -- SCT_CONFLAG_NCFLAG15: Bit n is one if a no-change conflict event occurred + * on output n since reset or a 1 was last written to this bit (output 0 = bit + * 0, output 1 = bit 1,..., output 15 = bit 15). */ #define SCT_CONFLAG_NCFLAG15_SHIFT (15) -#define SCT_CONFLAG_NCFLAG15_MASK (0x01 << SCT_CONFLAG_NCFLAG15_SHIFT) -#define SCT_CONFLAG_NCFLAG15(x) ((x) << SCT_CONFLAG_NCFLAG15_SHIFT) +#define SCT_CONFLAG_NCFLAG15_MASK (0x01 << SCT_CONFLAG_NCFLAG15_SHIFT) +#define SCT_CONFLAG_NCFLAG15(x) ((x) << SCT_CONFLAG_NCFLAG15_SHIFT) -/* -- SCT_CONFLAG_BUSERRL: The most recent bus error from this SCT involved writing CTR L/Unified, STATE L/Unified, MATCH L/Unified, or the Output register when the L/U counter was not halted. A word write to certain L and H registers can be half successful and half unsuccessful. */ +/* -- SCT_CONFLAG_BUSERRL: The most recent bus error from this SCT involved + * writing CTR L/Unified, STATE L/Unified, MATCH L/Unified, or the Output + * register when the L/U counter was not halted. A word write to certain L and + * H registers can be half successful and half unsuccessful. */ #define SCT_CONFLAG_BUSERRL_SHIFT (30) -#define SCT_CONFLAG_BUSERRL_MASK (0x01 << SCT_CONFLAG_BUSERRL_SHIFT) -#define SCT_CONFLAG_BUSERRL(x) ((x) << SCT_CONFLAG_BUSERRL_SHIFT) +#define SCT_CONFLAG_BUSERRL_MASK (0x01 << SCT_CONFLAG_BUSERRL_SHIFT) +#define SCT_CONFLAG_BUSERRL(x) ((x) << SCT_CONFLAG_BUSERRL_SHIFT) -/* -- SCT_CONFLAG_BUSERRH: The most recent bus error from this SCT involved writing CTR H, STATE H, MATCH H, or the Output register when the H counter was not halted. */ +/* -- SCT_CONFLAG_BUSERRH: The most recent bus error from this SCT involved + * writing CTR H, STATE H, MATCH H, or the Output register when the H counter + * was not halted. */ #define SCT_CONFLAG_BUSERRH_SHIFT (31) -#define SCT_CONFLAG_BUSERRH_MASK (0x01 << SCT_CONFLAG_BUSERRH_SHIFT) -#define SCT_CONFLAG_BUSERRH(x) ((x) << SCT_CONFLAG_BUSERRH_SHIFT) +#define SCT_CONFLAG_BUSERRH_MASK (0x01 << SCT_CONFLAG_BUSERRH_SHIFT) +#define SCT_CONFLAG_BUSERRH(x) ((x) << SCT_CONFLAG_BUSERRH_SHIFT) /* --- SCT_MATCHn ---------------------------------------- */ -#define SCT_MATCHn(n) MMIO32(SCT_BASE + 0x100 + (n*4)) +#define SCT_MATCHn(n) MMIO32(SCT_BASE + 0x100 + (n * 4)) -/* -- SCT_MATCHn_MATCH_L: When UNIFY = 0, read or write the 16-bit value to be compared to the L counter. When UNIFY = 1, read or write the lower 16 bits of the 32-bit value to be compared to the unified counter. */ +/* -- SCT_MATCHn_MATCH_L: When UNIFY = 0, read or write the 16-bit value to be + * compared to the L counter. When UNIFY = 1, read or write the lower 16 bits of + * the 32-bit value to be compared to the unified counter. */ #define SCT_MATCHn_MATCH_L_SHIFT (0) -#define SCT_MATCHn_MATCH_L_MASK (0xFFFF << SCT_MATCHn_MATCH_L_SHIFT) -#define SCT_MATCHn_MATCH_L(x) ((x) << SCT_MATCHn_MATCH_L_SHIFT) +#define SCT_MATCHn_MATCH_L_MASK (0xFFFF << SCT_MATCHn_MATCH_L_SHIFT) +#define SCT_MATCHn_MATCH_L(x) ((x) << SCT_MATCHn_MATCH_L_SHIFT) -/* -- SCT_MATCHn_MATCH_H: When UNIFY = 0, read or write the 16-bit value to be compared to the H counter. When UNIFY = 1, read or write the upper 16 bits of the 32-bit value to be compared to the unified counter. */ +/* -- SCT_MATCHn_MATCH_H: When UNIFY = 0, read or write the 16-bit value to be + * compared to the H counter. When UNIFY = 1, read or write the upper 16 bits of + * the 32-bit value to be compared to the unified counter. */ #define SCT_MATCHn_MATCH_H_SHIFT (16) -#define SCT_MATCHn_MATCH_H_MASK (0xFFFF << SCT_MATCHn_MATCH_H_SHIFT) -#define SCT_MATCHn_MATCH_H(x) ((x) << SCT_MATCHn_MATCH_H_SHIFT) +#define SCT_MATCHn_MATCH_H_MASK (0xFFFF << SCT_MATCHn_MATCH_H_SHIFT) +#define SCT_MATCHn_MATCH_H(x) ((x) << SCT_MATCHn_MATCH_H_SHIFT) /* --- SCT_FRACMAT0 -------------------------------------- */ #define SCT_FRACMAT0 MMIO32(SCT_BASE + 0x140) @@ -1248,15 +1703,20 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* --- SCT_FRACMAT5 -------------------------------------- */ #define SCT_FRACMAT5 MMIO32(SCT_BASE + 0x154) -/* -- SCT_FRACMATn_FRACMAT_L: When UNIFY = 0, read or write the 4-bit value specifying the dither pattern to be applied to the corresponding MATCHn_L register (n = 0 to 5). When UNIFY = 1, the value applies to the unified, 32-bit fractional match register. */ +/* -- SCT_FRACMATn_FRACMAT_L: When UNIFY = 0, read or write the 4-bit value + * specifying the dither pattern to be applied to the corresponding MATCHn_L + * register (n = 0 to 5). When UNIFY = 1, the value applies to the unified, + * 32-bit fractional match register. */ #define SCT_FRACMATn_FRACMAT_L_SHIFT (0) -#define SCT_FRACMATn_FRACMAT_L_MASK (0x0F << SCT_FRACMATn_FRACMAT_L_SHIFT) -#define SCT_FRACMATn_FRACMAT_L(x) ((x) << SCT_FRACMATn_FRACMAT_L_SHIFT) +#define SCT_FRACMATn_FRACMAT_L_MASK (0x0F << SCT_FRACMATn_FRACMAT_L_SHIFT) +#define SCT_FRACMATn_FRACMAT_L(x) ((x) << SCT_FRACMATn_FRACMAT_L_SHIFT) -/* -- SCT_FRACMATn_FRACMAT_H: When UNIFY = 0, read or write 4-bit value specifying the dither pattern to be applied to the corresponding MATCHn_H register (n = 0 to 5). */ +/* -- SCT_FRACMATn_FRACMAT_H: When UNIFY = 0, read or write 4-bit value + * specifying the dither pattern to be applied to the corresponding MATCHn_H + * register (n = 0 to 5). */ #define SCT_FRACMATn_FRACMAT_H_SHIFT (16) -#define SCT_FRACMATn_FRACMAT_H_MASK (0x0F << SCT_FRACMATn_FRACMAT_H_SHIFT) -#define SCT_FRACMATn_FRACMAT_H(x) ((x) << SCT_FRACMATn_FRACMAT_H_SHIFT) +#define SCT_FRACMATn_FRACMAT_H_MASK (0x0F << SCT_FRACMATn_FRACMAT_H_SHIFT) +#define SCT_FRACMATn_FRACMAT_H(x) ((x) << SCT_FRACMATn_FRACMAT_H_SHIFT) /* --- SCT_CAP0 ------------------------------------------ */ #define SCT_CAP0 MMIO32(SCT_BASE + 0x100) @@ -1306,28 +1766,36 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* --- SCT_CAP15 ----------------------------------------- */ #define SCT_CAP15 MMIO32(SCT_BASE + 0x13C) -/* -- SCT_CAPn_CAP_L: When UNIFY = 0, read the 16-bit counter value at which this register was last captured. When UNIFY = 1, read the lower 16 bits of the 32-bit value at which this register was last captured. */ +/* -- SCT_CAPn_CAP_L: When UNIFY = 0, read the 16-bit counter value at which + * this register was last captured. When UNIFY = 1, read the lower 16 bits of + * the 32-bit value at which this register was last captured. */ #define SCT_CAPn_CAP_L_SHIFT (0) -#define SCT_CAPn_CAP_L_MASK (0xFFFF << SCT_CAPn_CAP_L_SHIFT) -#define SCT_CAPn_CAP_L(x) ((x) << SCT_CAPn_CAP_L_SHIFT) +#define SCT_CAPn_CAP_L_MASK (0xFFFF << SCT_CAPn_CAP_L_SHIFT) +#define SCT_CAPn_CAP_L(x) ((x) << SCT_CAPn_CAP_L_SHIFT) -/* -- SCT_CAPn_CAP_H: When UNIFY = 0, read the 16-bit counter value at which this register was last captured. When UNIFY = 1, read the upper 16 bits of the 32-bit value at which this register was last captured. */ +/* -- SCT_CAPn_CAP_H: When UNIFY = 0, read the 16-bit counter value at which + * this register was last captured. When UNIFY = 1, read the upper 16 bits of + * the 32-bit value at which this register was last captured. */ #define SCT_CAPn_CAP_H_SHIFT (16) -#define SCT_CAPn_CAP_H_MASK (0xFFFF << SCT_CAPn_CAP_H_SHIFT) -#define SCT_CAPn_CAP_H(x) ((x) << SCT_CAPn_CAP_H_SHIFT) +#define SCT_CAPn_CAP_H_MASK (0xFFFF << SCT_CAPn_CAP_H_SHIFT) +#define SCT_CAPn_CAP_H(x) ((x) << SCT_CAPn_CAP_H_SHIFT) /* --- SCT_MATCHRELn ------------------------------------- */ -#define SCT_MATCHRELn(n) MMIO32(SCT_BASE + 0x200 + (n*4)) +#define SCT_MATCHRELn(n) MMIO32(SCT_BASE + 0x200 + (n * 4)) -/* -- SCT_MATCHRELn_RELOAD_L: When UNIFY = 0, read or write the 16-bit value to be loaded into the MATCHn_L register. When UNIFY = 1, read or write the lower 16 bits of the 32-bit value to be loaded into the MATCHn register. */ +/* -- SCT_MATCHRELn_RELOAD_L: When UNIFY = 0, read or write the 16-bit value to + * be loaded into the MATCHn_L register. When UNIFY = 1, read or write the lower + * 16 bits of the 32-bit value to be loaded into the MATCHn register. */ #define SCT_MATCHRELn_RELOAD_L_SHIFT (0) -#define SCT_MATCHRELn_RELOAD_L_MASK (0xFFFF << SCT_MATCHRELn_RELOAD_L_SHIFT) -#define SCT_MATCHRELn_RELOAD_L(x) ((x) << SCT_MATCHRELn_RELOAD_L_SHIFT) +#define SCT_MATCHRELn_RELOAD_L_MASK (0xFFFF << SCT_MATCHRELn_RELOAD_L_SHIFT) +#define SCT_MATCHRELn_RELOAD_L(x) ((x) << SCT_MATCHRELn_RELOAD_L_SHIFT) -/* -- SCT_MATCHRELn_RELOAD_H: When UNIFY = 0, read or write the 16-bit to be loaded into the MATCHn_H register. When UNIFY = 1, read or write the upper 16 bits of the 32-bit value to be loaded into the MATCHn register. */ +/* -- SCT_MATCHRELn_RELOAD_H: When UNIFY = 0, read or write the 16-bit to be + * loaded into the MATCHn_H register. When UNIFY = 1, read or write the upper 16 + * bits of the 32-bit value to be loaded into the MATCHn register. */ #define SCT_MATCHRELn_RELOAD_H_SHIFT (16) -#define SCT_MATCHRELn_RELOAD_H_MASK (0xFFFF << SCT_MATCHRELn_RELOAD_H_SHIFT) -#define SCT_MATCHRELn_RELOAD_H(x) ((x) << SCT_MATCHRELn_RELOAD_H_SHIFT) +#define SCT_MATCHRELn_RELOAD_H_MASK (0xFFFF << SCT_MATCHRELn_RELOAD_H_SHIFT) +#define SCT_MATCHRELn_RELOAD_H(x) ((x) << SCT_MATCHRELn_RELOAD_H_SHIFT) /* --- SCT_FRACMATREL0 ----------------------------------- */ #define SCT_FRACMATREL0 MMIO32(SCT_BASE + 0x240) @@ -1347,15 +1815,19 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* --- SCT_FRACMATREL5 ----------------------------------- */ #define SCT_FRACMATREL5 MMIO32(SCT_BASE + 0x254) -/* -- SCT_FRACMATRELn_RELFRAC_L: When UNIFY = 0, read or write the 4-bit value to be loaded into the FRACMATn_L register. When UNIFY = 1, read or write the lower 4 bits to be loaded into the FRACMATn register. */ +/* -- SCT_FRACMATRELn_RELFRAC_L: When UNIFY = 0, read or write the 4-bit value + * to be loaded into the FRACMATn_L register. When UNIFY = 1, read or write the + * lower 4 bits to be loaded into the FRACMATn register. */ #define SCT_FRACMATRELn_RELFRAC_L_SHIFT (0) -#define SCT_FRACMATRELn_RELFRAC_L_MASK (0x0F << SCT_FRACMATRELn_RELFRAC_L_SHIFT) -#define SCT_FRACMATRELn_RELFRAC_L(x) ((x) << SCT_FRACMATRELn_RELFRAC_L_SHIFT) +#define SCT_FRACMATRELn_RELFRAC_L_MASK (0x0F << SCT_FRACMATRELn_RELFRAC_L_SHIFT) +#define SCT_FRACMATRELn_RELFRAC_L(x) ((x) << SCT_FRACMATRELn_RELFRAC_L_SHIFT) -/* -- SCT_FRACMATRELn_RELFRAC_H: When UNIFY = 0, read or write the 4-bit value to be loaded into the FRACMATn_H register. When UNIFY = 1, read or write the upper 4 bits with the 4-bit value to be loaded into the FRACMATn register. */ +/* -- SCT_FRACMATRELn_RELFRAC_H: When UNIFY = 0, read or write the 4-bit value + * to be loaded into the FRACMATn_H register. When UNIFY = 1, read or write the + * upper 4 bits with the 4-bit value to be loaded into the FRACMATn register. */ #define SCT_FRACMATRELn_RELFRAC_H_SHIFT (16) -#define SCT_FRACMATRELn_RELFRAC_H_MASK (0x0F << SCT_FRACMATRELn_RELFRAC_H_SHIFT) -#define SCT_FRACMATRELn_RELFRAC_H(x) ((x) << SCT_FRACMATRELn_RELFRAC_H_SHIFT) +#define SCT_FRACMATRELn_RELFRAC_H_MASK (0x0F << SCT_FRACMATRELn_RELFRAC_H_SHIFT) +#define SCT_FRACMATRELn_RELFRAC_H(x) ((x) << SCT_FRACMATRELn_RELFRAC_H_SHIFT) /* --- SCT_CAPCTRL0 -------------------------------------- */ #define SCT_CAPCTRL0 MMIO32(SCT_BASE + 0x200) @@ -1405,260 +1877,372 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* --- SCT_CAPCTRL15 ------------------------------------- */ #define SCT_CAPCTRL15 MMIO32(SCT_BASE + 0x23C) -/* -- SCT_CAPCTRLn_CAPCON_L: If bit m is one, event m causes the CAPn_L (UNIFY = 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15). */ +/* -- SCT_CAPCTRLn_CAPCON_L: If bit m is one, event m causes the CAPn_L (UNIFY = + * 0) or the CAPn (UNIFY = 1) register to be loaded (event 0 = bit 0, event 1 = + * bit 1,..., event 15 = bit 15). */ #define SCT_CAPCTRLn_CAPCON_L_SHIFT (0) -#define SCT_CAPCTRLn_CAPCON_L_MASK (0xFFFF << SCT_CAPCTRLn_CAPCON_L_SHIFT) -#define SCT_CAPCTRLn_CAPCON_L(x) ((x) << SCT_CAPCTRLn_CAPCON_L_SHIFT) +#define SCT_CAPCTRLn_CAPCON_L_MASK (0xFFFF << SCT_CAPCTRLn_CAPCON_L_SHIFT) +#define SCT_CAPCTRLn_CAPCON_L(x) ((x) << SCT_CAPCTRLn_CAPCON_L_SHIFT) -/* -- SCT_CAPCTRLn_CAPCON_H: If bit m is one, event m causes the CAPn_H (UNIFY = 0) register to be loaded (event 0 = bit 16, event 1 = bit 17,..., event 15 = bit 31). */ +/* -- SCT_CAPCTRLn_CAPCON_H: If bit m is one, event m causes the CAPn_H (UNIFY = + * 0) register to be loaded (event 0 = bit 16, event 1 = bit 17,..., event 15 = + * bit 31). */ #define SCT_CAPCTRLn_CAPCON_H_SHIFT (16) -#define SCT_CAPCTRLn_CAPCON_H_MASK (0xFFFF << SCT_CAPCTRLn_CAPCON_H_SHIFT) -#define SCT_CAPCTRLn_CAPCON_H(x) ((x) << SCT_CAPCTRLn_CAPCON_H_SHIFT) +#define SCT_CAPCTRLn_CAPCON_H_MASK (0xFFFF << SCT_CAPCTRLn_CAPCON_H_SHIFT) +#define SCT_CAPCTRLn_CAPCON_H(x) ((x) << SCT_CAPCTRLn_CAPCON_H_SHIFT) /* --- SCT_EVn_STATE ------------------------------------- */ -#define SCT_EVn_STATE(n) MMIO32(SCT_BASE + 0x300 + (n*8)) +#define SCT_EVn_STATE(n) MMIO32(SCT_BASE + 0x300 + (n * 8)) -/* -- SCT_EVn_STATE_STATEMSK0: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK0: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK0_SHIFT (0) -#define SCT_EVn_STATE_STATEMSK0_MASK (0x01 << SCT_EVn_STATE_STATEMSK0_SHIFT) -#define SCT_EVn_STATE_STATEMSK0(x) ((x) << SCT_EVn_STATE_STATEMSK0_SHIFT) +#define SCT_EVn_STATE_STATEMSK0_MASK (0x01 << SCT_EVn_STATE_STATEMSK0_SHIFT) +#define SCT_EVn_STATE_STATEMSK0(x) ((x) << SCT_EVn_STATE_STATEMSK0_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK1: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK1: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK1_SHIFT (1) -#define SCT_EVn_STATE_STATEMSK1_MASK (0x01 << SCT_EVn_STATE_STATEMSK1_SHIFT) -#define SCT_EVn_STATE_STATEMSK1(x) ((x) << SCT_EVn_STATE_STATEMSK1_SHIFT) +#define SCT_EVn_STATE_STATEMSK1_MASK (0x01 << SCT_EVn_STATE_STATEMSK1_SHIFT) +#define SCT_EVn_STATE_STATEMSK1(x) ((x) << SCT_EVn_STATE_STATEMSK1_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK2: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK2: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK2_SHIFT (2) -#define SCT_EVn_STATE_STATEMSK2_MASK (0x01 << SCT_EVn_STATE_STATEMSK2_SHIFT) -#define SCT_EVn_STATE_STATEMSK2(x) ((x) << SCT_EVn_STATE_STATEMSK2_SHIFT) +#define SCT_EVn_STATE_STATEMSK2_MASK (0x01 << SCT_EVn_STATE_STATEMSK2_SHIFT) +#define SCT_EVn_STATE_STATEMSK2(x) ((x) << SCT_EVn_STATE_STATEMSK2_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK3: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK3: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK3_SHIFT (3) -#define SCT_EVn_STATE_STATEMSK3_MASK (0x01 << SCT_EVn_STATE_STATEMSK3_SHIFT) -#define SCT_EVn_STATE_STATEMSK3(x) ((x) << SCT_EVn_STATE_STATEMSK3_SHIFT) +#define SCT_EVn_STATE_STATEMSK3_MASK (0x01 << SCT_EVn_STATE_STATEMSK3_SHIFT) +#define SCT_EVn_STATE_STATEMSK3(x) ((x) << SCT_EVn_STATE_STATEMSK3_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK4: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK4: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK4_SHIFT (4) -#define SCT_EVn_STATE_STATEMSK4_MASK (0x01 << SCT_EVn_STATE_STATEMSK4_SHIFT) -#define SCT_EVn_STATE_STATEMSK4(x) ((x) << SCT_EVn_STATE_STATEMSK4_SHIFT) +#define SCT_EVn_STATE_STATEMSK4_MASK (0x01 << SCT_EVn_STATE_STATEMSK4_SHIFT) +#define SCT_EVn_STATE_STATEMSK4(x) ((x) << SCT_EVn_STATE_STATEMSK4_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK5: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK5: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK5_SHIFT (5) -#define SCT_EVn_STATE_STATEMSK5_MASK (0x01 << SCT_EVn_STATE_STATEMSK5_SHIFT) -#define SCT_EVn_STATE_STATEMSK5(x) ((x) << SCT_EVn_STATE_STATEMSK5_SHIFT) +#define SCT_EVn_STATE_STATEMSK5_MASK (0x01 << SCT_EVn_STATE_STATEMSK5_SHIFT) +#define SCT_EVn_STATE_STATEMSK5(x) ((x) << SCT_EVn_STATE_STATEMSK5_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK6: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK6: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK6_SHIFT (6) -#define SCT_EVn_STATE_STATEMSK6_MASK (0x01 << SCT_EVn_STATE_STATEMSK6_SHIFT) -#define SCT_EVn_STATE_STATEMSK6(x) ((x) << SCT_EVn_STATE_STATEMSK6_SHIFT) +#define SCT_EVn_STATE_STATEMSK6_MASK (0x01 << SCT_EVn_STATE_STATEMSK6_SHIFT) +#define SCT_EVn_STATE_STATEMSK6(x) ((x) << SCT_EVn_STATE_STATEMSK6_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK7: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK7: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK7_SHIFT (7) -#define SCT_EVn_STATE_STATEMSK7_MASK (0x01 << SCT_EVn_STATE_STATEMSK7_SHIFT) -#define SCT_EVn_STATE_STATEMSK7(x) ((x) << SCT_EVn_STATE_STATEMSK7_SHIFT) +#define SCT_EVn_STATE_STATEMSK7_MASK (0x01 << SCT_EVn_STATE_STATEMSK7_SHIFT) +#define SCT_EVn_STATE_STATEMSK7(x) ((x) << SCT_EVn_STATE_STATEMSK7_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK8: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK8: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK8_SHIFT (8) -#define SCT_EVn_STATE_STATEMSK8_MASK (0x01 << SCT_EVn_STATE_STATEMSK8_SHIFT) -#define SCT_EVn_STATE_STATEMSK8(x) ((x) << SCT_EVn_STATE_STATEMSK8_SHIFT) +#define SCT_EVn_STATE_STATEMSK8_MASK (0x01 << SCT_EVn_STATE_STATEMSK8_SHIFT) +#define SCT_EVn_STATE_STATEMSK8(x) ((x) << SCT_EVn_STATE_STATEMSK8_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK9: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK9: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK9_SHIFT (9) -#define SCT_EVn_STATE_STATEMSK9_MASK (0x01 << SCT_EVn_STATE_STATEMSK9_SHIFT) -#define SCT_EVn_STATE_STATEMSK9(x) ((x) << SCT_EVn_STATE_STATEMSK9_SHIFT) +#define SCT_EVn_STATE_STATEMSK9_MASK (0x01 << SCT_EVn_STATE_STATEMSK9_SHIFT) +#define SCT_EVn_STATE_STATEMSK9(x) ((x) << SCT_EVn_STATE_STATEMSK9_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK10: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK10: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK10_SHIFT (10) -#define SCT_EVn_STATE_STATEMSK10_MASK (0x01 << SCT_EVn_STATE_STATEMSK10_SHIFT) -#define SCT_EVn_STATE_STATEMSK10(x) ((x) << SCT_EVn_STATE_STATEMSK10_SHIFT) +#define SCT_EVn_STATE_STATEMSK10_MASK (0x01 << SCT_EVn_STATE_STATEMSK10_SHIFT) +#define SCT_EVn_STATE_STATEMSK10(x) ((x) << SCT_EVn_STATE_STATEMSK10_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK11: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK11: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK11_SHIFT (11) -#define SCT_EVn_STATE_STATEMSK11_MASK (0x01 << SCT_EVn_STATE_STATEMSK11_SHIFT) -#define SCT_EVn_STATE_STATEMSK11(x) ((x) << SCT_EVn_STATE_STATEMSK11_SHIFT) +#define SCT_EVn_STATE_STATEMSK11_MASK (0x01 << SCT_EVn_STATE_STATEMSK11_SHIFT) +#define SCT_EVn_STATE_STATEMSK11(x) ((x) << SCT_EVn_STATE_STATEMSK11_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK12: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK12: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK12_SHIFT (12) -#define SCT_EVn_STATE_STATEMSK12_MASK (0x01 << SCT_EVn_STATE_STATEMSK12_SHIFT) -#define SCT_EVn_STATE_STATEMSK12(x) ((x) << SCT_EVn_STATE_STATEMSK12_SHIFT) +#define SCT_EVn_STATE_STATEMSK12_MASK (0x01 << SCT_EVn_STATE_STATEMSK12_SHIFT) +#define SCT_EVn_STATE_STATEMSK12(x) ((x) << SCT_EVn_STATE_STATEMSK12_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK13: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK13: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK13_SHIFT (13) -#define SCT_EVn_STATE_STATEMSK13_MASK (0x01 << SCT_EVn_STATE_STATEMSK13_SHIFT) -#define SCT_EVn_STATE_STATEMSK13(x) ((x) << SCT_EVn_STATE_STATEMSK13_SHIFT) +#define SCT_EVn_STATE_STATEMSK13_MASK (0x01 << SCT_EVn_STATE_STATEMSK13_SHIFT) +#define SCT_EVn_STATE_STATEMSK13(x) ((x) << SCT_EVn_STATE_STATEMSK13_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK14: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK14: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK14_SHIFT (14) -#define SCT_EVn_STATE_STATEMSK14_MASK (0x01 << SCT_EVn_STATE_STATEMSK14_SHIFT) -#define SCT_EVn_STATE_STATEMSK14(x) ((x) << SCT_EVn_STATE_STATEMSK14_SHIFT) +#define SCT_EVn_STATE_STATEMSK14_MASK (0x01 << SCT_EVn_STATE_STATEMSK14_SHIFT) +#define SCT_EVn_STATE_STATEMSK14(x) ((x) << SCT_EVn_STATE_STATEMSK14_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK15: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK15: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK15_SHIFT (15) -#define SCT_EVn_STATE_STATEMSK15_MASK (0x01 << SCT_EVn_STATE_STATEMSK15_SHIFT) -#define SCT_EVn_STATE_STATEMSK15(x) ((x) << SCT_EVn_STATE_STATEMSK15_SHIFT) +#define SCT_EVn_STATE_STATEMSK15_MASK (0x01 << SCT_EVn_STATE_STATEMSK15_SHIFT) +#define SCT_EVn_STATE_STATEMSK15(x) ((x) << SCT_EVn_STATE_STATEMSK15_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK16: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK16: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK16_SHIFT (16) -#define SCT_EVn_STATE_STATEMSK16_MASK (0x01 << SCT_EVn_STATE_STATEMSK16_SHIFT) -#define SCT_EVn_STATE_STATEMSK16(x) ((x) << SCT_EVn_STATE_STATEMSK16_SHIFT) +#define SCT_EVn_STATE_STATEMSK16_MASK (0x01 << SCT_EVn_STATE_STATEMSK16_SHIFT) +#define SCT_EVn_STATE_STATEMSK16(x) ((x) << SCT_EVn_STATE_STATEMSK16_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK17: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK17: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK17_SHIFT (17) -#define SCT_EVn_STATE_STATEMSK17_MASK (0x01 << SCT_EVn_STATE_STATEMSK17_SHIFT) -#define SCT_EVn_STATE_STATEMSK17(x) ((x) << SCT_EVn_STATE_STATEMSK17_SHIFT) +#define SCT_EVn_STATE_STATEMSK17_MASK (0x01 << SCT_EVn_STATE_STATEMSK17_SHIFT) +#define SCT_EVn_STATE_STATEMSK17(x) ((x) << SCT_EVn_STATE_STATEMSK17_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK18: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK18: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK18_SHIFT (18) -#define SCT_EVn_STATE_STATEMSK18_MASK (0x01 << SCT_EVn_STATE_STATEMSK18_SHIFT) -#define SCT_EVn_STATE_STATEMSK18(x) ((x) << SCT_EVn_STATE_STATEMSK18_SHIFT) +#define SCT_EVn_STATE_STATEMSK18_MASK (0x01 << SCT_EVn_STATE_STATEMSK18_SHIFT) +#define SCT_EVn_STATE_STATEMSK18(x) ((x) << SCT_EVn_STATE_STATEMSK18_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK19: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK19: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK19_SHIFT (19) -#define SCT_EVn_STATE_STATEMSK19_MASK (0x01 << SCT_EVn_STATE_STATEMSK19_SHIFT) -#define SCT_EVn_STATE_STATEMSK19(x) ((x) << SCT_EVn_STATE_STATEMSK19_SHIFT) +#define SCT_EVn_STATE_STATEMSK19_MASK (0x01 << SCT_EVn_STATE_STATEMSK19_SHIFT) +#define SCT_EVn_STATE_STATEMSK19(x) ((x) << SCT_EVn_STATE_STATEMSK19_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK20: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK20: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK20_SHIFT (20) -#define SCT_EVn_STATE_STATEMSK20_MASK (0x01 << SCT_EVn_STATE_STATEMSK20_SHIFT) -#define SCT_EVn_STATE_STATEMSK20(x) ((x) << SCT_EVn_STATE_STATEMSK20_SHIFT) +#define SCT_EVn_STATE_STATEMSK20_MASK (0x01 << SCT_EVn_STATE_STATEMSK20_SHIFT) +#define SCT_EVn_STATE_STATEMSK20(x) ((x) << SCT_EVn_STATE_STATEMSK20_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK21: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK21: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK21_SHIFT (21) -#define SCT_EVn_STATE_STATEMSK21_MASK (0x01 << SCT_EVn_STATE_STATEMSK21_SHIFT) -#define SCT_EVn_STATE_STATEMSK21(x) ((x) << SCT_EVn_STATE_STATEMSK21_SHIFT) +#define SCT_EVn_STATE_STATEMSK21_MASK (0x01 << SCT_EVn_STATE_STATEMSK21_SHIFT) +#define SCT_EVn_STATE_STATEMSK21(x) ((x) << SCT_EVn_STATE_STATEMSK21_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK22: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK22: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK22_SHIFT (22) -#define SCT_EVn_STATE_STATEMSK22_MASK (0x01 << SCT_EVn_STATE_STATEMSK22_SHIFT) -#define SCT_EVn_STATE_STATEMSK22(x) ((x) << SCT_EVn_STATE_STATEMSK22_SHIFT) +#define SCT_EVn_STATE_STATEMSK22_MASK (0x01 << SCT_EVn_STATE_STATEMSK22_SHIFT) +#define SCT_EVn_STATE_STATEMSK22(x) ((x) << SCT_EVn_STATE_STATEMSK22_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK23: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK23: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK23_SHIFT (23) -#define SCT_EVn_STATE_STATEMSK23_MASK (0x01 << SCT_EVn_STATE_STATEMSK23_SHIFT) -#define SCT_EVn_STATE_STATEMSK23(x) ((x) << SCT_EVn_STATE_STATEMSK23_SHIFT) +#define SCT_EVn_STATE_STATEMSK23_MASK (0x01 << SCT_EVn_STATE_STATEMSK23_SHIFT) +#define SCT_EVn_STATE_STATEMSK23(x) ((x) << SCT_EVn_STATE_STATEMSK23_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK24: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK24: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK24_SHIFT (24) -#define SCT_EVn_STATE_STATEMSK24_MASK (0x01 << SCT_EVn_STATE_STATEMSK24_SHIFT) -#define SCT_EVn_STATE_STATEMSK24(x) ((x) << SCT_EVn_STATE_STATEMSK24_SHIFT) +#define SCT_EVn_STATE_STATEMSK24_MASK (0x01 << SCT_EVn_STATE_STATEMSK24_SHIFT) +#define SCT_EVn_STATE_STATEMSK24(x) ((x) << SCT_EVn_STATE_STATEMSK24_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK25: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK25: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK25_SHIFT (25) -#define SCT_EVn_STATE_STATEMSK25_MASK (0x01 << SCT_EVn_STATE_STATEMSK25_SHIFT) -#define SCT_EVn_STATE_STATEMSK25(x) ((x) << SCT_EVn_STATE_STATEMSK25_SHIFT) +#define SCT_EVn_STATE_STATEMSK25_MASK (0x01 << SCT_EVn_STATE_STATEMSK25_SHIFT) +#define SCT_EVn_STATE_STATEMSK25(x) ((x) << SCT_EVn_STATE_STATEMSK25_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK26: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK26: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK26_SHIFT (26) -#define SCT_EVn_STATE_STATEMSK26_MASK (0x01 << SCT_EVn_STATE_STATEMSK26_SHIFT) -#define SCT_EVn_STATE_STATEMSK26(x) ((x) << SCT_EVn_STATE_STATEMSK26_SHIFT) +#define SCT_EVn_STATE_STATEMSK26_MASK (0x01 << SCT_EVn_STATE_STATEMSK26_SHIFT) +#define SCT_EVn_STATE_STATEMSK26(x) ((x) << SCT_EVn_STATE_STATEMSK26_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK27: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK27: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK27_SHIFT (27) -#define SCT_EVn_STATE_STATEMSK27_MASK (0x01 << SCT_EVn_STATE_STATEMSK27_SHIFT) -#define SCT_EVn_STATE_STATEMSK27(x) ((x) << SCT_EVn_STATE_STATEMSK27_SHIFT) +#define SCT_EVn_STATE_STATEMSK27_MASK (0x01 << SCT_EVn_STATE_STATEMSK27_SHIFT) +#define SCT_EVn_STATE_STATEMSK27(x) ((x) << SCT_EVn_STATE_STATEMSK27_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK28: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK28: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK28_SHIFT (28) -#define SCT_EVn_STATE_STATEMSK28_MASK (0x01 << SCT_EVn_STATE_STATEMSK28_SHIFT) -#define SCT_EVn_STATE_STATEMSK28(x) ((x) << SCT_EVn_STATE_STATEMSK28_SHIFT) +#define SCT_EVn_STATE_STATEMSK28_MASK (0x01 << SCT_EVn_STATE_STATEMSK28_SHIFT) +#define SCT_EVn_STATE_STATEMSK28(x) ((x) << SCT_EVn_STATE_STATEMSK28_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK29: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK29: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK29_SHIFT (29) -#define SCT_EVn_STATE_STATEMSK29_MASK (0x01 << SCT_EVn_STATE_STATEMSK29_SHIFT) -#define SCT_EVn_STATE_STATEMSK29(x) ((x) << SCT_EVn_STATE_STATEMSK29_SHIFT) +#define SCT_EVn_STATE_STATEMSK29_MASK (0x01 << SCT_EVn_STATE_STATEMSK29_SHIFT) +#define SCT_EVn_STATE_STATEMSK29(x) ((x) << SCT_EVn_STATE_STATEMSK29_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK30: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK30: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK30_SHIFT (30) -#define SCT_EVn_STATE_STATEMSK30_MASK (0x01 << SCT_EVn_STATE_STATEMSK30_SHIFT) -#define SCT_EVn_STATE_STATEMSK30(x) ((x) << SCT_EVn_STATE_STATEMSK30_SHIFT) +#define SCT_EVn_STATE_STATEMSK30_MASK (0x01 << SCT_EVn_STATE_STATEMSK30_SHIFT) +#define SCT_EVn_STATE_STATEMSK30(x) ((x) << SCT_EVn_STATE_STATEMSK30_SHIFT) -/* -- SCT_EVn_STATE_STATEMSK31: If bit m is one, event n (n= 0 to 15) happens in state m of the counter selected by the HEVENT bit (m = state number; state 0 = bit 0, state 1= bit 1,..., state 31 = bit 31). */ +/* -- SCT_EVn_STATE_STATEMSK31: If bit m is one, event n (n= 0 to 15) happens in + * state m of the counter selected by the HEVENT bit (m = state number; state 0 + * = bit 0, state 1= bit 1,..., state 31 = bit 31). */ #define SCT_EVn_STATE_STATEMSK31_SHIFT (31) -#define SCT_EVn_STATE_STATEMSK31_MASK (0x01 << SCT_EVn_STATE_STATEMSK31_SHIFT) -#define SCT_EVn_STATE_STATEMSK31(x) ((x) << SCT_EVn_STATE_STATEMSK31_SHIFT) +#define SCT_EVn_STATE_STATEMSK31_MASK (0x01 << SCT_EVn_STATE_STATEMSK31_SHIFT) +#define SCT_EVn_STATE_STATEMSK31(x) ((x) << SCT_EVn_STATE_STATEMSK31_SHIFT) /* --- SCT_EVn_CTRL -------------------------------------- */ -#define SCT_EVn_CTRL(n) MMIO32(SCT_BASE + 0x304 + (n*8)) +#define SCT_EVn_CTRL(n) MMIO32(SCT_BASE + 0x304 + (n * 8)) -/* -- SCT_EVn_CTRL_MATCHSEL: Selects the Match register associated with this event (if any). A match can occur only when the counter selected by the HEVENT bit is running. */ +/* -- SCT_EVn_CTRL_MATCHSEL: Selects the Match register associated with this + * event (if any). A match can occur only when the counter selected by the + * HEVENT bit is running. */ #define SCT_EVn_CTRL_MATCHSEL_SHIFT (0) -#define SCT_EVn_CTRL_MATCHSEL_MASK (0x0F << SCT_EVn_CTRL_MATCHSEL_SHIFT) -#define SCT_EVn_CTRL_MATCHSEL(x) ((x) << SCT_EVn_CTRL_MATCHSEL_SHIFT) +#define SCT_EVn_CTRL_MATCHSEL_MASK (0x0F << SCT_EVn_CTRL_MATCHSEL_SHIFT) +#define SCT_EVn_CTRL_MATCHSEL(x) ((x) << SCT_EVn_CTRL_MATCHSEL_SHIFT) -/* -- SCT_EVn_CTRL_HEVENT: Select L/H counter. Do not set this bit if UNIFY = 1. */ +/* -- SCT_EVn_CTRL_HEVENT: Select L/H counter. Do not set this bit if UNIFY = 1. + */ #define SCT_EVn_CTRL_HEVENT_SHIFT (4) -#define SCT_EVn_CTRL_HEVENT_MASK (0x01 << SCT_EVn_CTRL_HEVENT_SHIFT) -#define SCT_EVn_CTRL_HEVENT(x) ((x) << SCT_EVn_CTRL_HEVENT_SHIFT) +#define SCT_EVn_CTRL_HEVENT_MASK (0x01 << SCT_EVn_CTRL_HEVENT_SHIFT) +#define SCT_EVn_CTRL_HEVENT(x) ((x) << SCT_EVn_CTRL_HEVENT_SHIFT) /* SCT_EVn_CTRL_HEVENT_HEVENT values */ -#define SCT_EVn_CTRL_HEVENT_L_STATE SCT_EVn_CTRL_HEVENT(0x00) /* L state. Selects the L state and the L match register selected by MATCHSEL. */ -#define SCT_EVn_CTRL_HEVENT_H_STATE SCT_EVn_CTRL_HEVENT(0x01) /* H state. Selects the H state and the H match register selected by MATCHSEL. */ +/* L state. Selects the L state and the L match register selected by MATCHSEL. */ +#define SCT_EVn_CTRL_HEVENT_L_STATE SCT_EVn_CTRL_HEVENT(0x00) +/* H state. Selects the H state and the H match register selected by MATCHSEL. */ +#define SCT_EVn_CTRL_HEVENT_H_STATE SCT_EVn_CTRL_HEVENT(0x01) /* -- SCT_EVn_CTRL_OUTSEL: Input/output select */ #define SCT_EVn_CTRL_OUTSEL_SHIFT (5) -#define SCT_EVn_CTRL_OUTSEL_MASK (0x01 << SCT_EVn_CTRL_OUTSEL_SHIFT) -#define SCT_EVn_CTRL_OUTSEL(x) ((x) << SCT_EVn_CTRL_OUTSEL_SHIFT) +#define SCT_EVn_CTRL_OUTSEL_MASK (0x01 << SCT_EVn_CTRL_OUTSEL_SHIFT) +#define SCT_EVn_CTRL_OUTSEL(x) ((x) << SCT_EVn_CTRL_OUTSEL_SHIFT) /* SCT_EVn_CTRL_OUTSEL_OUTSEL values */ -#define SCT_EVn_CTRL_OUTSEL_INPUT SCT_EVn_CTRL_OUTSEL(0x00) /* Input. Selects the input selected by IOSEL. */ -#define SCT_EVn_CTRL_OUTSEL_OUTPUT SCT_EVn_CTRL_OUTSEL(0x01) /* Output. Selects the output selected by IOSEL. */ +/* Input. Selects the input selected by IOSEL. */ +#define SCT_EVn_CTRL_OUTSEL_INPUT SCT_EVn_CTRL_OUTSEL(0x00) +/* Output. Selects the output selected by IOSEL. */ +#define SCT_EVn_CTRL_OUTSEL_OUTPUT SCT_EVn_CTRL_OUTSEL(0x01) -/* -- SCT_EVn_CTRL_IOSEL: Selects the input or output signal associated with this event (if any). Do not select an input in this register, if CKMODE is 1x. In this case the clock input is an implicit ingredient of every event. */ +/* -- SCT_EVn_CTRL_IOSEL: Selects the input or output signal associated with + * this event (if any). Do not select an input in this register, if CKMODE is + * 1x. In this case the clock input is an implicit ingredient of every event. */ #define SCT_EVn_CTRL_IOSEL_SHIFT (6) -#define SCT_EVn_CTRL_IOSEL_MASK (0x0F << SCT_EVn_CTRL_IOSEL_SHIFT) -#define SCT_EVn_CTRL_IOSEL(x) ((x) << SCT_EVn_CTRL_IOSEL_SHIFT) +#define SCT_EVn_CTRL_IOSEL_MASK (0x0F << SCT_EVn_CTRL_IOSEL_SHIFT) +#define SCT_EVn_CTRL_IOSEL(x) ((x) << SCT_EVn_CTRL_IOSEL_SHIFT) -/* -- SCT_EVn_CTRL_IOCOND: Selects the I/O condition for event n. (The detection of edges on outputs lags the conditions that switch the outputs by one SCT clock). In order to guarantee proper edge/state detection, an input must have a minimum pulse width of at least one SCT clock period . */ +/* -- SCT_EVn_CTRL_IOCOND: Selects the I/O condition for event n. (The detection + * of edges on outputs lags the conditions that switch the outputs by one SCT + * clock). In order to guarantee proper edge/state detection, an input must have + * a minimum pulse width of at least one SCT clock period . */ #define SCT_EVn_CTRL_IOCOND_SHIFT (10) -#define SCT_EVn_CTRL_IOCOND_MASK (0x03 << SCT_EVn_CTRL_IOCOND_SHIFT) -#define SCT_EVn_CTRL_IOCOND(x) ((x) << SCT_EVn_CTRL_IOCOND_SHIFT) +#define SCT_EVn_CTRL_IOCOND_MASK (0x03 << SCT_EVn_CTRL_IOCOND_SHIFT) +#define SCT_EVn_CTRL_IOCOND(x) ((x) << SCT_EVn_CTRL_IOCOND_SHIFT) /* SCT_EVn_CTRL_IOCOND_IOCOND values */ -#define SCT_EVn_CTRL_IOCOND_LOW SCT_EVn_CTRL_IOCOND(0x00) /* LOW */ -#define SCT_EVn_CTRL_IOCOND_RISE SCT_EVn_CTRL_IOCOND(0x01) /* Rise */ -#define SCT_EVn_CTRL_IOCOND_FALL SCT_EVn_CTRL_IOCOND(0x02) /* Fall */ -#define SCT_EVn_CTRL_IOCOND_HIGH SCT_EVn_CTRL_IOCOND(0x03) /* HIGH */ +/* LOW */ +#define SCT_EVn_CTRL_IOCOND_LOW SCT_EVn_CTRL_IOCOND(0x00) +/* Rise */ +#define SCT_EVn_CTRL_IOCOND_RISE SCT_EVn_CTRL_IOCOND(0x01) +/* Fall */ +#define SCT_EVn_CTRL_IOCOND_FALL SCT_EVn_CTRL_IOCOND(0x02) +/* HIGH */ +#define SCT_EVn_CTRL_IOCOND_HIGH SCT_EVn_CTRL_IOCOND(0x03) -/* -- SCT_EVn_CTRL_COMBMODE: Selects how the specified match and I/O condition are used and combined. */ +/* -- SCT_EVn_CTRL_COMBMODE: Selects how the specified match and I/O condition + * are used and combined. */ #define SCT_EVn_CTRL_COMBMODE_SHIFT (12) -#define SCT_EVn_CTRL_COMBMODE_MASK (0x03 << SCT_EVn_CTRL_COMBMODE_SHIFT) -#define SCT_EVn_CTRL_COMBMODE(x) ((x) << SCT_EVn_CTRL_COMBMODE_SHIFT) +#define SCT_EVn_CTRL_COMBMODE_MASK (0x03 << SCT_EVn_CTRL_COMBMODE_SHIFT) +#define SCT_EVn_CTRL_COMBMODE(x) ((x) << SCT_EVn_CTRL_COMBMODE_SHIFT) /* SCT_EVn_CTRL_COMBMODE_COMBMODE values */ -#define SCT_EVn_CTRL_COMBMODE_OR SCT_EVn_CTRL_COMBMODE(0x00) /* OR. The event occurs when either the specified match or I/O condition occurs. */ -#define SCT_EVn_CTRL_COMBMODE_MATCH SCT_EVn_CTRL_COMBMODE(0x01) /* MATCH. Uses the specified match only. */ -#define SCT_EVn_CTRL_COMBMODE_IO SCT_EVn_CTRL_COMBMODE(0x02) /* IO. Uses the specified I/O condition only. */ -#define SCT_EVn_CTRL_COMBMODE_AND SCT_EVn_CTRL_COMBMODE(0x03) /* AND. The event occurs when the specified match and I/O condition occur simultaneously. */ +/* OR. The event occurs when either the specified match or I/O condition + * occurs. */ +#define SCT_EVn_CTRL_COMBMODE_OR SCT_EVn_CTRL_COMBMODE(0x00) +/* MATCH. Uses the specified match only. */ +#define SCT_EVn_CTRL_COMBMODE_MATCH SCT_EVn_CTRL_COMBMODE(0x01) +/* IO. Uses the specified I/O condition only. */ +#define SCT_EVn_CTRL_COMBMODE_IO SCT_EVn_CTRL_COMBMODE(0x02) +/* AND. The event occurs when the specified match and I/O condition occur + * simultaneously. */ +#define SCT_EVn_CTRL_COMBMODE_AND SCT_EVn_CTRL_COMBMODE(0x03) -/* -- SCT_EVn_CTRL_STATELD: This bit controls how the STATEV value modifies the state selected by HEVENT when this event is the highest-numbered event occurring for that state. */ +/* -- SCT_EVn_CTRL_STATELD: This bit controls how the STATEV value modifies the + * state selected by HEVENT when this event is the highest-numbered event + * occurring for that state. */ #define SCT_EVn_CTRL_STATELD_SHIFT (14) -#define SCT_EVn_CTRL_STATELD_MASK (0x01 << SCT_EVn_CTRL_STATELD_SHIFT) -#define SCT_EVn_CTRL_STATELD(x) ((x) << SCT_EVn_CTRL_STATELD_SHIFT) +#define SCT_EVn_CTRL_STATELD_MASK (0x01 << SCT_EVn_CTRL_STATELD_SHIFT) +#define SCT_EVn_CTRL_STATELD(x) ((x) << SCT_EVn_CTRL_STATELD_SHIFT) /* SCT_EVn_CTRL_STATELD_STATELD values */ -#define SCT_EVn_CTRL_STATELD_STATEV_VALUE_IS_ADDE SCT_EVn_CTRL_STATELD(0x00) /* STATEV value is added into STATE (the carry-out is ignored). */ -#define SCT_EVn_CTRL_STATELD_STATEV_VALUE_IS_LOAD SCT_EVn_CTRL_STATELD(0x01) /* STATEV value is loaded into STATE. */ +/* STATEV value is added into STATE (the carry-out is ignored). */ +#define SCT_EVn_CTRL_STATELD_STATEV_VALUE_IS_ADDE SCT_EVn_CTRL_STATELD(0x00) +/* STATEV value is loaded into STATE. */ +#define SCT_EVn_CTRL_STATELD_STATEV_VALUE_IS_LOAD SCT_EVn_CTRL_STATELD(0x01) -/* -- SCT_EVn_CTRL_STATEV: This value is loaded into or added to the state selected by HEVENT, depending on STATELD, when this event is the highest-numbered event occurring for that state. If STATELD and STATEV are both zero, there is no change to the STATE value. */ +/* -- SCT_EVn_CTRL_STATEV: This value is loaded into or added to the state + * selected by HEVENT, depending on STATELD, when this event is the + * highest-numbered event occurring for that state. If STATELD and STATEV are + * both zero, there is no change to the STATE value. */ #define SCT_EVn_CTRL_STATEV_SHIFT (15) -#define SCT_EVn_CTRL_STATEV_MASK (0x1F << SCT_EVn_CTRL_STATEV_SHIFT) -#define SCT_EVn_CTRL_STATEV(x) ((x) << SCT_EVn_CTRL_STATEV_SHIFT) +#define SCT_EVn_CTRL_STATEV_MASK (0x1F << SCT_EVn_CTRL_STATEV_SHIFT) +#define SCT_EVn_CTRL_STATEV(x) ((x) << SCT_EVn_CTRL_STATEV_SHIFT) -/* -- SCT_EVn_CTRL_MATCHMEM: If this bit is one and the COMBMODE field specifies a match component to the triggering of this event, then a match is considered to be active whenever the counter value is GREATER THAN OR EQUAL TO the value specified in the match register when counting up, LESS THEN OR EQUAL TO the match value when counting down. If this bit is zero, a match is only be active during the cycle when the counter is equal to the match value. */ +/* -- SCT_EVn_CTRL_MATCHMEM: If this bit is one and the COMBMODE field specifies + * a match component to the triggering of this event, then a match is + * considered to be active whenever the counter value is GREATER THAN OR EQUAL + * TO the value specified in the match register when counting up, LESS THEN OR + * EQUAL TO the match value when counting down. If this bit is zero, a match is + * only be active during the cycle when the counter is equal to the match + * value. */ #define SCT_EVn_CTRL_MATCHMEM_SHIFT (20) -#define SCT_EVn_CTRL_MATCHMEM_MASK (0x01 << SCT_EVn_CTRL_MATCHMEM_SHIFT) -#define SCT_EVn_CTRL_MATCHMEM(x) ((x) << SCT_EVn_CTRL_MATCHMEM_SHIFT) +#define SCT_EVn_CTRL_MATCHMEM_MASK (0x01 << SCT_EVn_CTRL_MATCHMEM_SHIFT) +#define SCT_EVn_CTRL_MATCHMEM(x) ((x) << SCT_EVn_CTRL_MATCHMEM_SHIFT) -/* -- SCT_EVn_CTRL_DIRECTION: Direction qualifier for event generation. This field only applies when the counters are operating in BIDIR mode. If BIDIR = 0, the SCT ignores this field. Value 0x3 is reserved. */ +/* -- SCT_EVn_CTRL_DIRECTION: Direction qualifier for event generation. This + * field only applies when the counters are operating in BIDIR mode. If BIDIR = + * 0, the SCT ignores this field. Value 0x3 is reserved. */ #define SCT_EVn_CTRL_DIRECTION_SHIFT (21) -#define SCT_EVn_CTRL_DIRECTION_MASK (0x03 << SCT_EVn_CTRL_DIRECTION_SHIFT) -#define SCT_EVn_CTRL_DIRECTION(x) ((x) << SCT_EVn_CTRL_DIRECTION_SHIFT) +#define SCT_EVn_CTRL_DIRECTION_MASK (0x03 << SCT_EVn_CTRL_DIRECTION_SHIFT) +#define SCT_EVn_CTRL_DIRECTION(x) ((x) << SCT_EVn_CTRL_DIRECTION_SHIFT) /* SCT_EVn_CTRL_DIRECTION_DIRECTION values */ -#define SCT_EVn_CTRL_DIRECTION_DIRECTION_INDEPENDEN SCT_EVn_CTRL_DIRECTION(0x00) /* Direction independent. This event is triggered regardless of the count direction. */ -#define SCT_EVn_CTRL_DIRECTION_COUNTING_UP SCT_EVn_CTRL_DIRECTION(0x01) /* Counting up. This event is triggered only during up-counting when BIDIR = 1. */ -#define SCT_EVn_CTRL_DIRECTION_COUNTING_DOWN SCT_EVn_CTRL_DIRECTION(0x02) /* Counting down. This event is triggered only during down-counting when BIDIR = 1. */ +/* Direction independent. This event is triggered regardless of the count + * direction. */ +#define SCT_EVn_CTRL_DIRECTION_DIRECTION_INDEPENDEN SCT_EVn_CTRL_DIRECTION(0x00) +/* Counting up. This event is triggered only during up-counting when BIDIR = 1. + */ +#define SCT_EVn_CTRL_DIRECTION_COUNTING_UP SCT_EVn_CTRL_DIRECTION(0x01) +/* Counting down. This event is triggered only during down-counting when BIDIR + * = 1. */ +#define SCT_EVn_CTRL_DIRECTION_COUNTING_DOWN SCT_EVn_CTRL_DIRECTION(0x02) /* --- SCT_OUT0_SET -------------------------------------- */ #define SCT_OUT0_SET MMIO32(SCT_BASE + 0x500) @@ -1708,8 +2292,10 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* --- SCT_OUT15_SET ------------------------------------- */ #define SCT_OUT15_SET MMIO32(SCT_BASE + 0x578) -/* -- SCT_OUTn_SETm: A 1 in bit m selects event m to set output n (or clear it if SETCLRn = 0x1 or 0x2) event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15. */ -#define SCT_OUTn_SETm(n, m) (((n)&1) << (m)) +/* -- SCT_OUTn_SETm: A 1 in bit m selects event m to set output n (or clear it + * if SETCLRn = 0x1 or 0x2) event 0 = bit 0, event 1 = bit 1,..., event 15 = + * bit 15. */ +#define SCT_OUTn_SETm(n, m) (((n) &1) << (m)) /* --- SCT_OUT0_CLR -------------------------------------- */ #define SCT_OUT0_CLR MMIO32(SCT_BASE + 0x504) @@ -1759,6 +2345,7 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* --- SCT_OUT15_CLR ------------------------------------- */ #define SCT_OUT15_CLR MMIO32(SCT_BASE + 0x57C) -/* -- SCT_OUTn_CLR_CLRm: A 1 in bit m selects event m to clear output n (or set it if SETCLRn = 0x1 or 0x2) event 0 = bit 0, event 1 = bit 1,..., event 15 = bit 15. */ -#define SCT_OUTn_CLRm(n, m) (((n)&1) << (m)) - +/* -- SCT_OUTn_CLR_CLRm: A 1 in bit m selects event m to clear output n (or set + * it if SETCLRn = 0x1 or 0x2) event 0 = bit 0, event 1 = bit 1,..., event 15 = + * bit 15. */ +#define SCT_OUTn_CLRm(n, m) (((n) &1) << (m)) From 51b76d33a6e023c3312e591f9bef514aa4a31abe Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 11:53:12 +0100 Subject: [PATCH 06/22] sgpio: Remove a redundant variable. --- firmware/common/sgpio.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c index f32d136a..d5ceff1b 100644 --- a/firmware/common/sgpio.c +++ b/firmware/common/sgpio.c @@ -158,7 +158,6 @@ void sgpio_configure( const uint_fast8_t pos = config->slice_mode_multislice ? 0x1f : 0x03; const bool single_slice = !config->slice_mode_multislice; const uint_fast8_t slice_count = config->slice_mode_multislice ? 8 : 1; - const uint_fast8_t clk_capture_mode = (direction == SGPIO_DIRECTION_TX) ? 0 : 0; // Also enable slice D for clkout to the SCTimer uint32_t slice_enable_mask = BIT3; @@ -188,7 +187,7 @@ void sgpio_configure( | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) /* 0x0=Detect rising edge. (Condition for input bit match interrupt) */ | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) /* 0x0=Normal clock. */ | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) /* 0x1=Use external clock from a pin or other slice */ - | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(clk_capture_mode) /* 0x0=Use rising clock edge, 0x1=Use falling clock edge */ + | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(0) /* 0x0=Use rising clock edge */ | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) /* 0x0=Do not match data */ ; @@ -222,7 +221,7 @@ void sgpio_configure( | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) /* 0x0=Detect rising edge. (Condition for input bit match interrupt) */ | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) /* 0x0=Normal clock. */ | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) /* 0x1=Use external clock from a pin or other slice */ - | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(clk_capture_mode) /* 0x0=Use rising clock edge, 0x1=Use falling clock edge */ + | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(0) /* 0x0=Use rising clock edge */ | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) /* 0x0=Do not match data */ ; From 6cd9ca9483a1c362cfeaf0f642b7c58f4e1cd52d Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 12:01:47 +0100 Subject: [PATCH 07/22] sgpio: Clean up comments. --- firmware/common/sgpio.c | 175 ++++++++++++++++++++++++---------------- 1 file changed, 104 insertions(+), 71 deletions(-) diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c index d5ceff1b..0db01941 100644 --- a/firmware/common/sgpio.c +++ b/firmware/common/sgpio.c @@ -65,12 +65,31 @@ void sgpio_set_slice_mode( } /* - SGPIO0 to 7 = DAC/ADC data bits 0 to 7 (Nota: DAC is 10bits but only bit9 to bit2 are used bit1 & 0 are forced to 0 by CPLD) - ADC=> CLK x 2=CLKx2 with CLKx2(0)rising=D0Q, CLKx2(1)rising=D1I (corresponds to CLK(0)falling+tD0Q=>D0Q, CLK(1)rising+tDOI=>D1I, CLK(1)falling+tD0Q=>D1Q, CLK(1)rising+tDOI=>D2I ...) - tDOI(CLK Rise to I-ADC Channel-I Output Data Valid)=7.4 to 9ns, tD0Q(CLK Fall to Q-ADC Channel-Q Output Data Valid)=6.9 to 9ns - DAC=> CLK x 2=CLKx2 with CLKx2(0)rising=Q:N-2, CLKx2(1)rising=I:N-1(corresponds to CLK(0)rising=>Q:N-2, CLK(0)falling I:N-1, CLK(1)rising=>Q:N-1, CLK(1)falling I:N ...) - tDSI(I-DAC Data to CLK Fall Setup Time)=min 10ns, tDSQ(Q-DAC Data to CLK Rise Setup Time)=min 10ns - + SGPIO 0 to 7 = DAC/ADC data bits 0 to 7 + (Note: DAC is 10 bits but only bit 9 to bit 2 are used, bits 1 & 0 are forced to 0 by CPLD) + + ADC => CLK x 2 = CLKx2 with + CLKx2(0) rising = D0Q, + CLKx2(1) rising = D1I + Corresponds to: + CLK(0) falling + tD0Q => D0Q, + CLK(1) rising + tDOI => D1I, + CLK(1) falling + tD0Q => D1Q, + CLK(1) rising + tDOI => D2I ...) + tDOI(CLK Rise to I-ADC Channel-I Output Data Valid) = 7.4 to 9ns + tD0Q(CLK Fall to Q-ADC Channel-Q Output Data Valid) = 6.9 to 9ns + + DAC=> CLK x 2 = CLKx2 with: + CLKx2(0) rising = Q:N-2, + CLKx2(1) rising = I:N-1 + Corresponds to: + CLK(0) rising => Q:N-2, + CLK(0) falling => I:N-1, + CLK(1) rising => Q:N-1, + CLK(1) falling => I:N ... + tDSI(I-DAC Data to CLK Fall Setup Time) = min 10ns + tDSQ(Q-DAC Data to CLK Rise Setup Time) = min 10ns + SGPIO8 Clock Input (External Clock) SGPIO9 Capture Input (Capture/ChipSelect, 1=Enable Capture, 0=Disable capture) SGPIO10 Disable Output (1/High=Disable codec data stream, 0/Low=Enable codec data stream) @@ -86,10 +105,15 @@ void sgpio_configure( // Set SGPIO output values. const uint_fast8_t cpld_direction = (direction == SGPIO_DIRECTION_TX) ? 1 : 0; - SGPIO_GPIO_OUTREG = - (cpld_direction << 11) /* 1=Output SGPIO11 High(TX mode), 0=Output SGPIO11 Low(RX mode)*/ - | (1L << 10) // disable codec data stream during configuration (Output SGPIO10 High) + + // clang-format off + SGPIO_GPIO_OUTREG = + (cpld_direction << 11) // 1 = Output SGPIO11 High (TX mode) + // 0 = Output SGPIO11 Low (RX mode) + | (1L << 10) // disable codec data stream during configuration + // (Output SGPIO10 High) ; + // clang-format on #ifdef RAD1O /* The data direction might have changed. Check if we need to @@ -102,45 +126,48 @@ void sgpio_configure( (direction == SGPIO_DIRECTION_TX) ? (0xFF << 0) : (0x00 << 0); - SGPIO_GPIO_OENREG = - (1L << 14) // GPDMA burst request SGPIO14 active - | (1L << 11) // direction output SGPIO11 active - | (1L << 10) // disable output SGPIO10 active - | (0L << 9) // capture input SGPIO9 (output i is tri-stated) - | (0L << 8) // clock input SGPIO8 (output i is tri-stated) - | sgpio_gpio_data_direction // 0xFF=Output all SGPIO High(TX mode), 0x00=Output all SPGIO Low(RX mode) - ; - SGPIO_OUT_MUX_CFG( 8) = // SGPIO8: Input: clock - SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */ - | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) /* 0x0 dout_doutm1 (1-bit mode) */ + // clang-format off + SGPIO_GPIO_OENREG = + (1L << 14) // GPDMA burst request SGPIO14 active + | (1L << 11) // direction output SGPIO11 active + | (1L << 10) // disable output SGPIO10 active + | (0L << 9) // capture input SGPIO9 (output i is tri-stated) + | (0L << 8) // clock input SGPIO8 (output i is tri-stated) + | sgpio_gpio_data_direction // 0xFF = Output all SGPIO High (TX mode) + ; // 0x00 = Output all SPGIO Low (RX mode) + + SGPIO_OUT_MUX_CFG( 8) = // SGPIO8: + SGPIO_OUT_MUX_CFG_P_OE_CFG(0) // gpio_oe (state set by GPIO_OEREG) + | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) // dout_doutm1 (1-bit mode) ; - SGPIO_OUT_MUX_CFG( 9) = // SGPIO9: Input: qualifier - SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */ - | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) /* 0x0 dout_doutm1 (1-bit mode) */ + SGPIO_OUT_MUX_CFG( 9) = // SGPIO9: Input: qualifier + SGPIO_OUT_MUX_CFG_P_OE_CFG(0) // gpio_oe (state set by GPIO_OEREG) + | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) // dout_doutm1 (1-bit mode) ; - SGPIO_OUT_MUX_CFG(10) = // GPIO10: Output: disable - SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */ - | SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) /* 0x4=gpio_out (level set by GPIO_OUTREG) */ + SGPIO_OUT_MUX_CFG(10) = // GPIO10: Output: disable + SGPIO_OUT_MUX_CFG_P_OE_CFG(0) // gpio_oe (state set by GPIO_OEREG) + | SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) // gpio_out (level set by GPIO_OUTREG) ; - SGPIO_OUT_MUX_CFG(11) = // GPIO11: Output: direction - SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x0 gpio_oe (state set by GPIO_OEREG) */ - | SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) /* 0x4=gpio_out (level set by GPIO_OUTREG) */ + SGPIO_OUT_MUX_CFG(11) = // GPIO11: Output: direction + SGPIO_OUT_MUX_CFG_P_OE_CFG(0) // gpio_oe (state set by GPIO_OEREG) + | SGPIO_OUT_MUX_CFG_P_OUT_CFG(4) // gpio_out (level set by GPIO_OUTREG) ; - SGPIO_OUT_MUX_CFG(14) = // SGPIO14: Output: internal GPDMA burst request - SGPIO_OUT_MUX_CFG_P_OE_CFG(0) /* 0x4 dout_oem1 (1-bit mode) */ - | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) /* 0x0 dout_doutm1 (1-bit mode) */ + SGPIO_OUT_MUX_CFG(14) = // SGPIO14: Output: internal GPDMA burst request + SGPIO_OUT_MUX_CFG_P_OE_CFG(0) // dout_oem1 (1-bit mode) + | SGPIO_OUT_MUX_CFG_P_OUT_CFG(0) // dout_doutm1 (1-bit mode) ; + // clang-format on const uint_fast8_t output_multiplexing_mode = config->slice_mode_multislice ? 11 : 9; /* SGPIO0 to SGPIO7 */ for(uint_fast8_t i=0; i<8; i++) { // SGPIO pin 0 outputs slice A bit "i". - SGPIO_OUT_MUX_CFG(i) = - SGPIO_OUT_MUX_CFG_P_OE_CFG(0) - | SGPIO_OUT_MUX_CFG_P_OUT_CFG(output_multiplexing_mode) /* 11/0xB=dout_doutm8c (8-bit mode 8c)(multislice L0/7, N0/7), 9=dout_doutm8a (8-bit mode 8a)(A0/7,B0/7) */ - ; + SGPIO_OUT_MUX_CFG(i) = SGPIO_OUT_MUX_CFG_P_OE_CFG(0) + // 11 = dout_doutm8c (8-bit mode 8c) (multislice L0/7, N0/7) + // 9 = dout_doutm8a (8-bit mode 8a) (A0/7, B0/7) + | SGPIO_OUT_MUX_CFG_P_OUT_CFG(output_multiplexing_mode); } const uint_fast8_t slice_indices[] = { @@ -166,30 +193,34 @@ void sgpio_configure( for(uint_fast8_t i=0; islice_mode_multislice == false ) { + // clang-format off SGPIO_MUX_CFG(slice_gpdma) = - SGPIO_MUX_CFG_CONCAT_ORDER(0) /* Self-loop */ - | SGPIO_MUX_CFG_CONCAT_ENABLE(1) - | SGPIO_MUX_CFG_QUALIFIER_SLICE_MODE(0) /* Select qualifier slice A(0x0) */ - | SGPIO_MUX_CFG_QUALIFIER_PIN_MODE(1) /* Select qualifier pin SGPIO9(0x1) */ - | SGPIO_MUX_CFG_QUALIFIER_MODE(3) /* External SGPIO */ - | SGPIO_MUX_CFG_CLK_SOURCE_SLICE_MODE(0) /* Select clock source slice D(0x0) */ - | SGPIO_MUX_CFG_CLK_SOURCE_PIN_MODE(0) /* Source Clock Pin 0x0 = SGPIO8 */ - | SGPIO_MUX_CFG_EXT_CLK_ENABLE(1) /* External clock signal(pin) selected */ + SGPIO_MUX_CFG_CONCAT_ORDER(0) // Self-loop + | SGPIO_MUX_CFG_CONCAT_ENABLE(1) // Concatenate data + | SGPIO_MUX_CFG_QUALIFIER_SLICE_MODE(0) // Select qualifier slice A + | SGPIO_MUX_CFG_QUALIFIER_PIN_MODE(1) // Select qualifier pin SGPIO9 + | SGPIO_MUX_CFG_QUALIFIER_MODE(3) // External SGPIO + | SGPIO_MUX_CFG_CLK_SOURCE_SLICE_MODE(0) // Select clock source slice D + | SGPIO_MUX_CFG_CLK_SOURCE_PIN_MODE(0) // Source clock pin = SGPIO8 + | SGPIO_MUX_CFG_EXT_CLK_ENABLE(1) // External clock signal selected ; - SGPIO_SLICE_MUX_CFG(slice_gpdma) = - SGPIO_SLICE_MUX_CFG_INV_QUALIFIER(0) /* 0x0=Use normal qualifier. */ - | SGPIO_SLICE_MUX_CFG_PARALLEL_MODE(0) /* 0x0=Shift 1 bit per clock. */ - | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) /* 0x0=Detect rising edge. (Condition for input bit match interrupt) */ - | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) /* 0x0=Normal clock. */ - | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) /* 0x1=Use external clock from a pin or other slice */ - | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(0) /* 0x0=Use rising clock edge */ - | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) /* 0x0=Do not match data */ + SGPIO_SLICE_MUX_CFG_INV_QUALIFIER(0) // Use normal qualifier + | SGPIO_SLICE_MUX_CFG_PARALLEL_MODE(0) // Shift 1 bit per clock + | SGPIO_SLICE_MUX_CFG_DATA_CAPTURE_MODE(0) // Detect rising edge + | SGPIO_SLICE_MUX_CFG_INV_OUT_CLK(0) // Normal clock + | SGPIO_SLICE_MUX_CFG_CLKGEN_MODE(1) // Use external clock from a pin or other slice + | SGPIO_SLICE_MUX_CFG_CLK_CAPTURE_MODE(0) // Use rising clock edge + | SGPIO_SLICE_MUX_CFG_MATCH_MODE(0) // Do not match data ; + // clang-format on SGPIO_PRESET(slice_gpdma) = 0; // External clock, don't care SGPIO_COUNT(slice_gpdma) = 0; // External clock, don't care From 7f5ae870ec375fa120f42f99cef7696bfda6c63b Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 10:33:11 +0100 Subject: [PATCH 08/22] hackrf_transfer: Clean up WAV headers. --- host/hackrf-tools/src/hackrf_transfer.c | 60 ++++++++++++------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/host/hackrf-tools/src/hackrf_transfer.c b/host/hackrf-tools/src/hackrf_transfer.c index df32e3d5..f9cf0cc3 100644 --- a/host/hackrf-tools/src/hackrf_transfer.c +++ b/host/hackrf-tools/src/hackrf_transfer.c @@ -130,62 +130,62 @@ typedef struct { /* WAVE or RIFF WAVE file format containing IQ 2x8bits data for HackRF compatible with SDR# Wav IQ file */ typedef struct { - char groupID[4]; /* 'RIFF' */ - uint32_t size; /* File size + 8bytes */ + char groupID[4]; /* 'RIFF' */ + uint32_t size; /* File size + 8bytes */ char riffType[4]; /* 'WAVE'*/ } t_WAVRIFF_hdr; #define FormatID "fmt " /* chunkID for Format Chunk. NOTE: There is a space at the end of this ID. */ typedef struct { - char chunkID[4]; /* 'fmt ' */ - uint32_t chunkSize; /* 16 fixed */ - - uint16_t wFormatTag; /* 1 fixed */ - uint16_t wChannels; /* 2 fixed */ - uint32_t dwSamplesPerSec; /* Freq Hz sampling */ - uint32_t dwAvgBytesPerSec; /* Freq Hz sampling x 2 */ - uint16_t wBlockAlign; /* 2 fixed */ - uint16_t wBitsPerSample; /* 8 fixed */ + char chunkID[4]; /* 'fmt ' */ + uint32_t chunkSize; /* 16 fixed */ + uint16_t wFormatTag; /* 1 fixed */ + uint16_t wChannels; /* 2 fixed */ + uint32_t dwSamplesPerSec; /* Freq Hz sampling */ + uint32_t dwAvgBytesPerSec; /* Freq Hz sampling x 2 */ + uint16_t wBlockAlign; /* 2 fixed */ + uint16_t wBitsPerSample; /* 8 fixed */ } t_FormatChunk; -typedef struct -{ - char chunkID[4]; /* 'data' */ - uint32_t chunkSize; /* Size of data in bytes */ +typedef struct { + char chunkID[4]; /* 'data' */ + uint32_t chunkSize; /* Size of data in bytes */ + /* Samples I(8bits) then Q(8bits), I, Q ... */ } t_DataChunk; -typedef struct -{ +typedef struct { t_WAVRIFF_hdr hdr; t_FormatChunk fmt_chunk; t_DataChunk data_chunk; } t_wav_file_hdr; -t_wav_file_hdr wave_file_hdr = -{ +t_wav_file_hdr wave_file_hdr = { /* t_WAVRIFF_hdr */ { - { 'R', 'I', 'F', 'F' }, /* groupID */ + /* groupID */ + { 'R', 'I', 'F', 'F' }, 0, /* size to update later */ { 'W', 'A', 'V', 'E' } }, /* t_FormatChunk */ { - { 'f', 'm', 't', ' ' }, /* char chunkID[4]; */ - 16, /* uint32_t chunkSize; */ - 1, /* uint16_t wFormatTag; 1 fixed */ - 2, /* uint16_t wChannels; 2 fixed */ - 0, /* uint32_t dwSamplesPerSec; Freq Hz sampling to update later */ - 0, /* uint32_t dwAvgBytesPerSec; Freq Hz sampling x 2 to update later */ - 2, /* uint16_t wBlockAlign; 2 fixed */ - 8, /* uint16_t wBitsPerSample; 8 fixed */ + /* char chunkID[4]; */ + { 'f', 'm', 't', ' ' }, + 16, /* uint32_t chunkSize; */ + 1, /* uint16_t wFormatTag; 1 fixed */ + 2, /* uint16_t wChannels; 2 fixed */ + 0, /* uint32_t dwSamplesPerSec; Freq Hz sampling to update later */ + 0, /* uint32_t dwAvgBytesPerSec; Freq Hz sampling x 2 to update later */ + 2, /* uint16_t wBlockAlign; 2 fixed */ + 8, /* uint16_t wBitsPerSample; 8 fixed */ }, /* t_DataChunk */ { - { 'd', 'a', 't', 'a' }, /* char chunkID[4]; */ - 0, /* uint32_t chunkSize; to update later */ + /* char chunkID[4]; */ + { 'd', 'a', 't', 'a' }, + 0, /* uint32_t chunkSize; to update later */ } }; From 414b4a98da1273d3f08c63130fbc9377847f70e5 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 10:35:26 +0100 Subject: [PATCH 09/22] hackrf_transfer: Split a long line in usage(). --- host/hackrf-tools/src/hackrf_transfer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/host/hackrf-tools/src/hackrf_transfer.c b/host/hackrf-tools/src/hackrf_transfer.c index f9cf0cc3..33a87d74 100644 --- a/host/hackrf-tools/src/hackrf_transfer.c +++ b/host/hackrf-tools/src/hackrf_transfer.c @@ -583,7 +583,8 @@ static void usage() { printf("\t[-B] # Print buffer statistics during transfer\n"); printf("\t[-c amplitude] # CW signal source mode, amplitude 0-127 (DC value to DAC).\n"); printf("\t[-R] # Repeat TX mode (default is off) \n"); - printf("\t[-b baseband_filter_bw_hz] # Set baseband filter bandwidth in Hz.\n\tPossible values: 1.75/2.5/3.5/5/5.5/6/7/8/9/10/12/14/15/20/24/28MHz, default <= 0.75 * sample_rate_hz.\n" ); + printf("\t[-b baseband_filter_bw_hz] # Set baseband filter bandwidth in Hz.\n"); + printf("\tPossible values: 1.75/2.5/3.5/5/5.5/6/7/8/9/10/12/14/15/20/24/28MHz, default <= 0.75 * sample_rate_hz.\n" ); printf("\t[-C ppm] # Set Internal crystal clock error in ppm.\n"); printf("\t[-H hw_sync_enable] # Synchronise USB transfer using GPIO pins.\n"); } From b4c828915a0e5392e259f282b519aabe93dab58a Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 12:15:36 +0100 Subject: [PATCH 10/22] Use an empty block for empty while loops. --- firmware/common/fault_handler.c | 8 ++++---- firmware/common/gpdma.c | 4 ++-- firmware/common/hackrf_core.c | 6 +++--- firmware/common/max2871.c | 2 +- firmware/common/spi_ssp.c | 6 +++--- firmware/common/usb.c | 10 +++++----- firmware/common/usb_queue.c | 11 +++++++---- firmware/common/w25q80bv.c | 4 ++-- firmware/hackrf_usb/usb_api_cpld.c | 4 ++-- firmware/hackrf_usb/usb_api_m0_state.c | 2 +- firmware/hackrf_usb/usb_api_transceiver.c | 2 +- 11 files changed, 31 insertions(+), 28 deletions(-) diff --git a/firmware/common/fault_handler.c b/firmware/common/fault_handler.c index c43a2f50..4ca15a25 100644 --- a/firmware/common/fault_handler.c +++ b/firmware/common/fault_handler.c @@ -70,17 +70,17 @@ __attribute__((used)) void hard_fault_handler_c(uint32_t* args) } } */ - while(1); + while (1) {} } void mem_manage_handler() { - while(1); + while (1) {} } void bus_fault_handler() { - while(1); + while (1) {} } void usage_fault_handler() { - while(1); + while (1) {} } diff --git a/firmware/common/gpdma.c b/firmware/common/gpdma.c index 315b3180..f1a45845 100644 --- a/firmware/common/gpdma.c +++ b/firmware/common/gpdma.c @@ -25,7 +25,7 @@ void gpdma_controller_enable() { GPDMA_CONFIG |= GPDMA_CONFIG_E(1); - while( (GPDMA_CONFIG & GPDMA_CONFIG_E_MASK) == 0 ); + while ((GPDMA_CONFIG & GPDMA_CONFIG_E_MASK) == 0) {} } void gpdma_channel_enable(const uint_fast8_t channel) { @@ -34,7 +34,7 @@ void gpdma_channel_enable(const uint_fast8_t channel) { void gpdma_channel_disable(const uint_fast8_t channel) { GPDMA_CCONFIG(channel) &= ~GPDMA_CCONFIG_E_MASK; - while( (GPDMA_ENBLDCHNS & GPDMA_ENBLDCHNS_ENABLEDCHANNELS(1 << channel)) ); + while (GPDMA_ENBLDCHNS & GPDMA_ENBLDCHNS_ENABLEDCHANNELS(1 << channel)) {} } void gpdma_channel_interrupt_tc_clear(const uint_fast8_t channel) { diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index fce7e8da..40cbc287 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -540,7 +540,7 @@ static void cpu_clock_pll1_max_speed(void) CGU_PLL1_CTRL = reg_val; /* 6. Wait for PLL1 to lock. */ - while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK_MASK)); + while (!(CGU_PLL1_STAT & CGU_PLL1_STAT_LOCK_MASK)) {} /* 7. Set the PLL1 P-divider to divide by 2 (DIRECT=0, PSEL=0). */ CGU_PLL1_CTRL &= ~CGU_PLL1_CTRL_DIRECT_MASK; @@ -635,7 +635,7 @@ void cpu_clock_init(void) CGU_PLL0USB_CTRL = CGU_PLL0USB_CTRL_PD(1) | CGU_PLL0USB_CTRL_AUTOBLOCK(1) | CGU_PLL0USB_CTRL_CLK_SEL(CGU_SRC_XTAL); - while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK); + while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK) {} /* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */ /* Values from User Manual v1.4 Table 94, for 12MHz oscillator. */ @@ -648,7 +648,7 @@ void cpu_clock_init(void) /* power on PLL0USB and wait until stable */ CGU_PLL0USB_CTRL &= ~CGU_PLL0USB_CTRL_PD_MASK; - while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK)); + while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK)) {} /* use PLL0USB as clock source for USB0 */ CGU_BASE_USB0_CLK = CGU_BASE_USB0_CLK_AUTOBLOCK(1) diff --git a/firmware/common/max2871.c b/firmware/common/max2871.c index ea073307..b56b6f60 100644 --- a/firmware/common/max2871.c +++ b/firmware/common/max2871.c @@ -217,7 +217,7 @@ uint64_t max2871_set_frequency(max2871_driver_t* const drv, uint16_t mhz) max2871_set_DIVA(diva); max2871_write_registers(drv); - while(max2871_spi_read(drv) & MAX2871_VASA); + while(max2871_spi_read(drv) & MAX2871_VASA) {} max2871_set_RFA_EN(1); max2871_write_registers(drv); diff --git a/firmware/common/spi_ssp.c b/firmware/common/spi_ssp.c index 7a1e2ea8..f0d0aee8 100644 --- a/firmware/common/spi_ssp.c +++ b/firmware/common/spi_ssp.c @@ -58,15 +58,15 @@ void spi_ssp_stop(spi_bus_t* const bus) { } static void spi_ssp_wait_for_tx_fifo_not_full(spi_bus_t* const bus) { - while( (SSP_SR(bus->obj) & SSP_SR_TNF) == 0 ); + while( (SSP_SR(bus->obj) & SSP_SR_TNF) == 0 ) {} } static void spi_ssp_wait_for_rx_fifo_not_empty(spi_bus_t* const bus) { - while( (SSP_SR(bus->obj) & SSP_SR_RNE) == 0 ); + while( (SSP_SR(bus->obj) & SSP_SR_RNE) == 0 ) {} } static void spi_ssp_wait_for_not_busy(spi_bus_t* const bus) { - while( SSP_SR(bus->obj) & SSP_SR_BSY ); + while( SSP_SR(bus->obj) & SSP_SR_BSY ) {} } static uint32_t spi_ssp_transfer_word(spi_bus_t* const bus, const uint32_t data) { diff --git a/firmware/common/usb.c b/firmware/common/usb.c index 6cbb3296..a44e5a54 100644 --- a/firmware/common/usb.c +++ b/firmware/common/usb.c @@ -69,7 +69,7 @@ void usb_peripheral_reset() { RESET_CTRL0 = RESET_CTRL0_USB0_RST; RESET_CTRL0 = 0; - while( (RESET_ACTIVE_STATUS0 & RESET_CTRL0_USB0_RST) == 0 ); + while( (RESET_ACTIVE_STATUS0 & RESET_CTRL0_USB0_RST) == 0 ) {} } void usb_phy_enable() { @@ -91,7 +91,7 @@ static void usb_clear_all_pending_interrupts() { static void usb_wait_for_endpoint_priming_to_finish(const uint32_t mask) { // Wait until controller has parsed new transfer descriptors and prepared // receive buffers. - while( USB0_ENDPTPRIME & mask ); + while( USB0_ENDPTPRIME & mask ) {} } static void usb_flush_endpoints(const uint32_t mask) { @@ -103,7 +103,7 @@ static void usb_flush_endpoints(const uint32_t mask) { static void usb_wait_for_endpoint_flushing_to_finish(const uint32_t mask) { // Wait until controller has flushed all endpoints / cleared any primed // buffers. - while( USB0_ENDPTFLUSH & mask ); + while( USB0_ENDPTFLUSH & mask ) {} } static void usb_flush_primed_endpoints(const uint32_t mask) { @@ -210,7 +210,7 @@ void usb_endpoint_schedule_wait( // Ensure that endpoint is ready to be primed. // It may have been flushed due to an aborted transaction. // TODO: This should be preceded by a flush? - while( usb_endpoint_is_ready(endpoint) ); + while( usb_endpoint_is_ready(endpoint) ) {} td->next_dtd_pointer = USB_TD_NEXT_DTD_POINTER_TERMINATE; @@ -437,7 +437,7 @@ static void usb_controller_reset() { // all primed endpoints and stopping controller. USB0_USBCMD_D = USB0_USBCMD_D_RST; - while( usb_controller_is_resetting() ); + while( usb_controller_is_resetting() ) {} } static void usb_bus_reset(usb_device_t* const device) { diff --git a/firmware/common/usb_queue.c b/firmware/common/usb_queue.c index 1b79e829..f789caea 100644 --- a/firmware/common/usb_queue.c +++ b/firmware/common/usb_queue.c @@ -39,7 +39,8 @@ static usb_queue_t* endpoint_queue( const usb_endpoint_t* const endpoint ) { uint32_t index = USB_ENDPOINT_INDEX(endpoint->address); - if (endpoint_queues[index] == NULL) while (1); + if (endpoint_queues[index] == NULL) + while (1) {} return endpoint_queues[index]; } @@ -47,7 +48,8 @@ void usb_queue_init( usb_queue_t* const queue ) { uint32_t index = USB_ENDPOINT_INDEX(queue->endpoint->address); - if (endpoint_queues[index] != NULL) while (1); + if (endpoint_queues[index] != NULL) + while (1) {} endpoint_queues[index] = queue; usb_transfer_t* t = queue->free_transfers; @@ -191,7 +193,8 @@ int usb_transfer_schedule_ack( void usb_queue_transfer_complete(usb_endpoint_t* const endpoint) { usb_queue_t* const queue = endpoint_queue(endpoint); - if (queue == NULL) while(1); // Uh oh + if (queue == NULL) + while(1) {} // Uh oh usb_transfer_t* transfer = queue->active; while (transfer != NULL) { @@ -202,7 +205,7 @@ void usb_queue_transfer_complete(usb_endpoint_t* const endpoint) || status & USB_TD_DTD_TOKEN_STATUS_BUFFER_ERROR || status & USB_TD_DTD_TOKEN_STATUS_TRANSACTION_ERROR) { // TODO: Uh oh, do something useful here - while (1); + while (1) {} } // Still not finished diff --git a/firmware/common/w25q80bv.c b/firmware/common/w25q80bv.c index 18362b80..3fda43c8 100644 --- a/firmware/common/w25q80bv.c +++ b/firmware/common/w25q80bv.c @@ -104,7 +104,7 @@ void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t* void w25q80bv_wait_while_busy(w25q80bv_driver_t* const drv) { - while (w25q80bv_get_status(drv) & W25Q80BV_STATUS_BUSY); + while (w25q80bv_get_status(drv) & W25Q80BV_STATUS_BUSY) {} } void w25q80bv_write_enable(w25q80bv_driver_t* const drv) @@ -113,7 +113,7 @@ void w25q80bv_write_enable(w25q80bv_driver_t* const drv) uint8_t data[] = { W25Q80BV_WRITE_ENABLE }; spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data)); - while (!(w25q80bv_get_status(drv) & W25Q80BV_STATUS_WEL)); + while (!(w25q80bv_get_status(drv) & W25Q80BV_STATUS_WEL)) {} } void w25q80bv_chip_erase(w25q80bv_driver_t* const drv) diff --git a/firmware/hackrf_usb/usb_api_cpld.c b/firmware/hackrf_usb/usb_api_cpld.c index a104cc1d..fa709ded 100644 --- a/firmware/hackrf_usb/usb_api_cpld.c +++ b/firmware/hackrf_usb/usb_api_cpld.c @@ -56,7 +56,7 @@ static void refill_cpld_buffer(void) ); // Wait until transfer finishes - while (cpld_wait); + while (cpld_wait) {} } void cpld_update(void) @@ -78,7 +78,7 @@ void cpld_update(void) { /* LED3 (Red) steady on error */ led_on(LED3); - while (1); + while (1) {} } } diff --git a/firmware/hackrf_usb/usb_api_m0_state.c b/firmware/hackrf_usb/usb_api_m0_state.c index dd1bbc19..aadefb10 100644 --- a/firmware/hackrf_usb/usb_api_m0_state.c +++ b/firmware/hackrf_usb/usb_api_m0_state.c @@ -38,7 +38,7 @@ void m0_set_mode(enum m0_mode mode) SGPIO_SET_STATUS_1 = (1 << SGPIO_SLICE_A); // Wait for M0 to acknowledge by clearing the flag. - while (m0_state.requested_mode & M0_REQUEST_FLAG); + while (m0_state.requested_mode & M0_REQUEST_FLAG) {} } usb_request_status_t usb_vendor_request_get_m0_state( diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c index 273c98de..7acc41f8 100644 --- a/firmware/hackrf_usb/usb_api_transceiver.c +++ b/firmware/hackrf_usb/usb_api_transceiver.c @@ -433,5 +433,5 @@ void off_mode(uint32_t seq) { hackrf_ui()->set_transceiver_mode(TRANSCEIVER_MODE_OFF); - while (transceiver_request.seq == seq); + while (transceiver_request.seq == seq) {} } From dbcc46d2210517bb666bc586ec5f736eec896486 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Mon, 27 Jun 2022 12:32:02 +0100 Subject: [PATCH 11/22] Mark code sections to be left alone by clang-format. --- firmware/common/cpld_xc2c.c | 2 ++ firmware/common/hackrf_core.c | 4 ++++ firmware/common/hackrf_ui.c | 2 ++ firmware/common/max2837.c | 2 ++ firmware/common/mixer.c | 2 ++ firmware/common/portapack.c | 2 ++ firmware/common/rf_path.c | 4 ++++ firmware/common/rom_iap.h | 2 ++ firmware/hackrf_usb/usb_descriptor.c | 1 + 9 files changed, 21 insertions(+) diff --git a/firmware/common/cpld_xc2c.c b/firmware/common/cpld_xc2c.c index 4806fe43..82833ffa 100644 --- a/firmware/common/cpld_xc2c.c +++ b/firmware/common/cpld_xc2c.c @@ -26,6 +26,7 @@ #include #include +// clang-format off typedef enum { CPLD_XC2C_IR_INTEST = 0b00000010, CPLD_XC2C_IR_BYPASS = 0b11111111, @@ -52,6 +53,7 @@ typedef enum { CPLD_XC2C_IR_STCTEST = 0b00010110, CPLD_XC2C_IR_ISC_NOOP = 0b11100000, } cpld_xc2c_ir_t; +// clang-format on static bool cpld_xc2c_jtag_clock(const jtag_t* const jtag, const uint32_t tms, const uint32_t tdi) { // 8 ns TMS/TDI to TCK setup diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index 40cbc287..cdb0c468 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -56,6 +56,7 @@ static struct gpio_t gpio_led[] = { #endif }; +// clang-format off static struct gpio_t gpio_1v8_enable = GPIO(3, 6); /* MAX2837 GPIO (XCVR_CTL) PinMux */ @@ -135,6 +136,7 @@ static struct gpio_t gpio_cpld_pp_tdo = GPIO(1, 8); static struct gpio_t gpio_hw_sync_enable = GPIO(5,12); static struct gpio_t gpio_rx_q_invert = GPIO(0, 13); +// clang-format on i2c_bus_t i2c0 = { .obj = (void*)I2C0_BASE, @@ -521,6 +523,7 @@ static void cpu_clock_pll1_max_speed(void) /* 5. Reconfigure PLL1 to produce the final output frequency, with the * crystal oscillator as clock source. */ reg_val = CGU_PLL1_CTRL; + // clang-format off reg_val &= ~( CGU_PLL1_CTRL_CLK_SEL_MASK | CGU_PLL1_CTRL_PD_MASK | CGU_PLL1_CTRL_FBSEL_MASK | @@ -537,6 +540,7 @@ static void cpu_clock_pll1_max_speed(void) CGU_PLL1_CTRL_MSEL(16) | CGU_PLL1_CTRL_FBSEL(0) | CGU_PLL1_CTRL_DIRECT(1); + // clang-format on CGU_PLL1_CTRL = reg_val; /* 6. Wait for PLL1 to lock. */ diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c index 02ec0146..a0677f80 100644 --- a/firmware/common/hackrf_ui.c +++ b/firmware/common/hackrf_ui.c @@ -29,6 +29,7 @@ #define UNUSED(x) (void)(x) /* Stub functions for null UI function table */ +// clang-format off void hackrf_ui_init_null(void) { } void hackrf_ui_deinit_null(void) { } void hackrf_ui_set_frequency_null(uint64_t frequency) { UNUSED(frequency); } @@ -45,6 +46,7 @@ void hackrf_ui_set_antenna_bias_null(bool antenna_bias) { UNUSED(antenna_bias); void hackrf_ui_set_clock_source_null(clock_source_t source) { UNUSED(source); } void hackrf_ui_set_transceiver_mode_null(transceiver_mode_t mode) { UNUSED(mode); } bool hackrf_ui_operacake_gpio_compatible_null(void) { return true; } +// clang-format on /* Null UI function table, used if there's no hardware UI detected. Eliminates the * need to check for null UI before calling a function in the table. diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c index 2e853598..c7887fb0 100644 --- a/firmware/common/max2837.c +++ b/firmware/common/max2837.c @@ -259,6 +259,7 @@ typedef struct { uint32_t ft; } max2837_ft_t; +// clang-format off static const max2837_ft_t max2837_ft[] = { { 1750000, MAX2837_FT_1_75M }, { 2500000, MAX2837_FT_2_5M }, @@ -278,6 +279,7 @@ static const max2837_ft_t max2837_ft[] = { { 28000000, MAX2837_FT_28M }, { 0, 0 }, }; +//clang-format on uint32_t max2837_set_lpf_bandwidth(max2837_driver_t* const drv, const uint32_t bandwidth_hz) { const max2837_ft_t* p = max2837_ft; diff --git a/firmware/common/mixer.c b/firmware/common/mixer.c index 6d2b5870..53a18933 100644 --- a/firmware/common/mixer.c +++ b/firmware/common/mixer.c @@ -5,6 +5,7 @@ #include "gpio_lpc.h" /* RFFC5071 GPIO serial interface PinMux */ +// clang-format off #if (defined JAWBREAKER || defined HACKRF_ONE) static struct gpio_t gpio_rffc5072_select = GPIO(2, 13); static struct gpio_t gpio_rffc5072_clock = GPIO(5, 6); @@ -19,6 +20,7 @@ static struct gpio_t gpio_vco_le = GPIO(2, 14); static struct gpio_t gpio_vco_mux = GPIO(5, 25); static struct gpio_t gpio_synt_rfout_en = GPIO(3, 5); #endif +// clang-format on #if (defined JAWBREAKER || defined HACKRF_ONE) const rffc5071_spi_config_t rffc5071_spi_config = { diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c index 0a2edbae..44c617ce 100644 --- a/firmware/common/portapack.c +++ b/firmware/common/portapack.c @@ -31,6 +31,7 @@ static void portapack_sleep_milliseconds(const uint32_t milliseconds) { delay(milliseconds * 40800); } +// clang-format off static struct gpio_t gpio_io_stbx = GPIO(5, 0); /* P2_0 */ static struct gpio_t gpio_addr = GPIO(5, 1); /* P2_1 */ __attribute__((unused)) @@ -40,6 +41,7 @@ static struct gpio_t gpio_unused = GPIO(5, 7); /* P2_8 */ static struct gpio_t gpio_lcd_rdx = GPIO(5, 4); /* P2_4 */ static struct gpio_t gpio_lcd_wrx = GPIO(1, 10); /* P2_9 */ static struct gpio_t gpio_dir = GPIO(1, 13); /* P2_13 */ +// clang-format on typedef struct portapack_if_t { gpio_t gpio_dir; diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c index 6394726b..514fec91 100644 --- a/firmware/common/rf_path.c +++ b/firmware/common/rf_path.c @@ -240,6 +240,7 @@ static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo) { void rf_path_pin_setup(rf_path_t* const rf_path) { #ifdef HACKRF_ONE /* Configure RF switch control signals */ + // clang-format off scu_pinmux(SCU_HP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(SCU_LP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(SCU_TX_MIX_BP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); @@ -253,6 +254,7 @@ void rf_path_pin_setup(rf_path_t* const rf_path) { scu_pinmux(SCU_AMP_BYPASS, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(SCU_RX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(SCU_NO_RX_AMP_PWR, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + // clang-format on /* Configure RF power supply (VAA) switch */ scu_pinmux(SCU_NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); @@ -279,6 +281,7 @@ void rf_path_pin_setup(rf_path_t* const rf_path) { switchctrl_set(rf_path, SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_MIX_BYPASS); #elif RAD1O /* Configure RF switch control signals */ + // clang-format off scu_pinmux(SCU_BY_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(SCU_BY_AMP_N, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu_pinmux(SCU_TX_RX, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); @@ -290,6 +293,7 @@ void rf_path_pin_setup(rf_path_t* const rf_path) { scu_pinmux(SCU_TX_AMP, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(SCU_RX_LNA, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); scu_pinmux(SCU_MIXER_EN, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); + // clang-format on /* Configure RF power supply (VAA) switch */ scu_pinmux(SCU_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); diff --git a/firmware/common/rom_iap.h b/firmware/common/rom_iap.h index 0f487586..642f0425 100644 --- a/firmware/common/rom_iap.h +++ b/firmware/common/rom_iap.h @@ -63,6 +63,7 @@ typedef enum { } iap_cmd_code_t; /* ISP/IAP Return Code */ +// clang-format off typedef enum { CMD_SUCCESS = 0x00000000, /* CMD_SUCCESS Command is executed successfully. @@ -94,6 +95,7 @@ typedef enum /* Special Error */ ERROR_IAP_NOT_IMPLEMENTED = 0x00000100 /* IAP is not implemented in this part */ } isp_iap_ret_code_t; +// clang-format on typedef struct { diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c index 92bcb798..f37718d3 100644 --- a/firmware/hackrf_usb/usb_descriptor.c +++ b/firmware/hackrf_usb/usb_descriptor.c @@ -159,6 +159,7 @@ uint8_t usb_descriptor_string_languages[] = { USB_WORD(USB_STRING_LANGID), // wLANGID }; +// clang-format off uint8_t usb_descriptor_string_manufacturer[] = { 40, // bLength USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType From 8b157cfdbc6d74818db43b28746b988365fb3354 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Wed, 3 Aug 2022 23:28:23 +0100 Subject: [PATCH 12/22] Split up two groups of defines. --- host/libhackrf/src/hackrf.h | 1 + 1 file changed, 1 insertion(+) diff --git a/host/libhackrf/src/hackrf.h b/host/libhackrf/src/hackrf.h index fc76dd7f..dd46097b 100644 --- a/host/libhackrf/src/hackrf.h +++ b/host/libhackrf/src/hackrf.h @@ -50,6 +50,7 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI #define SAMPLES_PER_BLOCK 8192 #define BYTES_PER_BLOCK 16384 #define MAX_SWEEP_RANGES 10 + #define HACKRF_OPERACAKE_ADDRESS_INVALID 0xFF #define HACKRF_OPERACAKE_MAX_BOARDS 8 #define HACKRF_OPERACAKE_MAX_DWELL_TIMES 16 From b50aeb4082b8dc8f8bffb07febcbec7165d2b424 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Wed, 3 Aug 2022 23:34:28 +0100 Subject: [PATCH 13/22] fixup clang-format off --- firmware/common/gpio_lpc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/firmware/common/gpio_lpc.h b/firmware/common/gpio_lpc.h index ef981fe8..2fed352e 100644 --- a/firmware/common/gpio_lpc.h +++ b/firmware/common/gpio_lpc.h @@ -61,10 +61,12 @@ struct gpio_t { #define GPIO_LPC_PORT(_n) ((gpio_port_t*)((GPIO_LPC_BASE + GPIO_LPC_PORT_OFFSET) + (_n) * 4)) #define GPIO_LPC_W(_port_num, _pin_num) (volatile uint32_t*)((GPIO_LPC_BASE + GPIO_LPC_W_OFFSET) + ((_port_num) * 0x80) + ((_pin_num) * 4)) +// clang-format off #define GPIO(_port_num, _pin_num) { \ .mask = (1UL << (_pin_num)), \ .port = GPIO_LPC_PORT(_port_num), \ .gpio_w = GPIO_LPC_W(_port_num, _pin_num), \ } +// clang-format on #endif/*__GPIO_LPC_H__*/ From ebb9e43fde10475ccc2fa2132c2a6e2a88a9efa6 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Wed, 3 Aug 2022 23:34:39 +0100 Subject: [PATCH 14/22] Move some trailing comments on long lines. --- firmware/common/w25q80bv_target.c | 19 +++++++++++++------ host/hackrf-tools/src/hackrf_cpldjtag.c | 3 ++- host/hackrf-tools/src/hackrf_transfer.c | 3 ++- 3 files changed, 17 insertions(+), 8 deletions(-) diff --git a/firmware/common/w25q80bv_target.c b/firmware/common/w25q80bv_target.c index df12d342..3dd3a284 100644 --- a/firmware/common/w25q80bv_target.c +++ b/firmware/common/w25q80bv_target.c @@ -32,12 +32,19 @@ void w25q80bv_target_init(w25q80bv_driver_t* const drv) { (void)drv; /* Init SPIFI GPIO to Normal GPIO */ - scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_3 SPIFI_SCK => SSP0_SCK - scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14] - scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15] - scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); // P3_6 SPIFI SPIFI_CIPO IO1 => GPIO0[6] - scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_7 SPIFI SPIFI_COPI IO0 => GPIO5[10] - scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11] + + // P3_3 SPIFI_SCK => SSP0_SCK + scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); + // P3_4 SPIFI SPIFI_SIO3 IO3 => GPIO1[14] + scu_pinmux(P3_4, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); + // P3_5 SPIFI SPIFI_SIO2 IO2 => GPIO1[15] + scu_pinmux(P3_5, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); + // P3_6 SPIFI SPIFI_CIPO IO1 => GPIO0[6] + scu_pinmux(P3_6, (SCU_GPIO_FAST | SCU_CONF_FUNCTION0)); + // P3_7 SPIFI SPIFI_COPI IO0 => GPIO5[10] + scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); + // P3_8 SPIFI SPIFI_CS => GPIO5[11] + scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); /* configure SSP pins */ scu_pinmux(SCU_SSP0_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); diff --git a/host/hackrf-tools/src/hackrf_cpldjtag.c b/host/hackrf-tools/src/hackrf_cpldjtag.c index 1ddca19e..1735f93e 100644 --- a/host/hackrf-tools/src/hackrf_cpldjtag.c +++ b/host/hackrf-tools/src/hackrf_cpldjtag.c @@ -135,7 +135,8 @@ int main(int argc, char** argv) return EXIT_FAILURE; } /* Get size of the file */ - fseek(infile, 0, SEEK_END); /* Not really portable but work on major OS Linux/Win32 */ + /* Not really portable but work on major OS Linux/Win32 */ + fseek(infile, 0, SEEK_END); length = ftell(infile); /* Move to start */ rewind(infile); diff --git a/host/hackrf-tools/src/hackrf_transfer.c b/host/hackrf-tools/src/hackrf_transfer.c index 33a87d74..6c65894e 100644 --- a/host/hackrf-tools/src/hackrf_transfer.c +++ b/host/hackrf-tools/src/hackrf_transfer.c @@ -1150,7 +1150,8 @@ int main(int argc, char** argv) { // This is only an approximate measure, to assist getting receive levels right: double full_scale_ratio = ((double)stream_amplitude_now / (byte_count_now ? byte_count_now : 1))/128; double dB_full_scale_ratio = 10*log10(full_scale_ratio); - if (dB_full_scale_ratio > 1) // Guard against ridiculous reports + // Guard against ridiculous reports + if (dB_full_scale_ratio > 1) dB_full_scale_ratio = -0.0; fprintf(stderr, "%4.1f MiB / %5.3f sec = %4.1f MiB/second, amplitude %3.1f dBfs", (byte_count_now / 1e6f), From 7d6a5247954d16221dacbd7d0c2bf3eb4965ac00 Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Tue, 28 Jun 2022 12:47:59 +0100 Subject: [PATCH 15/22] Add clang-format configuration and reformat script. --- .clang-format | 80 ++++++++++++++++++++++++++++++++++++++++ tools/reformat-source.sh | 18 +++++++++ 2 files changed, 98 insertions(+) create mode 100644 .clang-format create mode 100755 tools/reformat-source.sh diff --git a/.clang-format b/.clang-format new file mode 100644 index 00000000..64192eca --- /dev/null +++ b/.clang-format @@ -0,0 +1,80 @@ +# clang-format configuration file. Intended for clang-format >= 14. +# +# For more information, see: +# +# Documentation/process/clang-format.rst +# https://clang.llvm.org/docs/ClangFormat.html +# https://clang.llvm.org/docs/ClangFormatStyleOptions.html +# +--- +AlignAfterOpenBracket: AlwaysBreak +AlignArrayOfStructures: None +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignConsecutiveMacros: true +AlignEscapedNewlines: Left +AlignOperands: DontAlign +AlignTrailingComments: true +AllowAllArgumentsOnNextLine: false +AllowAllParametersOfDeclarationOnNextLine: false +AllowShortBlocksOnASingleLine: true +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AttributeMacros: ['ADDAPI', 'ADDCALL'] +BinPackArguments: false +BinPackParameters: false +BraceWrapping: + AfterControlStatement: false + AfterEnum: false + AfterFunction: true + AfterStruct: false + AfterUnion: false + BeforeElse: false + IndentBraces: false + SplitEmptyFunction: true + SplitEmptyRecord: true +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: false +BreakStringLiterals: false +ColumnLimit: 90 +ContinuationIndentWidth: 8 +DerivePointerAlignment: false +DisableFormat: false +ExperimentalAutoDetectBinPacking: false +IncludeBlocks: Preserve +IncludeCategories: + - Regex: '.*' + Priority: 1 +IndentCaseLabels: false +IndentGotoLabels: false +IndentPPDirectives: BeforeHash +IndentWidth: 8 +IndentWrappedFunctionNames: false +KeepEmptyLinesAtTheStartOfBlocks: false +MaxEmptyLinesToKeep: 1 +PenaltyBreakAssignment: 0 +PenaltyBreakBeforeFirstCallParameter: 0 +PenaltyBreakOpenParenthesis: 0 +PenaltyExcessCharacter: 100 +PenaltyReturnTypeOnItsOwnLine: 1000 +PointerAlignment: Left +ReflowComments: false +SeparateDefinitionBlocks: Always +SortIncludes: false +SpaceAfterCStyleCast: true +SpaceBeforeAssignmentOperators: true +SpaceBeforeParens: ControlStatements +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +TabWidth: 8 +UseTab: ForContinuationAndIndentation +... diff --git a/tools/reformat-source.sh b/tools/reformat-source.sh new file mode 100755 index 00000000..754717c4 --- /dev/null +++ b/tools/reformat-source.sh @@ -0,0 +1,18 @@ +#!/bin/bash + +VERSION=`clang-format --version | grep -o '[^ ]*$' | cut -d '.' -f 1` +if [ "$VERSION" -ge "14" ]; then + CLANG_FORMAT=clang-format +elif clang-format-14 --version > /dev/null; then + CLANG_FORMAT=clang-format-14 +else + echo "clang-format version 14 or higher is required." + exit 1 +fi + +$CLANG_FORMAT \ + -i \ + --style=file \ + host/libhackrf/src/*.{c,h} \ + host/hackrf-tools/src/*.c \ + firmware/{common,common/rad1o,hackrf_usb}/*.{c,h} From c3fdf402d7fbe4878f909dfe9461aa2f1c69e3aa Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Wed, 6 Jul 2022 12:50:08 +0100 Subject: [PATCH 16/22] Reformat all code to new clang-format standard. --- firmware/common/bitband.c | 45 +- firmware/common/bitband.h | 18 +- firmware/common/cpld_jtag.c | 33 +- firmware/common/cpld_jtag.h | 11 +- firmware/common/cpld_xc2c.c | 207 ++-- firmware/common/cpld_xc2c.h | 15 +- firmware/common/crc.c | 13 +- firmware/common/crc.h | 2 +- firmware/common/fault_handler.c | 30 +- firmware/common/fault_handler.h | 9 +- firmware/common/gpdma.c | 29 +- firmware/common/gpdma.h | 2 +- firmware/common/gpio.h | 2 +- firmware/common/gpio_lpc.c | 26 +- firmware/common/gpio_lpc.h | 28 +- firmware/common/hackrf_core.c | 291 ++--- firmware/common/hackrf_core.h | 230 ++-- firmware/common/hackrf_ui.c | 20 +- firmware/common/i2c_bus.c | 14 +- firmware/common/i2c_bus.h | 16 +- firmware/common/i2c_lpc.c | 34 +- firmware/common/i2c_lpc.h | 12 +- firmware/common/m0_sleep.c | 7 +- firmware/common/max2837.c | 93 +- firmware/common/max2837.h | 8 +- firmware/common/max2837_target.c | 8 +- firmware/common/max2871.c | 41 +- firmware/common/max2871_regs.c | 206 ++-- firmware/common/max2871_regs.h | 2 +- firmware/common/max5864.c | 9 +- firmware/common/max5864_target.c | 9 +- firmware/common/max5864_target.h | 2 +- firmware/common/mixer.h | 4 +- firmware/common/operacake.c | 215 ++-- firmware/common/operacake.h | 5 +- firmware/common/operacake_sctimer.c | 84 +- firmware/common/operacake_sctimer.h | 2 +- firmware/common/portapack.c | 305 ++--- firmware/common/portapack.h | 15 +- firmware/common/rad1o/decoder.c | 29 +- firmware/common/rad1o/decoder.h | 2 +- firmware/common/rad1o/display.c | 46 +- firmware/common/rad1o/display.h | 10 +- firmware/common/rad1o/draw.c | 10 +- firmware/common/rad1o/fonts.h | 18 +- firmware/common/rad1o/print.c | 2 +- firmware/common/rad1o/print.h | 2 +- firmware/common/rad1o/render.c | 20 +- firmware/common/rad1o/render.h | 4 +- firmware/common/rad1o/smallfonts.c | 172 +-- firmware/common/rad1o/ubuntu18.c | 224 ++-- firmware/common/rf_path.c | 152 +-- firmware/common/rf_path.h | 2 +- firmware/common/rffc5071.c | 118 +- firmware/common/rffc5071_spi.c | 66 +- firmware/common/rffc5071_spi.h | 5 +- firmware/common/rom_iap.c | 67 +- firmware/common/rom_iap.h | 16 +- firmware/common/sct.h | 30 +- firmware/common/sgpio.c | 116 +- firmware/common/sgpio.h | 16 +- firmware/common/si5351c.c | 201 ++-- firmware/common/si5351c.h | 58 +- firmware/common/spi_bus.c | 15 +- firmware/common/spi_bus.h | 12 +- firmware/common/spi_ssp.c | 59 +- firmware/common/spi_ssp.h | 7 +- firmware/common/streaming.c | 6 +- firmware/common/streaming.h | 2 +- firmware/common/tuning.c | 40 +- firmware/common/tuning.h | 8 +- firmware/common/ui_portapack.c | 743 ++++++++----- firmware/common/ui_portapack.h | 2 +- firmware/common/ui_rad1o.c | 34 +- firmware/common/ui_rad1o.h | 2 +- firmware/common/usb.c | 452 ++++---- firmware/common/usb.h | 66 +- firmware/common/usb_queue.c | 286 ++--- firmware/common/usb_queue.h | 60 +- firmware/common/usb_request.c | 54 +- firmware/common/usb_request.h | 19 +- firmware/common/usb_standard_request.c | 269 +++-- firmware/common/usb_standard_request.h | 25 +- firmware/common/usb_type.h | 32 +- firmware/common/w25q80bv.c | 100 +- firmware/common/w25q80bv.h | 23 +- firmware/common/w25q80bv_target.c | 9 +- firmware/common/w25q80bv_target.h | 2 +- firmware/hackrf_usb/hackrf_usb.c | 85 +- firmware/hackrf_usb/usb_api_board_info.c | 50 +- firmware/hackrf_usb/usb_api_board_info.h | 12 +- firmware/hackrf_usb/usb_api_cpld.c | 46 +- firmware/hackrf_usb/usb_api_cpld.h | 3 +- firmware/hackrf_usb/usb_api_m0_state.c | 10 +- firmware/hackrf_usb/usb_api_m0_state.h | 5 +- firmware/hackrf_usb/usb_api_operacake.c | 70 +- firmware/hackrf_usb/usb_api_operacake.h | 23 +- firmware/hackrf_usb/usb_api_register.c | 105 +- firmware/hackrf_usb/usb_api_register.h | 21 +- firmware/hackrf_usb/usb_api_spiflash.c | 83 +- firmware/hackrf_usb/usb_api_spiflash.h | 15 +- firmware/hackrf_usb/usb_api_sweep.c | 97 +- firmware/hackrf_usb/usb_api_sweep.h | 3 +- firmware/hackrf_usb/usb_api_transceiver.c | 194 ++-- firmware/hackrf_usb/usb_api_transceiver.h | 26 +- firmware/hackrf_usb/usb_api_ui.c | 4 +- firmware/hackrf_usb/usb_api_ui.h | 3 +- firmware/hackrf_usb/usb_bulk_buffer.h | 2 +- firmware/hackrf_usb/usb_descriptor.c | 199 ++-- firmware/hackrf_usb/usb_descriptor.h | 3 +- firmware/hackrf_usb/usb_device.c | 1 - firmware/hackrf_usb/usb_endpoint.c | 8 +- host/hackrf-tools/src/hackrf_clock.c | 244 ++-- host/hackrf-tools/src/hackrf_cpldjtag.c | 64 +- host/hackrf-tools/src/hackrf_debug.c | 476 ++++---- host/hackrf-tools/src/hackrf_info.c | 116 +- host/hackrf-tools/src/hackrf_operacake.c | 239 ++-- host/hackrf-tools/src/hackrf_spiflash.c | 206 ++-- host/hackrf-tools/src/hackrf_sweep.c | 506 +++++---- host/hackrf-tools/src/hackrf_transfer.c | 802 +++++++------ host/libhackrf/src/hackrf.c | 1235 ++++++++++----------- host/libhackrf/src/hackrf.h | 272 +++-- 122 files changed, 6113 insertions(+), 4930 deletions(-) diff --git a/firmware/common/bitband.c b/firmware/common/bitband.c index 8f4e618b..aca7b9fb 100644 --- a/firmware/common/bitband.c +++ b/firmware/common/bitband.c @@ -21,25 +21,40 @@ #include "bitband.h" -volatile uint32_t* peripheral_bitband_address(volatile void* const address, const uint_fast8_t bit_number) { - const uint32_t bit_band_base = 0x42000000; - const uint32_t byte_offset = (uint32_t)address - 0x40000000; - const uint32_t bit_word_offset = (byte_offset * 32) + (bit_number * 4); - const uint32_t bit_word_address = bit_band_base + bit_word_offset; - return (volatile uint32_t*)bit_word_address; +volatile uint32_t* peripheral_bitband_address( + volatile void* const address, + const uint_fast8_t bit_number) +{ + const uint32_t bit_band_base = 0x42000000; + const uint32_t byte_offset = (uint32_t) address - 0x40000000; + const uint32_t bit_word_offset = (byte_offset * 32) + (bit_number * 4); + const uint32_t bit_word_address = bit_band_base + bit_word_offset; + return (volatile uint32_t*) bit_word_address; } -void peripheral_bitband_set(volatile void* const peripheral_address, const uint_fast8_t bit_number) { - volatile uint32_t* const bitband_address = peripheral_bitband_address(peripheral_address, bit_number); - *bitband_address = 1; +void peripheral_bitband_set( + volatile void* const peripheral_address, + const uint_fast8_t bit_number) +{ + volatile uint32_t* const bitband_address = + peripheral_bitband_address(peripheral_address, bit_number); + *bitband_address = 1; } -void peripheral_bitband_clear(volatile void* const peripheral_address, const uint_fast8_t bit_number) { - volatile uint32_t* const bitband_address = peripheral_bitband_address(peripheral_address, bit_number); - *bitband_address = 0; +void peripheral_bitband_clear( + volatile void* const peripheral_address, + const uint_fast8_t bit_number) +{ + volatile uint32_t* const bitband_address = + peripheral_bitband_address(peripheral_address, bit_number); + *bitband_address = 0; } -uint32_t peripheral_bitband_get(volatile void* const peripheral_address, const uint_fast8_t bit_number) { - volatile uint32_t* const bitband_address = peripheral_bitband_address(peripheral_address, bit_number); - return *bitband_address; +uint32_t peripheral_bitband_get( + volatile void* const peripheral_address, + const uint_fast8_t bit_number) +{ + volatile uint32_t* const bitband_address = + peripheral_bitband_address(peripheral_address, bit_number); + return *bitband_address; } diff --git a/firmware/common/bitband.h b/firmware/common/bitband.h index 03aef8d2..f25c42b5 100644 --- a/firmware/common/bitband.h +++ b/firmware/common/bitband.h @@ -24,9 +24,17 @@ #include -volatile uint32_t* peripheral_bitband_address(volatile void* const address, const uint_fast8_t bit_number); -void peripheral_bitband_set(volatile void* const peripheral_address, const uint_fast8_t bit_number); -void peripheral_bitband_clear(volatile void* const peripheral_address, const uint_fast8_t bit_number); -uint32_t peripheral_bitband_get(volatile void* const peripheral_address, const uint_fast8_t bit_number); +volatile uint32_t* peripheral_bitband_address( + volatile void* const address, + const uint_fast8_t bit_number); +void peripheral_bitband_set( + volatile void* const peripheral_address, + const uint_fast8_t bit_number); +void peripheral_bitband_clear( + volatile void* const peripheral_address, + const uint_fast8_t bit_number); +uint32_t peripheral_bitband_get( + volatile void* const peripheral_address, + const uint_fast8_t bit_number); -#endif//__BITBAND_H__ +#endif //__BITBAND_H__ diff --git a/firmware/common/cpld_jtag.c b/firmware/common/cpld_jtag.c index f5a6cdb2..3c8f34cb 100644 --- a/firmware/common/cpld_jtag.c +++ b/firmware/common/cpld_jtag.c @@ -29,7 +29,8 @@ static refill_buffer_cb refill_buffer; static uint32_t xsvf_buffer_len, xsvf_pos; static unsigned char* xsvf_buffer; -void cpld_jtag_take(jtag_t* const jtag) { +void cpld_jtag_take(jtag_t* const jtag) +{ const jtag_gpio_t* const gpio = jtag->gpio; /* Set initial GPIO state to the voltages of the internal or external pull-ups/downs, @@ -53,7 +54,8 @@ void cpld_jtag_take(jtag_t* const jtag) { gpio_input(gpio->gpio_tdo); } -void cpld_jtag_release(jtag_t* const jtag) { +void cpld_jtag_release(jtag_t* const jtag) +{ const jtag_gpio_t* const gpio = jtag->gpio; /* Make all pins inputs when JTAG interface not active. @@ -72,30 +74,31 @@ void cpld_jtag_release(jtag_t* const jtag) { /* return 0 if success else return error code see xsvfExecute() */ int cpld_jtag_program( - jtag_t* const jtag, - const uint32_t buffer_length, - unsigned char* const buffer, - refill_buffer_cb refill -) { + jtag_t* const jtag, + const uint32_t buffer_length, + unsigned char* const buffer, + refill_buffer_cb refill) +{ int error; cpld_jtag_take(jtag); xsvf_buffer = buffer; xsvf_buffer_len = buffer_length; - refill_buffer = refill; + refill_buffer = refill; error = xsvfExecute(jtag->gpio); cpld_jtag_release(jtag); - + return error; } /* this gets called by the XAPP058 code */ -unsigned char cpld_jtag_get_next_byte(void) { - if (xsvf_pos == xsvf_buffer_len) { - refill_buffer(); - xsvf_pos = 0; - } +unsigned char cpld_jtag_get_next_byte(void) +{ + if (xsvf_pos == xsvf_buffer_len) { + refill_buffer(); + xsvf_pos = 0; + } unsigned char byte = xsvf_buffer[xsvf_pos]; - xsvf_pos++; + xsvf_pos++; return byte; } diff --git a/firmware/common/cpld_jtag.h b/firmware/common/cpld_jtag.h index e0a30364..165e8f77 100644 --- a/firmware/common/cpld_jtag.h +++ b/firmware/common/cpld_jtag.h @@ -52,11 +52,10 @@ void cpld_jtag_release(jtag_t* const jtag); * contents of the buffer has been streamed to the CPLD the given * refill_buffer callback will be called. */ int cpld_jtag_program( - jtag_t* const jtag, - const uint32_t buffer_length, - unsigned char* const buffer, - refill_buffer_cb refill -); + jtag_t* const jtag, + const uint32_t buffer_length, + unsigned char* const buffer, + refill_buffer_cb refill); unsigned char cpld_jtag_get_next_byte(void); -#endif//__CPLD_JTAG_H__ +#endif //__CPLD_JTAG_H__ diff --git a/firmware/common/cpld_xc2c.c b/firmware/common/cpld_xc2c.c index 82833ffa..def620a6 100644 --- a/firmware/common/cpld_xc2c.c +++ b/firmware/common/cpld_xc2c.c @@ -53,9 +53,14 @@ typedef enum { CPLD_XC2C_IR_STCTEST = 0b00010110, CPLD_XC2C_IR_ISC_NOOP = 0b11100000, } cpld_xc2c_ir_t; + // clang-format on -static bool cpld_xc2c_jtag_clock(const jtag_t* const jtag, const uint32_t tms, const uint32_t tdi) { +static bool cpld_xc2c_jtag_clock( + const jtag_t* const jtag, + const uint32_t tms, + const uint32_t tdi) +{ // 8 ns TMS/TDI to TCK setup gpio_write(jtag->gpio->gpio_tdi, tdi); gpio_write(jtag->gpio->gpio_tms, tms); @@ -78,7 +83,7 @@ static bool cpld_xc2c_jtag_clock(const jtag_t* const jtag, const uint32_t tms, c __asm__("nop"); __asm__("nop"); __asm__("nop"); - + gpio_set(jtag->gpio->gpio_tck); // 15 ns TCK to TMS/TDI hold time @@ -90,30 +95,46 @@ static bool cpld_xc2c_jtag_clock(const jtag_t* const jtag, const uint32_t tms, c return gpio_read(jtag->gpio->gpio_tdo); } -static void cpld_xc2c_jtag_shift_ptr_tms(const jtag_t* const jtag, uint8_t* const tdi_tdo, const size_t start, const size_t end, const bool tms) { - for(size_t i=start; i> 3; const size_t bit_n = i & 7; const uint32_t mask = (1U << bit_n); - const uint32_t tdo = cpld_xc2c_jtag_clock(jtag, tms, tdi_tdo[byte_n] & mask) ? 1 : 0; + const uint32_t tdo = + cpld_xc2c_jtag_clock(jtag, tms, tdi_tdo[byte_n] & mask) ? 1 : 0; tdi_tdo[byte_n] &= ~mask; tdi_tdo[byte_n] |= (tdo << bit_n); } } -static void cpld_xc2c_jtag_shift_ptr(const jtag_t* const jtag, uint8_t* const tdi_tdo, const size_t count) { - if( count > 0 ) { +static void cpld_xc2c_jtag_shift_ptr( + const jtag_t* const jtag, + uint8_t* const tdi_tdo, + const size_t count) +{ + if (count > 0) { cpld_xc2c_jtag_shift_ptr_tms(jtag, tdi_tdo, 0, count - 1, false); cpld_xc2c_jtag_shift_ptr_tms(jtag, tdi_tdo, count - 1, count, true); } } -static uint32_t cpld_xc2c_jtag_shift_u32(const jtag_t* const jtag, const uint32_t tms, const uint32_t tdi, const size_t count) { +static uint32_t cpld_xc2c_jtag_shift_u32( + const jtag_t* const jtag, + const uint32_t tms, + const uint32_t tdi, + const size_t count) +{ uint32_t tdo = 0; - for(size_t i=0; i Shift-DR or Shift-IR */ cpld_xc2c_jtag_shift_u32(jtag, 0b001, 0b000, 3); /* Shift-[DI]R -> Exit1-[DI]R */ cpld_xc2c_jtag_shift_ptr(jtag, tdi_tdo, bit_count); - if( pause_count ) { + if (pause_count) { /* Exit1-[DI]R -> Pause-[DI]R */ cpld_xc2c_jtag_shift_u32(jtag, 0b0, 0, 1); /* Pause-[DI]R -> Exit2-[DI]R */ @@ -148,11 +176,20 @@ static void cpld_xc2c_jtag_shift_dr_ir(const jtag_t* const jtag, uint8_t* const cpld_xc2c_jtag_shift_u32(jtag, 0b01, 0, 2); } -static void cpld_xc2c_jtag_shift_dr(const jtag_t* const jtag, uint8_t* const tdi_tdo, const size_t bit_count, const size_t pause_count) { +static void cpld_xc2c_jtag_shift_dr( + const jtag_t* const jtag, + uint8_t* const tdi_tdo, + const size_t bit_count, + const size_t pause_count) +{ cpld_xc2c_jtag_shift_dr_ir(jtag, tdi_tdo, bit_count, pause_count); } -static uint8_t cpld_xc2c_jtag_shift_ir_pause(const jtag_t* const jtag, const cpld_xc2c_ir_t ir, const size_t pause_count) { +static uint8_t cpld_xc2c_jtag_shift_ir_pause( + const jtag_t* const jtag, + const cpld_xc2c_ir_t ir, + const size_t pause_count) +{ /* Run-Test/Idle -> Select-DR-Scan */ cpld_xc2c_jtag_shift_u32(jtag, 0b1, 0b0, 1); uint8_t value = ir; @@ -160,17 +197,20 @@ static uint8_t cpld_xc2c_jtag_shift_ir_pause(const jtag_t* const jtag, const cpl return value; } -static uint8_t cpld_xc2c_jtag_shift_ir(const jtag_t* const jtag, const cpld_xc2c_ir_t ir) { +static uint8_t cpld_xc2c_jtag_shift_ir(const jtag_t* const jtag, const cpld_xc2c_ir_t ir) +{ return cpld_xc2c_jtag_shift_ir_pause(jtag, ir, 0); } -static void cpld_xc2c_jtag_reset(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_reset(const jtag_t* const jtag) +{ /* Five TMS=1 to reach Test-Logic-Reset from any point in the TAP state diagram. */ cpld_xc2c_jtag_shift_u32(jtag, 0b11111, 0, 5); } -static void cpld_xc2c_jtag_reset_and_idle(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_reset_and_idle(const jtag_t* const jtag) +{ /* Five TMS=1 to reach Test-Logic-Reset from any point in the TAP state diagram. * One TMS=0 to move from Test-Logic-Reset to Run-Test-Idle. */ @@ -178,60 +218,71 @@ static void cpld_xc2c_jtag_reset_and_idle(const jtag_t* const jtag) { cpld_xc2c_jtag_shift_u32(jtag, 0, 0, 1); } -static uint32_t cpld_xc2c_jtag_idcode(const jtag_t* const jtag) { +static uint32_t cpld_xc2c_jtag_idcode(const jtag_t* const jtag) +{ /* Enter and end at Run-Test-Idle state. */ cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_IDCODE); uint32_t result = 0; - cpld_xc2c_jtag_shift_dr(jtag, (uint8_t*)&result, 32, 0); + cpld_xc2c_jtag_shift_dr(jtag, (uint8_t*) &result, 32, 0); return result; } -static bool cpld_xc2c64a_jtag_idcode_ok(const jtag_t* const jtag) { +static bool cpld_xc2c64a_jtag_idcode_ok(const jtag_t* const jtag) +{ return ((cpld_xc2c_jtag_idcode(jtag) ^ 0xf6e5f093) & 0x0fff8fff) == 0; } -static void cpld_xc2c_jtag_conld(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_conld(const jtag_t* const jtag) +{ cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_DISABLE); cpld_xc2c_jtag_clocks(jtag, 100); } -static void cpld_xc2c_jtag_enable(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_enable(const jtag_t* const jtag) +{ cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_ENABLE); cpld_xc2c_jtag_clocks(jtag, 800); } -static void cpld_xc2c_jtag_disable(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_disable(const jtag_t* const jtag) +{ cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_DISABLE); cpld_xc2c_jtag_clocks(jtag, 100); } -static void cpld_xc2c_jtag_sram_write(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_sram_write(const jtag_t* const jtag) +{ cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_WRITE); } -static void cpld_xc2c_jtag_sram_read(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_sram_read(const jtag_t* const jtag) +{ cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_SRAM_READ); } -static uint32_t cpld_xc2c_jtag_bypass(const jtag_t* const jtag, const bool shift_dr) { +static uint32_t cpld_xc2c_jtag_bypass(const jtag_t* const jtag, const bool shift_dr) +{ const uint8_t result = cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_BYPASS); - if( shift_dr ) { + if (shift_dr) { uint8_t dr = 0; cpld_xc2c_jtag_shift_dr(jtag, &dr, 1, 0); } return result; } -static bool cpld_xc2c_jtag_read_write_protect(const jtag_t* const jtag) { +static bool cpld_xc2c_jtag_read_write_protect(const jtag_t* const jtag) +{ /* Enter and end at Run-Test-Idle state. */ return ((cpld_xc2c_jtag_bypass(jtag, false) ^ 0x01) & 0x03) == 0; } -static bool cpld_xc2c_jtag_is_done(const jtag_t* const jtag) { +static bool cpld_xc2c_jtag_is_done(const jtag_t* const jtag) +{ return ((cpld_xc2c_jtag_bypass(jtag, false) ^ 0x05) & 0x07) == 0; } -static void cpld_xc2c_jtag_init_special(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_init_special(const jtag_t* const jtag) +{ cpld_xc2c_jtag_shift_ir(jtag, CPLD_XC2C_IR_ISC_INIT); cpld_xc2c_jtag_clocks(jtag, 20); /* Run-Test/Idle -> Shift-IR */ @@ -245,11 +296,16 @@ static void cpld_xc2c_jtag_init_special(const jtag_t* const jtag) { cpld_xc2c_jtag_clocks(jtag, 800); } -static void cpld_xc2c_jtag_read(const jtag_t* const jtag) { +static void cpld_xc2c_jtag_read(const jtag_t* const jtag) +{ cpld_xc2c_jtag_shift_ir_pause(jtag, CPLD_XC2C_IR_ISC_READ, 1); } -static void cpld_xc2c64a_jtag_read_row(const jtag_t* const jtag, uint8_t address, uint8_t* const dr) { +static void cpld_xc2c64a_jtag_read_row( + const jtag_t* const jtag, + uint8_t address, + uint8_t* const dr) +{ cpld_xc2c_jtag_shift_dr(jtag, &address, 7, 20); cpld_xc2c_jtag_clocks(jtag, 100); @@ -264,13 +320,14 @@ static void cpld_xc2c64a_jtag_read_row(const jtag_t* const jtag, uint8_t address bool cpld_xc2c64a_jtag_checksum( const jtag_t* const jtag, const cpld_xc2c64a_verify_t* const verify, - uint32_t* const crc_value -) { + uint32_t* const crc_value) +{ cpld_xc2c_jtag_reset_and_idle(jtag); - if( cpld_xc2c64a_jtag_idcode_ok(jtag) && cpld_xc2c_jtag_read_write_protect(jtag) && - cpld_xc2c64a_jtag_idcode_ok(jtag) && cpld_xc2c_jtag_read_write_protect(jtag) ) { - + if (cpld_xc2c64a_jtag_idcode_ok(jtag) && + cpld_xc2c_jtag_read_write_protect(jtag) && + cpld_xc2c64a_jtag_idcode_ok(jtag) && + cpld_xc2c_jtag_read_write_protect(jtag)) { cpld_xc2c_jtag_bypass(jtag, false); cpld_xc2c_jtag_enable(jtag); @@ -283,12 +340,12 @@ bool cpld_xc2c64a_jtag_checksum( crc32_init(&crc); uint8_t dr[CPLD_XC2C64A_BYTES_IN_ROW]; - for(size_t row=0; rowmask_index[row]; - for(size_t i=0; imask[mask_index].value[i]; } @@ -305,7 +362,7 @@ bool cpld_xc2c64a_jtag_checksum( cpld_xc2c_jtag_init_special(jtag); cpld_xc2c_jtag_conld(jtag); - if( cpld_xc2c64a_jtag_idcode_ok(jtag) && cpld_xc2c_jtag_is_done(jtag) ) { + if (cpld_xc2c64a_jtag_idcode_ok(jtag) && cpld_xc2c_jtag_is_done(jtag)) { cpld_xc2c_jtag_conld(jtag); cpld_xc2c_jtag_bypass(jtag, false); cpld_xc2c_jtag_bypass(jtag, true); @@ -319,7 +376,11 @@ bool cpld_xc2c64a_jtag_checksum( return false; } -static void cpld_xc2c64a_jtag_sram_write_row(const jtag_t* const jtag, uint8_t address, const uint8_t* const data) { +static void cpld_xc2c64a_jtag_sram_write_row( + const jtag_t* const jtag, + uint8_t address, + const uint8_t* const data) +{ uint8_t write[CPLD_XC2C64A_BYTES_IN_ROW]; memcpy(&write[0], data, sizeof(write)); @@ -336,7 +397,11 @@ static void cpld_xc2c64a_jtag_sram_write_row(const jtag_t* const jtag, uint8_t a cpld_xc2c_jtag_shift_u32(jtag, 0b01, 0b00, 2); } -static void cpld_xc2c64a_jtag_sram_read_row(const jtag_t* const jtag, uint8_t* const data, const uint8_t next_address) { +static void cpld_xc2c64a_jtag_sram_read_row( + const jtag_t* const jtag, + uint8_t* const data, + const uint8_t next_address) +{ /* Run-Test/Idle -> Shift-DR */ cpld_xc2c_jtag_shift_u32(jtag, 0b001, 0b000, 3); @@ -353,16 +418,22 @@ static void cpld_xc2c64a_jtag_sram_read_row(const jtag_t* const jtag, uint8_t* c cpld_xc2c_jtag_shift_u32(jtag, 0b0110, 0b0000, 4); } -static bool cpld_xc2c64a_jtag_sram_compare_row(const jtag_t* const jtag, const uint8_t* const expected, const uint8_t* const mask, const uint8_t next_address) { +static bool cpld_xc2c64a_jtag_sram_compare_row( + const jtag_t* const jtag, + const uint8_t* const expected, + const uint8_t* const mask, + const uint8_t next_address) +{ /* Run-Test/Idle -> Shift-DR */ uint8_t read[CPLD_XC2C64A_BYTES_IN_ROW]; memset(read, 0xff, sizeof(read)); cpld_xc2c64a_jtag_sram_read_row(jtag, &read[0], next_address); bool matched = true; - if( (expected != NULL) && (mask != NULL) ) { - for(size_t i=0; irow[row].data[0]); + cpld_xc2c64a_jtag_sram_write_row( + jtag, + address, + &program->row[row].data[0]); } cpld_xc2c_jtag_disable(jtag); @@ -392,8 +466,8 @@ void cpld_xc2c64a_jtag_sram_write( bool cpld_xc2c64a_jtag_sram_verify( const jtag_t* const jtag, const cpld_xc2c64a_program_t* const program, - const cpld_xc2c64a_verify_t* const verify -) { + const cpld_xc2c64a_verify_t* const verify) +{ cpld_xc2c_jtag_reset_and_idle(jtag); cpld_xc2c_jtag_enable(jtag); @@ -403,13 +477,22 @@ bool cpld_xc2c64a_jtag_sram_verify( * the first row's data. */ bool matched = true; - for(size_t address_row=0; address_row<=CPLD_XC2C64A_ROWS; address_row++) { - const int data_row = (int)address_row - 1; - const size_t mask_index = (data_row >= 0) ? verify->mask_index[data_row] : 0; - const uint8_t* const expected = (data_row >= 0) ? &program->row[data_row].data[0] : NULL; - const uint8_t* const mask = (data_row >= 0) ? &verify->mask[mask_index].value[0] : NULL; - const uint8_t next_address = (address_row < CPLD_XC2C64A_ROWS) ? cpld_hackrf_row_addresses.address[address_row] : 0; - matched &= cpld_xc2c64a_jtag_sram_compare_row(jtag, expected, mask, next_address); + for (size_t address_row = 0; address_row <= CPLD_XC2C64A_ROWS; address_row++) { + const int data_row = (int) address_row - 1; + const size_t mask_index = + (data_row >= 0) ? verify->mask_index[data_row] : 0; + const uint8_t* const expected = + (data_row >= 0) ? &program->row[data_row].data[0] : NULL; + const uint8_t* const mask = + (data_row >= 0) ? &verify->mask[mask_index].value[0] : NULL; + const uint8_t next_address = (address_row < CPLD_XC2C64A_ROWS) ? + cpld_hackrf_row_addresses.address[address_row] : + 0; + matched &= cpld_xc2c64a_jtag_sram_compare_row( + jtag, + expected, + mask, + next_address); } cpld_xc2c_jtag_disable(jtag); diff --git a/firmware/common/cpld_xc2c.h b/firmware/common/cpld_xc2c.h index 0fed6d1d..6d6b1004 100644 --- a/firmware/common/cpld_xc2c.h +++ b/firmware/common/cpld_xc2c.h @@ -28,8 +28,8 @@ #include "cpld_jtag.h" /* Xilinx CoolRunner II XC2C64A bitstream attributes */ -#define CPLD_XC2C64A_ROWS (98) -#define CPLD_XC2C64A_BITS_IN_ROW (274) +#define CPLD_XC2C64A_ROWS (98) +#define CPLD_XC2C64A_BITS_IN_ROW (274) #define CPLD_XC2C64A_BYTES_IN_ROW ((CPLD_XC2C64A_BITS_IN_ROW + 7) / 8) typedef struct { @@ -56,20 +56,17 @@ typedef struct { bool cpld_xc2c64a_jtag_checksum( const jtag_t* const jtag, const cpld_xc2c64a_verify_t* const verify, - uint32_t* const crc_value -); + uint32_t* const crc_value); void cpld_xc2c64a_jtag_sram_write( const jtag_t* const jtag, - const cpld_xc2c64a_program_t* const program -); + const cpld_xc2c64a_program_t* const program); bool cpld_xc2c64a_jtag_sram_verify( const jtag_t* const jtag, const cpld_xc2c64a_program_t* const program, - const cpld_xc2c64a_verify_t* const verify -); + const cpld_xc2c64a_verify_t* const verify); extern const cpld_xc2c64a_program_t cpld_hackrf_program_sram; extern const cpld_xc2c64a_verify_t cpld_hackrf_verify; extern const cpld_xc2c64a_row_addresses_t cpld_hackrf_row_addresses; -#endif/*__CPLD_XC2C_H__*/ +#endif /*__CPLD_XC2C_H__*/ diff --git a/firmware/common/crc.c b/firmware/common/crc.c index 4a687e70..80b6ec60 100644 --- a/firmware/common/crc.c +++ b/firmware/common/crc.c @@ -23,27 +23,30 @@ #include -void crc32_init(crc32_t* const crc) { +void crc32_init(crc32_t* const crc) +{ crc->remainder = 0xffffffff; crc->reversed_polynomial = 0xedb88320; crc->final_xor = 0xffffffff; } -void crc32_update(crc32_t* const crc, const uint8_t* const data, const size_t byte_count) { +void crc32_update(crc32_t* const crc, const uint8_t* const data, const size_t byte_count) +{ uint32_t remainder = crc->remainder; const size_t bit_count = byte_count * 8; - for(size_t bit_n=0; bit_n> 3] & (1 << (bit_n & 7)); remainder ^= (bit_in ? 1 : 0); const bool bit_out = (remainder & 1); remainder >>= 1; - if( bit_out ) { + if (bit_out) { remainder ^= crc->reversed_polynomial; } } crc->remainder = remainder; } -uint32_t crc32_digest(const crc32_t* const crc) { +uint32_t crc32_digest(const crc32_t* const crc) +{ return crc->remainder ^ crc->final_xor; } diff --git a/firmware/common/crc.h b/firmware/common/crc.h index 9ee1a2ad..cf1c2b58 100644 --- a/firmware/common/crc.h +++ b/firmware/common/crc.h @@ -35,4 +35,4 @@ void crc32_init(crc32_t* const crc); void crc32_update(crc32_t* const crc, const uint8_t* const data, const size_t byte_count); uint32_t crc32_digest(const crc32_t* const crc); -#endif//__CRC_H__ +#endif //__CRC_H__ diff --git a/firmware/common/fault_handler.c b/firmware/common/fault_handler.c index 4ca15a25..3b12290d 100644 --- a/firmware/common/fault_handler.c +++ b/firmware/common/fault_handler.c @@ -24,20 +24,19 @@ #include "fault_handler.h" -typedef struct -{ +typedef struct { uint32_t r0; uint32_t r1; uint32_t r2; uint32_t r3; uint32_t r12; - uint32_t lr; /* Link Register. */ - uint32_t pc; /* Program Counter. */ - uint32_t psr;/* Program Status Register. */ + uint32_t lr; /* Link Register. */ + uint32_t pc; /* Program Counter. */ + uint32_t psr; /* Program Status Register. */ } hard_fault_stack_t; -__attribute__((naked)) -void hard_fault_handler(void) { +__attribute__((naked)) void hard_fault_handler(void) +{ __asm__("TST LR, #4"); __asm__("ITE EQ"); __asm__("MRSEQ R0, MSP"); @@ -47,11 +46,11 @@ void hard_fault_handler(void) { volatile hard_fault_stack_t* hard_fault_stack_pt; -__attribute__((used)) void hard_fault_handler_c(uint32_t* args) +__attribute__((used)) void hard_fault_handler_c(uint32_t* args) { /* hard_fault_stack_pt contains registers saved before the hard fault */ - hard_fault_stack_pt = (hard_fault_stack_t*)args; - + hard_fault_stack_pt = (hard_fault_stack_t*) args; + // args[0-7]: r0, r1, r2, r3, r12, lr, pc, psr // Other interesting registers to examine: // CFSR: Configurable Fault Status Register @@ -60,7 +59,7 @@ __attribute__((used)) void hard_fault_handler_c(uint32_t* args) // AFSR: Auxiliary Fault Status Register // MMAR: MemManage Fault Address Register // BFAR: Bus Fault Address Register - + /* if( SCB->HFSR & SCB_HFSR_FORCED ) { if( SCB->CFSR & SCB_CFSR_BFSR_BFARVALID ) { @@ -73,14 +72,17 @@ __attribute__((used)) void hard_fault_handler_c(uint32_t* args) while (1) {} } -void mem_manage_handler() { +void mem_manage_handler() +{ while (1) {} } -void bus_fault_handler() { +void bus_fault_handler() +{ while (1) {} } -void usage_fault_handler() { +void usage_fault_handler() +{ while (1) {} } diff --git a/firmware/common/fault_handler.h b/firmware/common/fault_handler.h index f52e760e..002359ac 100644 --- a/firmware/common/fault_handler.h +++ b/firmware/common/fault_handler.h @@ -30,6 +30,7 @@ // structures are supposedly the same between processors (to an // undetermined extent). typedef struct armv7m_scb_t armv7m_scb_t; + struct armv7m_scb_t { volatile const uint32_t CPUID; volatile uint32_t ICSR; @@ -64,10 +65,10 @@ struct armv7m_scb_t { volatile uint32_t CPACR; } __attribute__((packed)); -static armv7m_scb_t* const SCB = (armv7m_scb_t*)SCB_BASE; +static armv7m_scb_t* const SCB = (armv7m_scb_t*) SCB_BASE; #define SCB_HFSR_DEBUGEVT (1 << 31) -#define SCB_HFSR_FORCED (1 << 30) -#define SCB_HFSR_VECTTBL (1 << 1) +#define SCB_HFSR_FORCED (1 << 30) +#define SCB_HFSR_VECTTBL (1 << 1) -#endif//__FAULT_HANDLER__ +#endif //__FAULT_HANDLER__ diff --git a/firmware/common/gpdma.c b/firmware/common/gpdma.c index f1a45845..68bf07a0 100644 --- a/firmware/common/gpdma.c +++ b/firmware/common/gpdma.c @@ -23,40 +23,49 @@ #include -void gpdma_controller_enable() { +void gpdma_controller_enable() +{ GPDMA_CONFIG |= GPDMA_CONFIG_E(1); while ((GPDMA_CONFIG & GPDMA_CONFIG_E_MASK) == 0) {} } -void gpdma_channel_enable(const uint_fast8_t channel) { +void gpdma_channel_enable(const uint_fast8_t channel) +{ GPDMA_CCONFIG(channel) |= GPDMA_CCONFIG_E(1); } -void gpdma_channel_disable(const uint_fast8_t channel) { +void gpdma_channel_disable(const uint_fast8_t channel) +{ GPDMA_CCONFIG(channel) &= ~GPDMA_CCONFIG_E_MASK; while (GPDMA_ENBLDCHNS & GPDMA_ENBLDCHNS_ENABLEDCHANNELS(1 << channel)) {} } -void gpdma_channel_interrupt_tc_clear(const uint_fast8_t channel) { +void gpdma_channel_interrupt_tc_clear(const uint_fast8_t channel) +{ GPDMA_INTTCCLEAR = GPDMA_INTTCCLEAR_INTTCCLEAR(1 << channel); } -void gpdma_channel_interrupt_error_clear(const uint_fast8_t channel) { +void gpdma_channel_interrupt_error_clear(const uint_fast8_t channel) +{ GPDMA_INTERRCLR = GPDMA_INTERRCLR_INTERRCLR(1 << channel); } -void gpdma_lli_enable_interrupt(gpdma_lli_t* const lli) { +void gpdma_lli_enable_interrupt(gpdma_lli_t* const lli) +{ lli->ccontrol |= GPDMA_CCONTROL_I(1); } -void gpdma_lli_create_loop(gpdma_lli_t* const lli, const size_t lli_count) { - for(size_t i=0; i> 2); + lli[i].clli = (lli[i].clli & ~GPDMA_CLLI_LLI_MASK) | + GPDMA_CLLI_LLI((uint32_t) next_lli >> 2); } } -void gpdma_lli_create_oneshot(gpdma_lli_t* const lli, const size_t lli_count) { +void gpdma_lli_create_oneshot(gpdma_lli_t* const lli, const size_t lli_count) +{ gpdma_lli_create_loop(lli, lli_count); lli[lli_count - 1].clli &= ~GPDMA_CLLI_LLI_MASK; } diff --git a/firmware/common/gpdma.h b/firmware/common/gpdma.h index 11c4e74f..ac173da5 100644 --- a/firmware/common/gpdma.h +++ b/firmware/common/gpdma.h @@ -40,4 +40,4 @@ void gpdma_lli_enable_interrupt(gpdma_lli_t* const lli); void gpdma_lli_create_loop(gpdma_lli_t* const lli, const size_t lli_count); void gpdma_lli_create_oneshot(gpdma_lli_t* const lli, const size_t lli_count); -#endif/*__GPDMA_H__*/ +#endif /*__GPDMA_H__*/ diff --git a/firmware/common/gpio.h b/firmware/common/gpio.h index fe60ff61..5d3ee60f 100644 --- a/firmware/common/gpio.h +++ b/firmware/common/gpio.h @@ -35,4 +35,4 @@ void gpio_input(gpio_t gpio); void gpio_write(gpio_t gpio, const bool value); bool gpio_read(gpio_t gpio); -#endif/*__GPIO_H__*/ +#endif /*__GPIO_H__*/ diff --git a/firmware/common/gpio_lpc.c b/firmware/common/gpio_lpc.c index b5e217c4..303ebe02 100644 --- a/firmware/common/gpio_lpc.c +++ b/firmware/common/gpio_lpc.c @@ -23,36 +23,44 @@ #include -void gpio_init() { - for(size_t i=0; i<8; i++) { +void gpio_init() +{ + for (size_t i = 0; i < 8; i++) { GPIO_LPC_PORT(i)->dir = 0; } } -void gpio_set(gpio_t gpio) { +void gpio_set(gpio_t gpio) +{ gpio->port->set = gpio->mask; } -void gpio_clear(gpio_t gpio) { +void gpio_clear(gpio_t gpio) +{ gpio->port->clr = gpio->mask; } -void gpio_toggle(gpio_t gpio) { +void gpio_toggle(gpio_t gpio) +{ gpio->port->not = gpio->mask; } -void gpio_output(gpio_t gpio) { +void gpio_output(gpio_t gpio) +{ gpio->port->dir |= gpio->mask; } -void gpio_input(gpio_t gpio) { +void gpio_input(gpio_t gpio) +{ gpio->port->dir &= ~gpio->mask; } -void gpio_write(gpio_t gpio, const bool value) { +void gpio_write(gpio_t gpio, const bool value) +{ *gpio->gpio_w = value; } -bool gpio_read(gpio_t gpio) { +bool gpio_read(gpio_t gpio) +{ return *gpio->gpio_w; } diff --git a/firmware/common/gpio_lpc.h b/firmware/common/gpio_lpc.h index 2fed352e..d9193515 100644 --- a/firmware/common/gpio_lpc.h +++ b/firmware/common/gpio_lpc.h @@ -32,19 +32,19 @@ */ typedef struct gpio_port_t { - volatile uint32_t dir; /* +0x000 */ + volatile uint32_t dir; /* +0x000 */ uint32_t _reserved0[31]; - volatile uint32_t mask; /* +0x080 */ + volatile uint32_t mask; /* +0x080 */ uint32_t _reserved1[31]; - volatile uint32_t pin; /* +0x100 */ + volatile uint32_t pin; /* +0x100 */ uint32_t _reserved2[31]; - volatile uint32_t mpin; /* +0x180 */ + volatile uint32_t mpin; /* +0x180 */ uint32_t _reserved3[31]; - volatile uint32_t set; /* +0x200 */ + volatile uint32_t set; /* +0x200 */ uint32_t _reserved4[31]; - volatile uint32_t clr; /* +0x280 */ + volatile uint32_t clr; /* +0x280 */ uint32_t _reserved5[31]; - volatile uint32_t not; /* +0x300 */ + volatile uint32_t not ; /* +0x300 */ } gpio_port_t; struct gpio_t { @@ -53,13 +53,15 @@ struct gpio_t { volatile uint32_t* const gpio_w; }; -#define GPIO_LPC_BASE (0x400f4000) -#define GPIO_LPC_B_OFFSET (0x0) -#define GPIO_LPC_W_OFFSET (0x1000) +#define GPIO_LPC_BASE (0x400f4000) +#define GPIO_LPC_B_OFFSET (0x0) +#define GPIO_LPC_W_OFFSET (0x1000) #define GPIO_LPC_PORT_OFFSET (0x2000) -#define GPIO_LPC_PORT(_n) ((gpio_port_t*)((GPIO_LPC_BASE + GPIO_LPC_PORT_OFFSET) + (_n) * 4)) -#define GPIO_LPC_W(_port_num, _pin_num) (volatile uint32_t*)((GPIO_LPC_BASE + GPIO_LPC_W_OFFSET) + ((_port_num) * 0x80) + ((_pin_num) * 4)) +#define GPIO_LPC_PORT(_n) \ + ((gpio_port_t*) ((GPIO_LPC_BASE + GPIO_LPC_PORT_OFFSET) + (_n) *4)) +#define GPIO_LPC_W(_port_num, _pin_num) \ + (volatile uint32_t*) ((GPIO_LPC_BASE + GPIO_LPC_W_OFFSET) + ((_port_num) *0x80) + ((_pin_num) *4)) // clang-format off #define GPIO(_port_num, _pin_num) { \ @@ -69,4 +71,4 @@ struct gpio_t { } // clang-format on -#endif/*__GPIO_LPC_H__*/ +#endif /*__GPIO_LPC_H__*/ diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index cdb0c468..20afc4f3 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -41,18 +41,18 @@ #include #ifdef HACKRF_ONE -#include "portapack.h" + #include "portapack.h" #endif #include "gpio_lpc.h" /* GPIO Output PinMux */ static struct gpio_t gpio_led[] = { - GPIO(2, 1), - GPIO(2, 2), - GPIO(2, 8), + GPIO(2, 1), + GPIO(2, 2), + GPIO(2, 8), #ifdef RAD1O - GPIO(5, 26), + GPIO(5, 26), #endif }; @@ -139,14 +139,14 @@ static struct gpio_t gpio_rx_q_invert = GPIO(0, 13); // clang-format on i2c_bus_t i2c0 = { - .obj = (void*)I2C0_BASE, + .obj = (void*) I2C0_BASE, .start = i2c_lpc_start, .stop = i2c_lpc_stop, .transfer = i2c_lpc_transfer, }; i2c_bus_t i2c1 = { - .obj = (void*)I2C1_BASE, + .obj = (void*) I2C1_BASE, .start = i2c_lpc_start, .stop = i2c_lpc_stop, .transfer = i2c_lpc_transfer, @@ -194,7 +194,7 @@ const ssp_config_t ssp_config_max5864 = { }; spi_bus_t spi_bus_ssp1 = { - .obj = (void*)SSP1_BASE, + .obj = (void*) SSP1_BASE, .config = &ssp_config_max2837, .start = spi_ssp_start, .stop = spi_ssp_stop, @@ -224,7 +224,7 @@ const ssp_config_t ssp_config_w25q80bv = { }; spi_bus_t spi_bus_ssp0 = { - .obj = (void*)SSP0_BASE, + .obj = (void*) SSP0_BASE, .config = &ssp_config_w25q80bv, .start = spi_ssp_start, .stop = spi_ssp_stop, @@ -304,38 +304,35 @@ void delay_us_at_mhz(uint32_t us, uint32_t mhz) { // The loop below takes 4 cycles per iteration. uint32_t loop_iterations = (us * mhz) / 4; - asm volatile ( - "start%=:\n" - " subs %[ITERATIONS], #1\n" // 1 cycle - " bpl start%=\n" // 3 cycles - : - : [ITERATIONS] "r" (loop_iterations) - ); + asm volatile("start%=:\n" + " subs %[ITERATIONS], #1\n" // 1 cycle + " bpl start%=\n" // 3 cycles + : + : [ITERATIONS] "r"(loop_iterations)); } /* GCD algo from wikipedia */ /* http://en.wikipedia.org/wiki/Greatest_common_divisor */ -static uint32_t -gcd(uint32_t u, uint32_t v) +static uint32_t gcd(uint32_t u, uint32_t v) { int s; if (!u || !v) return u | v; - for (s=0; !((u|v)&1); s++) { + for (s = 0; !((u | v) & 1); s++) { u >>= 1; v >>= 1; } - while (!(u&1)) + while (!(u & 1)) u >>= 1; do { - while (!(v&1)) + while (!(v & 1)) v >>= 1; - if (u>v) { + if (u > v) { uint32_t t; t = v; v = u; @@ -343,8 +340,7 @@ gcd(uint32_t u, uint32_t v) } v = v - u; - } - while (v); + } while (v); return u << s; } @@ -352,11 +348,11 @@ gcd(uint32_t u, uint32_t v) bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom) { const uint64_t VCO_FREQ = 800 * 1000 * 1000; /* 800 MHz */ - uint32_t MSx_P1,MSx_P2,MSx_P3; + uint32_t MSx_P1, MSx_P2, MSx_P3; uint32_t a, b, c; uint32_t rem; - hackrf_ui()->set_sample_rate(rate_num/2); + hackrf_ui()->set_sample_rate(rate_num / 2); /* Find best config */ a = (VCO_FREQ * rate_denom) / rate_num; @@ -373,14 +369,14 @@ bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom) rem /= g; rate_num /= g; - if (rate_num < (1<<20)) { + if (rate_num < (1 << 20)) { /* Perfect match */ b = rem; c = rate_num; } else { /* Approximate */ - c = (1<<20) - 1; - b = ((uint64_t)c * (uint64_t)rem) / rate_num; + c = (1 << 20) - 1; + b = ((uint64_t) c * (uint64_t) rem) / rate_num; g = gcd(b, c); b /= g; @@ -389,11 +385,11 @@ bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom) } bool streaming = sgpio_cpld_stream_is_enabled(&sgpio_config); - + if (streaming) { - sgpio_cpld_stream_disable(&sgpio_config); + sgpio_cpld_stream_disable(&sgpio_config); } - + /* Can we enable integer mode ? */ if (a & 0x1 || b) si5351c_set_int_mode(&clock_gen, 0, 0); @@ -401,18 +397,18 @@ bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom) si5351c_set_int_mode(&clock_gen, 0, 1); /* Final MS values */ - MSx_P1 = 128*a + (128 * b/c) - 512; - MSx_P2 = (128*b) % c; + MSx_P1 = 128 * a + (128 * b / c) - 512; + MSx_P2 = (128 * b) % c; MSx_P3 = c; /* MS0/CLK0 is the source for the MAX5864/CPLD (CODEC_CLK). */ si5351c_configure_multisynth(&clock_gen, 0, MSx_P1, MSx_P2, MSx_P3, 1); /* MS0/CLK1 is the source for the CPLD (CODEC_X2_CLK). */ - si5351c_configure_multisynth(&clock_gen, 1, 0, 0, 0, 0);//p1 doesn't matter + si5351c_configure_multisynth(&clock_gen, 1, 0, 0, 0, 0); //p1 doesn't matter /* MS0/CLK2 is the source for SGPIO (CODEC_X2_CLK) */ - si5351c_configure_multisynth(&clock_gen, 2, 0, 0, 0, 0);//p1 doesn't matter + si5351c_configure_multisynth(&clock_gen, 2, 0, 0, 0, 0); //p1 doesn't matter if (streaming) { sgpio_cpld_stream_enable(&sgpio_config); @@ -421,73 +417,76 @@ bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom) return true; } -bool sample_rate_set(const uint32_t sample_rate_hz) { +bool sample_rate_set(const uint32_t sample_rate_hz) +{ uint32_t p1 = 4608; uint32_t p2 = 0; uint32_t p3 = 0; - - switch(sample_rate_hz) { + + switch (sample_rate_hz) { case 8000000: - p1 = SI_INTDIV(50); // 800MHz / 50 = 16 MHz (SGPIO), 8 MHz (codec) + p1 = SI_INTDIV(50); // 800MHz / 50 = 16 MHz (SGPIO), 8 MHz (codec) break; - - case 9216000: - // 43.40277777777778: a = 43; b = 29; c = 72 - p1 = 5043; - p2 = 40; - p3 = 72; - break; - case 10000000: - p1 = SI_INTDIV(40); // 800MHz / 40 = 20 MHz (SGPIO), 10 MHz (codec) - break; - - case 12288000: - // 32.552083333333336: a = 32; b = 159; c = 288 - p1 = 3654; - p2 = 192; - p3 = 288; - break; + case 9216000: + // 43.40277777777778: a = 43; b = 29; c = 72 + p1 = 5043; + p2 = 40; + p3 = 72; + break; - case 12500000: - p1 = SI_INTDIV(32); // 800MHz / 32 = 25 MHz (SGPIO), 12.5 MHz (codec) - break; - - case 16000000: - p1 = SI_INTDIV(25); // 800MHz / 25 = 32 MHz (SGPIO), 16 MHz (codec) - break; - - case 18432000: - // 21.70138888889: a = 21; b = 101; c = 144 - p1 = 2265; - p2 = 112; - p3 = 144; - break; + case 10000000: + p1 = SI_INTDIV(40); // 800MHz / 40 = 20 MHz (SGPIO), 10 MHz (codec) + break; + + case 12288000: + // 32.552083333333336: a = 32; b = 159; c = 288 + p1 = 3654; + p2 = 192; + p3 = 288; + break; + + case 12500000: + p1 = SI_INTDIV(32); // 800MHz / 32 = 25 MHz (SGPIO), 12.5 MHz (codec) + break; + + case 16000000: + p1 = SI_INTDIV(25); // 800MHz / 25 = 32 MHz (SGPIO), 16 MHz (codec) + break; + + case 18432000: + // 21.70138888889: a = 21; b = 101; c = 144 + p1 = 2265; + p2 = 112; + p3 = 144; + break; + + case 20000000: + p1 = SI_INTDIV(20); // 800MHz / 20 = 40 MHz (SGPIO), 20 MHz (codec) + break; - case 20000000: - p1 = SI_INTDIV(20); // 800MHz / 20 = 40 MHz (SGPIO), 20 MHz (codec) - break; - default: return false; } - + /* MS0/CLK0 is the source for the MAX5864/CPLD (CODEC_CLK). */ si5351c_configure_multisynth(&clock_gen, 0, p1, p2, p3, 1); /* MS0/CLK1 is the source for the CPLD (CODEC_X2_CLK). */ - si5351c_configure_multisynth(&clock_gen, 1, p1, 0, 1, 0);//p1 doesn't matter + si5351c_configure_multisynth(&clock_gen, 1, p1, 0, 1, 0); //p1 doesn't matter /* MS0/CLK2 is the source for SGPIO (CODEC_X2_CLK) */ - si5351c_configure_multisynth(&clock_gen, 2, p1, 0, 1, 0);//p1 doesn't matter + si5351c_configure_multisynth(&clock_gen, 2, p1, 0, 1, 0); //p1 doesn't matter return true; } -bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz) { +bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz) +{ uint32_t bandwidth_hz_real = max2837_set_lpf_bandwidth(&max2837, bandwidth_hz); - if(bandwidth_hz_real) hackrf_ui()->set_filter_bw(bandwidth_hz_real); + if (bandwidth_hz_real) + hackrf_ui()->set_filter_bw(bandwidth_hz_real); return bandwidth_hz_real != 0; } @@ -507,8 +506,7 @@ static void cpu_clock_pll1_max_speed(void) /* 1. Select the IRC as BASE_M4_CLK source. */ reg_val = CGU_BASE_M4_CLK; reg_val &= ~CGU_BASE_M4_CLK_CLK_SEL_MASK; - reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_IRC) | - CGU_BASE_M4_CLK_AUTOBLOCK(1); + reg_val |= CGU_BASE_M4_CLK_CLK_SEL(CGU_SRC_IRC) | CGU_BASE_M4_CLK_AUTOBLOCK(1); CGU_BASE_M4_CLK = reg_val; /* 2. Enable the crystal oscillator. */ @@ -563,7 +561,7 @@ static void cpu_clock_pll1_max_speed(void) } /* clock startup for LPC4320 configure PLL1 to max speed (204MHz). -Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1. */ +Note: PLL1 clock is used by M4/M0 core, Peripheral, APB1. */ void cpu_clock_init(void) { /* use IRC as clock source for APB1 (including I2C0) */ @@ -595,9 +593,21 @@ void cpu_clock_init(void) */ /* MS4/CLK4 is the source for the RFFC5071 mixer (MAX2837 on rad1o). */ - si5351c_configure_multisynth(&clock_gen, 4, 20*128-512, 0, 1, 0); /* 800/20 = 40MHz */ - /* MS5/CLK5 is the source for the MAX2837 clock input (MAX2871 on rad1o). */ - si5351c_configure_multisynth(&clock_gen, 5, 20*128-512, 0, 1, 0); /* 800/20 = 40MHz */ + si5351c_configure_multisynth( + &clock_gen, + 4, + 20 * 128 - 512, + 0, + 1, + 0); /* 800/20 = 40MHz */ + /* MS5/CLK5 is the source for the MAX2837 clock input (MAX2871 on rad1o). */ + si5351c_configure_multisynth( + &clock_gen, + 5, + 20 * 128 - 512, + 0, + 1, + 0); /* 800/20 = 40MHz */ /* MS6/CLK6 is unused. */ /* MS7/CLK7 is unused. */ @@ -628,53 +638,51 @@ void cpu_clock_init(void) cpu_clock_pll1_max_speed(); /* use XTAL_OSC as clock source for APB1 */ - CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK(1) - | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_XTAL); + CGU_BASE_APB1_CLK = + CGU_BASE_APB1_CLK_AUTOBLOCK(1) | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_XTAL); /* use XTAL_OSC as clock source for APB3 */ - CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK(1) - | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_XTAL); + CGU_BASE_APB3_CLK = + CGU_BASE_APB3_CLK_AUTOBLOCK(1) | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_XTAL); /* use XTAL_OSC as clock source for PLL0USB */ - CGU_PLL0USB_CTRL = CGU_PLL0USB_CTRL_PD(1) - | CGU_PLL0USB_CTRL_AUTOBLOCK(1) - | CGU_PLL0USB_CTRL_CLK_SEL(CGU_SRC_XTAL); + CGU_PLL0USB_CTRL = CGU_PLL0USB_CTRL_PD(1) | CGU_PLL0USB_CTRL_AUTOBLOCK(1) | + CGU_PLL0USB_CTRL_CLK_SEL(CGU_SRC_XTAL); while (CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK) {} /* configure PLL0USB to produce 480 MHz clock from 12 MHz XTAL_OSC */ /* Values from User Manual v1.4 Table 94, for 12MHz oscillator. */ CGU_PLL0USB_MDIV = 0x06167FFA; CGU_PLL0USB_NP_DIV = 0x00302062; - CGU_PLL0USB_CTRL |= (CGU_PLL0USB_CTRL_PD(1) - | CGU_PLL0USB_CTRL_DIRECTI(1) - | CGU_PLL0USB_CTRL_DIRECTO(1) - | CGU_PLL0USB_CTRL_CLKEN(1)); + CGU_PLL0USB_CTRL |= + (CGU_PLL0USB_CTRL_PD(1) | CGU_PLL0USB_CTRL_DIRECTI(1) | + CGU_PLL0USB_CTRL_DIRECTO(1) | CGU_PLL0USB_CTRL_CLKEN(1)); /* power on PLL0USB and wait until stable */ CGU_PLL0USB_CTRL &= ~CGU_PLL0USB_CTRL_PD_MASK; while (!(CGU_PLL0USB_STAT & CGU_PLL0USB_STAT_LOCK_MASK)) {} /* use PLL0USB as clock source for USB0 */ - CGU_BASE_USB0_CLK = CGU_BASE_USB0_CLK_AUTOBLOCK(1) - | CGU_BASE_USB0_CLK_CLK_SEL(CGU_SRC_PLL0USB); + CGU_BASE_USB0_CLK = CGU_BASE_USB0_CLK_AUTOBLOCK(1) | + CGU_BASE_USB0_CLK_CLK_SEL(CGU_SRC_PLL0USB); /* Switch peripheral clock over to use PLL1 (204MHz) */ - CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK(1) - | CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1); + CGU_BASE_PERIPH_CLK = CGU_BASE_PERIPH_CLK_AUTOBLOCK(1) | + CGU_BASE_PERIPH_CLK_CLK_SEL(CGU_SRC_PLL1); /* Switch APB1 clock over to use PLL1 (204MHz) */ - CGU_BASE_APB1_CLK = CGU_BASE_APB1_CLK_AUTOBLOCK(1) - | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1); + CGU_BASE_APB1_CLK = + CGU_BASE_APB1_CLK_AUTOBLOCK(1) | CGU_BASE_APB1_CLK_CLK_SEL(CGU_SRC_PLL1); /* Switch APB3 clock over to use PLL1 (204MHz) */ - CGU_BASE_APB3_CLK = CGU_BASE_APB3_CLK_AUTOBLOCK(1) - | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1); + CGU_BASE_APB3_CLK = + CGU_BASE_APB3_CLK_AUTOBLOCK(1) | CGU_BASE_APB3_CLK_CLK_SEL(CGU_SRC_PLL1); - CGU_BASE_SSP0_CLK = CGU_BASE_SSP0_CLK_AUTOBLOCK(1) - | CGU_BASE_SSP0_CLK_CLK_SEL(CGU_SRC_PLL1); + CGU_BASE_SSP0_CLK = + CGU_BASE_SSP0_CLK_AUTOBLOCK(1) | CGU_BASE_SSP0_CLK_CLK_SEL(CGU_SRC_PLL1); - CGU_BASE_SSP1_CLK = CGU_BASE_SSP1_CLK_AUTOBLOCK(1) - | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1); + CGU_BASE_SSP1_CLK = + CGU_BASE_SSP1_CLK_AUTOBLOCK(1) | CGU_BASE_SSP1_CLK_CLK_SEL(CGU_SRC_PLL1); #if (defined JAWBREAKER || defined HACKRF_ONE) /* Disable unused clocks */ @@ -689,8 +697,8 @@ void cpu_clock_init(void) CGU_IDIVE_CTRL = CGU_IDIVE_CTRL_PD(1); /* Base clocks */ - CGU_BASE_SPIFI_CLK = CGU_BASE_SPIFI_CLK_PD(1); /* SPIFI is only used at boot */ - CGU_BASE_USB1_CLK = CGU_BASE_USB1_CLK_PD(1); /* USB1 is not exposed on HackRF */ + CGU_BASE_SPIFI_CLK = CGU_BASE_SPIFI_CLK_PD(1); /* SPIFI is only used at boot */ + CGU_BASE_USB1_CLK = CGU_BASE_USB1_CLK_PD(1); /* USB1 is not exposed on HackRF */ CGU_BASE_PHY_RX_CLK = CGU_BASE_PHY_RX_CLK_PD(1); CGU_BASE_PHY_TX_CLK = CGU_BASE_PHY_TX_CLK_PD(1); CGU_BASE_LCD_CLK = CGU_BASE_LCD_CLK_PD(1); @@ -749,7 +757,7 @@ clock_source_t activate_best_clock_source(void) { #ifdef HACKRF_ONE /* Ensure PortaPack reference oscillator is off while checking for external clock input. */ - if( portapack_reference_oscillator && portapack()) { + if (portapack_reference_oscillator && portapack()) { portapack_reference_oscillator(false); } #endif @@ -762,9 +770,9 @@ clock_source_t activate_best_clock_source(void) } else { #ifdef HACKRF_ONE /* Enable PortaPack reference oscillator (if present), and check for valid clock. */ - if( portapack_reference_oscillator && portapack() ) { + if (portapack_reference_oscillator && portapack()) { portapack_reference_oscillator(true); - delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */ + delay(510000); /* loop iterations @ 204MHz for >10ms for oscillator to enable. */ if (si5351c_clkin_signal_valid(&clock_gen)) { source = CLOCK_SOURCE_PORTAPACK; } else { @@ -775,7 +783,9 @@ clock_source_t activate_best_clock_source(void) /* No external or PortaPack clock was found. Use HackRF Si5351C crystal. */ } - si5351c_set_clock_source(&clock_gen, (source == CLOCK_SOURCE_HACKRF) ? PLL_SOURCE_XTAL : PLL_SOURCE_CLKIN); + si5351c_set_clock_source( + &clock_gen, + (source == CLOCK_SOURCE_HACKRF) ? PLL_SOURCE_XTAL : PLL_SOURCE_CLKIN); hackrf_ui()->set_clock_source(source); return source; } @@ -790,7 +800,8 @@ void ssp1_set_mode_max5864(void) spi_bus_start(max5864.bus, &ssp_config_max5864); } -void pin_setup(void) { +void pin_setup(void) +{ /* Configure all GPIO as Input (safe state) */ gpio_init(); @@ -809,13 +820,13 @@ void pin_setup(void) { * LPC43xx pull-up and pull-down resistors are approximately 53K. */ #ifdef HACKRF_ONE - scu_pinmux(SCU_PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_PINMUX_PP_TMS, SCU_GPIO_PUP | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_PINMUX_PP_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); #endif scu_pinmux(SCU_PINMUX_CPLD_TMS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); scu_pinmux(SCU_PINMUX_CPLD_TDI, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0); - scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4); - scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_PINMUX_CPLD_TDO, SCU_GPIO_PDN | SCU_CONF_FUNCTION4); + scu_pinmux(SCU_PINMUX_CPLD_TCK, SCU_GPIO_PDN | SCU_CONF_FUNCTION0); /* Configure SCU Pin Mux as GPIO */ scu_pinmux(SCU_PINMUX_LED1, SCU_GPIO_NOPULL); @@ -874,23 +885,26 @@ void pin_setup(void) { mixer_bus_setup(&mixer); rf_path_pin_setup(&rf_path); - + /* Configure external clock in */ scu_pinmux(SCU_PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1); sgpio_configure_pin_functions(&sgpio_config); } -void enable_1v8_power(void) { +void enable_1v8_power(void) +{ gpio_set(&gpio_1v8_enable); } -void disable_1v8_power(void) { +void disable_1v8_power(void) +{ gpio_clear(&gpio_1v8_enable); } #ifdef HACKRF_ONE -void enable_rf_power(void) { +void enable_rf_power(void) +{ uint32_t i; /* many short pulses to avoid one big voltage glitch */ @@ -901,41 +915,48 @@ void enable_rf_power(void) { gpio_clear(&gpio_vaa_disable); } -void disable_rf_power(void) { +void disable_rf_power(void) +{ gpio_set(&gpio_vaa_disable); } #endif #ifdef RAD1O -void enable_rf_power(void) { +void enable_rf_power(void) +{ gpio_set(&gpio_vaa_enable); } -void disable_rf_power(void) { +void disable_rf_power(void) +{ gpio_clear(&gpio_vaa_enable); } #endif -void led_on(const led_t led) { +void led_on(const led_t led) +{ gpio_set(&gpio_led[led]); } -void led_off(const led_t led) { +void led_off(const led_t led) +{ gpio_clear(&gpio_led[led]); } -void led_toggle(const led_t led) { +void led_toggle(const led_t led) +{ gpio_toggle(&gpio_led[led]); } -void hw_sync_enable(const hw_sync_mode_t hw_sync_mode){ - gpio_write(&gpio_hw_sync_enable, hw_sync_mode==1); +void hw_sync_enable(const hw_sync_mode_t hw_sync_mode) +{ + gpio_write(&gpio_hw_sync_enable, hw_sync_mode == 1); } -void halt_and_flash(const uint32_t duration) { +void halt_and_flash(const uint32_t duration) +{ /* blink LED1, LED2, and LED3 */ - while (1) - { + while (1) { led_on(LED1); led_on(LED2); led_on(LED3); diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h index db9d6e46..f44464a7 100644 --- a/firmware/common/hackrf_core.h +++ b/firmware/common/hackrf_core.h @@ -25,8 +25,7 @@ #define __HACKRF_CORE_H #ifdef __cplusplus -extern "C" -{ +extern "C" { #endif #include @@ -49,15 +48,15 @@ extern "C" #define BOARD_ID_RAD1O 3 #ifdef JAWBREAKER -#define BOARD_ID BOARD_ID_JAWBREAKER + #define BOARD_ID BOARD_ID_JAWBREAKER #endif #ifdef HACKRF_ONE -#define BOARD_ID BOARD_ID_HACKRF_ONE + #define BOARD_ID BOARD_ID_HACKRF_ONE #endif #ifdef RAD1O -#define BOARD_ID BOARD_ID_RAD1O + #define BOARD_ID BOARD_ID_RAD1O #endif /* @@ -65,21 +64,21 @@ extern "C" */ /* GPIO Output PinMux */ -#define SCU_PINMUX_LED1 (P4_1) /* GPIO2[1] on P4_1 */ -#define SCU_PINMUX_LED2 (P4_2) /* GPIO2[2] on P4_2 */ -#define SCU_PINMUX_LED3 (P6_12) /* GPIO2[8] on P6_12 */ +#define SCU_PINMUX_LED1 (P4_1) /* GPIO2[1] on P4_1 */ +#define SCU_PINMUX_LED2 (P4_2) /* GPIO2[2] on P4_2 */ +#define SCU_PINMUX_LED3 (P6_12) /* GPIO2[8] on P6_12 */ #ifdef RAD1O -#define SCU_PINMUX_LED4 (PB_6) /* GPIO5[26] on PB_6 */ + #define SCU_PINMUX_LED4 (PB_6) /* GPIO5[26] on PB_6 */ #endif -#define SCU_PINMUX_EN1V8 (P6_10) /* GPIO3[6] on P6_10 */ +#define SCU_PINMUX_EN1V8 (P6_10) /* GPIO3[6] on P6_10 */ /* GPIO Input PinMux */ -#define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */ -#define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */ +#define SCU_PINMUX_BOOT0 (P1_1) /* GPIO0[8] on P1_1 */ +#define SCU_PINMUX_BOOT1 (P1_2) /* GPIO0[9] on P1_2 */ #ifndef HACKRF_ONE -#define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */ -#define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */ + #define SCU_PINMUX_BOOT2 (P2_8) /* GPIO5[7] on P2_8 */ + #define SCU_PINMUX_BOOT3 (P2_9) /* GPIO1[10] on P2_9 */ #endif #define SCU_PINMUX_PP_LCD_TE (P2_3) /* GPIO5[3] on P2_3 */ #define SCU_PINMUX_PP_LCD_RDX (P2_4) /* GPIO5[4] on P2_4 */ @@ -89,147 +88,146 @@ extern "C" /* USB peripheral */ #ifdef JAWBREAKER -#define SCU_PINMUX_USB_LED0 (P6_8) -#define SCU_PINMUX_USB_LED1 (P6_7) + #define SCU_PINMUX_USB_LED0 (P6_8) + #define SCU_PINMUX_USB_LED1 (P6_7) #endif /* SSP1 Peripheral PinMux */ -#define SCU_SSP1_CIPO (P1_3) /* P1_3 */ -#define SCU_SSP1_COPI (P1_4) /* P1_4 */ -#define SCU_SSP1_SCK (P1_19) /* P1_19 */ -#define SCU_SSP1_CS (P1_20) /* P1_20 */ +#define SCU_SSP1_CIPO (P1_3) /* P1_3 */ +#define SCU_SSP1_COPI (P1_4) /* P1_4 */ +#define SCU_SSP1_SCK (P1_19) /* P1_19 */ +#define SCU_SSP1_CS (P1_20) /* P1_20 */ /* CPLD JTAG interface */ -#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */ -#define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */ +#define SCU_PINMUX_CPLD_TDO (P9_5) /* GPIO5[18] */ +#define SCU_PINMUX_CPLD_TCK (P6_1) /* GPIO3[ 0] */ #if (defined HACKRF_ONE || defined RAD1O) -#define SCU_PINMUX_CPLD_TMS (P6_5) /* GPIO3[ 4] */ -#define SCU_PINMUX_CPLD_TDI (P6_2) /* GPIO3[ 1] */ + #define SCU_PINMUX_CPLD_TMS (P6_5) /* GPIO3[ 4] */ + #define SCU_PINMUX_CPLD_TDI (P6_2) /* GPIO3[ 1] */ #else -#define SCU_PINMUX_CPLD_TMS (P6_2) /* GPIO3[ 1] */ -#define SCU_PINMUX_CPLD_TDI (P6_5) /* GPIO3[ 4] */ + #define SCU_PINMUX_CPLD_TMS (P6_2) /* GPIO3[ 1] */ + #define SCU_PINMUX_CPLD_TDI (P6_5) /* GPIO3[ 4] */ #endif /* CPLD SGPIO interface */ -#define SCU_PINMUX_SGPIO0 (P0_0) -#define SCU_PINMUX_SGPIO1 (P0_1) -#define SCU_PINMUX_SGPIO2 (P1_15) -#define SCU_PINMUX_SGPIO3 (P1_16) -#define SCU_PINMUX_SGPIO4 (P6_3) -#define SCU_PINMUX_SGPIO5 (P6_6) -#define SCU_PINMUX_SGPIO6 (P2_2) -#define SCU_PINMUX_SGPIO7 (P1_0) +#define SCU_PINMUX_SGPIO0 (P0_0) +#define SCU_PINMUX_SGPIO1 (P0_1) +#define SCU_PINMUX_SGPIO2 (P1_15) +#define SCU_PINMUX_SGPIO3 (P1_16) +#define SCU_PINMUX_SGPIO4 (P6_3) +#define SCU_PINMUX_SGPIO5 (P6_6) +#define SCU_PINMUX_SGPIO6 (P2_2) +#define SCU_PINMUX_SGPIO7 (P1_0) #if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O) -#define SCU_PINMUX_SGPIO8 (P9_6) + #define SCU_PINMUX_SGPIO8 (P9_6) #endif -#define SCU_PINMUX_SGPIO9 (P4_3) -#define SCU_PINMUX_SGPIO10 (P1_14) -#define SCU_PINMUX_SGPIO11 (P1_17) -#define SCU_PINMUX_SGPIO12 (P1_18) -#define SCU_PINMUX_SGPIO13 (P4_8) -#define SCU_PINMUX_SGPIO14 (P4_9) -#define SCU_PINMUX_SGPIO15 (P4_10) +#define SCU_PINMUX_SGPIO9 (P4_3) +#define SCU_PINMUX_SGPIO10 (P1_14) +#define SCU_PINMUX_SGPIO11 (P1_17) +#define SCU_PINMUX_SGPIO12 (P1_18) +#define SCU_PINMUX_SGPIO13 (P4_8) +#define SCU_PINMUX_SGPIO14 (P4_9) +#define SCU_PINMUX_SGPIO15 (P4_10) /* MAX2837 GPIO (XCVR_CTL) PinMux */ #ifdef RAD1O -#define SCU_XCVR_RXHP (P8_1) /* GPIO[] on P8_1 */ -#define SCU_XCVR_B6 (P8_2) /* GPIO[] on P8_2 */ -#define SCU_XCVR_B7 (P9_3) /* GPIO[] on P8_3 */ + #define SCU_XCVR_RXHP (P8_1) /* GPIO[] on P8_1 */ + #define SCU_XCVR_B6 (P8_2) /* GPIO[] on P8_2 */ + #define SCU_XCVR_B7 (P9_3) /* GPIO[] on P8_3 */ #endif -#define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */ -#define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */ -#define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */ -#define SCU_XCVR_CS (P1_20) /* GPIO0[15] on P1_20 */ +#define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */ +#define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */ +#define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */ +#define SCU_XCVR_CS (P1_20) /* GPIO0[15] on P1_20 */ /* MAX5864 SPI chip select (AD_CS) GPIO PinMux */ -#define SCU_AD_CS (P5_7) /* GPIO2[7] on P5_7 */ +#define SCU_AD_CS (P5_7) /* GPIO2[7] on P5_7 */ /* RFFC5071 GPIO serial interface PinMux */ #if (defined JAWBREAKER || defined HACKRF_ONE) -#define SCU_MIXER_ENX (P5_4) /* GPIO2[13] on P5_4 */ -#define SCU_MIXER_SCLK (P2_6) /* GPIO5[6] on P2_6 */ -#define SCU_MIXER_SDATA (P6_4) /* GPIO3[3] on P6_4 */ -#define SCU_MIXER_RESETX (P5_5) /* GPIO2[14] on P5_5 */ + #define SCU_MIXER_ENX (P5_4) /* GPIO2[13] on P5_4 */ + #define SCU_MIXER_SCLK (P2_6) /* GPIO5[6] on P2_6 */ + #define SCU_MIXER_SDATA (P6_4) /* GPIO3[3] on P6_4 */ + #define SCU_MIXER_RESETX (P5_5) /* GPIO2[14] on P5_5 */ #endif #ifdef RAD1O -#define SCU_VCO_CE (P5_4) /* GPIO2[13] on P5_4 */ -#define SCU_VCO_SCLK (P2_6) /* GPIO5[6] on P2_6 */ -#define SCU_VCO_SDATA (P6_4) /* GPIO3[3] on P6_4 */ -#define SCU_VCO_LE (P5_5) /* GPIO2[14] on P5_5 */ -#define SCU_VCO_MUX (PB_5) /* GPIO5[25] on PB_5 */ -#define SCU_MIXER_EN (P6_8) /* GPIO5[16] on P6_8 */ -#define SCU_SYNT_RFOUT_EN (P6_9) /* GPIO3[5] on P6_9 */ + #define SCU_VCO_CE (P5_4) /* GPIO2[13] on P5_4 */ + #define SCU_VCO_SCLK (P2_6) /* GPIO5[6] on P2_6 */ + #define SCU_VCO_SDATA (P6_4) /* GPIO3[3] on P6_4 */ + #define SCU_VCO_LE (P5_5) /* GPIO2[14] on P5_5 */ + #define SCU_VCO_MUX (PB_5) /* GPIO5[25] on PB_5 */ + #define SCU_MIXER_EN (P6_8) /* GPIO5[16] on P6_8 */ + #define SCU_SYNT_RFOUT_EN (P6_9) /* GPIO3[5] on P6_9 */ #endif /* RF LDO control */ #ifdef JAWBREAKER -#define SCU_RF_LDO_ENABLE (P5_0) /* GPIO2[9] on P5_0 */ + #define SCU_RF_LDO_ENABLE (P5_0) /* GPIO2[9] on P5_0 */ #endif /* RF supply (VAA) control */ #ifdef HACKRF_ONE -#define SCU_NO_VAA_ENABLE (P5_0) /* GPIO2[9] on P5_0 */ + #define SCU_NO_VAA_ENABLE (P5_0) /* GPIO2[9] on P5_0 */ #endif #ifdef RAD1O -#define SCU_VAA_ENABLE (P5_0) /* GPIO2[9] on P5_0 */ + #define SCU_VAA_ENABLE (P5_0) /* GPIO2[9] on P5_0 */ #endif - /* SPI flash */ -#define SCU_SSP0_CIPO (P3_6) -#define SCU_SSP0_COPI (P3_7) -#define SCU_SSP0_SCK (P3_3) -#define SCU_SSP0_CS (P3_8) /* GPIO5[11] on P3_8 */ -#define SCU_FLASH_HOLD (P3_4) /* GPIO1[14] on P3_4 */ -#define SCU_FLASH_WP (P3_5) /* GPIO1[15] on P3_5 */ +#define SCU_SSP0_CIPO (P3_6) +#define SCU_SSP0_COPI (P3_7) +#define SCU_SSP0_SCK (P3_3) +#define SCU_SSP0_CS (P3_8) /* GPIO5[11] on P3_8 */ +#define SCU_FLASH_HOLD (P3_4) /* GPIO1[14] on P3_4 */ +#define SCU_FLASH_WP (P3_5) /* GPIO1[15] on P3_5 */ /* RF switch control */ #ifdef HACKRF_ONE -#define SCU_HP (P4_0) /* GPIO2[0] on P4_0 */ -#define SCU_LP (P5_1) /* GPIO2[10] on P5_1 */ -#define SCU_TX_MIX_BP (P5_2) /* GPIO2[11] on P5_2 */ -#define SCU_NO_MIX_BYPASS (P1_7) /* GPIO1[0] on P1_7 */ -#define SCU_RX_MIX_BP (P5_3) /* GPIO2[12] on P5_3 */ -#define SCU_TX_AMP (P5_6) /* GPIO2[15] on P5_6 */ -#define SCU_TX (P6_7) /* GPIO5[15] on P6_7 */ -#define SCU_MIX_BYPASS (P6_8) /* GPIO5[16] on P6_8 */ -#define SCU_RX (P2_5) /* GPIO5[5] on P2_5 */ -#define SCU_NO_TX_AMP_PWR (P6_9) /* GPIO3[5] on P6_9 */ -#define SCU_AMP_BYPASS (P2_10) /* GPIO0[14] on P2_10 */ -#define SCU_RX_AMP (P2_11) /* GPIO1[11] on P2_11 */ -#define SCU_NO_RX_AMP_PWR (P2_12) /* GPIO1[12] on P2_12 */ + #define SCU_HP (P4_0) /* GPIO2[0] on P4_0 */ + #define SCU_LP (P5_1) /* GPIO2[10] on P5_1 */ + #define SCU_TX_MIX_BP (P5_2) /* GPIO2[11] on P5_2 */ + #define SCU_NO_MIX_BYPASS (P1_7) /* GPIO1[0] on P1_7 */ + #define SCU_RX_MIX_BP (P5_3) /* GPIO2[12] on P5_3 */ + #define SCU_TX_AMP (P5_6) /* GPIO2[15] on P5_6 */ + #define SCU_TX (P6_7) /* GPIO5[15] on P6_7 */ + #define SCU_MIX_BYPASS (P6_8) /* GPIO5[16] on P6_8 */ + #define SCU_RX (P2_5) /* GPIO5[5] on P2_5 */ + #define SCU_NO_TX_AMP_PWR (P6_9) /* GPIO3[5] on P6_9 */ + #define SCU_AMP_BYPASS (P2_10) /* GPIO0[14] on P2_10 */ + #define SCU_RX_AMP (P2_11) /* GPIO1[11] on P2_11 */ + #define SCU_NO_RX_AMP_PWR (P2_12) /* GPIO1[12] on P2_12 */ #endif #ifdef RAD1O -#define SCU_BY_AMP (P1_7) /* GPIO1[0] on P1_7 */ -#define SCU_BY_AMP_N (P2_5) /* GPIO5[5] on P2_5 */ -#define SCU_TX_RX (P2_10) /* GPIO0[14] on P2_10 */ -#define SCU_TX_RX_N (P2_11) /* GPIO1[11] on P2_11 */ -#define SCU_BY_MIX (P2_12) /* GPIO1[12] on P2_12 */ -#define SCU_BY_MIX_N (P5_1) /* GPIO2[10] on P5_1 */ -#define SCU_LOW_HIGH_FILT (P5_2) /* GPIO2[11] on P5_2 */ -#define SCU_LOW_HIGH_FILT_N (P5_3) /* GPIO2[12] on P5_3 */ -#define SCU_TX_AMP (P5_6) /* GPIO2[15] on P5_6 */ -#define SCU_RX_LNA (P6_7) /* GPIO5[15] on P6_7 */ + #define SCU_BY_AMP (P1_7) /* GPIO1[0] on P1_7 */ + #define SCU_BY_AMP_N (P2_5) /* GPIO5[5] on P2_5 */ + #define SCU_TX_RX (P2_10) /* GPIO0[14] on P2_10 */ + #define SCU_TX_RX_N (P2_11) /* GPIO1[11] on P2_11 */ + #define SCU_BY_MIX (P2_12) /* GPIO1[12] on P2_12 */ + #define SCU_BY_MIX_N (P5_1) /* GPIO2[10] on P5_1 */ + #define SCU_LOW_HIGH_FILT (P5_2) /* GPIO2[11] on P5_2 */ + #define SCU_LOW_HIGH_FILT_N (P5_3) /* GPIO2[12] on P5_3 */ + #define SCU_TX_AMP (P5_6) /* GPIO2[15] on P5_6 */ + #define SCU_RX_LNA (P6_7) /* GPIO5[15] on P6_7 */ #endif -#define SCU_PINMUX_PP_D0 (P7_0) /* GPIO3[8] */ -#define SCU_PINMUX_PP_D1 (P7_1) /* GPIO3[9] */ -#define SCU_PINMUX_PP_D2 (P7_2) /* GPIO3[10] */ -#define SCU_PINMUX_PP_D3 (P7_3) /* GPIO3[11] */ -#define SCU_PINMUX_PP_D4 (P7_4) /* GPIO3[12] */ -#define SCU_PINMUX_PP_D5 (P7_5) /* GPIO3[13] */ -#define SCU_PINMUX_PP_D6 (P7_6) /* GPIO3[14] */ -#define SCU_PINMUX_PP_D7 (P7_7) /* GPIO3[15] */ +#define SCU_PINMUX_PP_D0 (P7_0) /* GPIO3[8] */ +#define SCU_PINMUX_PP_D1 (P7_1) /* GPIO3[9] */ +#define SCU_PINMUX_PP_D2 (P7_2) /* GPIO3[10] */ +#define SCU_PINMUX_PP_D3 (P7_3) /* GPIO3[11] */ +#define SCU_PINMUX_PP_D4 (P7_4) /* GPIO3[12] */ +#define SCU_PINMUX_PP_D5 (P7_5) /* GPIO3[13] */ +#define SCU_PINMUX_PP_D6 (P7_6) /* GPIO3[14] */ +#define SCU_PINMUX_PP_D7 (P7_7) /* GPIO3[15] */ /* TODO add other Pins */ -#define SCU_PINMUX_GPIO3_8 (P7_0) /* GPIO3[8] */ -#define SCU_PINMUX_GPIO3_9 (P7_1) /* GPIO3[9] */ -#define SCU_PINMUX_GPIO3_10 (P7_2) /* GPIO3[10] */ -#define SCU_PINMUX_GPIO3_11 (P7_3) /* GPIO3[11] */ -#define SCU_PINMUX_GPIO3_12 (P7_4) /* GPIO3[12] */ -#define SCU_PINMUX_GPIO3_13 (P7_5) /* GPIO3[13] */ -#define SCU_PINMUX_GPIO3_14 (P7_6) /* GPIO3[14] */ -#define SCU_PINMUX_GPIO3_15 (P7_7) /* GPIO3[15] */ +#define SCU_PINMUX_GPIO3_8 (P7_0) /* GPIO3[8] */ +#define SCU_PINMUX_GPIO3_9 (P7_1) /* GPIO3[9] */ +#define SCU_PINMUX_GPIO3_10 (P7_2) /* GPIO3[10] */ +#define SCU_PINMUX_GPIO3_11 (P7_3) /* GPIO3[11] */ +#define SCU_PINMUX_GPIO3_12 (P7_4) /* GPIO3[12] */ +#define SCU_PINMUX_GPIO3_13 (P7_5) /* GPIO3[13] */ +#define SCU_PINMUX_GPIO3_14 (P7_6) /* GPIO3[14] */ +#define SCU_PINMUX_GPIO3_15 (P7_7) /* GPIO3[15] */ #define SCU_PINMUX_PP_TDO (P1_5) /* GPIO1[8] */ #define SCU_PINMUX_SD_POW (P1_5) /* GPIO1[8] */ @@ -242,14 +240,14 @@ extern "C" #define SCU_PINMUX_SD_DAT3 (P1_12) /* GPIO1[5] */ #define SCU_PINMUX_SD_CD (P1_13) /* GPIO1[6] */ -#define SCU_PINMUX_PP_IO_STBX (P2_0) /* GPIO5[0] */ -#define SCU_PINMUX_PP_ADDR (P2_1) /* GPIO5[1] */ -#define SCU_PINMUX_U0_TXD (P2_0) /* GPIO5[0] */ -#define SCU_PINMUX_U0_RXD (P2_1) /* GPIO5[1] */ +#define SCU_PINMUX_PP_IO_STBX (P2_0) /* GPIO5[0] */ +#define SCU_PINMUX_PP_ADDR (P2_1) /* GPIO5[1] */ +#define SCU_PINMUX_U0_TXD (P2_0) /* GPIO5[0] */ +#define SCU_PINMUX_U0_RXD (P2_1) /* GPIO5[1] */ -#define SCU_PINMUX_ISP (P2_7) /* GPIO0[7] */ +#define SCU_PINMUX_ISP (P2_7) /* GPIO0[7] */ -#define SCU_PINMUX_GP_CLKIN (P4_7) +#define SCU_PINMUX_GP_CLKIN (P4_7) typedef enum { TRANSCEIVER_MODE_OFF = 0, diff --git a/firmware/common/hackrf_ui.c b/firmware/common/hackrf_ui.c index a0677f80..ce411cb8 100644 --- a/firmware/common/hackrf_ui.c +++ b/firmware/common/hackrf_ui.c @@ -26,7 +26,7 @@ #include -#define UNUSED(x) (void)(x) +#define UNUSED(x) (void) (x) /* Stub functions for null UI function table */ // clang-format off @@ -46,6 +46,7 @@ void hackrf_ui_set_antenna_bias_null(bool antenna_bias) { UNUSED(antenna_bias); void hackrf_ui_set_clock_source_null(clock_source_t source) { UNUSED(source); } void hackrf_ui_set_transceiver_mode_null(transceiver_mode_t mode) { UNUSED(mode); } bool hackrf_ui_operacake_gpio_compatible_null(void) { return true; } + // clang-format on /* Null UI function table, used if there's no hardware UI detected. Eliminates the @@ -67,34 +68,35 @@ static const hackrf_ui_t hackrf_ui_null = { &hackrf_ui_set_antenna_bias_null, &hackrf_ui_set_clock_source_null, &hackrf_ui_set_transceiver_mode_null, - &hackrf_ui_operacake_gpio_compatible_null -}; + &hackrf_ui_operacake_gpio_compatible_null}; static const hackrf_ui_t* ui = NULL; static bool ui_enabled = true; -const hackrf_ui_t* hackrf_ui(void) { +const hackrf_ui_t* hackrf_ui(void) +{ /* Detect on first use. If no UI hardware is detected, use a stub function table. */ - if( ui == NULL && ui_enabled ) { + if (ui == NULL && ui_enabled) { #ifdef HACKRF_ONE - if( portapack_hackrf_ui_init ) { + if (portapack_hackrf_ui_init) { ui = portapack_hackrf_ui_init(); } #endif #ifdef RAD1O - if( rad1o_ui_setup ) { + if (rad1o_ui_setup) { ui = rad1o_ui_setup(); } #endif } - if( ui == NULL ) { + if (ui == NULL) { ui = &hackrf_ui_null; } return ui; } -void hackrf_ui_set_enable(bool enabled) { +void hackrf_ui_set_enable(bool enabled) +{ if (ui_enabled != enabled) { ui_enabled = enabled; hackrf_ui()->deinit(); diff --git a/firmware/common/i2c_bus.c b/firmware/common/i2c_bus.c index 97bcb293..517d8b43 100644 --- a/firmware/common/i2c_bus.c +++ b/firmware/common/i2c_bus.c @@ -21,19 +21,23 @@ #include "i2c_bus.h" -void i2c_bus_start(i2c_bus_t* const bus, const void* const config) { +void i2c_bus_start(i2c_bus_t* const bus, const void* const config) +{ bus->start(bus, config); } -void i2c_bus_stop(i2c_bus_t* const bus) { +void i2c_bus_stop(i2c_bus_t* const bus) +{ bus->stop(bus); } void i2c_bus_transfer( i2c_bus_t* const bus, const uint_fast8_t peripheral_address, - const uint8_t* const tx, const size_t tx_count, - uint8_t* const rx, const size_t rx_count -) { + const uint8_t* const tx, + const size_t tx_count, + uint8_t* const rx, + const size_t rx_count) +{ bus->transfer(bus, peripheral_address, tx, tx_count, rx, rx_count); } diff --git a/firmware/common/i2c_bus.h b/firmware/common/i2c_bus.h index e8dcbc5d..0eb936ca 100644 --- a/firmware/common/i2c_bus.h +++ b/firmware/common/i2c_bus.h @@ -35,9 +35,10 @@ struct i2c_bus_t { void (*transfer)( i2c_bus_t* const bus, const uint_fast8_t peripheral_address, - const uint8_t* const tx, const size_t tx_count, - uint8_t* const rx, const size_t rx_count - ); + const uint8_t* const tx, + const size_t tx_count, + uint8_t* const rx, + const size_t rx_count); }; void i2c_bus_start(i2c_bus_t* const bus, const void* const config); @@ -45,8 +46,9 @@ void i2c_bus_stop(i2c_bus_t* const bus); void i2c_bus_transfer( i2c_bus_t* const bus, const uint_fast8_t peripheral_address, - const uint8_t* const tx, const size_t tx_count, - uint8_t* const rx, const size_t rx_count -); + const uint8_t* const tx, + const size_t tx_count, + uint8_t* const rx, + const size_t rx_count); -#endif/*__I2C_BUS_H__*/ +#endif /*__I2C_BUS_H__*/ diff --git a/firmware/common/i2c_lpc.c b/firmware/common/i2c_lpc.c index 866b0c0a..7434417e 100644 --- a/firmware/common/i2c_lpc.c +++ b/firmware/common/i2c_lpc.c @@ -26,30 +26,35 @@ /* FIXME return i2c0 status from each function */ -void i2c_lpc_start(i2c_bus_t* const bus, const void* const _config) { +void i2c_lpc_start(i2c_bus_t* const bus, const void* const _config) +{ const i2c_lpc_config_t* const config = _config; - const uint32_t port = (uint32_t)bus->obj; + const uint32_t port = (uint32_t) bus->obj; i2c_init(port, config->duty_cycle_count); } -void i2c_lpc_stop(i2c_bus_t* const bus) { - const uint32_t port = (uint32_t)bus->obj; +void i2c_lpc_stop(i2c_bus_t* const bus) +{ + const uint32_t port = (uint32_t) bus->obj; i2c_disable(port); } -void i2c_lpc_transfer(i2c_bus_t* const bus, +void i2c_lpc_transfer( + i2c_bus_t* const bus, const uint_fast8_t peripheral_address, - const uint8_t* const data_tx, const size_t count_tx, - uint8_t* const data_rx, const size_t count_rx -) { - const uint32_t port = (uint32_t)bus->obj; + const uint8_t* const data_tx, + const size_t count_tx, + uint8_t* const data_rx, + const size_t count_rx) +{ + const uint32_t port = (uint32_t) bus->obj; size_t i; bool ack = false; if (data_tx && (count_tx > 0)) { i2c_tx_start(port); i2c_tx_byte(port, (peripheral_address << 1) | I2C_WRITE); - for(i=0; i 0)) { i2c_tx_start(port); i2c_tx_byte(port, (peripheral_address << 1) | I2C_READ); - for(i=0; iobj; +bool i2c_probe(i2c_bus_t* const bus, const uint_fast8_t device_address) +{ + const uint32_t port = (uint32_t) bus->obj; i2c_tx_start(port); i2c_tx_byte(port, (device_address << 1) | I2C_WRITE); diff --git a/firmware/common/i2c_lpc.h b/firmware/common/i2c_lpc.h index ad849439..29cdce1e 100644 --- a/firmware/common/i2c_lpc.h +++ b/firmware/common/i2c_lpc.h @@ -34,11 +34,13 @@ typedef struct i2c_lpc_config_t { void i2c_lpc_start(i2c_bus_t* const bus, const void* const config); void i2c_lpc_stop(i2c_bus_t* const bus); -void i2c_lpc_transfer(i2c_bus_t* const bus, +void i2c_lpc_transfer( + i2c_bus_t* const bus, const uint_fast8_t peripheral_address, - const uint8_t* const data_tx, const size_t count_tx, - uint8_t* const data_rx, const size_t count_rx -); + const uint8_t* const data_tx, + const size_t count_tx, + uint8_t* const data_rx, + const size_t count_rx); bool i2c_probe(i2c_bus_t* const bus, const uint_fast8_t device_address); -#endif/*__I2C_LPC_H__*/ +#endif /*__I2C_LPC_H__*/ diff --git a/firmware/common/m0_sleep.c b/firmware/common/m0_sleep.c index e540dd59..97f31fa2 100644 --- a/firmware/common/m0_sleep.c +++ b/firmware/common/m0_sleep.c @@ -19,8 +19,7 @@ * Boston, MA 02110-1301, USA. */ -int main() { - while(1) { - - } +int main() +{ + while (1) {} } \ No newline at end of file diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c index c7887fb0..e8f5b9cb 100644 --- a/firmware/common/max2837.c +++ b/firmware/common/max2837.c @@ -34,44 +34,44 @@ #include "max2837_regs.def" // private register def macros /* Default register values. */ -static const uint16_t max2837_regs_default[MAX2837_NUM_REGS] = { - 0x150, /* 0 */ - 0x002, /* 1 */ - 0x1f4, /* 2 */ - 0x1b9, /* 3 */ - 0x00a, /* 4 */ - 0x080, /* 5 */ - 0x006, /* 6 */ - 0x000, /* 7 */ - 0x080, /* 8 */ - 0x018, /* 9 */ - 0x058, /* 10 */ - 0x016, /* 11 */ - 0x24f, /* 12 */ - 0x150, /* 13 */ - 0x1c5, /* 14 */ - 0x081, /* 15 */ - 0x01c, /* 16 */ - 0x155, /* 17 */ - 0x155, /* 18 */ - 0x153, /* 19 */ - 0x241, /* 20 */ +static const uint16_t max2837_regs_default[MAX2837_NUM_REGS] = { + 0x150, /* 0 */ + 0x002, /* 1 */ + 0x1f4, /* 2 */ + 0x1b9, /* 3 */ + 0x00a, /* 4 */ + 0x080, /* 5 */ + 0x006, /* 6 */ + 0x000, /* 7 */ + 0x080, /* 8 */ + 0x018, /* 9 */ + 0x058, /* 10 */ + 0x016, /* 11 */ + 0x24f, /* 12 */ + 0x150, /* 13 */ + 0x1c5, /* 14 */ + 0x081, /* 15 */ + 0x01c, /* 16 */ + 0x155, /* 17 */ + 0x155, /* 18 */ + 0x153, /* 19 */ + 0x241, /* 20 */ /* * Charge Pump Common Mode Enable bit (0) of register 21 must be set or TX * does not work. Page 1 of the SPI doc says not to set it (0x02c), but * page 21 says it should be set by default (0x02d). */ - 0x02d, /* 21 */ - 0x1a9, /* 22 */ - 0x24f, /* 23 */ - 0x180, /* 24 */ - 0x100, /* 25 */ - 0x3ca, /* 26 */ - 0x3e3, /* 27 */ - 0x0c0, /* 28 */ - 0x3f0, /* 29 */ - 0x080, /* 30 */ - 0x000 }; /* 31 */ + 0x02d, /* 21 */ + 0x1a9, /* 22 */ + 0x24f, /* 23 */ + 0x180, /* 24 */ + 0x100, /* 25 */ + 0x3ca, /* 26 */ + 0x3e3, /* 27 */ + 0x0c0, /* 28 */ + 0x3f0, /* 29 */ + 0x080, /* 30 */ + 0x000}; /* 31 */ /* Set up all registers according to defaults specified in docs. */ static void max2837_init(max2837_driver_t* const drv) @@ -93,7 +93,7 @@ static void max2837_init(max2837_driver_t* const drv) void max2837_setup(max2837_driver_t* const drv) { max2837_init(drv); - + /* Use SPI control instead of B1-B7 pins for gain settings. */ set_MAX2837_TXVGA_GAIN_SPI_EN(drv, 1); set_MAX2837_TXVGA_GAIN_MSB_SPI_EN(drv, 1); @@ -119,13 +119,15 @@ void max2837_setup(max2837_driver_t* const drv) max2837_regs_commit(drv); } -static uint16_t max2837_read(max2837_driver_t* const drv, uint8_t r) { +static uint16_t max2837_read(max2837_driver_t* const drv, uint8_t r) +{ uint16_t value = (1 << 15) | (r << 10); spi_bus_transfer(drv->bus, &value, 1); return value & 0x3ff; } -static void max2837_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) { +static void max2837_write(max2837_driver_t* const drv, uint8_t r, uint16_t v) +{ uint16_t value = (r << 10) | (v & 0x3ff); spi_bus_transfer(drv->bus, &value, 1); } @@ -153,18 +155,20 @@ static inline void max2837_reg_commit(max2837_driver_t* const drv, uint8_t r) void max2837_regs_commit(max2837_driver_t* const drv) { int r; - for(r = 0; r < MAX2837_NUM_REGS; r++) { + for (r = 0; r < MAX2837_NUM_REGS; r++) { if ((drv->regs_dirty >> r) & 0x1) { max2837_reg_commit(drv, r); } } } -void max2837_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) { +void max2837_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) +{ drv->set_mode(drv, new_mode); } -max2837_mode_t max2837_mode(max2837_driver_t* const drv) { +max2837_mode_t max2837_mode(max2837_driver_t* const drv) +{ return drv->mode; } @@ -210,16 +214,13 @@ void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq) if (freq < 2400000000U) { band = MAX2837_LOGEN_BSW_2_3; lna_band = MAX2837_LNAband_2_4; - } - else if (freq < 2500000000U) { + } else if (freq < 2500000000U) { band = MAX2837_LOGEN_BSW_2_4; lna_band = MAX2837_LNAband_2_4; - } - else if (freq < 2600000000U) { + } else if (freq < 2600000000U) { band = MAX2837_LOGEN_BSW_2_5; lna_band = MAX2837_LNAband_2_6; - } - else { + } else { band = MAX2837_LOGEN_BSW_2_6; lna_band = MAX2837_LNAband_2_6; } @@ -229,7 +230,7 @@ void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq) div_rem = freq % 30000000; div_frac = 0; div_cmp = 30000000; - for( i = 0; i < 20; i++) { + for (i = 0; i < 20; i++) { div_frac <<= 1; div_cmp >>= 1; if (div_rem > div_cmp) { diff --git a/firmware/common/max2837.h b/firmware/common/max2837.h index a353b88f..5571fd9b 100644 --- a/firmware/common/max2837.h +++ b/firmware/common/max2837.h @@ -30,7 +30,7 @@ #include "spi_bus.h" /* 32 registers, each containing 10 bits of data. */ -#define MAX2837_NUM_REGS 32 +#define MAX2837_NUM_REGS 32 #define MAX2837_DATA_REGS_MAX_VALUE 1024 typedef enum { @@ -81,11 +81,13 @@ extern void max2837_stop(max2837_driver_t* const drv); /* Set frequency in Hz. Frequency setting is a multi-step function * where order of register writes matters. */ extern void max2837_set_frequency(max2837_driver_t* const drv, uint32_t freq); -uint32_t max2837_set_lpf_bandwidth(max2837_driver_t* const drv, const uint32_t bandwidth_hz); +uint32_t max2837_set_lpf_bandwidth( + max2837_driver_t* const drv, + const uint32_t bandwidth_hz); bool max2837_set_lna_gain(max2837_driver_t* const drv, const uint32_t gain_db); bool max2837_set_vga_gain(max2837_driver_t* const drv, const uint32_t gain_db); bool max2837_set_txvga_gain(max2837_driver_t* const drv, const uint32_t gain_db); - + extern void max2837_tx(max2837_driver_t* const drv); extern void max2837_rx(max2837_driver_t* const drv); diff --git a/firmware/common/max2837_target.c b/firmware/common/max2837_target.c index 76b2c568..b05edb96 100644 --- a/firmware/common/max2837_target.c +++ b/firmware/common/max2837_target.c @@ -25,11 +25,12 @@ #include #include "hackrf_core.h" -void max2837_target_init(max2837_driver_t* const drv) { +void max2837_target_init(max2837_driver_t* const drv) +{ /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); + scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); scu_pinmux(SCU_XCVR_CS, SCU_GPIO_FAST); @@ -44,7 +45,8 @@ void max2837_target_init(max2837_driver_t* const drv) { gpio_output(drv->gpio_tx_enable); } -void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) { +void max2837_target_set_mode(max2837_driver_t* const drv, const max2837_mode_t new_mode) +{ /* MAX2837_MODE_SHUTDOWN: * All circuit blocks are powered down, except the 4-wire serial bus * and its internal programmable registers. diff --git a/firmware/common/max2871.c b/firmware/common/max2871.c index b56b6f60..46013568 100644 --- a/firmware/common/max2871.c +++ b/firmware/common/max2871.c @@ -2,13 +2,13 @@ #include "max2871_regs.h" #if (defined DEBUG) -#include -#define LOG printf + #include + #define LOG printf #else -#define LOG(x,...) -#include -#include -#include "hackrf_core.h" + #define LOG(x, ...) + #include + #include + #include "hackrf_core.h" #endif #include @@ -43,12 +43,12 @@ void max2871_setup(max2871_driver_t* const drv) gpio_set(drv->gpio_vco_ce); /* active high */ gpio_clear(drv->gpio_vco_sclk); gpio_clear(drv->gpio_vco_sdata); - gpio_set(drv->gpio_vco_le); /* active low */ + gpio_set(drv->gpio_vco_le); /* active low */ gpio_set(drv->gpio_synt_rfout_en); /* active high */ max2871_regs_init(); int i; - for(i = 5; i >= 0; i--) { + for (i = 5; i >= 0; i--) { max2871_spi_write(drv, i, max2871_get_register(i)); delay_ms(20); } @@ -62,7 +62,7 @@ void max2871_setup(max2871_driver_t* const drv) max2871_set_M(0); max2871_set_LDS(0); max2871_set_SDN(0); - max2871_set_MUX(0x0C); /* Register 6 readback */ + max2871_set_MUX(0x0C); /* Register 6 readback */ max2871_set_DBR(0); max2871_set_RDIV2(0); max2871_set_R(1); /* 40 MHz f_PFD */ @@ -84,8 +84,8 @@ void max2871_setup(max2871_driver_t* const drv) max2871_set_SDLDO(0); max2871_set_SDDIV(0); max2871_set_SDREF(0); - max2871_set_BS(20*40); /* For 40 MHz f_PFD */ - max2871_set_FB(1); /* Do not put DIVA into the feedback loop */ + max2871_set_BS(20 * 40); /* For 40 MHz f_PFD */ + max2871_set_FB(1); /* Do not put DIVA into the feedback loop */ max2871_set_DIVA(0); max2871_set_SDVCO(0); max2871_set_MTLD(1); @@ -108,14 +108,13 @@ void max2871_setup(max2871_driver_t* const drv) static void delay_ms(int ms) { uint32_t i; - while(ms--) { + while (ms--) { for (i = 0; i < 20000; i++) { __asm__("nop"); } } } - static void serial_delay(void) { uint32_t i; @@ -124,19 +123,19 @@ static void serial_delay(void) __asm__("nop"); } - /* SPI register write * * Send 32 bits: * First 29 bits are data * Last 3 bits are register number */ -static void max2871_spi_write(max2871_driver_t* const drv, uint8_t r, uint32_t v) { +static void max2871_spi_write(max2871_driver_t* const drv, uint8_t r, uint32_t v) +{ #if DEBUG LOG("0x%04x -> reg%d\n", v, r); #else uint32_t bits = 32; - uint32_t msb = 1 << (bits -1); + uint32_t msb = 1 << (bits - 1); uint32_t data = v | r; /* make sure everything is starting in the correct state */ @@ -194,7 +193,7 @@ static uint32_t max2871_spi_read(max2871_driver_t* const drv) static void max2871_write_registers(max2871_driver_t* const drv) { int i; - for(i = 5; i >= 0; i--) { + for (i = 5; i >= 0; i--) { max2871_spi_write(drv, i, max2871_get_register(i)); } } @@ -205,7 +204,7 @@ uint64_t max2871_set_frequency(max2871_driver_t* const drv, uint16_t mhz) int n = mhz / 40; int diva = 0; - while(n * 40 < 3000) { + while (n * 40 < 3000) { n *= 2; diva += 1; } @@ -217,20 +216,20 @@ uint64_t max2871_set_frequency(max2871_driver_t* const drv, uint16_t mhz) max2871_set_DIVA(diva); max2871_write_registers(drv); - while(max2871_spi_read(drv) & MAX2871_VASA) {} + while (max2871_spi_read(drv) & MAX2871_VASA) {} max2871_set_RFA_EN(1); max2871_write_registers(drv); - return (mhz/40)*40 * 1000000; + return (mhz / 40) * 40 * 1000000; } void max2871_enable(max2871_driver_t* const drv) { gpio_set(drv->gpio_vco_ce); } + void max2871_disable(max2871_driver_t* const drv) { gpio_clear(drv->gpio_vco_ce); } - diff --git a/firmware/common/max2871_regs.c b/firmware/common/max2871_regs.c index aec781d1..d310edc9 100644 --- a/firmware/common/max2871_regs.c +++ b/firmware/common/max2871_regs.c @@ -5,295 +5,295 @@ static uint32_t registers[6]; void max2871_regs_init(void) { - registers[0] = 0x007D0000; - registers[1] = 0x2000FFF9; - registers[2] = 0x00004042; - registers[3] = 0x0000000B; - registers[4] = 0x6180B23C; - registers[5] = 0x00400005; + registers[0] = 0x007D0000; + registers[1] = 0x2000FFF9; + registers[2] = 0x00004042; + registers[3] = 0x0000000B; + registers[4] = 0x6180B23C; + registers[5] = 0x00400005; } uint32_t max2871_get_register(int reg) { - return registers[reg]; + return registers[reg]; } void max2871_set_INT(uint32_t v) { - registers[0] &= ~(0x1 << 31); - registers[0] |= v << 31; + registers[0] &= ~(0x1 << 31); + registers[0] |= v << 31; } void max2871_set_N(uint32_t v) { - registers[0] &= ~(0xFFFF << 15); - registers[0] |= v << 15; + registers[0] &= ~(0xFFFF << 15); + registers[0] |= v << 15; } void max2871_set_FRAC(uint32_t v) { - registers[0] &= ~(0xFFF << 3); - registers[0] |= v << 3; + registers[0] &= ~(0xFFF << 3); + registers[0] |= v << 3; } void max2871_set_CPL(uint32_t v) { - registers[1] &= ~(0x3 << 29); - registers[1] |= v << 29; + registers[1] &= ~(0x3 << 29); + registers[1] |= v << 29; } void max2871_set_CPT(uint32_t v) { - registers[1] &= ~(0x3 << 27); - registers[1] |= v << 27; + registers[1] &= ~(0x3 << 27); + registers[1] |= v << 27; } void max2871_set_P(uint32_t v) { - registers[1] &= ~(0xFFF << 15); - registers[1] |= v << 15; + registers[1] &= ~(0xFFF << 15); + registers[1] |= v << 15; } void max2871_set_M(uint32_t v) { - registers[1] &= ~(0xFFF << 3); - registers[1] |= v << 3; + registers[1] &= ~(0xFFF << 3); + registers[1] |= v << 3; } void max2871_set_LDS(uint32_t v) { - registers[2] &= ~(0x1 << 31); - registers[2] |= v << 31; + registers[2] &= ~(0x1 << 31); + registers[2] |= v << 31; } void max2871_set_SDN(uint32_t v) { - registers[2] &= ~(0x3 << 29); - registers[2] |= v << 29; + registers[2] &= ~(0x3 << 29); + registers[2] |= v << 29; } void max2871_set_MUX(uint32_t v) { - registers[2] &= ~(0x7 << 26); - registers[5] &= ~(0x1 << 18); - registers[2] |= (v & 0x7) << 26; - registers[5] |= ((v & 0x8) >> 3) << 18; + registers[2] &= ~(0x7 << 26); + registers[5] &= ~(0x1 << 18); + registers[2] |= (v & 0x7) << 26; + registers[5] |= ((v & 0x8) >> 3) << 18; } void max2871_set_DBR(uint32_t v) { - registers[2] &= ~(0x1 << 25); - registers[2] |= v << 25; + registers[2] &= ~(0x1 << 25); + registers[2] |= v << 25; } void max2871_set_RDIV2(uint32_t v) { - registers[2] &= ~(0x1 << 24); - registers[2] |= v << 24; + registers[2] &= ~(0x1 << 24); + registers[2] |= v << 24; } void max2871_set_R(uint32_t v) { - registers[2] &= ~(0x3FF << 14); - registers[2] |= v << 14; + registers[2] &= ~(0x3FF << 14); + registers[2] |= v << 14; } void max2871_set_REG4DB(uint32_t v) { - registers[2] &= ~(0x1 << 13); - registers[2] |= v << 13; + registers[2] &= ~(0x1 << 13); + registers[2] |= v << 13; } void max2871_set_CP(uint32_t v) { - registers[2] &= ~(0xF << 9); - registers[2] |= v << 9; + registers[2] &= ~(0xF << 9); + registers[2] |= v << 9; } void max2871_set_LDF(uint32_t v) { - registers[2] &= ~(0x1 << 8); - registers[2] |= v << 8; + registers[2] &= ~(0x1 << 8); + registers[2] |= v << 8; } void max2871_set_LDP(uint32_t v) { - registers[2] &= ~(0x1 << 7); - registers[2] |= v << 7; + registers[2] &= ~(0x1 << 7); + registers[2] |= v << 7; } void max2871_set_PDP(uint32_t v) { - registers[2] &= ~(0x1 << 6); - registers[2] |= v << 6; + registers[2] &= ~(0x1 << 6); + registers[2] |= v << 6; } void max2871_set_SHDN(uint32_t v) { - registers[2] &= ~(0x1 << 5); - registers[2] |= v << 5; + registers[2] &= ~(0x1 << 5); + registers[2] |= v << 5; } void max2871_set_TRI(uint32_t v) { - registers[2] &= ~(0x1 << 4); - registers[2] |= v << 4; + registers[2] &= ~(0x1 << 4); + registers[2] |= v << 4; } void max2871_set_RST(uint32_t v) { - registers[2] &= ~(0x1 << 3); - registers[2] |= v << 3; + registers[2] &= ~(0x1 << 3); + registers[2] |= v << 3; } void max2871_set_VCO(uint32_t v) { - registers[3] &= ~(0x3F << 26); - registers[3] |= v << 26; + registers[3] &= ~(0x3F << 26); + registers[3] |= v << 26; } void max2871_set_VAS_SHDN(uint32_t v) { - registers[3] &= ~(0x1 << 25); - registers[3] |= v << 25; + registers[3] &= ~(0x1 << 25); + registers[3] |= v << 25; } void max2871_set_VAS_TEMP(uint32_t v) { - registers[3] &= ~(0x1 << 24); - registers[3] |= v << 24; + registers[3] &= ~(0x1 << 24); + registers[3] |= v << 24; } void max2871_set_CSM(uint32_t v) { - registers[3] &= ~(0x1 << 18); - registers[3] |= v << 18; + registers[3] &= ~(0x1 << 18); + registers[3] |= v << 18; } void max2871_set_MUTEDEL(uint32_t v) { - registers[3] &= ~(0x1 << 17); - registers[3] |= v << 17; + registers[3] &= ~(0x1 << 17); + registers[3] |= v << 17; } void max2871_set_CDM(uint32_t v) { - registers[3] &= ~(0x3 << 15); - registers[3] |= v << 15; + registers[3] &= ~(0x3 << 15); + registers[3] |= v << 15; } void max2871_set_CDIV(uint32_t v) { - registers[3] &= ~(0xFFF << 3); - registers[3] |= v << 3; + registers[3] &= ~(0xFFF << 3); + registers[3] |= v << 3; } void max2871_set_SDLDO(uint32_t v) { - registers[4] &= ~(0x1 << 28); - registers[4] |= v << 28; + registers[4] &= ~(0x1 << 28); + registers[4] |= v << 28; } void max2871_set_SDDIV(uint32_t v) { - registers[4] &= ~(0x1 << 27); - registers[4] |= v << 27; + registers[4] &= ~(0x1 << 27); + registers[4] |= v << 27; } void max2871_set_SDREF(uint32_t v) { - registers[4] &= ~(0x1 << 26); - registers[4] |= v << 26; + registers[4] &= ~(0x1 << 26); + registers[4] |= v << 26; } void max2871_set_BS(uint32_t v) { - registers[4] &= ~(0x3 << 24); - registers[4] &= ~(0xFF << 12); - registers[4] |= ((v & 0x300) >> 8) << 24; - registers[4] |= (v & 0xFF) << 12; + registers[4] &= ~(0x3 << 24); + registers[4] &= ~(0xFF << 12); + registers[4] |= ((v & 0x300) >> 8) << 24; + registers[4] |= (v & 0xFF) << 12; } void max2871_set_FB(uint32_t v) { - registers[4] &= ~(0x1 << 23); - registers[4] |= v << 23; + registers[4] &= ~(0x1 << 23); + registers[4] |= v << 23; } void max2871_set_DIVA(uint32_t v) { - registers[4] &= ~(0x7 << 20); - registers[4] |= v << 20; + registers[4] &= ~(0x7 << 20); + registers[4] |= v << 20; } void max2871_set_SDVCO(uint32_t v) { - registers[4] &= ~(0x1 << 11); - registers[4] |= v << 11; + registers[4] &= ~(0x1 << 11); + registers[4] |= v << 11; } void max2871_set_MTLD(uint32_t v) { - registers[4] &= ~(0x1 << 10); - registers[4] |= v << 10; + registers[4] &= ~(0x1 << 10); + registers[4] |= v << 10; } void max2871_set_BDIV(uint32_t v) { - registers[4] &= ~(0x1 << 9); - registers[4] |= v << 9; + registers[4] &= ~(0x1 << 9); + registers[4] |= v << 9; } void max2871_set_RFB_EN(uint32_t v) { - registers[4] &= ~(0x1 << 8); - registers[4] |= v << 8; + registers[4] &= ~(0x1 << 8); + registers[4] |= v << 8; } void max2871_set_BPWR(uint32_t v) { - registers[4] &= ~(0x3 << 6); - registers[4] |= v << 6; + registers[4] &= ~(0x3 << 6); + registers[4] |= v << 6; } void max2871_set_RFA_EN(uint32_t v) { - registers[4] &= ~(0x1 << 5); - registers[4] |= v << 5; + registers[4] &= ~(0x1 << 5); + registers[4] |= v << 5; } void max2871_set_APWR(uint32_t v) { - registers[4] &= ~(0x3 << 3); - registers[4] |= v << 3; + registers[4] &= ~(0x3 << 3); + registers[4] |= v << 3; } void max2871_set_SDPLL(uint32_t v) { - registers[5] &= ~(0x1 << 25); - registers[5] |= v << 25; + registers[5] &= ~(0x1 << 25); + registers[5] |= v << 25; } void max2871_set_F01(uint32_t v) { - registers[5] &= ~(0x1 << 24); - registers[5] |= v << 24; + registers[5] &= ~(0x1 << 24); + registers[5] |= v << 24; } void max2871_set_LD(uint32_t v) { - registers[5] &= ~(0x3 << 22); - registers[5] |= v << 22; + registers[5] &= ~(0x3 << 22); + registers[5] |= v << 22; } void max2871_set_ADCS(uint32_t v) { - registers[5] &= ~(0x1 << 6); - registers[5] |= v << 6; + registers[5] &= ~(0x1 << 6); + registers[5] |= v << 6; } void max2871_set_ADCM(uint32_t v) { - registers[5] &= ~(0x7 << 3); - registers[5] |= v << 3; + registers[5] &= ~(0x7 << 3); + registers[5] |= v << 3; } diff --git a/firmware/common/max2871_regs.h b/firmware/common/max2871_regs.h index 5acd11c4..ba172a5a 100644 --- a/firmware/common/max2871_regs.h +++ b/firmware/common/max2871_regs.h @@ -2,7 +2,7 @@ #define MAX2871_REGS_H #include -#define MAX2871_VASA (1 << 9) +#define MAX2871_VASA (1 << 9) void max2871_regs_init(void); uint32_t max2871_get_register(int reg); diff --git a/firmware/common/max5864.c b/firmware/common/max5864.c index ed704a2d..44b74e81 100644 --- a/firmware/common/max5864.c +++ b/firmware/common/max5864.c @@ -23,15 +23,18 @@ #include "max5864.h" -static void max5864_write(max5864_driver_t* const drv, uint8_t value) { +static void max5864_write(max5864_driver_t* const drv, uint8_t value) +{ spi_bus_transfer(drv->bus, &value, 1); } -static void max5864_init(max5864_driver_t* const drv) { +static void max5864_init(max5864_driver_t* const drv) +{ drv->target_init(drv); } -void max5864_setup(max5864_driver_t* const drv) { +void max5864_setup(max5864_driver_t* const drv) +{ max5864_init(drv); } diff --git a/firmware/common/max5864_target.c b/firmware/common/max5864_target.c index 151ec936..f8ba5844 100644 --- a/firmware/common/max5864_target.c +++ b/firmware/common/max5864_target.c @@ -24,13 +24,14 @@ #include #include "hackrf_core.h" -void max5864_target_init(max5864_driver_t* const drv) { - (void)drv; - +void max5864_target_init(max5864_driver_t* const drv) +{ + (void) drv; + /* Configure SSP1 Peripheral (to be moved later in SSP driver) */ scu_pinmux(SCU_SSP1_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP1_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); + scu_pinmux(SCU_SSP1_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION1)); /* * Configure CS_AD pin to keep the MAX5864 SPI disabled while we use the diff --git a/firmware/common/max5864_target.h b/firmware/common/max5864_target.h index be684e2c..b0790b88 100644 --- a/firmware/common/max5864_target.h +++ b/firmware/common/max5864_target.h @@ -26,4 +26,4 @@ void max5864_target_init(max5864_driver_t* const drv); -#endif/*__MAX5864_TARGET_H__*/ +#endif /*__MAX5864_TARGET_H__*/ diff --git a/firmware/common/mixer.h b/firmware/common/mixer.h index cf46e7c5..cd972d79 100644 --- a/firmware/common/mixer.h +++ b/firmware/common/mixer.h @@ -24,12 +24,12 @@ #define __MIXER_H #if (defined JAWBREAKER || defined HACKRF_ONE) -#include "rffc5071.h" + #include "rffc5071.h" typedef rffc5071_driver_t mixer_driver_t; #endif #ifdef RAD1O -#include "max2871.h" + #include "max2871.h" typedef max2871_driver_t mixer_driver_t; #endif diff --git a/firmware/common/operacake.c b/firmware/common/operacake.c index 3a19c4cd..7526354f 100644 --- a/firmware/common/operacake.c +++ b/firmware/common/operacake.c @@ -30,14 +30,14 @@ /* * I2C Mode */ -#define OPERACAKE_PIN_OE(x) (x<<7) -#define OPERACAKE_PIN_U2CTRL1(x) (x<<6) -#define OPERACAKE_PIN_U2CTRL0(x) (x<<5) -#define OPERACAKE_PIN_U3CTRL1(x) (x<<4) -#define OPERACAKE_PIN_U3CTRL0(x) (x<<3) -#define OPERACAKE_PIN_U1CTRL(x) (x<<2) -#define OPERACAKE_PIN_LEDEN2(x) (x<<1) -#define OPERACAKE_PIN_LEDEN(x) (x<<0) +#define OPERACAKE_PIN_OE(x) (x << 7) +#define OPERACAKE_PIN_U2CTRL1(x) (x << 6) +#define OPERACAKE_PIN_U2CTRL0(x) (x << 5) +#define OPERACAKE_PIN_U3CTRL1(x) (x << 4) +#define OPERACAKE_PIN_U3CTRL0(x) (x << 3) +#define OPERACAKE_PIN_U1CTRL(x) (x << 2) +#define OPERACAKE_PIN_LEDEN2(x) (x << 1) +#define OPERACAKE_PIN_LEDEN(x) (x << 0) #define OPERACAKE_PORT_A1 (OPERACAKE_PIN_U2CTRL0(0) | OPERACAKE_PIN_U2CTRL1(0)) #define OPERACAKE_PORT_A2 (OPERACAKE_PIN_U2CTRL0(1) | OPERACAKE_PIN_U2CTRL1(0)) @@ -49,10 +49,10 @@ #define OPERACAKE_PORT_B3 (OPERACAKE_PIN_U3CTRL0(0) | OPERACAKE_PIN_U3CTRL1(1)) #define OPERACAKE_PORT_B4 (OPERACAKE_PIN_U3CTRL0(1) | OPERACAKE_PIN_U3CTRL1(1)) -#define OPERACAKE_SAMESIDE OPERACAKE_PIN_U1CTRL(1) -#define OPERACAKE_CROSSOVER OPERACAKE_PIN_U1CTRL(0) -#define OPERACAKE_EN_LEDS (OPERACAKE_PIN_LEDEN2(1) | OPERACAKE_PIN_LEDEN2(0)) -#define OPERACAKE_GPIO_ENABLE OPERACAKE_PIN_OE(0) +#define OPERACAKE_SAMESIDE OPERACAKE_PIN_U1CTRL(1) +#define OPERACAKE_CROSSOVER OPERACAKE_PIN_U1CTRL(0) +#define OPERACAKE_EN_LEDS (OPERACAKE_PIN_LEDEN2(1) | OPERACAKE_PIN_LEDEN2(0)) +#define OPERACAKE_GPIO_ENABLE OPERACAKE_PIN_OE(0) #define OPERACAKE_GPIO_DISABLE OPERACAKE_PIN_OE(1) #define OPERACAKE_REG_INPUT 0x00 @@ -60,9 +60,9 @@ #define OPERACAKE_REG_POLARITY 0x02 #define OPERACAKE_REG_CONFIG 0x03 -#define OPERACAKE_DEFAULT_OUTPUT (OPERACAKE_GPIO_DISABLE | OPERACAKE_SAMESIDE \ - | OPERACAKE_PORT_A1 | OPERACAKE_PORT_B1 \ - | OPERACAKE_EN_LEDS) +#define OPERACAKE_DEFAULT_OUTPUT \ + (OPERACAKE_GPIO_DISABLE | OPERACAKE_SAMESIDE | OPERACAKE_PORT_A1 | \ + OPERACAKE_PORT_B1 | OPERACAKE_EN_LEDS) #define OPERACAKE_CONFIG_ALL_OUTPUT (0x00) // Leave LED bits as outputs #define OPERACAKE_CONFIG_GPIO_INPUTS (0x7C) @@ -80,9 +80,9 @@ static uint8_t current_range = INVALID_RANGE; i2c_bus_t* const oc_bus = &i2c0; enum operacake_switching_mode { - MODE_MANUAL = 0, + MODE_MANUAL = 0, MODE_FREQUENCY = 1, - MODE_TIME = 2, + MODE_TIME = 2, }; struct operacake_state { @@ -96,18 +96,20 @@ struct operacake_state operacake_boards[OPERACAKE_MAX_BOARDS]; bool allow_gpio_mode = true; /* read single register */ -uint8_t operacake_read_reg(i2c_bus_t* const bus, uint8_t address, uint8_t reg) { +uint8_t operacake_read_reg(i2c_bus_t* const bus, uint8_t address, uint8_t reg) +{ // Convert from Opera Cake address (0-7) to I2C address address += OPERACAKE_ADDRESS_DEFAULT; - const uint8_t data_tx[] = { reg }; - uint8_t data_rx[] = { 0x00 }; + const uint8_t data_tx[] = {reg}; + uint8_t data_rx[] = {0x00}; i2c_bus_transfer(bus, address, data_tx, 1, data_rx, 1); return data_rx[0]; } /* Write to one of the PCA9557 registers */ -void operacake_write_reg(i2c_bus_t* const bus, uint8_t address, uint8_t reg, uint8_t value) { +void operacake_write_reg(i2c_bus_t* const bus, uint8_t address, uint8_t reg, uint8_t value) +{ // Convert from Opera Cake address (0-7) to I2C address address += OPERACAKE_ADDRESS_DEFAULT; @@ -115,19 +117,26 @@ void operacake_write_reg(i2c_bus_t* const bus, uint8_t address, uint8_t reg, uin i2c_bus_transfer(bus, address, data, 2, NULL, 0); } -uint8_t operacake_init(bool allow_gpio) { +uint8_t operacake_init(bool allow_gpio) +{ /* Find connected operacakes */ for (int addr = 0; addr < 8; addr++) { - operacake_write_reg(oc_bus, addr, OPERACAKE_REG_OUTPUT, - OPERACAKE_DEFAULT_OUTPUT); - operacake_write_reg(oc_bus, addr, OPERACAKE_REG_CONFIG, - OPERACAKE_CONFIG_ALL_OUTPUT); + operacake_write_reg( + oc_bus, + addr, + OPERACAKE_REG_OUTPUT, + OPERACAKE_DEFAULT_OUTPUT); + operacake_write_reg( + oc_bus, + addr, + OPERACAKE_REG_CONFIG, + OPERACAKE_CONFIG_ALL_OUTPUT); uint8_t reg = operacake_read_reg(oc_bus, addr, OPERACAKE_REG_CONFIG); operacake_boards[addr].present = (reg == OPERACAKE_CONFIG_ALL_OUTPUT); - operacake_boards[addr].mode = MODE_MANUAL; - operacake_boards[addr].PA = OPERACAKE_PORT_A1; - operacake_boards[addr].PB = OPERACAKE_PORT_B1; + operacake_boards[addr].mode = MODE_MANUAL; + operacake_boards[addr].PA = OPERACAKE_PORT_A1; + operacake_boards[addr].PB = OPERACAKE_PORT_B1; } allow_gpio_mode = allow_gpio; if (allow_gpio) { @@ -136,14 +145,16 @@ uint8_t operacake_init(bool allow_gpio) { return 0; } -bool operacake_is_board_present(uint8_t address) { +bool operacake_is_board_present(uint8_t address) +{ if (address >= OPERACAKE_MAX_BOARDS) return false; return operacake_boards[address].present; } -void operacake_get_boards(uint8_t *addresses) { +void operacake_get_boards(uint8_t* addresses) +{ int count = 0; for (int i = 0; i < OPERACAKE_MAX_BOARDS; i++) { addresses[i] = OPERACAKE_ADDRESS_INVALID; @@ -154,25 +165,26 @@ void operacake_get_boards(uint8_t *addresses) { } } -uint8_t port_to_pins(uint8_t port) { - switch(port) { - case OPERACAKE_PA1: - return OPERACAKE_PORT_A1; - case OPERACAKE_PA2: - return OPERACAKE_PORT_A2; - case OPERACAKE_PA3: - return OPERACAKE_PORT_A3; - case OPERACAKE_PA4: - return OPERACAKE_PORT_A4; +uint8_t port_to_pins(uint8_t port) +{ + switch (port) { + case OPERACAKE_PA1: + return OPERACAKE_PORT_A1; + case OPERACAKE_PA2: + return OPERACAKE_PORT_A2; + case OPERACAKE_PA3: + return OPERACAKE_PORT_A3; + case OPERACAKE_PA4: + return OPERACAKE_PORT_A4; - case OPERACAKE_PB1: - return OPERACAKE_PORT_B1; - case OPERACAKE_PB2: - return OPERACAKE_PORT_B2; - case OPERACAKE_PB3: - return OPERACAKE_PORT_B3; - case OPERACAKE_PB4: - return OPERACAKE_PORT_B4; + case OPERACAKE_PB1: + return OPERACAKE_PORT_B1; + case OPERACAKE_PB2: + return OPERACAKE_PORT_B2; + case OPERACAKE_PB3: + return OPERACAKE_PORT_B3; + case OPERACAKE_PB4: + return OPERACAKE_PORT_B4; } return 0xFF; } @@ -188,8 +200,8 @@ uint8_t operacake_activate_ports(uint8_t address, uint8_t PA, uint8_t PB) return 1; } /* Ensure PA and PB are on opposite sides. */ - if (((PA <= OPERACAKE_PA4) && (PB <= OPERACAKE_PA4)) - || ((PA > OPERACAKE_PA4) && (PB > OPERACAKE_PA4))) { + if (((PA <= OPERACAKE_PA4) && (PB <= OPERACAKE_PA4)) || + ((PA > OPERACAKE_PA4) && (PB > OPERACAKE_PA4))) { return 1; } @@ -207,7 +219,8 @@ uint8_t operacake_activate_ports(uint8_t address, uint8_t PA, uint8_t PB) return 0; } -void operacake_set_mode(uint8_t address, uint8_t mode) { +void operacake_set_mode(uint8_t address, uint8_t mode) +{ if (address >= OPERACAKE_MAX_BOARDS) return; @@ -216,12 +229,25 @@ void operacake_set_mode(uint8_t address, uint8_t mode) { if (mode == MODE_TIME) { // Switch Opera Cake to pin-control mode - uint8_t config_pins = (uint8_t)~(OPERACAKE_PIN_OE(1) | OPERACAKE_PIN_LEDEN(1) | OPERACAKE_PIN_LEDEN2(1)); + uint8_t config_pins = (uint8_t) ~( + OPERACAKE_PIN_OE(1) | OPERACAKE_PIN_LEDEN(1) | + OPERACAKE_PIN_LEDEN2(1)); operacake_write_reg(oc_bus, address, OPERACAKE_REG_CONFIG, config_pins); - operacake_write_reg(oc_bus, address, OPERACAKE_REG_OUTPUT, OPERACAKE_GPIO_ENABLE | OPERACAKE_EN_LEDS); + operacake_write_reg( + oc_bus, + address, + OPERACAKE_REG_OUTPUT, + OPERACAKE_GPIO_ENABLE | OPERACAKE_EN_LEDS); } else { - operacake_write_reg(oc_bus, address, OPERACAKE_REG_CONFIG, OPERACAKE_CONFIG_ALL_OUTPUT); - operacake_activate_ports(address, operacake_boards[address].PA, operacake_boards[address].PB); + operacake_write_reg( + oc_bus, + address, + OPERACAKE_REG_CONFIG, + OPERACAKE_CONFIG_ALL_OUTPUT); + operacake_activate_ports( + address, + operacake_boards[address].PA, + operacake_boards[address].PB); } // If any boards are in MODE_TIME, enable the sctimer events. @@ -233,7 +259,8 @@ void operacake_set_mode(uint8_t address, uint8_t mode) { operacake_sctimer_enable(enable_sctimer); } -uint8_t operacake_get_mode(uint8_t address) { +uint8_t operacake_get_mode(uint8_t address) +{ if (address >= OPERACAKE_MAX_BOARDS) return 0; @@ -250,8 +277,8 @@ uint8_t operacake_set_ports(uint8_t address, uint8_t PA, uint8_t PB) return 1; } /* Ensure PA and PB are on opposite sides. */ - if (((PA <= OPERACAKE_PA4) && (PB <= OPERACAKE_PA4)) - || ((PA > OPERACAKE_PA4) && (PB > OPERACAKE_PA4))) { + if (((PA <= OPERACAKE_PA4) && (PB <= OPERACAKE_PA4)) || + ((PA > OPERACAKE_PA4) && (PB > OPERACAKE_PA4))) { return 1; } @@ -280,8 +307,9 @@ typedef struct { static operacake_range ranges[MAX_OPERACAKE_RANGES * sizeof(operacake_range)]; static uint8_t range_idx = 0; -uint8_t operacake_add_range(uint16_t freq_min, uint16_t freq_max, uint8_t port) { - if(range_idx >= MAX_OPERACAKE_RANGES) { +uint8_t operacake_add_range(uint16_t freq_min, uint16_t freq_max, uint8_t port) +{ + if (range_idx >= MAX_OPERACAKE_RANGES) { return 1; } ranges[range_idx].freq_min = freq_min; @@ -296,20 +324,21 @@ uint8_t operacake_add_range(uint16_t freq_min, uint16_t freq_max, uint8_t port) void operacake_clear_ranges(void) { - range_idx = 0; + range_idx = 0; } #define FREQ_ONE_MHZ (1000000ull) -uint8_t operacake_set_range(uint32_t freq_mhz) { - if(range_idx == 0) { +uint8_t operacake_set_range(uint32_t freq_mhz) +{ + if (range_idx == 0) { return 1; } int range; - for(range=0; range= ranges[range].freq_min) - && (freq_mhz <= ranges[range].freq_max)) { + for (range = 0; range < range_idx; range++) { + if ((freq_mhz >= ranges[range].freq_min) && + (freq_mhz <= ranges[range].freq_max)) { break; } } @@ -317,13 +346,17 @@ uint8_t operacake_set_range(uint32_t freq_mhz) { if (range == range_idx) { range--; } - if(range == current_range) { + if (range == current_range) { return 1; } for (int i = 0; i < OPERACAKE_MAX_BOARDS; i++) { - if (operacake_is_board_present(i) && operacake_get_mode(i) == MODE_FREQUENCY) { - operacake_activate_ports(i, ranges[range].portA, ranges[range].portB); + if (operacake_is_board_present(i) && + operacake_get_mode(i) == MODE_FREQUENCY) { + operacake_activate_ports( + i, + ranges[range].portA, + ranges[range].portB); break; } } @@ -339,7 +372,7 @@ uint16_t gpio_test(uint8_t address) { uint8_t i, reg, bit_mask, gpio_mask = 0x1F; uint16_t result = 0; - if(!allow_gpio_mode) + if (!allow_gpio_mode) return 0xFFFF; scu_pinmux(SCU_PINMUX_GPIO3_8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); @@ -358,17 +391,23 @@ uint16_t gpio_test(uint8_t address) // Setup I2C to put it in GPIO mode reg = (OPERACAKE_GPIO_ENABLE | OPERACAKE_EN_LEDS); operacake_write_reg(oc_bus, address, OPERACAKE_REG_OUTPUT, reg); - operacake_write_reg(oc_bus, address, OPERACAKE_REG_CONFIG, - OPERACAKE_CONFIG_GPIO_INPUTS); - operacake_write_reg(oc_bus, address, OPERACAKE_REG_POLARITY, - OPERACAKE_POLARITY_NORMAL); + operacake_write_reg( + oc_bus, + address, + OPERACAKE_REG_CONFIG, + OPERACAKE_CONFIG_GPIO_INPUTS); + operacake_write_reg( + oc_bus, + address, + OPERACAKE_REG_POLARITY, + OPERACAKE_POLARITY_NORMAL); // clear state - for(i=0; i<5; i++) { + for (i = 0; i < 5; i++) { gpio_output(&gpio_pins[i]); gpio_write(&gpio_pins[i], 0); } // Test each pin separately - for(i=0; i<5; i++) { + for (i = 0; i < 5; i++) { // Set pin high gpio_write(&gpio_pins[i], 1); // check input @@ -377,12 +416,12 @@ uint16_t gpio_test(uint8_t address) reg &= gpio_mask; bit_mask = 1 << i; result <<= 1; - if(!(reg & bit_mask)) { + if (!(reg & bit_mask)) { // Is the correct bit set? result |= 1; } result <<= 1; - if(reg & ~bit_mask) { + if (reg & ~bit_mask) { // Are any other bits set? result |= 1; } @@ -394,21 +433,27 @@ uint16_t gpio_test(uint8_t address) reg >>= 2; reg &= gpio_mask; bit_mask = 1 << i; - if(reg & bit_mask) { + if (reg & bit_mask) { // Is the correct bit clear? result |= 1; } } // clean up - for(i=0; i<5; i++) { + for (i = 0; i < 5; i++) { gpio_input(&gpio_pins[i]); } // Put it back in to I2C mode and set default pins - operacake_write_reg(oc_bus, address, OPERACAKE_REG_CONFIG, - OPERACAKE_CONFIG_ALL_OUTPUT); - operacake_write_reg(oc_bus, address, OPERACAKE_REG_OUTPUT, - OPERACAKE_DEFAULT_OUTPUT); + operacake_write_reg( + oc_bus, + address, + OPERACAKE_REG_CONFIG, + OPERACAKE_CONFIG_ALL_OUTPUT); + operacake_write_reg( + oc_bus, + address, + OPERACAKE_REG_OUTPUT, + OPERACAKE_DEFAULT_OUTPUT); return result; } diff --git a/firmware/common/operacake.h b/firmware/common/operacake.h index 3b2621bb..5d8c1255 100644 --- a/firmware/common/operacake.h +++ b/firmware/common/operacake.h @@ -23,8 +23,7 @@ #define __OPERACAKE_H #ifdef __cplusplus -extern "C" -{ +extern "C" { #endif #include @@ -44,7 +43,7 @@ extern "C" uint8_t operacake_init(bool allow_gpio); bool operacake_is_board_present(uint8_t address); -void operacake_get_boards(uint8_t *addresses); +void operacake_get_boards(uint8_t* addresses); void operacake_set_mode(uint8_t address, uint8_t mode); uint8_t operacake_get_mode(uint8_t address); uint8_t operacake_set_ports(uint8_t address, uint8_t PA, uint8_t PB); diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c index fd5b9a0b..043d490d 100644 --- a/firmware/common/operacake_sctimer.c +++ b/firmware/common/operacake_sctimer.c @@ -30,9 +30,8 @@ #include #include "sct.h" - -#define U1CTRL_SET SCT_OUT14_SET -#define U1CTRL_CLR SCT_OUT14_CLR +#define U1CTRL_SET SCT_OUT14_SET +#define U1CTRL_CLR SCT_OUT14_CLR #define U2CTRL0_SET SCT_OUT13_SET #define U2CTRL0_CLR SCT_OUT13_CLR #define U2CTRL1_SET SCT_OUT12_SET @@ -53,7 +52,8 @@ static uint32_t default_output = 0; * To trigger the antenna switching synchronously with the sample clock, the * SGPIO is configured to output its clock (f=2 * sample clock) to the SCTimer. */ -void operacake_sctimer_init() { +void operacake_sctimer_init() +{ // We start by resetting the SCTimer RESET_CTRL1 = RESET_CTRL1_SCT_RST; @@ -67,33 +67,39 @@ void operacake_sctimer_init() { // this delay may need to be increased. delay(8); - // Pin definitions for the HackRF // U2CTRL0 - scu_pinmux(P7_4, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); + scu_pinmux( + P7_4, + SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); // U2CTRL1 - scu_pinmux(P7_5, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); + scu_pinmux( + P7_5, + SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); // U3CTRL0 - scu_pinmux(P7_6, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); + scu_pinmux( + P7_6, + SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); // U3CTRL1 - scu_pinmux(P7_7, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); + scu_pinmux( + P7_7, + SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); // U1CTRL - scu_pinmux(P7_0, SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); - + scu_pinmux( + P7_0, + SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_FUNCTION1); // Configure the SGPIO to output the clock (f=2 * sample clock) on pin 12 - SGPIO_OUT_MUX_CFG12 = - SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode - SGPIO_OUT_MUX_CFG_P_OE_CFG(0); // gpio_oe + SGPIO_OUT_MUX_CFG12 = SGPIO_OUT_MUX_CFG_P_OUT_CFG(0x08) | // clkout output mode + SGPIO_OUT_MUX_CFG_P_OE_CFG(0); // gpio_oe SGPIO_GPIO_OENREG |= BIT12; // Use the GIMA to connect the SGPIO clock to the SCTimer - GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1 + GIMA_CTIN_1_IN = 0x2 << 4; // Route SGPIO12 to SCTIN1 // We configure this register first, because the user manual says to - SCT_CONFIG |= SCT_CONFIG_UNIFY_32_BIT - | SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK - | SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1; + SCT_CONFIG |= SCT_CONFIG_UNIFY_32_BIT | SCT_CONFIG_CLKMODE_PRESCALED_BUS_CLOCK | + SCT_CONFIG_CKSEL_RISING_EDGES_ON_INPUT_1; // Halt the SCTimer to enable it to be configured SCT_CTRL = SCT_CTRL_HALT_L(1); @@ -108,32 +114,34 @@ void operacake_sctimer_init() { SCT_CTRL &= ~SCT_CTRL_HALT_L(1); } -static uint32_t operacake_sctimer_port_to_output(uint8_t port) { +static uint32_t operacake_sctimer_port_to_output(uint8_t port) +{ int bit0 = (port >> 0) & 1; int bit1 = (port >> 1) & 1; int bit2 = (port >> 2) & 1; - return (bit0 << 11) | (bit0 << 13) | - (bit1 << 8) | (bit1 << 12) | - (((~bit2)&1) << 14); + return (bit0 << 11) | (bit0 << 13) | (bit1 << 8) | (bit1 << 12) | + (((~bit2) & 1) << 14); } -void operacake_sctimer_enable(bool enable) { +void operacake_sctimer_enable(bool enable) +{ SCT_CTRL = SCT_CTRL_HALT_L(1); SCT_STATE = enable; SCT_CTRL &= ~SCT_CTRL_HALT_L(1); } -void operacake_sctimer_set_dwell_times(struct operacake_dwell_times *times, int n) { - +void operacake_sctimer_set_dwell_times(struct operacake_dwell_times* times, int n) +{ SCT_CTRL = SCT_CTRL_HALT_L(1); uint32_t counter = 0; - uint32_t bit0_set = 0, bit0_clr = 0, bit1_set = 0, bit1_clr = 0, bit2_set = 0, bit2_clr = 0; + uint32_t bit0_set = 0, bit0_clr = 0, bit1_set = 0, bit1_clr = 0, bit2_set = 0, + bit2_clr = 0; for (int i = 0; i < n; i++) { // Enable event i in state 1, set to match on match register i SCT_EVn_STATE(i) = SCT_EVn_STATE_STATEMSK1(1); - SCT_EVn_CTRL(i) = SCT_EVn_CTRL_COMBMODE_MATCH | SCT_EVn_CTRL_MATCHSEL(i); + SCT_EVn_CTRL(i) = SCT_EVn_CTRL_COMBMODE_MATCH | SCT_EVn_CTRL_MATCHSEL(i); // Calculate the counter value to match on counter += times[i].dwell; @@ -143,7 +151,7 @@ void operacake_sctimer_set_dwell_times(struct operacake_dwell_times *times, int if (i == 0) counter -= 1; - SCT_MATCHn(i) = counter; + SCT_MATCHn(i) = counter; SCT_MATCHRELn(i) = counter; // The match event selects the *next* port, so retreive that here. @@ -151,7 +159,7 @@ void operacake_sctimer_set_dwell_times(struct operacake_dwell_times *times, int if (i == n - 1) { port = times[0].port; } else { - port = times[i+1].port; + port = times[i + 1].port; } int bit0 = (port >> 0) & 1; @@ -159,15 +167,15 @@ void operacake_sctimer_set_dwell_times(struct operacake_dwell_times *times, int int bit2 = (port >> 2) & 1; // Find bits to set/clear on event i - bit0_set |= SCT_OUTn_SETm( bit0, i); + bit0_set |= SCT_OUTn_SETm(bit0, i); bit0_clr |= SCT_OUTn_CLRm(~bit0, i); - bit1_set |= SCT_OUTn_SETm( bit1, i); + bit1_set |= SCT_OUTn_SETm(bit1, i); bit1_clr |= SCT_OUTn_CLRm(~bit1, i); // (U1CTRL is inverted) bit2_set |= SCT_OUTn_SETm(~bit2, i); - bit2_clr |= SCT_OUTn_CLRm( bit2, i); + bit2_clr |= SCT_OUTn_CLRm(bit2, i); } // Apply event set/clear mappings @@ -179,20 +187,21 @@ void operacake_sctimer_set_dwell_times(struct operacake_dwell_times *times, int U2CTRL1_CLR = bit1_clr; U3CTRL1_SET = bit1_set; U3CTRL1_CLR = bit1_clr; - U1CTRL_SET = bit2_set; - U1CTRL_CLR = bit2_clr; + U1CTRL_SET = bit2_set; + U1CTRL_CLR = bit2_clr; // Set output pins to select the first port in the list default_output = operacake_sctimer_port_to_output(times[0].port); SCT_OUTPUT = default_output; // Reset counter on final event - SCT_LIMIT = (1 << (n-1)); + SCT_LIMIT = (1 << (n - 1)); SCT_CTRL &= ~SCT_CTRL_HALT_L(1); } -void operacake_sctimer_stop() { +void operacake_sctimer_stop() +{ // Halt timer SCT_CTRL |= SCT_CTRL_HALT_L(1); } @@ -203,7 +212,8 @@ void operacake_sctimer_stop() { * called by set_transceiver_mode so the HackRF starts capturing with the * same antenna selected each time. */ -void operacake_sctimer_reset_state() { +void operacake_sctimer_reset_state() +{ SCT_CTRL |= SCT_CTRL_HALT_L(1); // Clear the counter value diff --git a/firmware/common/operacake_sctimer.h b/firmware/common/operacake_sctimer.h index 90483585..10e6ba2f 100644 --- a/firmware/common/operacake_sctimer.h +++ b/firmware/common/operacake_sctimer.h @@ -34,7 +34,7 @@ struct operacake_dwell_times { void operacake_sctimer_init(); void operacake_sctimer_enable(bool enable); -void operacake_sctimer_set_dwell_times(struct operacake_dwell_times *times, int n); +void operacake_sctimer_set_dwell_times(struct operacake_dwell_times* times, int n); void operacake_sctimer_stop(); void operacake_sctimer_reset_state(); diff --git a/firmware/common/portapack.c b/firmware/common/portapack.c index 44c617ce..957056bd 100644 --- a/firmware/common/portapack.c +++ b/firmware/common/portapack.c @@ -26,9 +26,10 @@ #include -static void portapack_sleep_milliseconds(const uint32_t milliseconds) { +static void portapack_sleep_milliseconds(const uint32_t milliseconds) +{ /* NOTE: Naively assumes 204 MHz instruction cycle clock and five instructions per count */ - delay(milliseconds * 40800); + delay(milliseconds * 40800); } // clang-format off @@ -41,6 +42,7 @@ static struct gpio_t gpio_unused = GPIO(5, 7); /* P2_8 */ static struct gpio_t gpio_lcd_rdx = GPIO(5, 4); /* P2_4 */ static struct gpio_t gpio_lcd_wrx = GPIO(1, 10); /* P2_9 */ static struct gpio_t gpio_dir = GPIO(1, 13); /* P2_13 */ + // clang-format on typedef struct portapack_if_t { @@ -54,39 +56,44 @@ typedef struct portapack_if_t { } portapack_if_t; static portapack_if_t portapack_if = { - .gpio_dir = &gpio_dir, - .gpio_lcd_rdx = &gpio_lcd_rdx, - .gpio_lcd_wrx = &gpio_lcd_wrx, - .gpio_io_stbx = &gpio_io_stbx, - .gpio_addr = &gpio_addr, - .gpio_port_data = GPIO_LPC_PORT(3), - .io_reg = 0x03, + .gpio_dir = &gpio_dir, + .gpio_lcd_rdx = &gpio_lcd_rdx, + .gpio_lcd_wrx = &gpio_lcd_wrx, + .gpio_io_stbx = &gpio_io_stbx, + .gpio_addr = &gpio_addr, + .gpio_port_data = GPIO_LPC_PORT(3), + .io_reg = 0x03, }; /* NOTE: Code below assumes the shift value is "8". */ #define GPIO_DATA_SHIFT (8) static const uint32_t gpio_data_mask = 0xFFU << GPIO_DATA_SHIFT; -static void portapack_data_mask_set() { +static void portapack_data_mask_set() +{ portapack_if.gpio_port_data->mask = ~gpio_data_mask; } -static void portapack_data_write_low(const uint32_t value) { +static void portapack_data_write_low(const uint32_t value) +{ portapack_if.gpio_port_data->mpin = (value << GPIO_DATA_SHIFT); } -static void portapack_data_write_high(const uint32_t value) { +static void portapack_data_write_high(const uint32_t value) +{ /* NOTE: Assumes no other bits in the port are masked. */ /* NOTE: Assumes that bits 15 through 8 are masked. */ portapack_if.gpio_port_data->mpin = value; } -static void portapack_dir_read() { +static void portapack_dir_read() +{ portapack_if.gpio_port_data->dir &= ~gpio_data_mask; gpio_set(portapack_if.gpio_dir); } -static void portapack_dir_write() { +static void portapack_dir_write() +{ gpio_clear(portapack_if.gpio_dir); portapack_if.gpio_port_data->dir |= gpio_data_mask; /* TODO: Manipulating DIR[3] makes me queasy. The RFFC5072 DATA pin @@ -97,66 +104,76 @@ static void portapack_dir_write() { */ } -__attribute__((unused)) static void portapack_lcd_rd_assert() { +__attribute__((unused)) static void portapack_lcd_rd_assert() +{ gpio_clear(portapack_if.gpio_lcd_rdx); } -static void portapack_lcd_rd_deassert() { +static void portapack_lcd_rd_deassert() +{ gpio_set(portapack_if.gpio_lcd_rdx); } -static void portapack_lcd_wr_assert() { +static void portapack_lcd_wr_assert() +{ gpio_clear(portapack_if.gpio_lcd_wrx); } -static void portapack_lcd_wr_deassert() { +static void portapack_lcd_wr_deassert() +{ gpio_set(portapack_if.gpio_lcd_wrx); } -static void portapack_io_stb_assert() { +static void portapack_io_stb_assert() +{ gpio_clear(portapack_if.gpio_io_stbx); } -static void portapack_io_stb_deassert() { +static void portapack_io_stb_deassert() +{ gpio_set(portapack_if.gpio_io_stbx); } -static void portapack_addr(const bool value) { +static void portapack_addr(const bool value) +{ gpio_write(portapack_if.gpio_addr, value); } -static void portapack_lcd_command(const uint32_t value) { - portapack_data_write_high(0); /* Drive high byte (with zero -- don't care) */ - portapack_dir_write(); /* Turn around data bus, MCU->CPLD */ - portapack_addr(0); /* Indicate command */ +static void portapack_lcd_command(const uint32_t value) +{ + portapack_data_write_high(0); /* Drive high byte (with zero -- don't care) */ + portapack_dir_write(); /* Turn around data bus, MCU->CPLD */ + portapack_addr(0); /* Indicate command */ __asm__("nop"); __asm__("nop"); __asm__("nop"); - portapack_lcd_wr_assert(); /* Latch high byte */ + portapack_lcd_wr_assert(); /* Latch high byte */ - portapack_data_write_low(value); /* Drive low byte (pass-through) */ + portapack_data_write_low(value); /* Drive low byte (pass-through) */ __asm__("nop"); __asm__("nop"); __asm__("nop"); - portapack_lcd_wr_deassert(); /* Complete write operation */ + portapack_lcd_wr_deassert(); /* Complete write operation */ - portapack_addr(1); /* Set up for data phase (most likely after a command) */ + portapack_addr(1); /* Set up for data phase (most likely after a command) */ } -static void portapack_lcd_write_data(const uint32_t value) { +static void portapack_lcd_write_data(const uint32_t value) +{ // NOTE: Assumes and DIR=0 and ADDR=1 from command phase. - portapack_data_write_high(value); /* Drive high byte */ + portapack_data_write_high(value); /* Drive high byte */ __asm__("nop"); - portapack_lcd_wr_assert(); /* Latch high byte */ + portapack_lcd_wr_assert(); /* Latch high byte */ - portapack_data_write_low(value); /* Drive low byte (pass-through) */ + portapack_data_write_low(value); /* Drive low byte (pass-through) */ __asm__("nop"); __asm__("nop"); __asm__("nop"); - portapack_lcd_wr_deassert(); /* Complete write operation */ + portapack_lcd_wr_deassert(); /* Complete write operation */ } -static void portapack_io_write(const bool address, const uint_fast16_t value) { +static void portapack_io_write(const bool address, const uint_fast16_t value) +{ portapack_data_write_low(value); portapack_dir_write(); portapack_addr(address); @@ -170,7 +187,8 @@ static void portapack_io_write(const bool address, const uint_fast16_t value) { portapack_io_stb_deassert(); } -static void portapack_if_init() { +static void portapack_if_init() +{ portapack_data_mask_set(); portapack_data_write_high(0); @@ -197,16 +215,17 @@ static void portapack_if_init() { scu_pinmux(SCU_PINMUX_PP_D6, SCU_CONF_FUNCTION0 | SCU_GPIO_PDN); scu_pinmux(SCU_PINMUX_PP_D7, SCU_CONF_FUNCTION0 | SCU_GPIO_PDN); - scu_pinmux(SCU_PINMUX_PP_DIR, SCU_CONF_FUNCTION0 | SCU_GPIO_NOPULL); + scu_pinmux(SCU_PINMUX_PP_DIR, SCU_CONF_FUNCTION0 | SCU_GPIO_NOPULL); scu_pinmux(SCU_PINMUX_PP_LCD_RDX, SCU_CONF_FUNCTION4 | SCU_GPIO_NOPULL); scu_pinmux(SCU_PINMUX_PP_LCD_WRX, SCU_CONF_FUNCTION0 | SCU_GPIO_NOPULL); scu_pinmux(SCU_PINMUX_PP_IO_STBX, SCU_CONF_FUNCTION4 | SCU_GPIO_NOPULL); - scu_pinmux(SCU_PINMUX_PP_ADDR, SCU_CONF_FUNCTION4 | SCU_GPIO_NOPULL); + scu_pinmux(SCU_PINMUX_PP_ADDR, SCU_CONF_FUNCTION4 | SCU_GPIO_NOPULL); /* scu_pinmux(SCU_PINMUX_PP_LCD_TE, SCU_CONF_FUNCTION4 | SCU_GPIO_NOPULL); */ /* scu_pinmux(SCU_PINMUX_PP_UNUSED, SCU_CONF_FUNCTION4 | SCU_GPIO_NOPULL); */ } -static void portapack_lcd_reset_state(const bool active) { +static void portapack_lcd_reset_state(const bool active) +{ portapack_if.io_reg = (portapack_if.io_reg & 0xfe) | (active ? (1 << 0) : 0); portapack_io_write(1, portapack_if.io_reg); } @@ -214,15 +233,16 @@ static void portapack_lcd_reset_state(const bool active) { static void portapack_lcd_data_write_command_and_data( const uint_fast8_t command, const uint8_t* data, - const size_t data_count -) { + const size_t data_count) +{ portapack_lcd_command(command); - for(size_t i=0; i> 8), (start & 0xff), - (end >> 8), (end & 0xff) - }; +static void portapack_lcd_set( + const uint_fast8_t command, + const uint_fast16_t start, + const uint_fast16_t end) +{ + const uint8_t data[] = {(start >> 8), (start & 0xff), (end >> 8), (end & 0xff)}; portapack_lcd_data_write_command_and_data(command, data, ARRAY_SIZEOF(data)); } -static void portapack_lcd_caset(const uint_fast16_t start_column, const uint_fast16_t end_column) { +static void portapack_lcd_caset( + const uint_fast16_t start_column, + const uint_fast16_t end_column) +{ portapack_lcd_set(0x2a, start_column, end_column); } -static void portapack_lcd_paset(const uint_fast16_t start_page, const uint_fast16_t end_page) { +static void portapack_lcd_paset( + const uint_fast16_t start_page, + const uint_fast16_t end_page) +{ portapack_lcd_set(0x2b, start_page, end_page); } -static void portapack_lcd_start_ram_write( - const ui_rect_t rect -) { - portapack_lcd_caset(rect.point.x, rect.point.x + rect.size.width - 1); +static void portapack_lcd_start_ram_write(const ui_rect_t rect) +{ + portapack_lcd_caset(rect.point.x, rect.point.x + rect.size.width - 1); portapack_lcd_paset(rect.point.y, rect.point.y + rect.size.height - 1); portapack_lcd_ramwr_start(); } -static void portapack_lcd_write_pixel(const ui_color_t pixel) { +static void portapack_lcd_write_pixel(const ui_color_t pixel) +{ portapack_lcd_write_data(pixel.v); } -static void portapack_lcd_write_pixels_color(const ui_color_t c, size_t n) { - while(n--) { +static void portapack_lcd_write_pixels_color(const ui_color_t c, size_t n) +{ + while (n--) { portapack_lcd_write_data(c.v); } } -static void portapack_lcd_wake() { +static void portapack_lcd_wake() +{ portapack_lcd_sleep_out(); portapack_lcd_display_on(); } -static void portapack_lcd_reset() { +static void portapack_lcd_reset() +{ portapack_lcd_reset_state(false); portapack_sleep_milliseconds(1); portapack_lcd_reset_state(true); @@ -289,7 +321,8 @@ static void portapack_lcd_reset() { portapack_sleep_milliseconds(120); } -static void portapack_lcd_init() { +static void portapack_lcd_init() +{ // LCDs are configured for IM[2:0] = 001 // 8080-I system, 16-bit parallel bus @@ -300,30 +333,30 @@ static void portapack_lcd_init() { // Power control B // 0 // PCEQ=1, DRV_ena=0, Power control=3 - const uint8_t cmd_cf[] = { 0x00, 0xD9, 0x30 }; + const uint8_t cmd_cf[] = {0x00, 0xD9, 0x30}; portapack_lcd_data_write_command_and_data(0xCF, cmd_cf, ARRAY_SIZEOF(cmd_cf)); // Power on sequence control - const uint8_t cmd_ed[] = { 0x64, 0x03, 0x12, 0x81 }; + const uint8_t cmd_ed[] = {0x64, 0x03, 0x12, 0x81}; portapack_lcd_data_write_command_and_data(0xED, cmd_ed, ARRAY_SIZEOF(cmd_ed)); // Driver timing control A - const uint8_t cmd_e8[] = { 0x85, 0x10, 0x78 }; + const uint8_t cmd_e8[] = {0x85, 0x10, 0x78}; portapack_lcd_data_write_command_and_data(0xE8, cmd_e8, ARRAY_SIZEOF(cmd_e8)); // Power control A - const uint8_t cmd_cb[] = { 0x39, 0x2C, 0x00, 0x34, 0x02 }; + const uint8_t cmd_cb[] = {0x39, 0x2C, 0x00, 0x34, 0x02}; portapack_lcd_data_write_command_and_data(0xCB, cmd_cb, ARRAY_SIZEOF(cmd_cb)); // Pump ratio control - const uint8_t cmd_f7[] = { 0x20 }; + const uint8_t cmd_f7[] = {0x20}; portapack_lcd_data_write_command_and_data(0xF7, cmd_f7, ARRAY_SIZEOF(cmd_f7)); // Driver timing control B - const uint8_t cmd_ea[] = { 0x00, 0x00 }; + const uint8_t cmd_ea[] = {0x00, 0x00}; portapack_lcd_data_write_command_and_data(0xEA, cmd_ea, ARRAY_SIZEOF(cmd_ea)); - const uint8_t cmd_b1[] = { 0x00, 0x1B }; + const uint8_t cmd_b1[] = {0x00, 0x1B}; portapack_lcd_data_write_command_and_data(0xB1, cmd_b1, ARRAY_SIZEOF(cmd_b1)); // Blanking Porch Control @@ -331,7 +364,7 @@ static void portapack_lcd_init() { // VBP = 0b0000010 = 2 (number of HSYNC of vertical back porch) // HFP = 0b0001010 = 10 (number of DOTCLOCK of horizontal front porch) // HBP = 0b0010100 = 20 (number of DOTCLOCK of horizontal back porch) - const uint8_t cmd_b5[] = { 0x02, 0x02, 0x0a, 0x14 }; + const uint8_t cmd_b5[] = {0x02, 0x02, 0x0a, 0x14}; portapack_lcd_data_write_command_and_data(0xB5, cmd_b5, ARRAY_SIZEOF(cmd_b5)); // Display Function Control @@ -344,42 +377,42 @@ static void portapack_lcd_init() { // REV = 1 (normally white) // NL = 0b100111 (default) // PCDIV = 0b000000 (default?) - const uint8_t cmd_b6[] = { 0x0A, 0xA2, 0x27, 0x00 }; + const uint8_t cmd_b6[] = {0x0A, 0xA2, 0x27, 0x00}; portapack_lcd_data_write_command_and_data(0xB6, cmd_b6, ARRAY_SIZEOF(cmd_b6)); // Power Control 1 //VRH[5:0] - const uint8_t cmd_c0[] = { 0x1B }; + const uint8_t cmd_c0[] = {0x1B}; portapack_lcd_data_write_command_and_data(0xC0, cmd_c0, ARRAY_SIZEOF(cmd_c0)); // Power Control 2 //SAP[2:0];BT[3:0] - const uint8_t cmd_c1[] = { 0x12 }; + const uint8_t cmd_c1[] = {0x12}; portapack_lcd_data_write_command_and_data(0xC1, cmd_c1, ARRAY_SIZEOF(cmd_c1)); // VCOM Control 1 - const uint8_t cmd_c5[] = { 0x32, 0x3C }; + const uint8_t cmd_c5[] = {0x32, 0x3C}; portapack_lcd_data_write_command_and_data(0xC5, cmd_c5, ARRAY_SIZEOF(cmd_c5)); // VCOM Control 2 - const uint8_t cmd_c7[] = { 0x9B }; + const uint8_t cmd_c7[] = {0x9B}; portapack_lcd_data_write_command_and_data(0xC7, cmd_c7, ARRAY_SIZEOF(cmd_c7)); // Memory Access Control // Invert X and Y memory access order, so upper-left of // screen is (0,0) when writing to display. const uint8_t cmd_36[] = { - (1 << 7) | // MY=1 - (1 << 6) | // MX=1 - (0 << 5) | // MV=0 - (1 << 4) | // ML=1: reverse vertical refresh to simplify scrolling logic - (1 << 3) // BGR=1: For Kingtech LCD, BGR filter. + (1 << 7) | // MY=1 + (1 << 6) | // MX=1 + (0 << 5) | // MV=0 + (1 << 4) | // ML=1: reverse vertical refresh to simplify scrolling logic + (1 << 3) // BGR=1: For Kingtech LCD, BGR filter. }; portapack_lcd_data_write_command_and_data(0x36, cmd_36, ARRAY_SIZEOF(cmd_36)); // COLMOD: Pixel Format Set // DPI=101 (16 bits/pixel), DBI=101 (16 bits/pixel) - const uint8_t cmd_3a[] = { 0x55 }; + const uint8_t cmd_3a[] = {0x55}; portapack_lcd_data_write_command_and_data(0x3A, cmd_3a, ARRAY_SIZEOF(cmd_3a)); //portapack_lcd_data_write_command_and_data(0xF6, { 0x01, 0x30 }); @@ -390,59 +423,84 @@ static void portapack_lcd_init() { // RM=0 (system interface/VSYNC interface) // DM[1:0]=00 (internal clock operation) // ENDIAN=0 (doesn't matter with 16-bit interface) - const uint8_t cmd_f6[] = { 0x01, 0x30, 0x00 }; + const uint8_t cmd_f6[] = {0x01, 0x30, 0x00}; portapack_lcd_data_write_command_and_data(0xF6, cmd_f6, ARRAY_SIZEOF(cmd_f6)); // 3Gamma Function Disable - const uint8_t cmd_f2[] = { 0x00 }; + const uint8_t cmd_f2[] = {0x00}; portapack_lcd_data_write_command_and_data(0xF2, cmd_f2, ARRAY_SIZEOF(cmd_f2)); // Gamma curve selected - const uint8_t cmd_26[] = { 0x01 }; + const uint8_t cmd_26[] = {0x01}; portapack_lcd_data_write_command_and_data(0x26, cmd_26, ARRAY_SIZEOF(cmd_26)); // Set Gamma const uint8_t cmd_e0[] = { - 0x0F, 0x1D, 0x19, 0x0E, 0x10, 0x07, 0x4C, 0x63, - 0x3F, 0x03, 0x0D, 0x00, 0x26, 0x24, 0x04 - }; + 0x0F, + 0x1D, + 0x19, + 0x0E, + 0x10, + 0x07, + 0x4C, + 0x63, + 0x3F, + 0x03, + 0x0D, + 0x00, + 0x26, + 0x24, + 0x04}; portapack_lcd_data_write_command_and_data(0xE0, cmd_e0, ARRAY_SIZEOF(cmd_e0)); // Set Gamma const uint8_t cmd_e1[] = { - 0x00, 0x1C, 0x1F, 0x02, 0x0F, 0x03, 0x35, 0x25, - 0x47, 0x04, 0x0C, 0x0B, 0x29, 0x2F, 0x05 - }; + 0x00, + 0x1C, + 0x1F, + 0x02, + 0x0F, + 0x03, + 0x35, + 0x25, + 0x47, + 0x04, + 0x0C, + 0x0B, + 0x29, + 0x2F, + 0x05}; portapack_lcd_data_write_command_and_data(0xE1, cmd_e1, ARRAY_SIZEOF(cmd_e1)); portapack_lcd_wake(); // Turn on Tearing Effect Line (TE) output signal. - const uint8_t cmd_35[] = { 0b00000000 }; + const uint8_t cmd_35[] = {0b00000000}; portapack_lcd_data_write_command_and_data(0x35, cmd_35, ARRAY_SIZEOF(cmd_35)); } -void portapack_backlight(const bool on) { +void portapack_backlight(const bool on) +{ portapack_if.io_reg = (portapack_if.io_reg & 0x7f) | (on ? (1 << 7) : 0); portapack_io_write(1, portapack_if.io_reg); } -void portapack_reference_oscillator(const bool on) { +void portapack_reference_oscillator(const bool on) +{ const uint8_t mask = 1 << 6; portapack_if.io_reg = (portapack_if.io_reg & ~mask) | (on ? mask : 0); portapack_io_write(1, portapack_if.io_reg); } -void portapack_fill_rectangle( - const ui_rect_t rect, - const ui_color_t color -) { +void portapack_fill_rectangle(const ui_rect_t rect, const ui_color_t color) +{ portapack_lcd_start_ram_write(rect); portapack_lcd_write_pixels_color(color, rect.size.width * rect.size.height); } -void portapack_clear_display(const ui_color_t color) { - const ui_rect_t rect_screen = { { 0, 0 }, { 240, 320 } }; +void portapack_clear_display(const ui_color_t color) +{ + const ui_rect_t rect_screen = {{0, 0}, {240, 320}}; portapack_fill_rectangle(rect_screen, color); } @@ -450,33 +508,27 @@ void portapack_draw_bitmap( const ui_point_t point, const ui_bitmap_t bitmap, const ui_color_t foreground, - const ui_color_t background -) { - const ui_rect_t rect = { - .point = point, - .size = bitmap.size - }; + const ui_color_t background) +{ + const ui_rect_t rect = {.point = point, .size = bitmap.size}; portapack_lcd_start_ram_write(rect); const size_t count = bitmap.size.width * bitmap.size.height; - for(size_t i=0; i> 3] & (1U << (i & 0x7)); portapack_lcd_write_pixel(pixel ? foreground : background); } } -ui_bitmap_t portapack_font_glyph( - const ui_font_t* const font, - const char c -) { - if( c >= font->c_start ) { +ui_bitmap_t portapack_font_glyph(const ui_font_t* const font, const char c) +{ + if (c >= font->c_start) { const uint_fast8_t index = c - font->c_start; - if( index < font->c_count ) { + if (index < font->c_count) { const ui_bitmap_t bitmap = { .size = font->glyph_size, - .data = &font->data[index * font->data_stride] - }; + .data = &font->data[index * font->data_stride]}; return bitmap; } } @@ -488,7 +540,8 @@ ui_bitmap_t portapack_font_glyph( return bitmap; } -static bool jtag_pp_tck(const bool tms_value) { +static bool jtag_pp_tck(const bool tms_value) +{ gpio_write(jtag_cpld.gpio->gpio_pp_tms, tms_value); // 8 ns TMS/TDI to TCK setup @@ -521,11 +574,12 @@ static bool jtag_pp_tck(const bool tms_value) { return gpio_read(jtag_cpld.gpio->gpio_pp_tdo); } -static uint32_t jtag_pp_shift(const uint32_t tms_bits, const size_t count) { +static uint32_t jtag_pp_shift(const uint32_t tms_bits, const size_t count) +{ uint32_t result = 0; size_t bit_in_index = count - 1; size_t bit_out_index = 0; - while(bit_out_index < count) { + while (bit_out_index < count) { const uint32_t tdo = jtag_pp_tck((tms_bits >> bit_in_index) & 1) & 1; result |= (tdo << bit_out_index); @@ -536,7 +590,8 @@ static uint32_t jtag_pp_shift(const uint32_t tms_bits, const size_t count) { return result; } -static uint32_t jtag_pp_idcode(void) { +static uint32_t jtag_pp_idcode(void) +{ cpld_jtag_take(&jtag_cpld); /* TODO: Check if PortaPack TMS is floating or driven by an external device. */ @@ -556,21 +611,23 @@ static uint32_t jtag_pp_idcode(void) { return idcode; } -static bool portapack_detect(void) { +static bool portapack_detect(void) +{ return jtag_pp_idcode() == 0x020A50DD; } -static const portapack_t portapack_instance = { -}; +static const portapack_t portapack_instance = {}; static const portapack_t* portapack_pointer = NULL; -const portapack_t* portapack(void) { +const portapack_t* portapack(void) +{ return portapack_pointer; } -void portapack_init(void) { - if( portapack_detect() ) { +void portapack_init(void) +{ + if (portapack_detect()) { portapack_if_init(); portapack_lcd_reset(); portapack_lcd_init(); diff --git a/firmware/common/portapack.h b/firmware/common/portapack.h index 98f682f2..32927835 100644 --- a/firmware/common/portapack.h +++ b/firmware/common/portapack.h @@ -73,10 +73,7 @@ void portapack_backlight(const bool on); void portapack_reference_oscillator(const bool on) __attribute__((weak)); -void portapack_fill_rectangle( - const ui_rect_t rect, - const ui_color_t color -); +void portapack_fill_rectangle(const ui_rect_t rect, const ui_color_t color); void portapack_clear_display(const ui_color_t color); @@ -84,12 +81,8 @@ void portapack_draw_bitmap( const ui_point_t point, const ui_bitmap_t bitmap, const ui_color_t foreground, - const ui_color_t background -); + const ui_color_t background); -ui_bitmap_t portapack_font_glyph( - const ui_font_t* const font, - const char c -); +ui_bitmap_t portapack_font_glyph(const ui_font_t* const font, const char c); -#endif/*__PORTAPACK_H__*/ +#endif /*__PORTAPACK_H__*/ diff --git a/firmware/common/rad1o/decoder.c b/firmware/common/rad1o/decoder.c index dd9e7f10..46791756 100644 --- a/firmware/common/rad1o/decoder.c +++ b/firmware/common/rad1o/decoder.c @@ -4,9 +4,9 @@ #include // Local function: Get next nibble. -static int ctr = 0; // offset for next nibble +static int ctr = 0; // offset for next nibble static int hilo = 0; // 0= high nibble next, 1=low nibble next -static const uint8_t *data; +static const uint8_t* data; #define MAXCHR (30 * 20) static uint8_t charBuf[MAXCHR]; @@ -43,24 +43,24 @@ static int upl(int off) return retval; } -uint8_t *rad1o_pk_decode(const uint8_t *ldata, int *len) +uint8_t* rad1o_pk_decode(const uint8_t* ldata, int* len) { ctr = 0; hilo = 0; data = ldata; - int length = *len; // Length of character bytestream - int height; // Height of character in bytes - int hoff; // bit position for non-integer heights - uint8_t *bufptr = charBuf; // Output buffer for decoded character + int length = *len; // Length of character bytestream + int height; // Height of character in bytes + int hoff; // bit position for non-integer heights + uint8_t* bufptr = charBuf; // Output buffer for decoded character height = (rad1o_getFontHeight() - 1) / 8 + 1; hoff = rad1o_getFontHeight() % 8; -#define DYN (12) // Decoder parameter: Fixed value for now. +#define DYN (12) // Decoder parameter: Fixed value for now. int repeat = 0; // Decoder internal: repeat colum? int curbit = 0; // Decoder internal: current bit (1 or 0) - int pos = 0; // Decoder internal: current bit position (0..7) - int nyb; // Decoder internal: current nibble / value + int pos = 0; // Decoder internal: current bit position (0..7) + int nyb; // Decoder internal: current nibble / value if (data[ctr] >> 4 == 14) { // Char starts with 1-bits. gnn(); @@ -104,13 +104,10 @@ uint8_t *rad1o_pk_decode(const uint8_t *ldata, int *len) if (pos == 8) { bufptr++; - if ((bufptr - charBuf) % height == - 0) { // End of column? + if ((bufptr - charBuf) % height == 0) { // End of column? while (repeat > 0) { - for (int y = 0; y < height; - y++) { - bufptr[0] = - bufptr[-height]; + for (int y = 0; y < height; y++) { + bufptr[0] = bufptr[-height]; bufptr++; }; repeat--; diff --git a/firmware/common/rad1o/decoder.h b/firmware/common/rad1o/decoder.h index 72994508..5f1bcda4 100644 --- a/firmware/common/rad1o/decoder.h +++ b/firmware/common/rad1o/decoder.h @@ -3,6 +3,6 @@ #include -uint8_t *rad1o_pk_decode(const uint8_t *data, int *len); +uint8_t* rad1o_pk_decode(const uint8_t* data, int* len); #endif diff --git a/firmware/common/rad1o/display.c b/firmware/common/rad1o/display.c index c54dce91..517db0a0 100644 --- a/firmware/common/rad1o/display.c +++ b/firmware/common/rad1o/display.c @@ -16,8 +16,8 @@ static void delayms(const uint32_t milliseconds) delay(milliseconds * 40800); } -static struct gpio_t gpio_lcd_cs = GPIO(4, 12); /* P9_0 */ -static struct gpio_t gpio_lcd_bl_en = GPIO(0, 8); /* P1_1 */ +static struct gpio_t gpio_lcd_cs = GPIO(4, 12); /* P9_0 */ +static struct gpio_t gpio_lcd_bl_en = GPIO(0, 8); /* P1_1 */ static struct gpio_t gpio_lcd_reset = GPIO(5, 17); /* P9_4 */ /**************************************************************************/ @@ -44,9 +44,16 @@ static void select() uint8_t serial_clock_rate = 1; uint8_t clock_prescale_rate = 12; - ssp_init(LCD_SSP, SSP_DATA_9BITS, SSP_FRAME_SPI, SSP_CPOL_0_CPHA_0, - serial_clock_rate, clock_prescale_rate, SSP_MODE_NORMAL, - SSP_MASTER, SSP_SLAVE_OUT_ENABLE); + ssp_init( + LCD_SSP, + SSP_DATA_9BITS, + SSP_FRAME_SPI, + SSP_CPOL_0_CPHA_0, + serial_clock_rate, + clock_prescale_rate, + SSP_MODE_NORMAL, + SSP_MASTER, + SSP_SLAVE_OUT_ENABLE); gpio_clear(&gpio_lcd_cs); } @@ -87,18 +94,25 @@ void rad1o_lcdInit(void) /* The controller is a PCF8833 - documentation can be found online. */ static uint8_t initseq_d[] = { 0x11, // SLEEP_OUT (wake up) - 0x3A, 2, // mode 8bpp (2= 8bpp, 3= 12bpp, 5= 16bpp) - 0x36, 0b11000000, // my,mx,v,lao,rgb,x,x,x - 0x25, 0x3a, // set contrast + 0x3A, + 2, // mode 8bpp (2= 8bpp, 3= 12bpp, 5= 16bpp) + 0x36, + 0b11000000, // my,mx,v,lao,rgb,x,x,x + 0x25, + 0x3a, // set contrast 0x29, // display on 0x03, // BSTRON (booster voltage) - 0x2A, 1, RESX, 0x2B, 1, RESY - }; - uint16_t initseq_c = ~(/* commands: 1, data: 0 */ - (1 << 0) | (1 << 1) | (0 << 2) | (1 << 3) | - (0 << 4) | (1 << 5) | (0 << 6) | (1 << 7) | - (1 << 8) | (1 << 9) | (0 << 10) | (0 << 11) | - (1 << 12) | (0 << 13) | (0 << 14) | 0); + 0x2A, + 1, + RESX, + 0x2B, + 1, + RESY}; + uint16_t initseq_c = + ~(/* commands: 1, data: 0 */ + (1 << 0) | (1 << 1) | (0 << 2) | (1 << 3) | (0 << 4) | (1 << 5) | + (0 << 6) | (1 << 7) | (1 << 8) | (1 << 9) | (0 << 10) | (0 << 11) | + (1 << 12) | (0 << 13) | (0 << 14) | 0); write(0, 0x01); /* most color displays need the pause */ delayms(10); @@ -139,7 +153,7 @@ static uint8_t getPixel(uint8_t x, uint8_t y) return lcdBuffer[y * RESX + x]; } -uint8_t *rad1o_lcdGetBuffer(void) +uint8_t* rad1o_lcdGetBuffer(void) { return lcdBuffer; } diff --git a/firmware/common/rad1o/display.h b/firmware/common/rad1o/display.h index c8d8999d..7a9e077f 100644 --- a/firmware/common/rad1o/display.h +++ b/firmware/common/rad1o/display.h @@ -8,14 +8,14 @@ #define RESX 130 #define RESY 130 -#define TYPE_CMD 0 +#define TYPE_CMD 0 #define TYPE_DATA 1 -#define _PIN(pin, func, ...) pin +#define _PIN(pin, func, ...) pin #define _FUNC(pin, func, ...) func -#define SETUPpin(args...) scu_pinmux(_PIN(args), _FUNC(args)) +#define SETUPpin(args...) scu_pinmux(_PIN(args), _FUNC(args)) -#define LCD_DI P1_4, SCU_CONF_FUNCTION5 | SCU_SSP_IO +#define LCD_DI P1_4, SCU_CONF_FUNCTION5 | SCU_SSP_IO #define LCD_SCK P1_19, SCU_CONF_FUNCTION1 | SCU_SSP_IO #define LCD_SSP SSP1_NUM @@ -25,6 +25,6 @@ void rad1o_lcdDeInit(void); void rad1o_lcdFill(uint8_t f); void rad1o_lcdDisplay(void); void rad1o_lcdSetPixel(uint8_t x, uint8_t y, uint8_t f); -uint8_t *rad1o_lcdGetBuffer(void); +uint8_t* rad1o_lcdGetBuffer(void); #endif diff --git a/firmware/common/rad1o/draw.c b/firmware/common/rad1o/draw.c index 8be8c204..eb85d05a 100644 --- a/firmware/common/rad1o/draw.c +++ b/firmware/common/rad1o/draw.c @@ -2,11 +2,11 @@ #include -#define SWAP(p1, p2) \ - do { \ - uint8_t SWAP = p1; \ - p1 = p2; \ - p2 = SWAP; \ +#define SWAP(p1, p2) \ + do { \ + uint8_t SWAP = p1; \ + p1 = p2; \ + p2 = SWAP; \ } while (0) void rad1o_drawHLine(uint8_t y, uint8_t x1, uint8_t x2, uint8_t color) diff --git a/firmware/common/rad1o/fonts.h b/firmware/common/rad1o/fonts.h index c93cc8c3..98e0a7ac 100644 --- a/firmware/common/rad1o/fonts.h +++ b/firmware/common/rad1o/fonts.h @@ -11,13 +11,13 @@ typedef struct { } FONT_CHAR_INFO; struct FONT_DEF { - uint8_t u8Width; /* Character width for storage */ - uint8_t u8Height; /* Character height for storage */ - uint8_t u8FirstChar; /* The first character available */ - uint8_t u8LastChar; /* The last character available */ - const uint8_t *au8FontTable; /* Font table start address in memory */ - const FONT_CHAR_INFO *charInfo; /* Pointer to array of char information */ - const uint16_t *charExtra; /* Pointer to array of extra char info */ + uint8_t u8Width; /* Character width for storage */ + uint8_t u8Height; /* Character height for storage */ + uint8_t u8FirstChar; /* The first character available */ + uint8_t u8LastChar; /* The last character available */ + const uint8_t* au8FontTable; /* Font table start address in memory */ + const FONT_CHAR_INFO* charInfo; /* Pointer to array of char information */ + const uint16_t* charExtra; /* Pointer to array of extra char info */ }; struct EXTFONT { @@ -26,9 +26,9 @@ struct EXTFONT { struct FONT_DEF def; }; -typedef const struct FONT_DEF *FONT; +typedef const struct FONT_DEF* FONT; -#define FONT_DEFAULT 0 +#define FONT_DEFAULT 0 #define FONT_INTERNAL 1 #define FONT_EXTERNAL 2 diff --git a/firmware/common/rad1o/print.c b/firmware/common/rad1o/print.c index 338f792f..4b9958cd 100644 --- a/firmware/common/rad1o/print.c +++ b/firmware/common/rad1o/print.c @@ -7,7 +7,7 @@ static int32_t x = 0; static int32_t y = 0; -void rad1o_lcdPrint(const char *string) +void rad1o_lcdPrint(const char* string) { x = rad1o_DoString(x, y, string); } diff --git a/firmware/common/rad1o/print.h b/firmware/common/rad1o/print.h index c3797015..19ef1631 100644 --- a/firmware/common/rad1o/print.h +++ b/firmware/common/rad1o/print.h @@ -3,7 +3,7 @@ #include -void rad1o_lcdPrint(const char *string); +void rad1o_lcdPrint(const char* string); void rad1o_lcdNl(void); void rad1o_lcdClear(void); void rad1o_lcdMoveCrsr(int32_t dx, int32_t dy); diff --git a/firmware/common/rad1o/render.c b/firmware/common/rad1o/render.c index 96460e33..9f2bb425 100644 --- a/firmware/common/rad1o/render.c +++ b/firmware/common/rad1o/render.c @@ -7,7 +7,7 @@ #include /* Global Variables */ -static const struct FONT_DEF *font = NULL; +static const struct FONT_DEF* font = NULL; static struct EXTFONT efont; @@ -21,7 +21,7 @@ void rad1o_setTextColor(uint8_t bg, uint8_t fg) color_fg = fg; } -void rad1o_setIntFont(const struct FONT_DEF *newfont) +void rad1o_setIntFont(const struct FONT_DEF* newfont) { memcpy(&efont.def, newfont, sizeof(struct FONT_DEF)); efont.type = FONT_INTERNAL; @@ -69,7 +69,7 @@ int rad1o_DoChar(int sx, int sy, int c) char height = (font->u8Height - 1) / 8 + 1; char hoff = (8 - (font->u8Height % 8)) % 8; - const uint8_t *data; + const uint8_t* data; int width, preblank = 0, postblank = 0; do { /* Get Character data */ /* Get intex into character list */ @@ -98,19 +98,17 @@ int rad1o_DoChar(int sx, int sy, int c) data = &font->au8FontTable[toff + 3]; width = (width - 3 / height); } else { - data = rad1o_pk_decode( - &font->au8FontTable[toff], &width); + data = rad1o_pk_decode(&font->au8FontTable[toff], &width); } } else { - toff = (c)*font->u8Width * 1; + toff = (c) *font->u8Width * 1; width = font->u8Width; data = &font->au8FontTable[toff]; }; } while (0); -#define xy_(x, y) \ - ((x < 0 || y < 0 || x >= RESX || y >= RESY) ? 0 : (y)*RESX + (x)) +#define xy_(x, y) ((x < 0 || y < 0 || x >= RESX || y >= RESY) ? 0 : (y) *RESX + (x)) #define gPx(x, y) (data[x * height + (height - y / 8 - 1)] & (1 << (y % 8))) int x = 0; @@ -120,7 +118,7 @@ int rad1o_DoChar(int sx, int sy, int c) sx += preblank; - uint8_t *lcdBuffer = rad1o_lcdGetBuffer(); + uint8_t* lcdBuffer = rad1o_lcdGetBuffer(); /* per line */ for (int y = hoff; y < height * 8; y++) { if (sy + y >= RESY) @@ -152,9 +150,9 @@ int rad1o_DoChar(int sx, int sy, int c) return sx + (width + postblank); } -int rad1o_DoString(int sx, int sy, const char *s) +int rad1o_DoString(int sx, int sy, const char* s) { - const char *c; + const char* c; for (c = s; *c != 0; c++) { sx = rad1o_DoChar(sx, sy, *c); }; diff --git a/firmware/common/rad1o/render.h b/firmware/common/rad1o/render.h index e4e7b68a..dcfdd6c8 100644 --- a/firmware/common/rad1o/render.h +++ b/firmware/common/rad1o/render.h @@ -4,8 +4,8 @@ #include "fonts.h" void rad1o_setTextColor(uint8_t bg, uint8_t fg); -void rad1o_setIntFont(const struct FONT_DEF *font); +void rad1o_setIntFont(const struct FONT_DEF* font); int rad1o_getFontHeight(void); -int rad1o_DoString(int sx, int sy, const char *s); +int rad1o_DoString(int sx, int sy, const char* s); int rad1o_DoChar(int sx, int sy, int c); #endif diff --git a/firmware/common/rad1o/smallfonts.c b/firmware/common/rad1o/smallfonts.c index c311b0da..14413a75 100644 --- a/firmware/common/rad1o/smallfonts.c +++ b/firmware/common/rad1o/smallfonts.c @@ -41,104 +41,104 @@ /* System 7x8 */ const uint8_t au8Font7x8[] = { - 0, 0, 0, 0, 0, 0, 0, //' ' - 0, 6, 95, 95, 6, 0, 0, //'!' - 0, 7, 7, 0, 7, 7, 0, //'"' - 20, 127, 127, 20, 127, 127, 20, //'#' - 36, 46, 107, 107, 58, 18, 0, //'$' - 70, 102, 48, 24, 12, 102, 98, //'%' - 48, 122, 79, 93, 55, 122, 72, //'&' - 4, 7, 3, 0, 0, 0, 0, //''' - 0, 28, 62, 99, 65, 0, 0, //'(' - 0, 65, 99, 62, 28, 0, 0, //')' - 8, 42, 62, 28, 28, 62, 42, //'*' - 8, 8, 62, 62, 8, 8, 0, //'+' - 0, 128, 224, 96, 0, 0, 0, //',' - 8, 8, 8, 8, 8, 8, 0, //'-' - 0, 0, 96, 96, 0, 0, 0, //'.' - 96, 48, 24, 12, 6, 3, 1, //'/' - 62, 127, 113, 89, 77, 127, 62, //'0' - 64, 66, 127, 127, 64, 64, 0, //'1' - 98, 115, 89, 73, 111, 102, 0, //'2' - 34, 99, 73, 73, 127, 54, 0, //'3' - 24, 28, 22, 83, 127, 127, 80, //'4' - 39, 103, 69, 69, 125, 57, 0, //'5' - 60, 126, 75, 73, 121, 48, 0, //'6' - 3, 3, 113, 121, 15, 7, 0, //'7' - 54, 127, 73, 73, 127, 54, 0, //'8' - 6, 79, 73, 105, 63, 30, 0, //'9' - 0, 0, 102, 102, 0, 0, 0, //':' - 0, 128, 230, 102, 0, 0, 0, //';' - 8, 28, 54, 99, 65, 0, 0, //'<' - 36, 36, 36, 36, 36, 36, 0, //'=' - 0, 65, 99, 54, 28, 8, 0, //'>' - 2, 3, 81, 89, 15, 6, 0, //'?' - 62, 127, 65, 93, 93, 31, 30, //'@' - 124, 126, 19, 19, 126, 124, 0, //'A' - 65, 127, 127, 73, 73, 127, 54, //'B' - 28, 62, 99, 65, 65, 99, 34, //'C' - 65, 127, 127, 65, 99, 62, 28, //'D' - 65, 127, 127, 73, 93, 65, 99, //'E' - 65, 127, 127, 73, 29, 1, 3, //'F' + 0, 0, 0, 0, 0, 0, 0, //' ' + 0, 6, 95, 95, 6, 0, 0, //'!' + 0, 7, 7, 0, 7, 7, 0, //'"' + 20, 127, 127, 20, 127, 127, 20, //'#' + 36, 46, 107, 107, 58, 18, 0, //'$' + 70, 102, 48, 24, 12, 102, 98, //'%' + 48, 122, 79, 93, 55, 122, 72, //'&' + 4, 7, 3, 0, 0, 0, 0, //''' + 0, 28, 62, 99, 65, 0, 0, //'(' + 0, 65, 99, 62, 28, 0, 0, //')' + 8, 42, 62, 28, 28, 62, 42, //'*' + 8, 8, 62, 62, 8, 8, 0, //'+' + 0, 128, 224, 96, 0, 0, 0, //',' + 8, 8, 8, 8, 8, 8, 0, //'-' + 0, 0, 96, 96, 0, 0, 0, //'.' + 96, 48, 24, 12, 6, 3, 1, //'/' + 62, 127, 113, 89, 77, 127, 62, //'0' + 64, 66, 127, 127, 64, 64, 0, //'1' + 98, 115, 89, 73, 111, 102, 0, //'2' + 34, 99, 73, 73, 127, 54, 0, //'3' + 24, 28, 22, 83, 127, 127, 80, //'4' + 39, 103, 69, 69, 125, 57, 0, //'5' + 60, 126, 75, 73, 121, 48, 0, //'6' + 3, 3, 113, 121, 15, 7, 0, //'7' + 54, 127, 73, 73, 127, 54, 0, //'8' + 6, 79, 73, 105, 63, 30, 0, //'9' + 0, 0, 102, 102, 0, 0, 0, //':' + 0, 128, 230, 102, 0, 0, 0, //';' + 8, 28, 54, 99, 65, 0, 0, //'<' + 36, 36, 36, 36, 36, 36, 0, //'=' + 0, 65, 99, 54, 28, 8, 0, //'>' + 2, 3, 81, 89, 15, 6, 0, //'?' + 62, 127, 65, 93, 93, 31, 30, //'@' + 124, 126, 19, 19, 126, 124, 0, //'A' + 65, 127, 127, 73, 73, 127, 54, //'B' + 28, 62, 99, 65, 65, 99, 34, //'C' + 65, 127, 127, 65, 99, 62, 28, //'D' + 65, 127, 127, 73, 93, 65, 99, //'E' + 65, 127, 127, 73, 29, 1, 3, //'F' 28, 62, 99, 65, 81, 115, 114, //'G' - 127, 127, 8, 8, 127, 127, 0, //'H' - 0, 65, 127, 127, 65, 0, 0, //'I' - 48, 112, 64, 65, 127, 63, 1, //'J' - 65, 127, 127, 8, 28, 119, 99, //'K' + 127, 127, 8, 8, 127, 127, 0, //'H' + 0, 65, 127, 127, 65, 0, 0, //'I' + 48, 112, 64, 65, 127, 63, 1, //'J' + 65, 127, 127, 8, 28, 119, 99, //'K' 65, 127, 127, 65, 64, 96, 112, //'L' 127, 127, 14, 28, 14, 127, 127, //'M' 127, 127, 6, 12, 24, 127, 127, //'N' - 28, 62, 99, 65, 99, 62, 28, //'O' - 65, 127, 127, 73, 9, 15, 6, //'P' - 30, 63, 33, 113, 127, 94, 0, //'Q' + 28, 62, 99, 65, 99, 62, 28, //'O' + 65, 127, 127, 73, 9, 15, 6, //'P' + 30, 63, 33, 113, 127, 94, 0, //'Q' 65, 127, 127, 9, 25, 127, 102, //'R' - 38, 111, 77, 89, 115, 50, 0, //'S' - 3, 65, 127, 127, 65, 3, 0, //'T' - 127, 127, 64, 64, 127, 127, 0, //'U' - 31, 63, 96, 96, 63, 31, 0, //'V' + 38, 111, 77, 89, 115, 50, 0, //'S' + 3, 65, 127, 127, 65, 3, 0, //'T' + 127, 127, 64, 64, 127, 127, 0, //'U' + 31, 63, 96, 96, 63, 31, 0, //'V' 127, 127, 48, 24, 48, 127, 127, //'W' - 67, 103, 60, 24, 60, 103, 67, //'X' - 7, 79, 120, 120, 79, 7, 0, //'Y' + 67, 103, 60, 24, 60, 103, 67, //'X' + 7, 79, 120, 120, 79, 7, 0, //'Y' 71, 99, 113, 89, 77, 103, 115, //'Z' - 0, 127, 127, 65, 65, 0, 0, //'[' - 1, 3, 6, 12, 24, 48, 96, //'\' - 0, 65, 65, 127, 127, 0, 0, //']' - 8, 12, 6, 3, 6, 12, 8, //'^' + 0, 127, 127, 65, 65, 0, 0, //'[' + 1, 3, 6, 12, 24, 48, 96, //'\' + 0, 65, 65, 127, 127, 0, 0, //']' + 8, 12, 6, 3, 6, 12, 8, //'^' 128, 128, 128, 128, 128, 128, 128, //'_' - 0, 0, 3, 7, 4, 0, 0, //'`' - 32, 116, 84, 84, 60, 120, 64, //'a' - 65, 127, 63, 72, 72, 120, 48, //'b' - 56, 124, 68, 68, 108, 40, 0, //'c' - 48, 120, 72, 73, 63, 127, 64, //'d' - 56, 124, 84, 84, 92, 24, 0, //'e' - 72, 126, 127, 73, 3, 2, 0, //'f' - 56, 188, 164, 164, 252, 120, 0, //'g' + 0, 0, 3, 7, 4, 0, 0, //'`' + 32, 116, 84, 84, 60, 120, 64, //'a' + 65, 127, 63, 72, 72, 120, 48, //'b' + 56, 124, 68, 68, 108, 40, 0, //'c' + 48, 120, 72, 73, 63, 127, 64, //'d' + 56, 124, 84, 84, 92, 24, 0, //'e' + 72, 126, 127, 73, 3, 2, 0, //'f' + 56, 188, 164, 164, 252, 120, 0, //'g' 65, 127, 127, 8, 4, 124, 120, //'h' - 0, 68, 125, 125, 64, 0, 0, //'i' - 96, 224, 128, 128, 253, 125, 0, //'j' - 65, 127, 127, 16, 56, 108, 68, //'k' - 0, 65, 127, 127, 64, 0, 0, //'l' + 0, 68, 125, 125, 64, 0, 0, //'i' + 96, 224, 128, 128, 253, 125, 0, //'j' + 65, 127, 127, 16, 56, 108, 68, //'k' + 0, 65, 127, 127, 64, 0, 0, //'l' 120, 124, 28, 56, 28, 124, 120, //'m' - 124, 124, 4, 4, 124, 120, 0, //'n' - 56, 124, 68, 68, 124, 56, 0, //'o' - 0, 252, 252, 164, 36, 60, 24, //'p' + 124, 124, 4, 4, 124, 120, 0, //'n' + 56, 124, 68, 68, 124, 56, 0, //'o' + 0, 252, 252, 164, 36, 60, 24, //'p' 24, 60, 36, 164, 248, 252, 132, //'q' - 68, 124, 120, 76, 4, 28, 24, //'r' - 72, 92, 84, 84, 116, 36, 0, //'s' - 0, 4, 62, 127, 68, 36, 0, //'t' - 60, 124, 64, 64, 60, 124, 64, //'u' - 28, 60, 96, 96, 60, 28, 0, //'v' - 60, 124, 112, 56, 112, 124, 60, //'w' - 68, 108, 56, 16, 56, 108, 68, //'x' - 60, 188, 160, 160, 252, 124, 0, //'y' - 76, 100, 116, 92, 76, 100, 0, //'z' - 8, 8, 62, 119, 65, 65, 0, //'{' - 0, 0, 0, 119, 119, 0, 0, //'|' - 65, 65, 119, 62, 8, 8, 0, //'}' - 2, 3, 1, 3, 2, 3, 1, //'~' + 68, 124, 120, 76, 4, 28, 24, //'r' + 72, 92, 84, 84, 116, 36, 0, //'s' + 0, 4, 62, 127, 68, 36, 0, //'t' + 60, 124, 64, 64, 60, 124, 64, //'u' + 28, 60, 96, 96, 60, 28, 0, //'v' + 60, 124, 112, 56, 112, 124, 60, //'w' + 68, 108, 56, 16, 56, 108, 68, //'x' + 60, 188, 160, 160, 252, 124, 0, //'y' + 76, 100, 116, 92, 76, 100, 0, //'z' + 8, 8, 62, 119, 65, 65, 0, //'{' + 0, 0, 0, 119, 119, 0, 0, //'|' + 65, 65, 119, 62, 8, 8, 0, //'}' + 2, 3, 1, 3, 2, 3, 1, //'~' 255, 129, 129, 129, 129, 129, 255, //'^?' - 14, 159, 145, 177, 251, 74, 0 //'?' + 14, 159, 145, 177, 251, 74, 0 //'?' }; /* Global variables */ -const struct FONT_DEF Font_7x8 = { 7, 8, 32, 128, au8Font7x8, NULL, NULL }; +const struct FONT_DEF Font_7x8 = {7, 8, 32, 128, au8Font7x8, NULL, NULL}; diff --git a/firmware/common/rad1o/ubuntu18.c b/firmware/common/rad1o/ubuntu18.c index 8a18456c..d47ef49d 100644 --- a/firmware/common/rad1o/ubuntu18.c +++ b/firmware/common/rad1o/ubuntu18.c @@ -3294,122 +3294,122 @@ const uint8_t Ubuntu18ptBitmaps[] = { /* Character descriptors */ const FONT_CHAR_INFO Ubuntu18ptLengths[] = { - { 2 }, /* */ - { 5 }, /* ! */ - { 7 }, /* " */ - { 38 }, /* # */ - { 26 }, /* $ */ - { 45 }, /* % */ - { 37 }, /* & */ - { 4 }, /* ' */ - { 13 }, /* ( */ - { 12 }, /* ) */ - { 20 }, /* * */ - { 9 }, /* + */ - { 6 }, /* , */ - { 5 }, /* - */ - { 5 }, /* . */ - { 15 }, /* / */ - { 20 }, /* 0 */ - { 10 }, /* 1 */ - { 30 }, /* 2 */ - { 25 }, /* 3 */ - { 24 }, /* 4 */ - { 24 }, /* 5 */ - { 29 }, /* 6 */ - { 21 }, /* 7 */ - { 33 }, /* 8 */ - { 29 }, /* 9 */ - { 6 }, /* : */ - { 8 }, /* ; */ - { 23 }, /* < */ - { 6 }, /* = */ - { 23 }, /* > */ - { 19 }, /* ? */ - { 46 }, /* @ */ - { 29 }, /* A */ - { 21 }, /* B */ - { 21 }, /* C */ - { 18 }, /* D */ - { 10 }, /* E */ - { 10 }, /* F */ - { 21 }, /* G */ - { 10 }, /* H */ - { 5 }, /* I */ - { 13 }, /* J */ - { 28 }, /* K */ - { 7 }, /* L */ - { 28 }, /* M */ - { 22 }, /* N */ - { 28 }, /* O */ - { 19 }, /* P */ - { 40 }, /* Q */ - { 22 }, /* R */ - { 31 }, /* S */ - { 9 }, /* T */ - { 18 }, /* U */ - { 25 }, /* V */ - { 34 }, /* W */ - { 33 }, /* X */ - { 21 }, /* Y */ - { 33 }, /* Z */ - { 8 }, /* [ */ - { 16 }, /* \ */ - { 7 }, /* ] */ - { 19 }, /* ^ */ - { 5 }, /* _ */ - { 10 }, /* ` */ - { 21 }, /* a */ - { 18 }, /* b */ - { 14 }, /* c */ - { 19 }, /* d */ - { 28 }, /* e */ - { 13 }, /* f */ - { 21 }, /* g */ - { 12 }, /* h */ - { 6 }, /* i */ - { 10 }, /* j */ - { 23 }, /* k */ - { 8 }, /* l */ - { 19 }, /* m */ - { 12 }, /* n */ - { 22 }, /* o */ - { 19 }, /* p */ - { 18 }, /* q */ - { 8 }, /* r */ - { 29 }, /* s */ - { 11 }, /* t */ - { 13 }, /* u */ - { 18 }, /* v */ - { 29 }, /* w */ - { 28 }, /* x */ - { 21 }, /* y */ - { 28 }, /* z */ - { 15 }, /* { */ - { 5 }, /* | */ - { 14 }, /* } */ - { 17 }, /* ~ */ - { 32 }, /* Ä */ - { 39 }, /* Ö */ - { 26 }, /* Ü */ - { 31 }, /* ß */ - { 30 }, /* ä */ - { 29 }, /* ö */ - { 19 }, /* ü */ - { 30 }, /* € */ + {2}, /* */ + {5}, /* ! */ + {7}, /* " */ + {38}, /* # */ + {26}, /* $ */ + {45}, /* % */ + {37}, /* & */ + {4}, /* ' */ + {13}, /* ( */ + {12}, /* ) */ + {20}, /* * */ + {9}, /* + */ + {6}, /* , */ + {5}, /* - */ + {5}, /* . */ + {15}, /* / */ + {20}, /* 0 */ + {10}, /* 1 */ + {30}, /* 2 */ + {25}, /* 3 */ + {24}, /* 4 */ + {24}, /* 5 */ + {29}, /* 6 */ + {21}, /* 7 */ + {33}, /* 8 */ + {29}, /* 9 */ + {6}, /* : */ + {8}, /* ; */ + {23}, /* < */ + {6}, /* = */ + {23}, /* > */ + {19}, /* ? */ + {46}, /* @ */ + {29}, /* A */ + {21}, /* B */ + {21}, /* C */ + {18}, /* D */ + {10}, /* E */ + {10}, /* F */ + {21}, /* G */ + {10}, /* H */ + {5}, /* I */ + {13}, /* J */ + {28}, /* K */ + {7}, /* L */ + {28}, /* M */ + {22}, /* N */ + {28}, /* O */ + {19}, /* P */ + {40}, /* Q */ + {22}, /* R */ + {31}, /* S */ + {9}, /* T */ + {18}, /* U */ + {25}, /* V */ + {34}, /* W */ + {33}, /* X */ + {21}, /* Y */ + {33}, /* Z */ + {8}, /* [ */ + {16}, /* \ */ + {7}, /* ] */ + {19}, /* ^ */ + {5}, /* _ */ + {10}, /* ` */ + {21}, /* a */ + {18}, /* b */ + {14}, /* c */ + {19}, /* d */ + {28}, /* e */ + {13}, /* f */ + {21}, /* g */ + {12}, /* h */ + {6}, /* i */ + {10}, /* j */ + {23}, /* k */ + {8}, /* l */ + {19}, /* m */ + {12}, /* n */ + {22}, /* o */ + {19}, /* p */ + {18}, /* q */ + {8}, /* r */ + {29}, /* s */ + {11}, /* t */ + {13}, /* u */ + {18}, /* v */ + {29}, /* w */ + {28}, /* x */ + {21}, /* y */ + {28}, /* z */ + {15}, /* { */ + {5}, /* | */ + {14}, /* } */ + {17}, /* ~ */ + {32}, /* Ä */ + {39}, /* Ö */ + {26}, /* Ü */ + {31}, /* ß */ + {30}, /* ä */ + {29}, /* ö */ + {19}, /* ü */ + {30}, /* € */ }; -const uint16_t Ubuntu18ptExtra[] = { 196, 214, 220, 223, 228, - 246, 252, 8364, 65535 }; +const uint16_t Ubuntu18ptExtra[] = {196, 214, 220, 223, 228, 246, 252, 8364, 65535}; /* Font info */ -const struct FONT_DEF Font_Ubuntu18pt = { 1, /* width (1 == comressed) */ - 26, /* character height */ - 32, /* first char */ - 126, /* last char */ - Ubuntu18ptBitmaps, - Ubuntu18ptLengths, - Ubuntu18ptExtra }; +const struct FONT_DEF Font_Ubuntu18pt = { + 1, /* width (1 == comressed) */ + 26, /* character height */ + 32, /* first char */ + 126, /* last char */ + Ubuntu18ptBitmaps, + Ubuntu18ptLengths, + Ubuntu18ptExtra}; /* Font metadata: * Name: Ubuntu Regular 18pt diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c index 514fec91..08ab4fcc 100644 --- a/firmware/common/rf_path.c +++ b/firmware/common/rf_path.c @@ -34,47 +34,49 @@ #include #if (defined JAWBREAKER || defined HACKRF_ONE || defined RAD1O) -/* - * RF switches on Jawbreaker are controlled by General Purpose Outputs (GPO) on - * the RFFC5072. - * - * On HackRF One, the same signals are controlled by GPIO on the LPC. - * SWITCHCTRL_NO_TX_AMP_PWR and SWITCHCTRL_NO_RX_AMP_PWR are not normally used - * on HackRF One as the amplifier power is instead controlled only by - * SWITCHCTRL_AMP_BYPASS. - * - * The rad1o also uses GPIO pins to control the different switches. The amplifiers - * are also connected to the LPC. - */ -#define SWITCHCTRL_NO_TX_AMP_PWR (1 << 0) /* GPO1 turn off TX amp power */ -#define SWITCHCTRL_AMP_BYPASS (1 << 1) /* GPO2 bypass amp section */ -#define SWITCHCTRL_TX (1 << 2) /* GPO3 1 for TX mode, 0 for RX mode */ -#define SWITCHCTRL_MIX_BYPASS (1 << 3) /* GPO4 bypass RFFC5072 mixer section */ -#define SWITCHCTRL_HP (1 << 4) /* GPO5 1 for high-pass, 0 for low-pass */ -#define SWITCHCTRL_NO_RX_AMP_PWR (1 << 5) /* GPO6 turn off RX amp power */ + /* + * RF switches on Jawbreaker are controlled by General Purpose Outputs (GPO) on + * the RFFC5072. + * + * On HackRF One, the same signals are controlled by GPIO on the LPC. + * SWITCHCTRL_NO_TX_AMP_PWR and SWITCHCTRL_NO_RX_AMP_PWR are not normally used + * on HackRF One as the amplifier power is instead controlled only by + * SWITCHCTRL_AMP_BYPASS. + * + * The rad1o also uses GPIO pins to control the different switches. The amplifiers + * are also connected to the LPC. + */ + #define SWITCHCTRL_NO_TX_AMP_PWR (1 << 0) /* GPO1 turn off TX amp power */ + #define SWITCHCTRL_AMP_BYPASS (1 << 1) /* GPO2 bypass amp section */ + #define SWITCHCTRL_TX (1 << 2) /* GPO3 1 for TX mode, 0 for RX mode */ + #define SWITCHCTRL_MIX_BYPASS (1 << 3) /* GPO4 bypass RFFC5072 mixer section */ + #define SWITCHCTRL_HP (1 << 4) /* GPO5 1 for high-pass, 0 for low-pass */ + #define SWITCHCTRL_NO_RX_AMP_PWR (1 << 5) /* GPO6 turn off RX amp power */ -/* - GPO6 GPO5 GPO4 GPO3 GPO2 GPO1 -!RXAMP HP MIXBP TX AMPBP !TXAMP Mix mode Amp mode - 1 X 1 1 1 1 TX bypass Bypass - 1 X 1 1 0 0 TX bypass TX amplified - 1 1 0 1 1 1 TX high Bypass - 1 1 0 1 0 0 TX high TX amplified - 1 0 0 1 1 1 TX low Bypass - 1 0 0 1 0 0 TX low TX amplified - 1 X 1 0 1 1 RX bypass Bypass - 0 X 1 0 0 1 RX bypass RX amplified - 1 1 0 0 1 1 RX high Bypass - 0 1 0 0 0 1 RX high RX amplified - 1 0 0 0 1 1 RX low Bypass - 0 0 0 0 0 1 RX low RX amplified -*/ + /* + GPO6 GPO5 GPO4 GPO3 GPO2 GPO1 + !RXAMP HP MIXBP TX AMPBP !TXAMP Mix mode Amp mode + 1 X 1 1 1 1 TX bypass Bypass + 1 X 1 1 0 0 TX bypass TX amplified + 1 1 0 1 1 1 TX high Bypass + 1 1 0 1 0 0 TX high TX amplified + 1 0 0 1 1 1 TX low Bypass + 1 0 0 1 0 0 TX low TX amplified + 1 X 1 0 1 1 RX bypass Bypass + 0 X 1 0 0 1 RX bypass RX amplified + 1 1 0 0 1 1 RX high Bypass + 0 1 0 0 0 1 RX high RX amplified + 1 0 0 0 1 1 RX low Bypass + 0 0 0 0 0 1 RX low RX amplified + */ -/* - * Safe (initial) switch settings turn off both amplifiers and enable both amp - * bypass and mixer bypass. - */ -#define SWITCHCTRL_SAFE (SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_TX | SWITCHCTRL_MIX_BYPASS | SWITCHCTRL_HP | SWITCHCTRL_NO_RX_AMP_PWR) + /* + * Safe (initial) switch settings turn off both amplifiers and enable both amp + * bypass and mixer bypass. + */ + #define SWITCHCTRL_SAFE \ + (SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_TX | \ + SWITCHCTRL_MIX_BYPASS | SWITCHCTRL_HP | SWITCHCTRL_NO_RX_AMP_PWR) #endif uint8_t switchctrl = SWITCHCTRL_SAFE; @@ -88,7 +90,8 @@ uint8_t switchctrl = SWITCHCTRL_SAFE; #define SWITCHCTRL_ANT_PWR (1 << 6) /* turn on antenna port power */ #ifdef HACKRF_ONE -static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl) { +static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl) +{ if (ctrl & SWITCHCTRL_TX) { gpio_set(rf_path->gpio_tx); gpio_clear(rf_path->gpio_rx); @@ -161,7 +164,8 @@ static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl) { #endif #ifdef RAD1O -static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl) { +static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl) +{ if (ctrl & SWITCHCTRL_TX) { gpio_set(rf_path->gpio_tx_rx_n); gpio_clear(rf_path->gpio_tx_rx); @@ -224,7 +228,8 @@ static void switchctrl_set_rad1o(rf_path_t* const rf_path, uint8_t ctrl) { } #endif -static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo) { +static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo) +{ #ifdef JAWBREAKER (void) rf_path; /* silence unused param warning */ mixer_set_gpo(&mixer, gpo); @@ -233,11 +238,12 @@ static void switchctrl_set(rf_path_t* const rf_path, const uint8_t gpo) { #elif RAD1O switchctrl_set_rad1o(rf_path, gpo); #else - (void)gpo; + (void) gpo; #endif } -void rf_path_pin_setup(rf_path_t* const rf_path) { +void rf_path_pin_setup(rf_path_t* const rf_path) +{ #ifdef HACKRF_ONE /* Configure RF switch control signals */ // clang-format off @@ -257,7 +263,7 @@ void rf_path_pin_setup(rf_path_t* const rf_path) { // clang-format on /* Configure RF power supply (VAA) switch */ - scu_pinmux(SCU_NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_NO_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); /* Configure RF switch control signals as outputs */ gpio_output(rf_path->gpio_amp_bypass); @@ -296,7 +302,7 @@ void rf_path_pin_setup(rf_path_t* const rf_path) { // clang-format on /* Configure RF power supply (VAA) switch */ - scu_pinmux(SCU_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); + scu_pinmux(SCU_VAA_ENABLE, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); /* Configure RF switch control signals as outputs */ gpio_output(rf_path->gpio_tx_rx_n); @@ -321,31 +327,33 @@ void rf_path_pin_setup(rf_path_t* const rf_path) { #endif } -void rf_path_init(rf_path_t* const rf_path) { +void rf_path_init(rf_path_t* const rf_path) +{ ssp1_set_mode_max5864(); max5864_setup(&max5864); max5864_shutdown(&max5864); - + ssp1_set_mode_max2837(); max2837_setup(&max2837); max2837_start(&max2837); - + mixer_setup(&mixer); switchctrl_set(rf_path, switchctrl); } -void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t direction) { +void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t direction) +{ /* Turn off TX and RX amplifiers, then enable based on direction and bypass state. */ rf_path->switchctrl |= SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_NO_RX_AMP_PWR; - switch(direction) { + switch (direction) { case RF_PATH_DIRECTION_TX: rf_path->switchctrl |= SWITCHCTRL_TX; - if( (rf_path->switchctrl & SWITCHCTRL_AMP_BYPASS) == 0 ) { + if ((rf_path->switchctrl & SWITCHCTRL_AMP_BYPASS) == 0) { /* TX amplifier is in path, be sure to enable TX amplifier. */ rf_path->switchctrl &= ~SWITCHCTRL_NO_TX_AMP_PWR; } mixer_tx(&mixer); - if( rf_path->switchctrl & SWITCHCTRL_MIX_BYPASS ) { + if (rf_path->switchctrl & SWITCHCTRL_MIX_BYPASS) { mixer_disable(&mixer); } else { mixer_enable(&mixer); @@ -356,15 +364,15 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d max2837_tx(&max2837); sgpio_configure(&sgpio_config, SGPIO_DIRECTION_TX); break; - + case RF_PATH_DIRECTION_RX: rf_path->switchctrl &= ~SWITCHCTRL_TX; - if( (rf_path->switchctrl & SWITCHCTRL_AMP_BYPASS) == 0 ) { + if ((rf_path->switchctrl & SWITCHCTRL_AMP_BYPASS) == 0) { /* RX amplifier is in path, be sure to enable RX amplifier. */ rf_path->switchctrl &= ~SWITCHCTRL_NO_RX_AMP_PWR; } mixer_rx(&mixer); - if( rf_path->switchctrl & SWITCHCTRL_MIX_BYPASS ) { + if (rf_path->switchctrl & SWITCHCTRL_MIX_BYPASS) { mixer_disable(&mixer); } else { mixer_enable(&mixer); @@ -375,7 +383,7 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d max2837_rx(&max2837); sgpio_configure(&sgpio_config, SGPIO_DIRECTION_RX); break; - + case RF_PATH_DIRECTION_OFF: default: #ifdef HACKRF_ONE @@ -398,19 +406,20 @@ void rf_path_set_direction(rf_path_t* const rf_path, const rf_path_direction_t d hackrf_ui()->set_direction(direction); } -void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter) { - switch(filter) { +void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter) +{ + switch (filter) { default: case RF_PATH_FILTER_BYPASS: rf_path->switchctrl |= SWITCHCTRL_MIX_BYPASS; mixer_disable(&mixer); break; - + case RF_PATH_FILTER_LOW_PASS: rf_path->switchctrl &= ~(SWITCHCTRL_HP | SWITCHCTRL_MIX_BYPASS); mixer_enable(&mixer); break; - + case RF_PATH_FILTER_HIGH_PASS: rf_path->switchctrl &= ~SWITCHCTRL_MIX_BYPASS; rf_path->switchctrl |= SWITCHCTRL_HP; @@ -423,29 +432,34 @@ void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter) hackrf_ui()->set_filter(filter); } -void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable) { - if( enable ) { - if( rf_path->switchctrl & SWITCHCTRL_TX ) { +void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable) +{ + if (enable) { + if (rf_path->switchctrl & SWITCHCTRL_TX) { /* AMP_BYPASS=0, NO_RX_AMP_PWR=1, NO_TX_AMP_PWR=0 */ rf_path->switchctrl |= SWITCHCTRL_NO_RX_AMP_PWR; - rf_path->switchctrl &= ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR); + rf_path->switchctrl &= + ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR); } else { /* AMP_BYPASS=0, NO_RX_AMP_PWR=0, NO_TX_AMP_PWR=1 */ rf_path->switchctrl |= SWITCHCTRL_NO_TX_AMP_PWR; - rf_path->switchctrl &= ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_RX_AMP_PWR); + rf_path->switchctrl &= + ~(SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_RX_AMP_PWR); } } else { /* AMP_BYPASS=1, NO_RX_AMP_PWR=1, NO_TX_AMP_PWR=1 */ - rf_path->switchctrl |= SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR | SWITCHCTRL_NO_RX_AMP_PWR; + rf_path->switchctrl |= SWITCHCTRL_AMP_BYPASS | SWITCHCTRL_NO_TX_AMP_PWR | + SWITCHCTRL_NO_RX_AMP_PWR; } - + switchctrl_set(rf_path, rf_path->switchctrl); hackrf_ui()->set_lna_power(enable); } /* antenna port power control */ -void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable) { +void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable) +{ if (enable) { rf_path->switchctrl |= SWITCHCTRL_ANT_PWR; } else { diff --git a/firmware/common/rf_path.h b/firmware/common/rf_path.h index e12a8c10..c9aec3b0 100644 --- a/firmware/common/rf_path.h +++ b/firmware/common/rf_path.h @@ -81,4 +81,4 @@ void rf_path_set_filter(rf_path_t* const rf_path, const rf_path_filter_t filter) void rf_path_set_lna(rf_path_t* const rf_path, const uint_fast8_t enable); void rf_path_set_antenna(rf_path_t* const rf_path, const uint_fast8_t enable); -#endif/*__RFPATH_H__*/ +#endif /*__RFPATH_H__*/ diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index d8b06ed1..6166c6d3 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -39,38 +39,39 @@ #include "hackrf_core.h" /* Default register values. */ -static const uint16_t rffc5071_regs_default[RFFC5071_NUM_REGS] = { - 0xbefa, /* 00 */ - 0x4064, /* 01 */ - 0x9055, /* 02 */ - 0x2d02, /* 03 */ - 0xacbf, /* 04 */ - 0xacbf, /* 05 */ - 0x0028, /* 06 */ - 0x0028, /* 07 */ - 0xff00, /* 08 */ - 0x8220, /* 09 */ - 0x0202, /* 0A */ - 0x4800, /* 0B */ - 0x1a94, /* 0C */ - 0xd89d, /* 0D */ - 0x8900, /* 0E */ - 0x1e84, /* 0F */ - 0x89d8, /* 10 */ - 0x9d00, /* 11 */ - 0x2a20, /* 12 */ - 0x0000, /* 13 */ - 0x0000, /* 14 */ - 0x0000, /* 15 */ - 0x0000, /* 16 */ - 0x4900, /* 17 */ - 0x0281, /* 18 */ - 0xf00f, /* 19 */ - 0x0000, /* 1A */ - 0x0000, /* 1B */ - 0xc840, /* 1C */ - 0x1000, /* 1D */ - 0x0005, /* 1E */ }; +static const uint16_t rffc5071_regs_default[RFFC5071_NUM_REGS] = { + 0xbefa, /* 00 */ + 0x4064, /* 01 */ + 0x9055, /* 02 */ + 0x2d02, /* 03 */ + 0xacbf, /* 04 */ + 0xacbf, /* 05 */ + 0x0028, /* 06 */ + 0x0028, /* 07 */ + 0xff00, /* 08 */ + 0x8220, /* 09 */ + 0x0202, /* 0A */ + 0x4800, /* 0B */ + 0x1a94, /* 0C */ + 0xd89d, /* 0D */ + 0x8900, /* 0E */ + 0x1e84, /* 0F */ + 0x89d8, /* 10 */ + 0x9d00, /* 11 */ + 0x2a20, /* 12 */ + 0x0000, /* 13 */ + 0x0000, /* 14 */ + 0x0000, /* 15 */ + 0x0000, /* 16 */ + 0x4900, /* 17 */ + 0x0281, /* 18 */ + 0xf00f, /* 19 */ + 0x0000, /* 1A */ + 0x0000, /* 1B */ + 0xc840, /* 1C */ + 0x1000, /* 1D */ + 0x0005, + /* 1E */}; /* Set up all registers according to defaults specified in docs. */ void rffc5071_init(rffc5071_driver_t* const drv) @@ -120,18 +121,20 @@ void rffc5071_setup(rffc5071_driver_t* const drv) rffc5071_regs_commit(drv); } -static uint16_t rffc5071_spi_read(rffc5071_driver_t* const drv, uint8_t r) { - (void)drv; +static uint16_t rffc5071_spi_read(rffc5071_driver_t* const drv, uint8_t r) +{ + (void) drv; - uint16_t data[] = { 0x80 | (r & 0x7f), 0xffff }; + uint16_t data[] = {0x80 | (r & 0x7f), 0xffff}; spi_bus_transfer(drv->bus, data, 2); return data[1]; } -static void rffc5071_spi_write(rffc5071_driver_t* const drv, uint8_t r, uint16_t v) { - (void)drv; +static void rffc5071_spi_write(rffc5071_driver_t* const drv, uint8_t r, uint16_t v) +{ + (void) drv; - uint16_t data[] = { 0x00 | (r & 0x7f), v }; + uint16_t data[] = {0x00 | (r & 0x7f), v}; spi_bus_transfer(drv->bus, data, 2); } @@ -164,21 +167,23 @@ static inline void rffc5071_reg_commit(rffc5071_driver_t* const drv, uint8_t r) void rffc5071_regs_commit(rffc5071_driver_t* const drv) { int r; - for(r = 0; r < RFFC5071_NUM_REGS; r++) { + for (r = 0; r < RFFC5071_NUM_REGS; r++) { if ((drv->regs_dirty >> r) & 0x1) { rffc5071_reg_commit(drv, r); } } } -void rffc5071_tx(rffc5071_driver_t* const drv) { +void rffc5071_tx(rffc5071_driver_t* const drv) +{ set_RFFC5071_ENBL(drv, 0); set_RFFC5071_FULLD(drv, 0); set_RFFC5071_MODE(drv, 1); /* mixer 2 used for both RX and TX */ rffc5071_regs_commit(drv); } -void rffc5071_rx(rffc5071_driver_t* const drv) { +void rffc5071_rx(rffc5071_driver_t* const drv) +{ set_RFFC5071_ENBL(drv, 0); set_RFFC5071_FULLD(drv, 0); set_RFFC5071_MODE(drv, 1); /* mixer 2 used for both RX and TX */ @@ -189,7 +194,8 @@ void rffc5071_rx(rffc5071_driver_t* const drv) { * This function turns on both mixer (full-duplex) on the RFFC5071, but our * current hardware designs do not support full-duplex operation. */ -void rffc5071_rxtx(rffc5071_driver_t* const drv) { +void rffc5071_rxtx(rffc5071_driver_t* const drv) +{ set_RFFC5071_ENBL(drv, 0); set_RFFC5071_FULLD(drv, 1); /* mixer 1 and mixer 2 (RXTX) */ rffc5071_regs_commit(drv); @@ -197,22 +203,25 @@ void rffc5071_rxtx(rffc5071_driver_t* const drv) { rffc5071_enable(drv); } -void rffc5071_disable(rffc5071_driver_t* const drv) { +void rffc5071_disable(rffc5071_driver_t* const drv) +{ set_RFFC5071_ENBL(drv, 0); rffc5071_regs_commit(drv); } -void rffc5071_enable(rffc5071_driver_t* const drv) { +void rffc5071_enable(rffc5071_driver_t* const drv) +{ set_RFFC5071_ENBL(drv, 1); rffc5071_regs_commit(drv); } -#define LO_MAX 5400 -#define REF_FREQ 40 -#define FREQ_ONE_MHZ (1000*1000) +#define LO_MAX 5400 +#define REF_FREQ 40 +#define FREQ_ONE_MHZ (1000 * 1000) /* configure frequency synthesizer in integer mode (lo in MHz) */ -uint64_t rffc5071_config_synth_int(rffc5071_driver_t* const drv, uint16_t lo) { +uint64_t rffc5071_config_synth_int(rffc5071_driver_t* const drv, uint16_t lo) +{ uint8_t lodiv; uint16_t fvco; uint8_t fbkdiv; @@ -220,7 +229,7 @@ uint64_t rffc5071_config_synth_int(rffc5071_driver_t* const drv, uint16_t lo) { uint64_t tune_freq_hz; uint16_t p1nmsb; uint8_t p1nlsb; - + /* Calculate n_lo */ uint8_t n_lo = 0; uint16_t x = LO_MAX / lo; @@ -245,14 +254,14 @@ uint64_t rffc5071_config_synth_int(rffc5071_driver_t* const drv, uint16_t lo) { set_RFFC5071_PLLCPL(drv, 2); } - uint64_t tmp_n = ((uint64_t)fvco << 29ULL) / (fbkdiv*REF_FREQ) ; + uint64_t tmp_n = ((uint64_t) fvco << 29ULL) / (fbkdiv * REF_FREQ); n = tmp_n >> 29ULL; p1nmsb = (tmp_n >> 13ULL) & 0xffff; p1nlsb = (tmp_n >> 5ULL) & 0xff; - - tune_freq_hz = (REF_FREQ * (tmp_n >> 5ULL) * fbkdiv * FREQ_ONE_MHZ) - / (lodiv * (1 << 24ULL)); + + tune_freq_hz = (REF_FREQ * (tmp_n >> 5ULL) * fbkdiv * FREQ_ONE_MHZ) / + (lodiv * (1 << 24ULL)); /* Path 2 */ set_RFFC5071_P2LODIV(drv, n_lo); @@ -267,7 +276,8 @@ uint64_t rffc5071_config_synth_int(rffc5071_driver_t* const drv, uint16_t lo) { } /* !!!!!!!!!!! hz is currently ignored !!!!!!!!!!! */ -uint64_t rffc5071_set_frequency(rffc5071_driver_t* const drv, uint16_t mhz) { +uint64_t rffc5071_set_frequency(rffc5071_driver_t* const drv, uint16_t mhz) +{ uint32_t tune_freq; rffc5071_disable(drv); diff --git a/firmware/common/rffc5071_spi.c b/firmware/common/rffc5071_spi.c index 5699f93c..ec7e89bf 100644 --- a/firmware/common/rffc5071_spi.c +++ b/firmware/common/rffc5071_spi.c @@ -25,37 +25,44 @@ #include "rffc5071_spi.h" -static void rffc5071_spi_target_select(spi_bus_t* const bus) { +static void rffc5071_spi_target_select(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; gpio_clear(config->gpio_select); } -static void rffc5071_spi_target_unselect(spi_bus_t* const bus) { +static void rffc5071_spi_target_unselect(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; gpio_set(config->gpio_select); } -static void rffc5071_spi_direction_out(spi_bus_t* const bus) { +static void rffc5071_spi_direction_out(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; gpio_output(config->gpio_data); } -static void rffc5071_spi_direction_in(spi_bus_t* const bus) { +static void rffc5071_spi_direction_in(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; gpio_input(config->gpio_data); } -static void rffc5071_spi_data_out(spi_bus_t* const bus, const bool bit) { +static void rffc5071_spi_data_out(spi_bus_t* const bus, const bool bit) +{ const rffc5071_spi_config_t* const config = bus->config; gpio_write(config->gpio_data, bit); } -static bool rffc5071_spi_data_in(spi_bus_t* const bus) { +static bool rffc5071_spi_data_in(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; return gpio_read(config->gpio_data); } -static void rffc5071_spi_bus_init(spi_bus_t* const bus) { +static void rffc5071_spi_bus_init(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; scu_pinmux(SCU_MIXER_SCLK, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); @@ -68,7 +75,8 @@ static void rffc5071_spi_bus_init(spi_bus_t* const bus) { gpio_clear(config->gpio_data); } -static void rffc5071_spi_target_init(spi_bus_t* const bus) { +static void rffc5071_spi_target_init(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; /* Configure GPIO pins. */ @@ -82,22 +90,26 @@ static void rffc5071_spi_target_init(spi_bus_t* const bus) { rffc5071_spi_target_unselect(bus); } -void rffc5071_spi_start(spi_bus_t* const bus, const void* const config) { +void rffc5071_spi_start(spi_bus_t* const bus, const void* const config) +{ bus->config = config; rffc5071_spi_bus_init(bus); rffc5071_spi_target_init(bus); } -void rffc5071_spi_stop(spi_bus_t* const bus) { - (void)bus; +void rffc5071_spi_stop(spi_bus_t* const bus) +{ + (void) bus; } -static void rffc5071_spi_serial_delay(spi_bus_t* const bus) { - (void)bus; +static void rffc5071_spi_serial_delay(spi_bus_t* const bus) +{ + (void) bus; __asm__("nop"); } -static void rffc5071_spi_sck(spi_bus_t* const bus) { +static void rffc5071_spi_sck(spi_bus_t* const bus) +{ const rffc5071_spi_config_t* const config = bus->config; rffc5071_spi_serial_delay(bus); @@ -107,13 +119,18 @@ static void rffc5071_spi_sck(spi_bus_t* const bus) { gpio_clear(config->gpio_clock); } -static uint32_t rffc5071_spi_exchange_bit(spi_bus_t* const bus, const uint32_t bit) { +static uint32_t rffc5071_spi_exchange_bit(spi_bus_t* const bus, const uint32_t bit) +{ rffc5071_spi_data_out(bus, bit); rffc5071_spi_sck(bus); return rffc5071_spi_data_in(bus) ? 1 : 0; } -static uint32_t rffc5071_spi_exchange_word(spi_bus_t* const bus, const uint32_t data, const size_t count) { +static uint32_t rffc5071_spi_exchange_word( + spi_bus_t* const bus, + const uint32_t data, + const size_t count) +{ size_t bits = count; const uint32_t msb = 1UL << (count - 1); uint32_t t = data; @@ -141,13 +158,14 @@ static uint32_t rffc5071_spi_exchange_word(spi_bus_t* const bus, const uint32_t * next 7 bits are register address, * next 16 bits are register value. */ -void rffc5071_spi_transfer(spi_bus_t* const bus, void* const _data, const size_t count) { - if( count != 2 ) { +void rffc5071_spi_transfer(spi_bus_t* const bus, void* const _data, const size_t count) +{ + if (count != 2) { return; } uint16_t* const data = _data; - + const bool direction_read = (data[0] >> 7) & 1; /* @@ -160,7 +178,7 @@ void rffc5071_spi_transfer(spi_bus_t* const bus, void* const _data, const size_t rffc5071_spi_target_select(bus); data[0] = rffc5071_spi_exchange_word(bus, data[0], 9); - if( direction_read ) { + if (direction_read) { rffc5071_spi_direction_in(bus); rffc5071_spi_sck(bus); } @@ -177,8 +195,12 @@ void rffc5071_spi_transfer(spi_bus_t* const bus, void* const _data, const size_t rffc5071_spi_sck(bus); } -void rffc5071_spi_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfer, const size_t count) { - if( count == 1 ) { +void rffc5071_spi_transfer_gather( + spi_bus_t* const bus, + const spi_transfer_t* const transfer, + const size_t count) +{ + if (count == 1) { rffc5071_spi_transfer(bus, transfer[0].data, transfer[0].count); } } diff --git a/firmware/common/rffc5071_spi.h b/firmware/common/rffc5071_spi.h index 8b577910..8a3475a0 100644 --- a/firmware/common/rffc5071_spi.h +++ b/firmware/common/rffc5071_spi.h @@ -36,6 +36,9 @@ typedef struct rffc5071_spi_config_t { void rffc5071_spi_start(spi_bus_t* const bus, const void* const config); void rffc5071_spi_stop(spi_bus_t* const bus); void rffc5071_spi_transfer(spi_bus_t* const bus, void* const data, const size_t count); -void rffc5071_spi_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfer, const size_t count); +void rffc5071_spi_transfer_gather( + spi_bus_t* const bus, + const spi_transfer_t* const transfer, + const size_t count); #endif // __RFFC5071_SPI_H diff --git a/firmware/common/rom_iap.c b/firmware/common/rom_iap.c index 011e6523..e72db977 100644 --- a/firmware/common/rom_iap.c +++ b/firmware/common/rom_iap.c @@ -19,24 +19,25 @@ * Boston, MA 02110-1301, USA. */ - #include "hackrf_core.h" +#include "hackrf_core.h" #include #include "rom_iap.h" #include "w25q80bv.h" -#define ROM_IAP_ADDR (0x10400100) +#define ROM_IAP_ADDR (0x10400100) #define ROM_IAP_UNDEF_ADDR (0x12345678) #define ROM_OTP_PART_ID_ADDR (0x40045000) -typedef void (* IAP_t)(uint32_t [],uint32_t[]); +typedef void (*IAP_t)(uint32_t[], uint32_t[]); -typedef struct { - const IAP_t IAP; /* If equal to 0x12345678 IAP not implemented */ - /* Other TBD */ -} *pENTRY_ROM_API_t; -#define pROM_API ((pENTRY_ROM_API_t)ROM_IAP_ADDR) +typedef struct { + const IAP_t IAP; /* If equal to 0x12345678 IAP not implemented */ + /* Other TBD */ +} * pENTRY_ROM_API_t; + +#define pROM_API ((pENTRY_ROM_API_t) ROM_IAP_ADDR) /* See Errata sheet ES_LPC43X0_A.pdf (LPC4350/30/20/10 Rev A) @@ -54,25 +55,23 @@ typedef struct { bool iap_is_implemented(void) { bool res; - if( *((uint32_t*)ROM_IAP_ADDR) != ROM_IAP_UNDEF_ADDR ) - { + if (*((uint32_t*) ROM_IAP_ADDR) != ROM_IAP_UNDEF_ADDR) { res = true; - }else - { + } else { res = false; } return res; } -isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res) +isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res) { uint32_t* p_u32_data; - - if( iap_is_implemented() ) - { - pROM_API->IAP( (uint32_t*)&iap_cmd_res->cmd_param, (uint32_t*)&iap_cmd_res->status_res); - }else - { + + if (iap_is_implemented()) { + pROM_API->IAP( + (uint32_t*) &iap_cmd_res->cmd_param, + (uint32_t*) &iap_cmd_res->status_res); + } else { /* Alternative way to retrieve Part Id on MCU with no IAP Read Serial No => Read Unique ID in SPIFI (only compatible with W25Q80BV @@ -80,25 +79,27 @@ isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res) spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv); w25q80bv_setup(&spi_flash); - switch(iap_cmd_res->cmd_param.command_code) - { - case IAP_CMD_READ_PART_ID_NO: - p_u32_data = (uint32_t*)ROM_OTP_PART_ID_ADDR; - iap_cmd_res->status_res.iap_result[0] = p_u32_data[0]; - iap_cmd_res->status_res.iap_result[1] = p_u32_data[1]; - iap_cmd_res->status_res.status_ret = CMD_SUCCESS; + switch (iap_cmd_res->cmd_param.command_code) { + case IAP_CMD_READ_PART_ID_NO: + p_u32_data = (uint32_t*) ROM_OTP_PART_ID_ADDR; + iap_cmd_res->status_res.iap_result[0] = p_u32_data[0]; + iap_cmd_res->status_res.iap_result[1] = p_u32_data[1]; + iap_cmd_res->status_res.status_ret = CMD_SUCCESS; break; - - case IAP_CMD_READ_SERIAL_NO: + + case IAP_CMD_READ_SERIAL_NO: /* Only 64bits used */ iap_cmd_res->status_res.iap_result[0] = 0; iap_cmd_res->status_res.iap_result[1] = 0; - w25q80bv_get_unique_id(&spi_flash, (w25q80bv_unique_id_t*)&iap_cmd_res->status_res.iap_result[2] ); - iap_cmd_res->status_res.status_ret = CMD_SUCCESS; + w25q80bv_get_unique_id( + &spi_flash, + (w25q80bv_unique_id_t*) &iap_cmd_res->status_res + .iap_result[2]); + iap_cmd_res->status_res.status_ret = CMD_SUCCESS; break; - - default: - iap_cmd_res->status_res.status_ret = ERROR_IAP_NOT_IMPLEMENTED; + + default: + iap_cmd_res->status_res.status_ret = ERROR_IAP_NOT_IMPLEMENTED; break; } } diff --git a/firmware/common/rom_iap.h b/firmware/common/rom_iap.h index 642f0425..57eb4515 100644 --- a/firmware/common/rom_iap.h +++ b/firmware/common/rom_iap.h @@ -95,21 +95,19 @@ typedef enum /* Special Error */ ERROR_IAP_NOT_IMPLEMENTED = 0x00000100 /* IAP is not implemented in this part */ } isp_iap_ret_code_t; + // clang-format on -typedef struct -{ +typedef struct { /* Input Command/Param */ - struct - { + struct { iap_cmd_code_t command_code; uint32_t iap_param[5]; } cmd_param; - + /* Output Status/Result */ - struct - { - isp_iap_ret_code_t status_ret; + struct { + isp_iap_ret_code_t status_ret; uint32_t iap_result[4]; } status_res; } iap_cmd_res_t; @@ -119,4 +117,4 @@ bool iap_is_implemented(void); isp_iap_ret_code_t iap_cmd_call(iap_cmd_res_t* iap_cmd_res); -#endif//__ROM_IAP__ +#endif //__ROM_IAP__ diff --git a/firmware/common/sct.h b/firmware/common/sct.h index 7617bd96..36d722a7 100644 --- a/firmware/common/sct.h +++ b/firmware/common/sct.h @@ -630,9 +630,8 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* -- SCT_OUTPUTDIRCTRL_SETCLR10: Set/clear operation on output 5. Value 0x3 is * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT (20) -#define SCT_OUTPUTDIRCTRL_SETCLR10_MASK \ - (0x03 << SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR10(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR10_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR10(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR10_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR10_SETCLR10 values */ /* Independent. Set and clear do not depend on any counter. */ @@ -647,9 +646,8 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* -- SCT_OUTPUTDIRCTRL_SETCLR11: Set/clear operation on output 11. Value 0x3 is * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT (22) -#define SCT_OUTPUTDIRCTRL_SETCLR11_MASK \ - (0x03 << SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR11(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR11_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR11(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR11_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR11_SETCLR11 values */ /* Independent. Set and clear do not depend on any counter. */ @@ -664,9 +662,8 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* -- SCT_OUTPUTDIRCTRL_SETCLR12: Set/clear operation on output 12. Value 0x3 is * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT (24) -#define SCT_OUTPUTDIRCTRL_SETCLR12_MASK \ - (0x03 << SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR12(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR12_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR12(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR12_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR12_SETCLR12 values */ /* Independent. Set and clear do not depend on any counter. */ @@ -681,9 +678,8 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* -- SCT_OUTPUTDIRCTRL_SETCLR13: Set/clear operation on output 13. Value 0x3 is * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT (26) -#define SCT_OUTPUTDIRCTRL_SETCLR13_MASK \ - (0x03 << SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR13(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR13_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR13(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR13_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR13_SETCLR13 values */ /* Independent. Set and clear do not depend on any counter. */ @@ -698,9 +694,8 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* -- SCT_OUTPUTDIRCTRL_SETCLR14: Set/clear operation on output 14. Value 0x3 is * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT (28) -#define SCT_OUTPUTDIRCTRL_SETCLR14_MASK \ - (0x03 << SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR14(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR14_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR14(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR14_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR14_SETCLR14 values */ /* Independent. Set and clear do not depend on any counter. */ @@ -715,9 +710,8 @@ EV[0:15]_CTRL[MATCHMEM, DIRECTION] /* -- SCT_OUTPUTDIRCTRL_SETCLR15: Set/clear operation on output 15. Value 0x3 is * reserved. Do not program this value. */ #define SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT (30) -#define SCT_OUTPUTDIRCTRL_SETCLR15_MASK \ - (0x03 << SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT) -#define SCT_OUTPUTDIRCTRL_SETCLR15(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR15_MASK (0x03 << SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT) +#define SCT_OUTPUTDIRCTRL_SETCLR15(x) ((x) << SCT_OUTPUTDIRCTRL_SETCLR15_SHIFT) /* SCT_OUTPUTDIRCTRL_SETCLR15_SETCLR15 values */ /* Independent. Set and clear do not depend on any counter. */ diff --git a/firmware/common/sgpio.c b/firmware/common/sgpio.c index 0db01941..8bd63e1a 100644 --- a/firmware/common/sgpio.c +++ b/firmware/common/sgpio.c @@ -32,7 +32,8 @@ static void update_q_invert(sgpio_config_t* const config); #endif -void sgpio_configure_pin_functions(sgpio_config_t* const config) { +void sgpio_configure_pin_functions(sgpio_config_t* const config) +{ scu_pinmux(SCU_PINMUX_SGPIO0, SCU_GPIO_FAST | SCU_CONF_FUNCTION3); scu_pinmux(SCU_PINMUX_SGPIO1, SCU_GPIO_FAST | SCU_CONF_FUNCTION3); scu_pinmux(SCU_PINMUX_SGPIO2, SCU_GPIO_FAST | SCU_CONF_FUNCTION2); @@ -46,21 +47,19 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config) { scu_pinmux(SCU_PINMUX_SGPIO10, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); scu_pinmux(SCU_PINMUX_SGPIO11, SCU_GPIO_FAST | SCU_CONF_FUNCTION6); scu_pinmux(SCU_PINMUX_SGPIO12, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); /* GPIO0[13] */ - scu_pinmux(SCU_PINMUX_SGPIO13, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */ - scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[13] */ - scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[14] */ + scu_pinmux(SCU_PINMUX_SGPIO13, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */ + scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[13] */ + scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[14] */ sgpio_cpld_stream_rx_set_q_invert(config, 0); - hw_sync_enable(0); + hw_sync_enable(0); gpio_output(config->gpio_rx_q_invert); gpio_output(config->gpio_hw_sync_enable); } -void sgpio_set_slice_mode( - sgpio_config_t* const config, - const bool multi_slice -) { +void sgpio_set_slice_mode(sgpio_config_t* const config, const bool multi_slice) +{ config->slice_mode_multislice = multi_slice; } @@ -95,16 +94,13 @@ void sgpio_set_slice_mode( SGPIO10 Disable Output (1/High=Disable codec data stream, 0/Low=Enable codec data stream) SGPIO11 Direction Output (1/High=TX mode LPC43xx=>CPLD=>DAC, 0/Low=RX mode LPC43xx<=CPLD<=ADC) */ -void sgpio_configure( - sgpio_config_t* const config, - const sgpio_direction_t direction -) { +void sgpio_configure(sgpio_config_t* const config, const sgpio_direction_t direction) +{ // Disable all counters during configuration SGPIO_CTRL_ENABLE = 0; - // Set SGPIO output values. - const uint_fast8_t cpld_direction = - (direction == SGPIO_DIRECTION_TX) ? 1 : 0; + // Set SGPIO output values. + const uint_fast8_t cpld_direction = (direction == SGPIO_DIRECTION_TX) ? 1 : 0; // clang-format off SGPIO_GPIO_OUTREG = @@ -123,9 +119,7 @@ void sgpio_configure( // Enable SGPIO pin outputs. const uint_fast16_t sgpio_gpio_data_direction = - (direction == SGPIO_DIRECTION_TX) - ? (0xFF << 0) - : (0x00 << 0); + (direction == SGPIO_DIRECTION_TX) ? (0xFF << 0) : (0x00 << 0); // clang-format off SGPIO_GPIO_OENREG = @@ -162,7 +156,7 @@ void sgpio_configure( const uint_fast8_t output_multiplexing_mode = config->slice_mode_multislice ? 11 : 9; /* SGPIO0 to SGPIO7 */ - for(uint_fast8_t i=0; i<8; i++) { + for (uint_fast8_t i = 0; i < 8; i++) { // SGPIO pin 0 outputs slice A bit "i". SGPIO_OUT_MUX_CFG(i) = SGPIO_OUT_MUX_CFG_P_OE_CFG(0) // 11 = dout_doutm8c (8-bit mode 8c) (multislice L0/7, N0/7) @@ -181,17 +175,16 @@ void sgpio_configure( SGPIO_SLICE_L, }; const uint_fast8_t slice_gpdma = SGPIO_SLICE_H; - + const uint_fast8_t pos = config->slice_mode_multislice ? 0x1f : 0x03; const bool single_slice = !config->slice_mode_multislice; const uint_fast8_t slice_count = config->slice_mode_multislice ? 8 : 1; - + // Also enable slice D for clkout to the SCTimer uint32_t slice_enable_mask = BIT3; /* Configure Slice A, I, E, J, C, K, F, L (sgpio_slice_mode_multislice mode) */ - for(uint_fast8_t i=0; islice_mode_multislice == false ) { + if (config->slice_mode_multislice == false) { // clang-format off SGPIO_MUX_CFG(slice_gpdma) = SGPIO_MUX_CFG_CONCAT_ORDER(0) // Self-loop @@ -258,15 +248,14 @@ void sgpio_configure( ; // clang-format on - SGPIO_PRESET(slice_gpdma) = 0; // External clock, don't care - SGPIO_COUNT(slice_gpdma) = 0; // External clock, don't care - SGPIO_POS(slice_gpdma) = - SGPIO_POS_POS_RESET(0x1f) - | SGPIO_POS_POS(0x1f) - ; - SGPIO_REG(slice_gpdma) = 0x11111111; // Primary output data register, LSB -> out - SGPIO_REG_SS(slice_gpdma) = 0x11111111; // Shadow output data register, LSB -> out1 - + SGPIO_PRESET(slice_gpdma) = 0; // External clock, don't care + SGPIO_COUNT(slice_gpdma) = 0; // External clock, don't care + SGPIO_POS(slice_gpdma) = SGPIO_POS_POS_RESET(0x1f) | SGPIO_POS_POS(0x1f); + SGPIO_REG(slice_gpdma) = + 0x11111111; // Primary output data register, LSB -> out + SGPIO_REG_SS(slice_gpdma) = + 0x11111111; // Shadow output data register, LSB -> out1 + slice_enable_mask |= (1 << slice_gpdma); } @@ -274,24 +263,26 @@ void sgpio_configure( SGPIO_CTRL_ENABLE = slice_enable_mask; } -void sgpio_cpld_stream_enable(sgpio_config_t* const config) { - (void)config; +void sgpio_cpld_stream_enable(sgpio_config_t* const config) +{ + (void) config; // Enable codec data stream. SGPIO_GPIO_OUTREG &= ~(1L << 10); /* SGPIO10 */ } -void sgpio_cpld_stream_disable(sgpio_config_t* const config) { - (void)config; +void sgpio_cpld_stream_disable(sgpio_config_t* const config) +{ + (void) config; // Disable codec data stream. SGPIO_GPIO_OUTREG |= (1L << 10); /* SGPIO10 */ } -bool sgpio_cpld_stream_is_enabled(sgpio_config_t* const config) { - (void)config; +bool sgpio_cpld_stream_is_enabled(sgpio_config_t* const config) +{ + (void) config; return (SGPIO_GPIO_OUTREG & (1L << 10)) == 0; /* SGPIO10 */ } - #ifdef RAD1O /* The rad1o hardware has a bug which makes it * necessary to also switch between the two options based @@ -306,24 +297,28 @@ static bool sgpio_invert = false; /* Called when TX/RX changes od sgpio_cpld_stream_rx_set_q_invert * gets called. */ -static void update_q_invert(sgpio_config_t* const config) { +static void update_q_invert(sgpio_config_t* const config) +{ /* 1=Output SGPIO11 High(TX mode), 0=Output SGPIO11 Low(RX mode) */ bool tx_mode = (SGPIO_GPIO_OUTREG & (1 << 11)) > 0; /* 0.13: P1_18 */ - if( !sgpio_invert & !tx_mode) { + if (!sgpio_invert & !tx_mode) { gpio_write(config->gpio_rx_q_invert, 1); - } else if( !sgpio_invert & tx_mode) { + } else if (!sgpio_invert & tx_mode) { gpio_write(config->gpio_rx_q_invert, 0); - } else if( sgpio_invert & !tx_mode) { + } else if (sgpio_invert & !tx_mode) { gpio_write(config->gpio_rx_q_invert, 0); - } else if( sgpio_invert & tx_mode) { + } else if (sgpio_invert & tx_mode) { gpio_write(config->gpio_rx_q_invert, 1); } } -void sgpio_cpld_stream_rx_set_q_invert(sgpio_config_t* const config, const uint_fast8_t invert) { - if( invert ) { +void sgpio_cpld_stream_rx_set_q_invert( + sgpio_config_t* const config, + const uint_fast8_t invert) +{ + if (invert) { sgpio_invert = true; } else { sgpio_invert = false; @@ -333,7 +328,10 @@ void sgpio_cpld_stream_rx_set_q_invert(sgpio_config_t* const config, const uint_ } #else -void sgpio_cpld_stream_rx_set_q_invert(sgpio_config_t* const config, const uint_fast8_t invert) { +void sgpio_cpld_stream_rx_set_q_invert( + sgpio_config_t* const config, + const uint_fast8_t invert) +{ gpio_write(config->gpio_rx_q_invert, invert); } #endif diff --git a/firmware/common/sgpio.h b/firmware/common/sgpio.h index 7debe123..b2ee0178 100644 --- a/firmware/common/sgpio.h +++ b/firmware/common/sgpio.h @@ -42,18 +42,14 @@ typedef struct sgpio_config_t { void sgpio_configure_pin_functions(sgpio_config_t* const config); void sgpio_test_interface(sgpio_config_t* const config); -void sgpio_set_slice_mode( - sgpio_config_t* const config, - const bool multi_slice -); -void sgpio_configure( - sgpio_config_t* const config, - const sgpio_direction_t direction -); +void sgpio_set_slice_mode(sgpio_config_t* const config, const bool multi_slice); +void sgpio_configure(sgpio_config_t* const config, const sgpio_direction_t direction); void sgpio_cpld_stream_enable(sgpio_config_t* const config); void sgpio_cpld_stream_disable(sgpio_config_t* const config); bool sgpio_cpld_stream_is_enabled(sgpio_config_t* const config); -void sgpio_cpld_stream_rx_set_q_invert(sgpio_config_t* const config, const uint_fast8_t invert); +void sgpio_cpld_stream_rx_set_q_invert( + sgpio_config_t* const config, + const uint_fast8_t invert); -#endif//__SGPIO_H__ +#endif //__SGPIO_H__ diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c index ec6f3714..7b023ea0 100644 --- a/firmware/common/si5351c.c +++ b/firmware/common/si5351c.c @@ -29,15 +29,15 @@ uint8_t clk3_ctrl = SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE; /* write to single register */ void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val) { - const uint8_t data_tx[] = { reg, val }; + const uint8_t data_tx[] = {reg, val}; si5351c_write(drv, data_tx, 2); } /* read single register */ uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg) { - const uint8_t data_tx[] = { reg }; - uint8_t data_rx[] = { 0x00 }; + const uint8_t data_tx[] = {reg}; + uint8_t data_rx[] = {0x00}; i2c_bus_transfer(drv->bus, drv->i2c_address, data_tx, 1, data_rx, 1); return data_rx[0]; } @@ -46,7 +46,10 @@ uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg) * Write to one or more contiguous registers. data[0] should be the first * register number, one or more values follow. */ -void si5351c_write(si5351c_driver_t* const drv, const uint8_t* const data, const size_t data_count) +void si5351c_write( + si5351c_driver_t* const drv, + const uint8_t* const data, + const size_t data_count) { i2c_bus_transfer(drv->bus, drv->i2c_address, data, data_count, NULL, 0); } @@ -54,30 +57,30 @@ void si5351c_write(si5351c_driver_t* const drv, const uint8_t* const data, const /* Disable all CLKx outputs. */ void si5351c_disable_all_outputs(si5351c_driver_t* const drv) { - uint8_t data[] = { 3, 0xFF }; + uint8_t data[] = {3, 0xFF}; si5351c_write(drv, data, sizeof(data)); } /* Turn off OEB pin control for all CLKx */ void si5351c_disable_oeb_pin_control(si5351c_driver_t* const drv) { - uint8_t data[] = { 9, 0xFF }; + uint8_t data[] = {9, 0xFF}; si5351c_write(drv, data, sizeof(data)); } /* Power down all CLKx */ void si5351c_power_down_all_clocks(si5351c_driver_t* const drv) { - uint8_t data[] = { 16 - , SI5351C_CLK_POWERDOWN - , SI5351C_CLK_POWERDOWN - , SI5351C_CLK_POWERDOWN - , SI5351C_CLK_POWERDOWN - , SI5351C_CLK_POWERDOWN - , SI5351C_CLK_POWERDOWN - , SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE - , SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE - }; + uint8_t data[] = { + 16, + SI5351C_CLK_POWERDOWN, + SI5351C_CLK_POWERDOWN, + SI5351C_CLK_POWERDOWN, + SI5351C_CLK_POWERDOWN, + SI5351C_CLK_POWERDOWN, + SI5351C_CLK_POWERDOWN, + SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE, + SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE}; si5351c_write(drv, data, sizeof(data)); } @@ -88,7 +91,7 @@ void si5351c_power_down_all_clocks(si5351c_driver_t* const drv) */ void si5351c_set_crystal_configuration(si5351c_driver_t* const drv) { - uint8_t data[] = { 183, 0x80 }; + uint8_t data[] = {183, 0x80}; si5351c_write(drv, data, sizeof(data)); } @@ -98,7 +101,7 @@ void si5351c_set_crystal_configuration(si5351c_driver_t* const drv) */ void si5351c_enable_xo_and_ms_fanout(si5351c_driver_t* const drv) { - uint8_t data[] = { 187, 0xD0 }; + uint8_t data[] = {187, 0xD0}; si5351c_write(drv, data, sizeof(data)); } @@ -110,7 +113,7 @@ void si5351c_enable_xo_and_ms_fanout(si5351c_driver_t* const drv) */ void si5351c_configure_pll_sources(si5351c_driver_t* const drv) { - uint8_t data[] = { 15, 0x08 }; + uint8_t data[] = {15, 0x08}; si5351c_write(drv, data, sizeof(data)); } @@ -119,7 +122,7 @@ void si5351c_configure_pll_sources(si5351c_driver_t* const drv) void si5351c_configure_pll_multisynth(si5351c_driver_t* const drv) { /*PLLA: 25MHz XTAL * (0x0e00+512)/128 = 800mhz -> int mode */ - uint8_t data[] = { 26, 0x00, 0x01, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00 }; + uint8_t data[] = {26, 0x00, 0x01, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00}; si5351c_write(drv, data, sizeof(data)); /*PLLB: 10MHz CLKIN * (0x2600+512)/128 = 800mhz */ @@ -131,14 +134,17 @@ void si5351c_configure_pll_multisynth(si5351c_driver_t* const drv) void si5351c_reset_pll(si5351c_driver_t* const drv) { /* reset PLLA and PLLB */ - uint8_t data[] = { 177, 0xA0 }; + uint8_t data[] = {177, 0xA0}; si5351c_write(drv, data, sizeof(data)); } -void si5351c_configure_multisynth(si5351c_driver_t* const drv, - const uint_fast8_t ms_number, - const uint32_t p1, const uint32_t p2, const uint32_t p3, - const uint_fast8_t r_div) +void si5351c_configure_multisynth( + si5351c_driver_t* const drv, + const uint_fast8_t ms_number, + const uint32_t p1, + const uint32_t p2, + const uint32_t p3, + const uint_fast8_t r_div) { /* * TODO: Check for p3 > 0? 0 has no meaning in fractional mode? @@ -154,19 +160,21 @@ void si5351c_configure_multisynth(si5351c_driver_t* const drv, */ const uint_fast8_t register_number = 42 + (ms_number * 8); uint8_t data[] = { - register_number, - (p3 >> 8) & 0xFF, - (p3 >> 0) & 0xFF, - (r_div << 4) | (0 << 2) | ((p1 >> 16) & 0x3), - (p1 >> 8) & 0xFF, - (p1 >> 0) & 0xFF, - (((p3 >> 16) & 0xF) << 4) | (((p2 >> 16) & 0xF) << 0), - (p2 >> 8) & 0xFF, - (p2 >> 0) & 0xFF }; + register_number, + (p3 >> 8) & 0xFF, + (p3 >> 0) & 0xFF, + (r_div << 4) | (0 << 2) | ((p1 >> 16) & 0x3), + (p1 >> 8) & 0xFF, + (p1 >> 0) & 0xFF, + (((p3 >> 16) & 0xF) << 4) | (((p2 >> 16) & 0xF) << 0), + (p2 >> 8) & 0xFF, + (p2 >> 0) & 0xFF}; si5351c_write(drv, data, sizeof(data)); } -void si5351c_configure_clock_control(si5351c_driver_t* const drv, const enum pll_sources source) +void si5351c_configure_clock_control( + si5351c_driver_t* const drv, + const enum pll_sources source) { uint8_t pll; #ifdef RAD1O @@ -186,23 +194,37 @@ void si5351c_configure_clock_control(si5351c_driver_t* const drv, const enum pll #endif /* Clock to CPU is deactivated as it is not used and creates noise */ /* External clock output is kept in current state */ - uint8_t data[] = {16 - ,SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(pll) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA) - ,SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) | SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA) | SI5351C_CLK_INV - ,SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) | SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA) - ,clk3_ctrl - ,SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA) | SI5351C_CLK_INV - ,SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA) - ,SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE /*not connected, but: plla int mode*/ - ,SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE /*not connected, but: plla int mode*/ - }; + uint8_t data[] = { + 16, + SI5351C_CLK_FRAC_MODE | SI5351C_CLK_PLL_SRC(pll) | + SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | + SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA), + SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | + SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) | + SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA) | SI5351C_CLK_INV, + SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | + SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_0_4) | + SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_2MA), + clk3_ctrl, + SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | + SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | + SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_6MA) | SI5351C_CLK_INV, + SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | + SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | + SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_4MA), + SI5351C_CLK_POWERDOWN | + SI5351C_CLK_INT_MODE /*not connected, but: plla int mode*/ + , + SI5351C_CLK_POWERDOWN | + SI5351C_CLK_INT_MODE /*not connected, but: plla int mode*/ + }; si5351c_write(drv, data, sizeof(data)); } -#define SI5351C_CLK_ENABLE(x) (0< @@ -33,31 +32,31 @@ extern "C" #include "i2c_bus.h" -#define SI_INTDIV(x) (x*128-512) +#define SI_INTDIV(x) (x * 128 - 512) -#define SI5351C_CLK_POWERDOWN (1<<7) -#define SI5351C_CLK_INT_MODE (1<<6) -#define SI5351C_CLK_FRAC_MODE (0<<6) +#define SI5351C_CLK_POWERDOWN (1 << 7) +#define SI5351C_CLK_INT_MODE (1 << 6) +#define SI5351C_CLK_FRAC_MODE (0 << 6) -#define SI5351C_CLK_PLL_SRC(x) (x<<5) -#define SI5351C_CLK_PLL_SRC_A 0 -#define SI5351C_CLK_PLL_SRC_B 1 +#define SI5351C_CLK_PLL_SRC(x) (x << 5) +#define SI5351C_CLK_PLL_SRC_A 0 +#define SI5351C_CLK_PLL_SRC_B 1 -#define SI5351C_CLK_INV (1<<4) +#define SI5351C_CLK_INV (1 << 4) -#define SI5351C_CLK_SRC(x) (x<<2) -#define SI5351C_CLK_SRC_XTAL 0 -#define SI5351C_CLK_SRC_CLKIN 1 -#define SI5351C_CLK_SRC_MULTISYNTH_0_4 2 -#define SI5351C_CLK_SRC_MULTISYNTH_SELF 3 +#define SI5351C_CLK_SRC(x) (x << 2) +#define SI5351C_CLK_SRC_XTAL 0 +#define SI5351C_CLK_SRC_CLKIN 1 +#define SI5351C_CLK_SRC_MULTISYNTH_0_4 2 +#define SI5351C_CLK_SRC_MULTISYNTH_SELF 3 -#define SI5351C_CLK_IDRV(x) (x<<0) +#define SI5351C_CLK_IDRV(x) (x << 0) #define SI5351C_CLK_IDRV_2MA 0 #define SI5351C_CLK_IDRV_4MA 1 #define SI5351C_CLK_IDRV_6MA 2 #define SI5351C_CLK_IDRV_8MA 3 -#define SI5351C_LOS (1<<4) +#define SI5351C_LOS (1 << 4) enum pll_sources { PLL_SOURCE_UNINITIALIZED = -1, @@ -78,19 +77,30 @@ void si5351c_enable_xo_and_ms_fanout(si5351c_driver_t* const drv); void si5351c_configure_pll_sources(si5351c_driver_t* const drv); void si5351c_configure_pll_multisynth(si5351c_driver_t* const drv); void si5351c_reset_pll(si5351c_driver_t* const drv); -void si5351c_configure_multisynth(si5351c_driver_t* const drv, - const uint_fast8_t ms_number, - const uint32_t p1, const uint32_t p2, const uint32_t p3, - const uint_fast8_t r_div); -void si5351c_configure_clock_control(si5351c_driver_t* const drv, const enum pll_sources source); +void si5351c_configure_multisynth( + si5351c_driver_t* const drv, + const uint_fast8_t ms_number, + const uint32_t p1, + const uint32_t p2, + const uint32_t p3, + const uint_fast8_t r_div); +void si5351c_configure_clock_control( + si5351c_driver_t* const drv, + const enum pll_sources source); void si5351c_enable_clock_outputs(si5351c_driver_t* const drv); -void si5351c_set_int_mode(si5351c_driver_t* const drv, const uint_fast8_t ms_number, const uint_fast8_t on); +void si5351c_set_int_mode( + si5351c_driver_t* const drv, + const uint_fast8_t ms_number, + const uint_fast8_t on); void si5351c_set_clock_source(si5351c_driver_t* const drv, const enum pll_sources source); bool si5351c_clkin_signal_valid(si5351c_driver_t* const drv); void si5351c_write_single(si5351c_driver_t* const drv, uint8_t reg, uint8_t val); uint8_t si5351c_read_single(si5351c_driver_t* const drv, uint8_t reg); -void si5351c_write(si5351c_driver_t* const drv, const uint8_t* const data, const size_t data_count); +void si5351c_write( + si5351c_driver_t* const drv, + const uint8_t* const data, + const size_t data_count); void si5351c_clkout_enable(si5351c_driver_t* const drv, uint8_t enable); #ifdef __cplusplus diff --git a/firmware/common/spi_bus.c b/firmware/common/spi_bus.c index 7bf942c9..ab89b291 100644 --- a/firmware/common/spi_bus.c +++ b/firmware/common/spi_bus.c @@ -21,18 +21,25 @@ #include "spi_bus.h" -void spi_bus_start(spi_bus_t* const bus, const void* const config) { +void spi_bus_start(spi_bus_t* const bus, const void* const config) +{ bus->start(bus, config); } -void spi_bus_stop(spi_bus_t* const bus) { +void spi_bus_stop(spi_bus_t* const bus) +{ bus->stop(bus); } -void spi_bus_transfer(spi_bus_t* const bus, void* const data, const size_t count) { +void spi_bus_transfer(spi_bus_t* const bus, void* const data, const size_t count) +{ bus->transfer(bus, data, count); } -void spi_bus_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count) { +void spi_bus_transfer_gather( + spi_bus_t* const bus, + const spi_transfer_t* const transfers, + const size_t count) +{ bus->transfer_gather(bus, transfers, count); } diff --git a/firmware/common/spi_bus.h b/firmware/common/spi_bus.h index e1257d41..f966012b 100644 --- a/firmware/common/spi_bus.h +++ b/firmware/common/spi_bus.h @@ -38,12 +38,18 @@ struct spi_bus_t { void (*start)(spi_bus_t* const bus, const void* const config); void (*stop)(spi_bus_t* const bus); void (*transfer)(spi_bus_t* const bus, void* const data, const size_t count); - void (*transfer_gather)(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count); + void (*transfer_gather)( + spi_bus_t* const bus, + const spi_transfer_t* const transfers, + const size_t count); }; void spi_bus_start(spi_bus_t* const bus, const void* const config); void spi_bus_stop(spi_bus_t* const bus); void spi_bus_transfer(spi_bus_t* const bus, void* const data, const size_t count); -void spi_bus_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count); +void spi_bus_transfer_gather( + spi_bus_t* const bus, + const spi_transfer_t* const transfers, + const size_t count); -#endif/*__SPI_BUS_H__*/ +#endif /*__SPI_BUS_H__*/ diff --git a/firmware/common/spi_ssp.c b/firmware/common/spi_ssp.c index f0d0aee8..6680e8e9 100644 --- a/firmware/common/spi_ssp.c +++ b/firmware/common/spi_ssp.c @@ -24,10 +24,11 @@ #include #include -void spi_ssp_start(spi_bus_t* const bus, const void* const _config) { +void spi_ssp_start(spi_bus_t* const bus, const void* const _config) +{ const ssp_config_t* const config = _config; - if( bus->obj == (void*)SSP0_BASE ) { + if (bus->obj == (void*) SSP0_BASE) { /* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */ RESET_CTRL1 = RESET_CTRL1_SPIFI_RST; } @@ -37,39 +38,36 @@ void spi_ssp_start(spi_bus_t* const bus, const void* const _config) { SSP_CR1(bus->obj) = 0; SSP_CPSR(bus->obj) = config->clock_prescale_rate; - SSP_CR0(bus->obj) = - (config->serial_clock_rate << 8) - | SSP_CPOL_0_CPHA_0 - | SSP_FRAME_SPI - | config->data_bits - ; + SSP_CR0(bus->obj) = (config->serial_clock_rate << 8) | SSP_CPOL_0_CPHA_0 | + SSP_FRAME_SPI | config->data_bits; SSP_CR1(bus->obj) = - SSP_SLAVE_OUT_ENABLE - | SSP_MASTER - | SSP_ENABLE - | SSP_MODE_NORMAL - ; + SSP_SLAVE_OUT_ENABLE | SSP_MASTER | SSP_ENABLE | SSP_MODE_NORMAL; bus->config = config; } -void spi_ssp_stop(spi_bus_t* const bus) { +void spi_ssp_stop(spi_bus_t* const bus) +{ SSP_CR1(bus->obj) = 0; } -static void spi_ssp_wait_for_tx_fifo_not_full(spi_bus_t* const bus) { - while( (SSP_SR(bus->obj) & SSP_SR_TNF) == 0 ) {} +static void spi_ssp_wait_for_tx_fifo_not_full(spi_bus_t* const bus) +{ + while ((SSP_SR(bus->obj) & SSP_SR_TNF) == 0) {} } -static void spi_ssp_wait_for_rx_fifo_not_empty(spi_bus_t* const bus) { - while( (SSP_SR(bus->obj) & SSP_SR_RNE) == 0 ) {} +static void spi_ssp_wait_for_rx_fifo_not_empty(spi_bus_t* const bus) +{ + while ((SSP_SR(bus->obj) & SSP_SR_RNE) == 0) {} } -static void spi_ssp_wait_for_not_busy(spi_bus_t* const bus) { - while( SSP_SR(bus->obj) & SSP_SR_BSY ) {} +static void spi_ssp_wait_for_not_busy(spi_bus_t* const bus) +{ + while (SSP_SR(bus->obj) & SSP_SR_BSY) {} } -static uint32_t spi_ssp_transfer_word(spi_bus_t* const bus, const uint32_t data) { +static uint32_t spi_ssp_transfer_word(spi_bus_t* const bus, const uint32_t data) +{ spi_ssp_wait_for_tx_fifo_not_full(bus); SSP_DR(bus->obj) = data; spi_ssp_wait_for_not_busy(bus); @@ -77,23 +75,27 @@ static uint32_t spi_ssp_transfer_word(spi_bus_t* const bus, const uint32_t data) return SSP_DR(bus->obj); } -void spi_ssp_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count) { +void spi_ssp_transfer_gather( + spi_bus_t* const bus, + const spi_transfer_t* const transfers, + const size_t count) +{ const ssp_config_t* const config = bus->config; const bool word_size_u16 = (SSP_CR0(bus->obj) & 0xf) > SSP_DATA_8BITS; gpio_clear(config->gpio_select); - for(size_t i=0; igpio_select); } -void spi_ssp_transfer(spi_bus_t* const bus, void* const data, const size_t count) { +void spi_ssp_transfer(spi_bus_t* const bus, void* const data, const size_t count) +{ const spi_transfer_t transfers[] = { - { data, count }, + {data, count}, }; spi_ssp_transfer_gather(bus, transfers, 1); } diff --git a/firmware/common/spi_ssp.h b/firmware/common/spi_ssp.h index 2b2f884f..d9ca6719 100644 --- a/firmware/common/spi_ssp.h +++ b/firmware/common/spi_ssp.h @@ -41,6 +41,9 @@ typedef struct ssp_config_t { void spi_ssp_start(spi_bus_t* const bus, const void* const config); void spi_ssp_stop(spi_bus_t* const bus); void spi_ssp_transfer(spi_bus_t* const bus, void* const data, const size_t count); -void spi_ssp_transfer_gather(spi_bus_t* const bus, const spi_transfer_t* const transfers, const size_t count); +void spi_ssp_transfer_gather( + spi_bus_t* const bus, + const spi_transfer_t* const transfers, + const size_t count); -#endif/*__SPI_SSP_H__*/ +#endif /*__SPI_SSP_H__*/ diff --git a/firmware/common/streaming.c b/firmware/common/streaming.c index 01831a4f..836df893 100644 --- a/firmware/common/streaming.c +++ b/firmware/common/streaming.c @@ -25,12 +25,14 @@ #include #include -void baseband_streaming_enable(sgpio_config_t* const sgpio_config) { +void baseband_streaming_enable(sgpio_config_t* const sgpio_config) +{ SGPIO_SET_EN_1 = (1 << SGPIO_SLICE_A); sgpio_cpld_stream_enable(sgpio_config); } -void baseband_streaming_disable(sgpio_config_t* const sgpio_config) { +void baseband_streaming_disable(sgpio_config_t* const sgpio_config) +{ sgpio_cpld_stream_disable(sgpio_config); } diff --git a/firmware/common/streaming.h b/firmware/common/streaming.h index 4f26cd10..182e7abb 100644 --- a/firmware/common/streaming.h +++ b/firmware/common/streaming.h @@ -28,4 +28,4 @@ void baseband_streaming_enable(sgpio_config_t* const sgpio_config); void baseband_streaming_disable(sgpio_config_t* const sgpio_config); -#endif/*__STREAMING_H__*/ +#endif /*__STREAMING_H__*/ diff --git a/firmware/common/tuning.c b/firmware/common/tuning.c index 6f42c154..1a5c97a2 100644 --- a/firmware/common/tuning.c +++ b/firmware/common/tuning.c @@ -30,7 +30,7 @@ #include #include -#define FREQ_ONE_MHZ (1000*1000) +#define FREQ_ONE_MHZ (1000 * 1000) #define MIN_LP_FREQ_MHZ (0) #define MAX_LP_FREQ_MHZ (2150) @@ -38,17 +38,18 @@ #define MIN_BYPASS_FREQ_MHZ (2150) #define MAX_BYPASS_FREQ_MHZ (2750) -#define MIN_HP_FREQ_MHZ (2750) +#define MIN_HP_FREQ_MHZ (2750) #define MID1_HP_FREQ_MHZ (3600) #define MID2_HP_FREQ_MHZ (5100) -#define MAX_HP_FREQ_MHZ (7250) +#define MAX_HP_FREQ_MHZ (7250) #define MIN_LO_FREQ_HZ (84375000) #define MAX_LO_FREQ_HZ (5400000000ULL) -static uint32_t max2837_freq_nominal_hz=2560000000; +static uint32_t max2837_freq_nominal_hz = 2560000000; uint64_t freq_cache = 100000000; + /* * Set freq/tuning between 0MHz to 7250 MHz (less than 16bits really used) * hz between 0 to 999999 Hz (not checked) @@ -68,8 +69,7 @@ bool set_freq(const uint64_t freq) const max2837_mode_t prior_max2837_mode = max2837_mode(&max2837); max2837_set_mode(&max2837, MAX2837_MODE_STANDBY); - if(freq_mhz < MAX_LP_FREQ_MHZ) - { + if (freq_mhz < MAX_LP_FREQ_MHZ) { rf_path_set_filter(&rf_path, RF_PATH_FILTER_LOW_PASS); #ifdef RAD1O max2837_freq_nominal_hz = 2300000000; @@ -82,18 +82,17 @@ bool set_freq(const uint64_t freq) real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_mhz); max2837_set_frequency(&max2837, real_mixer_freq_hz - freq); sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 1); - }else if( (freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ) ) - { + } else if ((freq_mhz >= MIN_BYPASS_FREQ_MHZ) && (freq_mhz < MAX_BYPASS_FREQ_MHZ)) { rf_path_set_filter(&rf_path, RF_PATH_FILTER_BYPASS); MAX2837_freq_hz = (freq_mhz * FREQ_ONE_MHZ) + freq_hz; /* mixer_freq_mhz <= not used in Bypass mode */ max2837_set_frequency(&max2837, MAX2837_freq_hz); sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 0); - }else if( (freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ) ) - { + } else if ((freq_mhz >= MIN_HP_FREQ_MHZ) && (freq_mhz <= MAX_HP_FREQ_MHZ)) { if (freq_mhz < MID1_HP_FREQ_MHZ) { /* IF is graduated from 2150 MHz to 2750 MHz */ - max2837_freq_nominal_hz = 2150000000 + (((freq - 2750000000) * 60) / 85); + max2837_freq_nominal_hz = + 2150000000 + (((freq - 2750000000) * 60) / 85); } else if (freq_mhz < MID2_HP_FREQ_MHZ) { /* IF is graduated from 2350 MHz to 2650 MHz */ max2837_freq_nominal_hz = 2350000000 + ((freq - 3600000000) / 5); @@ -107,13 +106,12 @@ bool set_freq(const uint64_t freq) real_mixer_freq_hz = mixer_set_frequency(&mixer, mixer_freq_mhz); max2837_set_frequency(&max2837, freq - real_mixer_freq_hz); sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 0); - }else - { + } else { /* Error freq_mhz too high */ success = false; } max2837_set_mode(&max2837, prior_max2837_mode); - if( success ) { + if (success) { freq_cache = freq; hackrf_ui()->set_frequency(freq); #ifdef HACKRF_ONE @@ -123,16 +121,18 @@ bool set_freq(const uint64_t freq) return success; } -bool set_freq_explicit(const uint64_t if_freq_hz, const uint64_t lo_freq_hz, - const rf_path_filter_t path) +bool set_freq_explicit( + const uint64_t if_freq_hz, + const uint64_t lo_freq_hz, + const rf_path_filter_t path) { - if ((if_freq_hz < ((uint64_t)MIN_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ)) - || (if_freq_hz > ((uint64_t)MAX_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ))) { + if ((if_freq_hz < ((uint64_t) MIN_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ)) || + (if_freq_hz > ((uint64_t) MAX_BYPASS_FREQ_MHZ * FREQ_ONE_MHZ))) { return false; } if ((path != RF_PATH_FILTER_BYPASS) && - ((lo_freq_hz < MIN_LO_FREQ_HZ) || (lo_freq_hz > MAX_LO_FREQ_HZ))) { + ((lo_freq_hz < MIN_LO_FREQ_HZ) || (lo_freq_hz > MAX_LO_FREQ_HZ))) { return false; } @@ -148,7 +148,7 @@ bool set_freq_explicit(const uint64_t if_freq_hz, const uint64_t lo_freq_hz, sgpio_cpld_stream_rx_set_q_invert(&sgpio_config, 0); } if (path != RF_PATH_FILTER_BYPASS) { - (void)mixer_set_frequency(&mixer, lo_freq_hz / FREQ_ONE_MHZ); + (void) mixer_set_frequency(&mixer, lo_freq_hz / FREQ_ONE_MHZ); } return true; } diff --git a/firmware/common/tuning.h b/firmware/common/tuning.h index 38e26d65..6ae980f4 100644 --- a/firmware/common/tuning.h +++ b/firmware/common/tuning.h @@ -29,7 +29,9 @@ #include bool set_freq(const uint64_t freq); -bool set_freq_explicit(const uint64_t if_freq_hz, const uint64_t lo_freq_hz, - const rf_path_filter_t path); +bool set_freq_explicit( + const uint64_t if_freq_hz, + const uint64_t lo_freq_hz, + const rf_path_filter_t path); -#endif/*__TUNING_H__*/ +#endif /*__TUNING_H__*/ diff --git a/firmware/common/ui_portapack.c b/firmware/common/ui_portapack.c index e1c0bedf..f9d6f7ff 100644 --- a/firmware/common/ui_portapack.c +++ b/firmware/common/ui_portapack.c @@ -26,281 +26,357 @@ /* Pixel data within a font or bitmap byte is "reversed": LSB is left-most pixel. */ static const uint8_t font_fixed_8x16_glyph_data[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x00, 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0x70, 0x08, 0x08, 0x7e, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x22, + 0x22, 0x22, 0x1c, 0x02, 0x3e, 0x42, 0x42, 0x3c, 0x00, 0x00, 0x00, 0x02, 0x02, + 0x02, 0x3a, 0x46, 0x42, 0x42, 0x42, 0x42, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x10, 0x00, 0x00, 0x1c, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x1c, 0x10, 0x10, 0x10, 0x10, 0x10, + 0x10, 0x10, 0x10, 0x0e, 0x00, 0x00, 0x00, 0x02, 0x02, 0x02, 0x22, 0x12, 0x0a, + 0x0e, 0x12, 0x22, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x37, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3a, 0x46, 0x42, 0x42, 0x42, 0x42, 0x42, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x42, 0x42, 0x42, + 0x42, 0x42, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1a, + 0x26, 0x42, 0x42, 0x42, 0x26, 0x1a, 0x02, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x58, 0x64, 0x42, 0x42, 0x42, 0x64, 0x58, 0x40, 0x40, 0x40, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x74, 0x0c, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x02, 0x02, 0x3c, 0x40, + 0x40, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x3c, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x42, 0x42, 0x42, 0x42, 0x42, 0x62, 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x41, 0x22, 0x22, 0x36, 0x14, 0x14, 0x08, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x41, 0x41, 0x49, 0x55, 0x55, 0x22, + 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42, 0x24, 0x18, + 0x18, 0x18, 0x24, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x41, 0x22, 0x22, 0x14, 0x14, 0x14, 0x08, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x7e, 0x20, 0x10, 0x08, 0x08, 0x04, 0x7e, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x10, 0x08, 0x08, 0x08, 0x08, 0x04, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x10, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x08, 0x10, 0x10, 0x10, + 0x10, 0x20, 0x10, 0x10, 0x10, 0x10, 0x10, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x8e, 0x71, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -static const ui_font_t font_fixed_8x16 = { - { 8, 16 }, - font_fixed_8x16_glyph_data, - 0x20, 95, - (8 * 16 + 7U) >> 3 -}; +static const ui_font_t font_fixed_8x16 = + {{8, 16}, font_fixed_8x16_glyph_data, 0x20, 95, (8 * 16 + 7U) >> 3}; static const uint8_t font_fixed_24x19_glyph_data[] = { - 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, - 0x00, 0x78, 0x00, 0x00, 0x7c, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x7f, 0x00, 0x80, 0x77, 0x00, 0xc0, 0x73, 0x00, 0xc0, 0x71, 0x00, 0xc0, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, - 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x3c, 0x00, 0xfc, 0x1f, 0xe0, 0xff, 0x1f, 0xf8, 0xff, 0x07, 0xfc, 0x07, 0x00, 0x3c, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x1c, 0x00, 0x00, 0xfc, 0xff, 0x3f, 0xfc, 0xff, 0x3f, 0xfc, 0xff, 0x3f, - 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x3f, 0x3c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0xfe, 0x3f, 0x00, 0xfe, 0x1f, 0x00, 0xfe, 0x3f, 0x00, 0x00, 0x38, 0x00, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x38, 0xf8, 0xff, 0x3f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, - 0x00, 0x80, 0x0f, 0x00, 0xc0, 0x0f, 0x00, 0xe0, 0x0f, 0x00, 0xf8, 0x0f, 0x00, 0x7c, 0x0f, 0x00, 0x1e, 0x0f, 0x00, 0x0f, 0x0f, 0xc0, 0x07, 0x0f, 0xe0, 0x01, 0x0f, 0xf0, 0x00, 0x0f, 0x7c, 0x00, 0x0f, 0x1e, 0x00, 0x0f, 0xfe, 0xff, 0x7f, 0xfe, 0xff, 0x7f, 0xfe, 0xff, 0x7f, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x0f, - 0xfc, 0xff, 0x3f, 0xfc, 0xff, 0x3f, 0xfc, 0xff, 0x3f, 0x1c, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x1c, 0x00, 0x00, 0xdc, 0xff, 0x07, 0xfc, 0xff, 0x1f, 0xfc, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, - 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x00, 0xdc, 0xff, 0x07, 0xfc, 0xff, 0x1f, 0xfc, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, - 0xfc, 0xff, 0x7f, 0xfc, 0xff, 0x7f, 0xfc, 0xff, 0x7f, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x0f, 0x00, 0x80, 0x07, 0x00, 0xc0, 0x03, 0x00, 0xe0, 0x01, 0x00, 0xf0, 0x01, 0x00, 0xf0, 0x00, 0x00, 0x78, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x0f, 0x00, 0x80, 0x0f, 0x00, 0x80, 0x07, 0x00, 0xc0, 0x03, 0x00, - 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf0, 0xff, 0x0f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, - 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x3f, 0xf8, 0xff, 0x3f, 0xe0, 0xff, 0x3b, 0x00, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, + 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, + 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, + 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, + 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, + 0xff, 0x1f, 0xe0, 0xff, 0x07, 0x00, 0x78, 0x00, 0x00, 0x7c, 0x00, 0x00, 0x7e, + 0x00, 0x00, 0x7f, 0x00, 0x80, 0x77, 0x00, 0xc0, 0x73, 0x00, 0xc0, 0x71, 0x00, + 0xc0, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, + 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, + 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x00, 0xe0, 0xff, 0x07, + 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, + 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x3c, 0x00, 0xfc, + 0x1f, 0xe0, 0xff, 0x1f, 0xf8, 0xff, 0x07, 0xfc, 0x07, 0x00, 0x3c, 0x00, 0x00, + 0x1c, 0x00, 0x00, 0x1c, 0x00, 0x00, 0xfc, 0xff, 0x3f, 0xfc, 0xff, 0x3f, 0xfc, + 0xff, 0x3f, 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x3f, 0x3c, 0x00, + 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x38, + 0x00, 0xfe, 0x3f, 0x00, 0xfe, 0x1f, 0x00, 0xfe, 0x3f, 0x00, 0x00, 0x38, 0x00, + 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x38, 0xf8, 0xff, + 0x3f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, 0x00, 0x80, 0x0f, 0x00, 0xc0, 0x0f, + 0x00, 0xe0, 0x0f, 0x00, 0xf8, 0x0f, 0x00, 0x7c, 0x0f, 0x00, 0x1e, 0x0f, 0x00, + 0x0f, 0x0f, 0xc0, 0x07, 0x0f, 0xe0, 0x01, 0x0f, 0xf0, 0x00, 0x0f, 0x7c, 0x00, + 0x0f, 0x1e, 0x00, 0x0f, 0xfe, 0xff, 0x7f, 0xfe, 0xff, 0x7f, 0xfe, 0xff, 0x7f, + 0x00, 0x00, 0x0f, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x0f, 0xfc, + 0xff, 0x3f, 0xfc, 0xff, 0x3f, 0xfc, 0xff, 0x3f, 0x1c, 0x00, 0x00, 0x1c, 0x00, + 0x00, 0x1c, 0x00, 0x00, 0xdc, 0xff, 0x07, 0xfc, 0xff, 0x1f, 0xfc, 0xff, 0x1f, + 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x00, 0x00, 0x38, 0x00, 0x00, 0x38, 0x1c, + 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, 0xff, + 0x1f, 0xe0, 0xff, 0x07, 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, + 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x00, 0xdc, + 0xff, 0x07, 0xfc, 0xff, 0x1f, 0xfc, 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, + 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, + 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, 0xfc, 0xff, 0x7f, 0xfc, + 0xff, 0x7f, 0xfc, 0xff, 0x7f, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, 0x00, + 0x1e, 0x00, 0x00, 0x0f, 0x00, 0x80, 0x07, 0x00, 0xc0, 0x03, 0x00, 0xe0, 0x01, + 0x00, 0xf0, 0x01, 0x00, 0xf0, 0x00, 0x00, 0x78, 0x00, 0x00, 0x3c, 0x00, 0x00, + 0x1e, 0x00, 0x00, 0x0f, 0x00, 0x80, 0x0f, 0x00, 0x80, 0x07, 0x00, 0xc0, 0x03, + 0x00, 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x3c, + 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, + 0xff, 0x1f, 0xf0, 0xff, 0x0f, 0xf8, 0xff, 0x1f, 0x3c, 0x00, 0x38, 0x1c, 0x00, + 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x1f, + 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, 0xe0, 0xff, 0x07, 0xf8, 0xff, 0x1f, 0xf8, + 0xff, 0x1f, 0x3c, 0x00, 0x3c, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, + 0x38, 0x1c, 0x00, 0x38, 0x3c, 0x00, 0x3c, 0xf8, 0xff, 0x3f, 0xf8, 0xff, 0x3f, + 0xe0, 0xff, 0x3b, 0x00, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x1c, 0x00, 0x38, 0x3c, + 0x00, 0x3c, 0xf8, 0xff, 0x1f, 0xf8, 0xff, 0x1f, 0xe0, 0xff, 0x07, }; -static const ui_font_t font_fixed_24x19 = { - { 24, 19 }, - font_fixed_24x19_glyph_data, - 0x30, 10, - (24 * 19 + 7U) >> 3 -}; +static const ui_font_t font_fixed_24x19 = + {{24, 19}, font_fixed_24x19_glyph_data, 0x30, 10, (24 * 19 + 7U) >> 3}; static const uint8_t font_fixed_16x14_glyph_data[] = { - 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, - 0x00, 0x03, 0x80, 0x03, 0xc0, 0x03, 0xe0, 0x03, 0x70, 0x03, 0x20, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, - 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x00, 0x60, 0x00, 0x70, 0x80, 0x3f, 0xf8, 0x1f, 0xfc, 0x00, 0x0e, 0x00, 0x06, 0x00, 0x06, 0x00, 0xfe, 0x7f, 0xfe, 0x7f, - 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x00, 0x60, 0x00, 0x60, 0xc0, 0x3f, 0xc0, 0x7f, 0x00, 0x60, 0x00, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, - 0x00, 0x1c, 0x00, 0x1e, 0x00, 0x1f, 0x80, 0x1b, 0xc0, 0x19, 0xe0, 0x18, 0x70, 0x18, 0x38, 0x18, 0x1c, 0x18, 0xfe, 0x7f, 0xfe, 0x7f, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18, - 0xfe, 0x7f, 0xfe, 0x7f, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0xf6, 0x1f, 0xfe, 0x3f, 0x0e, 0x70, 0x00, 0x60, 0x00, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, - 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x00, 0xf6, 0x1f, 0xfe, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, - 0xfe, 0x7f, 0xfe, 0x7f, 0x00, 0x70, 0x00, 0x30, 0x00, 0x18, 0x00, 0x1c, 0x00, 0x0c, 0x00, 0x06, 0x00, 0x07, 0x80, 0x03, 0x80, 0x01, 0xc0, 0x00, 0xe0, 0x00, 0x60, 0x00, - 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, - 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x7f, 0xf8, 0x6f, 0x00, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, + 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, + 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, + 0xf8, 0x1f, 0x00, 0x03, 0x80, 0x03, 0xc0, 0x03, 0xe0, 0x03, 0x70, 0x03, 0x20, + 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, 0x00, 0x03, + 0x00, 0x03, 0x00, 0x03, 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x00, + 0x60, 0x00, 0x70, 0x80, 0x3f, 0xf8, 0x1f, 0xfc, 0x00, 0x0e, 0x00, 0x06, 0x00, + 0x06, 0x00, 0xfe, 0x7f, 0xfe, 0x7f, 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, + 0x60, 0x00, 0x60, 0x00, 0x60, 0xc0, 0x3f, 0xc0, 0x7f, 0x00, 0x60, 0x00, 0x60, + 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, 0x00, 0x1c, 0x00, 0x1e, 0x00, + 0x1f, 0x80, 0x1b, 0xc0, 0x19, 0xe0, 0x18, 0x70, 0x18, 0x38, 0x18, 0x1c, 0x18, + 0xfe, 0x7f, 0xfe, 0x7f, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18, 0xfe, 0x7f, 0xfe, + 0x7f, 0x06, 0x00, 0x06, 0x00, 0x06, 0x00, 0xf6, 0x1f, 0xfe, 0x3f, 0x0e, 0x70, + 0x00, 0x60, 0x00, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, 0xf8, + 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x00, 0xf6, 0x1f, 0xfe, 0x3f, + 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, + 0x1f, 0xfe, 0x7f, 0xfe, 0x7f, 0x00, 0x70, 0x00, 0x30, 0x00, 0x18, 0x00, 0x1c, + 0x00, 0x0c, 0x00, 0x06, 0x00, 0x07, 0x80, 0x03, 0x80, 0x01, 0xc0, 0x00, 0xe0, + 0x00, 0x60, 0x00, 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, + 0x0e, 0x70, 0xfc, 0x3f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, 0x06, 0x60, 0x0e, + 0x70, 0xfc, 0x3f, 0xf8, 0x1f, 0xf8, 0x1f, 0xfc, 0x3f, 0x0e, 0x70, 0x06, 0x60, + 0x06, 0x60, 0x06, 0x60, 0x0e, 0x70, 0xfc, 0x7f, 0xf8, 0x6f, 0x00, 0x60, 0x06, + 0x60, 0x0e, 0x70, 0xfc, 0x3f, 0xf8, 0x1f, }; -static const ui_font_t font_fixed_16x14 = { - { 16, 14 }, - font_fixed_16x14_glyph_data, - 0x30, 10, - (16 * 14 + 7U) >> 3 -}; +static const ui_font_t font_fixed_16x14 = + {{16, 14}, font_fixed_16x14_glyph_data, 0x30, 10, (16 * 14 + 7U) >> 3}; static const uint8_t bitmap_amp_rx_data[] = { - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x06, 0x00, 0x60, 0x06, 0x00, 0x60, 0x0c, 0x00, 0x30, 0x0c, 0x00, 0x30, 0x18, 0x00, 0x18, 0x18, 0x00, 0x18, 0x30, 0x00, 0x0c, 0x30, 0x00, 0x0c, 0x60, 0x00, 0x06, 0x60, 0x00, 0x06, 0xc0, 0x00, 0x03, 0xc0, 0x00, 0x03, 0x80, 0x81, 0x01, 0x80, 0x81, 0x01, 0x00, 0xc3, 0x00, 0x00, 0xc3, 0x00, 0x00, 0x66, 0x00, 0x00, 0x66, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00 -}; + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x06, 0x00, 0x60, 0x06, 0x00, 0x60, + 0x0c, 0x00, 0x30, 0x0c, 0x00, 0x30, 0x18, 0x00, 0x18, 0x18, 0x00, 0x18, + 0x30, 0x00, 0x0c, 0x30, 0x00, 0x0c, 0x60, 0x00, 0x06, 0x60, 0x00, 0x06, + 0xc0, 0x00, 0x03, 0xc0, 0x00, 0x03, 0x80, 0x81, 0x01, 0x80, 0x81, 0x01, + 0x00, 0xc3, 0x00, 0x00, 0xc3, 0x00, 0x00, 0x66, 0x00, 0x00, 0x66, 0x00, + 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00}; -static const ui_bitmap_t bitmap_amp_rx = { - { 24, 24 }, bitmap_amp_rx_data -}; +static const ui_bitmap_t bitmap_amp_rx = {{24, 24}, bitmap_amp_rx_data}; static const uint8_t bitmap_amp_tx_data[] = { - 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x66, 0x00, 0x00, 0x66, 0x00, 0x00, 0xc3, 0x00, 0x00, 0xc3, 0x00, 0x80, 0x81, 0x01, 0x80, 0x81, 0x01, 0xc0, 0x00, 0x03, 0xc0, 0x00, 0x03, 0x60, 0x00, 0x06, 0x60, 0x00, 0x06, 0x30, 0x00, 0x0c, 0x30, 0x00, 0x0c, 0x18, 0x00, 0x18, 0x18, 0x00, 0x18, 0x0c, 0x00, 0x30, 0x0c, 0x00, 0x30, 0x06, 0x00, 0x60, 0x06, 0x00, 0x60, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff -}; + 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, + 0x00, 0x66, 0x00, 0x00, 0x66, 0x00, 0x00, 0xc3, 0x00, 0x00, 0xc3, 0x00, + 0x80, 0x81, 0x01, 0x80, 0x81, 0x01, 0xc0, 0x00, 0x03, 0xc0, 0x00, 0x03, + 0x60, 0x00, 0x06, 0x60, 0x00, 0x06, 0x30, 0x00, 0x0c, 0x30, 0x00, 0x0c, + 0x18, 0x00, 0x18, 0x18, 0x00, 0x18, 0x0c, 0x00, 0x30, 0x0c, 0x00, 0x30, + 0x06, 0x00, 0x60, 0x06, 0x00, 0x60, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -static const ui_bitmap_t bitmap_amp_tx = { - { 24, 24 }, bitmap_amp_tx_data -}; +static const ui_bitmap_t bitmap_amp_tx = {{24, 24}, bitmap_amp_tx_data}; static const uint8_t bitmap_antenna_data[] = { - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x06, 0x18, 0x60, 0x06, 0x18, 0x60, 0x0c, 0x18, 0x30, 0x0c, 0x18, 0x30, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x30, 0x18, 0x0c, 0x30, 0x18, 0x0c, 0x60, 0x18, 0x06, 0x60, 0x18, 0x06, 0xc0, 0x18, 0x03, 0xc0, 0x18, 0x03, 0x80, 0x99, 0x01, 0x80, 0x99, 0x01, 0x00, 0xdb, 0x00, 0x00, 0xdb, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00 -}; + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x06, 0x18, 0x60, 0x06, 0x18, 0x60, + 0x0c, 0x18, 0x30, 0x0c, 0x18, 0x30, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x30, 0x18, 0x0c, 0x30, 0x18, 0x0c, 0x60, 0x18, 0x06, 0x60, 0x18, 0x06, + 0xc0, 0x18, 0x03, 0xc0, 0x18, 0x03, 0x80, 0x99, 0x01, 0x80, 0x99, 0x01, + 0x00, 0xdb, 0x00, 0x00, 0xdb, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x7e, 0x00, + 0x00, 0x3c, 0x00, 0x00, 0x3c, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00}; -static const ui_bitmap_t bitmap_antenna = { - { 24, 24 }, bitmap_antenna_data -}; +static const ui_bitmap_t bitmap_antenna = {{24, 24}, bitmap_antenna_data}; static const uint8_t bitmap_filter_hp_data[] = { - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0xf8, 0xc7, 0x03, 0xfc, 0xc7, 0x03, 0x0e, 0xc0, 0x03, 0x06, 0xc0, 0x03, 0x03, 0xc0, 0x03, 0x03, 0xc0, 0x83, 0x01, 0xc0, 0x83, 0x01, 0xc0, 0xc3, 0x00, 0xc0, 0xc3, 0x00, 0xc0, 0x63, 0x00, 0xc0, 0x63, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff -}; + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, + 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0xf8, 0xc7, 0x03, 0xfc, 0xc7, + 0x03, 0x0e, 0xc0, 0x03, 0x06, 0xc0, 0x03, 0x03, 0xc0, 0x03, 0x03, 0xc0, + 0x83, 0x01, 0xc0, 0x83, 0x01, 0xc0, 0xc3, 0x00, 0xc0, 0xc3, 0x00, 0xc0, + 0x63, 0x00, 0xc0, 0x63, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, + 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -static const ui_bitmap_t bitmap_filter_hp = { - { 24, 24 }, bitmap_filter_hp_data -}; +static const ui_bitmap_t bitmap_filter_hp = {{24, 24}, bitmap_filter_hp_data}; static const uint8_t bitmap_filter_lp_data[] = { - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0xe3, 0x1f, 0xc0, 0xe3, 0x3f, 0xc0, 0x03, 0x70, 0xc0, 0x03, 0x60, 0xc0, 0x03, 0xc0, 0xc0, 0x03, 0xc0, 0xc0, 0x03, 0x80, 0xc1, 0x03, 0x80, 0xc1, 0x03, 0x00, 0xc3, 0x03, 0x00, 0xc3, 0x03, 0x00, 0xc6, 0x03, 0x00, 0xc6, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff -}; + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, + 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0xe3, 0x1f, 0xc0, 0xe3, 0x3f, 0xc0, + 0x03, 0x70, 0xc0, 0x03, 0x60, 0xc0, 0x03, 0xc0, 0xc0, 0x03, 0xc0, 0xc0, + 0x03, 0x80, 0xc1, 0x03, 0x80, 0xc1, 0x03, 0x00, 0xc3, 0x03, 0x00, 0xc3, + 0x03, 0x00, 0xc6, 0x03, 0x00, 0xc6, 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, + 0x03, 0x00, 0xc0, 0x03, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; -static const ui_bitmap_t bitmap_filter_lp = { - { 24, 24 }, bitmap_filter_lp_data -}; +static const ui_bitmap_t bitmap_filter_lp = {{24, 24}, bitmap_filter_lp_data}; static const uint8_t bitmap_mixer_data[] = { - 0x00, 0x7e, 0x00, 0xc0, 0xff, 0x03, 0xe0, 0x81, 0x07, 0x70, 0x00, 0x0e, 0x38, 0x00, 0x1c, 0x7c, 0x00, 0x3e, 0xee, 0x00, 0x77, 0xc6, 0x81, 0x63, 0x86, 0xc3, 0x61, 0x03, 0xe7, 0xc0, 0x03, 0x7e, 0xc0, 0x03, 0x3c, 0xc0, 0x03, 0x3c, 0xc0, 0x03, 0x7e, 0xc0, 0x03, 0xe7, 0xc0, 0x86, 0xc3, 0x61, 0xc6, 0x81, 0x63, 0xee, 0x00, 0x77, 0x7c, 0x00, 0x3e, 0x38, 0x00, 0x1c, 0x70, 0x00, 0x0e, 0xe0, 0x81, 0x07, 0xc0, 0xff, 0x03, 0x00, 0x7e, 0x00 -}; + 0x00, 0x7e, 0x00, 0xc0, 0xff, 0x03, 0xe0, 0x81, 0x07, 0x70, 0x00, 0x0e, + 0x38, 0x00, 0x1c, 0x7c, 0x00, 0x3e, 0xee, 0x00, 0x77, 0xc6, 0x81, 0x63, + 0x86, 0xc3, 0x61, 0x03, 0xe7, 0xc0, 0x03, 0x7e, 0xc0, 0x03, 0x3c, 0xc0, + 0x03, 0x3c, 0xc0, 0x03, 0x7e, 0xc0, 0x03, 0xe7, 0xc0, 0x86, 0xc3, 0x61, + 0xc6, 0x81, 0x63, 0xee, 0x00, 0x77, 0x7c, 0x00, 0x3e, 0x38, 0x00, 0x1c, + 0x70, 0x00, 0x0e, 0xe0, 0x81, 0x07, 0xc0, 0xff, 0x03, 0x00, 0x7e, 0x00}; -static const ui_bitmap_t bitmap_mixer = { - { 24, 24 }, bitmap_mixer_data -}; +static const ui_bitmap_t bitmap_mixer = {{24, 24}, bitmap_mixer_data}; static const uint8_t bitmap_oscillator_data[] = { - 0x00, 0x7e, 0x00, 0xc0, 0xff, 0x03, 0xe0, 0x81, 0x07, 0x70, 0x00, 0x0e, 0x38, 0x00, 0x1c, 0x1c, 0x00, 0x38, 0x0e, 0x03, 0x70, 0x86, 0x07, 0x60, 0xc6, 0x0f, 0x60, 0xc3, 0x0c, 0xc0, 0xe3, 0x1c, 0xc0, 0x63, 0x18, 0xc6, 0x63, 0x18, 0xc6, 0x03, 0x38, 0xc7, 0x03, 0x30, 0xc3, 0x06, 0xf0, 0x63, 0x06, 0xe0, 0x61, 0x0e, 0xc0, 0x70, 0x1c, 0x00, 0x38, 0x38, 0x00, 0x1c, 0x70, 0x00, 0x0e, 0xe0, 0x81, 0x07, 0xc0, 0xff, 0x03, 0x00, 0x7e, 0x00 -}; + 0x00, 0x7e, 0x00, 0xc0, 0xff, 0x03, 0xe0, 0x81, 0x07, 0x70, 0x00, 0x0e, + 0x38, 0x00, 0x1c, 0x1c, 0x00, 0x38, 0x0e, 0x03, 0x70, 0x86, 0x07, 0x60, + 0xc6, 0x0f, 0x60, 0xc3, 0x0c, 0xc0, 0xe3, 0x1c, 0xc0, 0x63, 0x18, 0xc6, + 0x63, 0x18, 0xc6, 0x03, 0x38, 0xc7, 0x03, 0x30, 0xc3, 0x06, 0xf0, 0x63, + 0x06, 0xe0, 0x61, 0x0e, 0xc0, 0x70, 0x1c, 0x00, 0x38, 0x38, 0x00, 0x1c, + 0x70, 0x00, 0x0e, 0xe0, 0x81, 0x07, 0xc0, 0xff, 0x03, 0x00, 0x7e, 0x00}; -static const ui_bitmap_t bitmap_oscillator = { - { 24, 24 }, bitmap_oscillator_data -}; +static const ui_bitmap_t bitmap_oscillator = {{24, 24}, bitmap_oscillator_data}; -static const uint8_t bitmap_wire_8_data[] = { - 0xff, 0xff -}; +static const uint8_t bitmap_wire_8_data[] = {0xff, 0xff}; -static const ui_bitmap_t bitmap_wire_8 = { - { 2, 8 }, bitmap_wire_8_data -}; +static const ui_bitmap_t bitmap_wire_8 = {{2, 8}, bitmap_wire_8_data}; static const uint8_t bitmap_wire_24_data[] = { - 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00 -}; + 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, + 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, + 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, + 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, + 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, + 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00, 0x00, 0x18, 0x00}; -static const ui_bitmap_t bitmap_wire_24 = { - { 24, 24 }, bitmap_wire_24_data -}; +static const ui_bitmap_t bitmap_wire_24 = {{24, 24}, bitmap_wire_24_data}; static const uint8_t bitmap_blank_24_data[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; -static const ui_bitmap_t bitmap_blank_24 = { - { 24, 24 }, bitmap_blank_24_data -}; +static const ui_bitmap_t bitmap_blank_24 = {{24, 24}, bitmap_blank_24_data}; static const uint8_t bitmap_waves_rx_data[] = { - 0xc0, 0x00, 0x60, 0x00, 0x70, 0x06, 0x30, 0x07, 0x38, 0x03, 0x98, 0x33, 0x98, 0x39, 0x98, 0x19, 0xcc, 0x18, 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x18, 0x98, 0x19, 0x98, 0x39, 0x98, 0x33, 0x38, 0x03, 0x30, 0x07, 0x70, 0x06, 0x60, 0x00, 0xc0, 0x00 -}; + 0xc0, 0x00, 0x60, 0x00, 0x70, 0x06, 0x30, 0x07, 0x38, 0x03, 0x98, 0x33, + 0x98, 0x39, 0x98, 0x19, 0xcc, 0x18, 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x0c, + 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x0c, 0xcc, 0x18, 0x98, 0x19, 0x98, 0x39, + 0x98, 0x33, 0x38, 0x03, 0x30, 0x07, 0x70, 0x06, 0x60, 0x00, 0xc0, 0x00}; -static const ui_bitmap_t bitmap_waves_rx = { - { 16, 24 }, bitmap_waves_rx_data -}; +static const ui_bitmap_t bitmap_waves_rx = {{16, 24}, bitmap_waves_rx_data}; static const uint8_t bitmap_waves_tx_data[] = { - 0x00, 0x03, 0x00, 0x06, 0x60, 0x0e, 0xe0, 0x0c, 0xc0, 0x1c, 0xcc, 0x19, 0x9c, 0x19, 0x98, 0x19, 0x18, 0x33, 0x30, 0x33, 0x30, 0x33, 0x30, 0x33, 0x30, 0x33, 0x30, 0x33, 0x30, 0x33, 0x18, 0x33, 0x98, 0x19, 0x9c, 0x19, 0xcc, 0x19, 0xc0, 0x1c, 0xe0, 0x0c, 0x60, 0x0e, 0x00, 0x06, 0x00, 0x03 -}; + 0x00, 0x03, 0x00, 0x06, 0x60, 0x0e, 0xe0, 0x0c, 0xc0, 0x1c, 0xcc, 0x19, + 0x9c, 0x19, 0x98, 0x19, 0x18, 0x33, 0x30, 0x33, 0x30, 0x33, 0x30, 0x33, + 0x30, 0x33, 0x30, 0x33, 0x30, 0x33, 0x18, 0x33, 0x98, 0x19, 0x9c, 0x19, + 0xcc, 0x19, 0xc0, 0x1c, 0xe0, 0x0c, 0x60, 0x0e, 0x00, 0x06, 0x00, 0x03}; -static const ui_bitmap_t bitmap_waves_tx = { - { 16, 24 }, bitmap_waves_tx_data -}; +static const ui_bitmap_t bitmap_waves_tx = {{16, 24}, bitmap_waves_tx_data}; __attribute__((unused)) static ui_color_t portapack_color_rgb( const uint_fast8_t r, const uint_fast8_t g, - const uint_fast8_t b -) { + const uint_fast8_t b) +{ const ui_color_t result = { - .v = ((r & 0xf8) << 8) | ((g & 0xfc) << 3) | ((b & 0xf8) >> 3) - }; + .v = ((r & 0xf8) << 8) | ((g & 0xfc) << 3) | ((b & 0xf8) >> 3)}; return result; } -static const ui_color_t color_background = { 0x001f }; -static const ui_color_t color_foreground = { 0xffff }; +static const ui_color_t color_background = {0x001f}; +static const ui_color_t color_foreground = {0xffff}; -static ui_point_t portapack_lcd_draw_int(const ui_point_t point, uint64_t value, size_t field_width) { +static ui_point_t portapack_lcd_draw_int( + const ui_point_t point, + uint64_t value, + size_t field_width) +{ const ui_point_t point_done = { .x = point.x + font_fixed_8x16.glyph_size.width * field_width, - .y = point.y - }; + .y = point.y}; ui_point_t point_next = point_done; - for(size_t i=0; i=6) && (value == 0)) ? ' ' : c; + s[i] = ((i >= 6) && (value == 0)) ? ' ' : c; value /= 10; } - for(int i=0; i<10; i++) { + for (int i = 0; i < 10; i++) { const char c = s[i]; - const ui_font_t* const font = (i > 5) ? &font_fixed_24x19 : &font_fixed_16x14; + const ui_font_t* const font = + (i > 5) ? &font_fixed_24x19 : &font_fixed_16x14; point.x -= font->glyph_size.width; - if( (i==3) || (i==6) || (i==9) ) { + if ((i == 3) || (i == 6) || (i == 9)) { point.x -= 4; } - if( c != last[i] ) { + if (c != last[i]) { const ui_bitmap_t glyph = portapack_font_glyph(font, c); - if( c == ' ' ) { + if (c == ' ') { /* Blank out leading zeros. */ - const ui_rect_t rect = { point, glyph.size }; + const ui_rect_t rect = {point, glyph.size}; portapack_fill_rectangle(rect, color_background); } else { - portapack_draw_bitmap(point, glyph, color_foreground, color_background); + portapack_draw_bitmap( + point, + glyph, + color_foreground, + color_background); } last[i] = c; } } } -static void portapack_ui_set_sample_rate(uint32_t sample_rate) { +static void portapack_ui_set_sample_rate(uint32_t sample_rate) +{ #if 0 ui_point_t point = { VALUES_X, 320 - 1 * 16 }; portapack_lcd_draw_int(point, sample_rate, 8); #else - (void)sample_rate; + (void) sample_rate; #endif } -static void portapack_ui_set_direction(const rf_path_direction_t direction) { - switch(direction) { +static void portapack_ui_set_direction(const rf_path_direction_t direction) +{ + switch (direction) { case RF_PATH_DIRECTION_TX: - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_WAVES, &bitmap_waves_tx); - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_RF_AMP, portapack_lna_on ? &bitmap_amp_tx : &bitmap_wire_24); - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, &bitmap_amp_tx); - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, &bitmap_wire_24); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_WAVES, + &bitmap_waves_tx); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_RF_AMP, + portapack_lna_on ? &bitmap_amp_tx : &bitmap_wire_24); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, + &bitmap_amp_tx); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, + &bitmap_wire_24); portapack_ui_draw_string(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, " "); break; case RF_PATH_DIRECTION_RX: - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_WAVES, &bitmap_waves_rx); - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_RF_AMP, portapack_lna_on ? &bitmap_amp_rx : &bitmap_wire_24); - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, &bitmap_amp_rx); - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, &bitmap_amp_rx); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_WAVES, + &bitmap_waves_rx); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_RF_AMP, + portapack_lna_on ? &bitmap_amp_rx : &bitmap_wire_24); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, + &bitmap_amp_rx); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, + &bitmap_amp_rx); break; case RF_PATH_DIRECTION_OFF: default: - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_WAVES, &bitmap_blank_24); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_WAVES, + &bitmap_blank_24); break; } portapack_direction = direction; } -static void portapack_ui_set_filter_bw(uint32_t bandwidth) { +static void portapack_ui_set_filter_bw(uint32_t bandwidth) +{ portapack_ui_draw_bw_mhz(RADIO_DRAW_LIST_ITEM_BB_FILTER, bandwidth); } -static void portapack_ui_set_lna_power(bool lna_on) { +static void portapack_ui_set_lna_power(bool lna_on) +{ portapack_lna_on = lna_on; - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_RF_AMP, lna_on - ? ((portapack_direction == RF_PATH_DIRECTION_TX) ? &bitmap_amp_tx : &bitmap_amp_rx) - : &bitmap_wire_24); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_RF_AMP, + lna_on ? + ((portapack_direction == RF_PATH_DIRECTION_TX) ? &bitmap_amp_tx : + &bitmap_amp_rx) : + &bitmap_wire_24); const char* const label = lna_on ? "14 dB" : " "; portapack_ui_draw_string(RADIO_DRAW_LIST_ITEM_RF_AMP, label); } -static void portapack_ui_set_bb_lna_gain(const uint32_t gain_db) { +static void portapack_ui_set_bb_lna_gain(const uint32_t gain_db) +{ portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, gain_db); } -static void portapack_ui_set_bb_vga_gain(const uint32_t gain_db) { +static void portapack_ui_set_bb_vga_gain(const uint32_t gain_db) +{ portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_VGA_AMP, gain_db); } -static void portapack_ui_set_bb_tx_vga_gain(const uint32_t gain_db) { +static void portapack_ui_set_bb_tx_vga_gain(const uint32_t gain_db) +{ /* TODO: This function (and code throughout the HackRF project) is mis-labeled? * According to the MAX2837 datasheet diagram, there is no baseband gain in the TX path. * This gets called when the TX IF gain is changed. @@ -512,53 +643,76 @@ static void portapack_ui_set_bb_tx_vga_gain(const uint32_t gain_db) { portapack_ui_draw_db(RADIO_DRAW_LIST_ITEM_BB_LNA_AMP, gain_db); } -static void portapack_ui_set_first_if_frequency(const uint64_t frequency) { - (void)frequency; +static void portapack_ui_set_first_if_frequency(const uint64_t frequency) +{ + (void) frequency; } -static void portapack_ui_set_filter(const rf_path_filter_t filter) { - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_RF_MIXER, (filter == RF_PATH_FILTER_BYPASS) ? &bitmap_wire_24 : &bitmap_mixer); +static void portapack_ui_set_filter(const rf_path_filter_t filter) +{ + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_RF_MIXER, + (filter == RF_PATH_FILTER_BYPASS) ? &bitmap_wire_24 : &bitmap_mixer); - switch(filter) { + switch (filter) { default: - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_IMAGE_FILTER, &bitmap_wire_24); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_IMAGE_FILTER, + &bitmap_wire_24); break; - + case RF_PATH_FILTER_LOW_PASS: - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_IMAGE_FILTER, &bitmap_filter_lp); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_IMAGE_FILTER, + &bitmap_filter_lp); break; - + case RF_PATH_FILTER_HIGH_PASS: - portapack_radio_path_item_update(RADIO_DRAW_LIST_ITEM_IMAGE_FILTER, &bitmap_filter_hp); + portapack_radio_path_item_update( + RADIO_DRAW_LIST_ITEM_IMAGE_FILTER, + &bitmap_filter_hp); break; } } -static void portapack_ui_set_antenna_bias(bool antenna_bias) { - (void)antenna_bias; +static void portapack_ui_set_antenna_bias(bool antenna_bias) +{ + (void) antenna_bias; } -static void portapack_ui_set_clock_source(clock_source_t source) { +static void portapack_ui_set_clock_source(clock_source_t source) +{ ui_point_t label_point = radio_draw_list[RADIO_DRAW_LIST_ITEM_CLOCK].point; label_point.x -= 0; label_point.y -= 16; - + const char* s = "HRF"; - switch(source) { - case CLOCK_SOURCE_EXTERNAL: { s = "EXT"; break; } - case CLOCK_SOURCE_PORTAPACK: { s = "PPK"; break; } + switch (source) { + case CLOCK_SOURCE_EXTERNAL: { + s = "EXT"; + break; + } + case CLOCK_SOURCE_PORTAPACK: { + s = "PPK"; + break; + } default: - case CLOCK_SOURCE_HACKRF: { s = "HRF"; break; } + case CLOCK_SOURCE_HACKRF: { + s = "HRF"; + break; + } } portapack_lcd_draw_string(label_point, s); } -static void portapack_ui_set_transceiver_mode(transceiver_mode_t mode) { - (void)mode; +static void portapack_ui_set_transceiver_mode(transceiver_mode_t mode) +{ + (void) mode; } -static bool portapack_ui_operacake_gpio_compatible(void) { +static bool portapack_ui_operacake_gpio_compatible(void) +{ return false; } @@ -581,8 +735,9 @@ const hackrf_ui_t portapack_hackrf_ui = { &portapack_ui_operacake_gpio_compatible, }; -const hackrf_ui_t* portapack_hackrf_ui_init() { - if( portapack() ) { +const hackrf_ui_t* portapack_hackrf_ui_init() +{ + if (portapack()) { return &portapack_hackrf_ui; } else { return NULL; diff --git a/firmware/common/ui_portapack.h b/firmware/common/ui_portapack.h index ac5fe330..dbb113c5 100644 --- a/firmware/common/ui_portapack.h +++ b/firmware/common/ui_portapack.h @@ -26,4 +26,4 @@ const hackrf_ui_t* portapack_hackrf_ui_init() __attribute__((weak)); -#endif/*__UI_PORTAPACK_H__*/ +#endif /*__UI_PORTAPACK_H__*/ diff --git a/firmware/common/ui_rad1o.c b/firmware/common/ui_rad1o.c index 8d039ab7..b4621837 100644 --- a/firmware/common/ui_rad1o.c +++ b/firmware/common/ui_rad1o.c @@ -41,14 +41,14 @@ static bool lna_on = false; static transceiver_mode_t trx_mode; static bool enabled = false; -#define BLACK 0b00000000 -#define RED 0b11100000 -#define RED_DARK 0b01100000 -#define GREEN 0b00011100 +#define BLACK 0b00000000 +#define RED 0b11100000 +#define RED_DARK 0b01100000 +#define GREEN 0b00011100 #define GREEN_DARK 0b00001100 -#define BLUE 0b00000011 -#define WHITE 0b11111111 -#define GREY 0b01001101 +#define BLUE 0b00000011 +#define WHITE 0b11111111 +#define GREY 0b01001101 static void draw_frequency(void) { @@ -61,7 +61,7 @@ static void draw_frequency(void) rad1o_setTextColor(BLACK, GREEN); rad1o_setIntFont(&Font_Ubuntu18pt); - sprintf(tmp, "%4u.%03u", (unsigned int)mhz, (unsigned int)khz); + sprintf(tmp, "%4u.%03u", (unsigned int) mhz, (unsigned int) khz); rad1o_lcdPrint(tmp); rad1o_setIntFont(&Font_7x8); @@ -148,7 +148,7 @@ static void ui_update(void) rad1o_lcdPrint("Rate: "); mhz = sample_rate / 1000000; khz = (sample_rate - mhz * 1000000) / 1000; - sprintf(tmp, "%2u.%03u MHz", (unsigned int)mhz, (unsigned int)khz); + sprintf(tmp, "%2u.%03u MHz", (unsigned int) mhz, (unsigned int) khz); rad1o_lcdPrint(tmp); rad1o_lcdNl(); @@ -156,7 +156,7 @@ static void ui_update(void) rad1o_lcdPrint("Filter: "); mhz = filter_bw / 1000000; khz = (filter_bw - mhz * 1000000) / 1000; - sprintf(tmp, "%2u.%03u MHz", (unsigned int)mhz, (unsigned int)khz); + sprintf(tmp, "%2u.%03u MHz", (unsigned int) mhz, (unsigned int) khz); rad1o_lcdPrint(tmp); rad1o_lcdNl(); @@ -181,7 +181,7 @@ static void ui_update(void) if (direction == RF_PATH_DIRECTION_TX) { rad1o_setTextColor(BLACK, RED); } - sprintf(tmp, " TX: %u dB", (unsigned int)bbtxvga_gain); + sprintf(tmp, " TX: %u dB", (unsigned int) bbtxvga_gain); rad1o_lcdPrint(tmp); rad1o_lcdNl(); @@ -190,11 +190,11 @@ static void ui_update(void) if (direction == RF_PATH_DIRECTION_RX) { rad1o_setTextColor(BLACK, GREEN); } - sprintf(tmp, "LNA: %2u dB", (unsigned int)bblna_gain); + sprintf(tmp, "LNA: %2u dB", (unsigned int) bblna_gain); rad1o_lcdPrint(tmp); rad1o_lcdNl(); rad1o_lcdMoveCrsr(2, 0); - sprintf(tmp, "VGA: %2u dB", (unsigned int)bbvga_gain); + sprintf(tmp, "VGA: %2u dB", (unsigned int) bbvga_gain); rad1o_lcdPrint(tmp); rad1o_lcdNl(); @@ -277,8 +277,7 @@ static void rad1o_ui_set_first_if_frequency(const uint64_t frequency // Not implemented } -static void rad1o_ui_set_filter(const rf_path_filter_t filter - __attribute__((unused))) +static void rad1o_ui_set_filter(const rf_path_filter_t filter __attribute__((unused))) { // Not implemented } @@ -288,8 +287,7 @@ static void rad1o_ui_set_antenna_bias(bool antenna_bias __attribute__((unused))) // Not implemented } -static void rad1o_ui_set_clock_source(clock_source_t source - __attribute__((unused))) +static void rad1o_ui_set_clock_source(clock_source_t source __attribute__((unused))) { // Not implemented } @@ -324,7 +322,7 @@ static const hackrf_ui_t rad1o_ui = { &rad1o_ui_operacake_gpio_compatible, }; -const hackrf_ui_t *rad1o_ui_setup(void) +const hackrf_ui_t* rad1o_ui_setup(void) { return &rad1o_ui; } diff --git a/firmware/common/ui_rad1o.h b/firmware/common/ui_rad1o.h index 66e48f2c..d3c853f3 100644 --- a/firmware/common/ui_rad1o.h +++ b/firmware/common/ui_rad1o.h @@ -24,6 +24,6 @@ #include "hackrf_ui.h" -const hackrf_ui_t *rad1o_ui_setup(void) __attribute__((weak)); +const hackrf_ui_t* rad1o_ui_setup(void) __attribute__((weak)); #endif /*__UI_RAD1O_H__*/ diff --git a/firmware/common/usb.c b/firmware/common/usb.c index a44e5a54..833f8538 100644 --- a/firmware/common/usb.c +++ b/firmware/common/usb.c @@ -36,47 +36,51 @@ usb_device_t* usb_device_usb0 = 0; usb_queue_head_t usb_qh[12] ATTR_ALIGNED(2048); -#define USB_QH_INDEX(endpoint_address) (((endpoint_address & 0xF) * 2) + ((endpoint_address >> 7) & 1)) +#define USB_QH_INDEX(endpoint_address) \ + (((endpoint_address & 0xF) * 2) + ((endpoint_address >> 7) & 1)) -usb_queue_head_t* usb_queue_head( - const uint_fast8_t endpoint_address -) { +usb_queue_head_t* usb_queue_head(const uint_fast8_t endpoint_address) +{ return &usb_qh[USB_QH_INDEX(endpoint_address)]; } -usb_endpoint_t* usb_endpoint_from_address( - const uint_fast8_t endpoint_address -) { - return (usb_endpoint_t*)usb_queue_head(endpoint_address)->_reserved_0; +usb_endpoint_t* usb_endpoint_from_address(const uint_fast8_t endpoint_address) +{ + return (usb_endpoint_t*) usb_queue_head(endpoint_address)->_reserved_0; } static uint_fast8_t usb_endpoint_address( const usb_transfer_direction_t direction, - const uint_fast8_t number -) { + const uint_fast8_t number) +{ return ((direction == USB_TRANSFER_DIRECTION_IN) ? 0x80 : 0x00) + number; } -static bool usb_endpoint_is_in(const uint_fast8_t endpoint_address) { +static bool usb_endpoint_is_in(const uint_fast8_t endpoint_address) +{ return (endpoint_address & 0x80) ? true : false; } -static uint_fast8_t usb_endpoint_number(const uint_fast8_t endpoint_address) { +static uint_fast8_t usb_endpoint_number(const uint_fast8_t endpoint_address) +{ return (endpoint_address & 0xF); } -void usb_peripheral_reset() { +void usb_peripheral_reset() +{ RESET_CTRL0 = RESET_CTRL0_USB0_RST; RESET_CTRL0 = 0; - - while( (RESET_ACTIVE_STATUS0 & RESET_CTRL0_USB0_RST) == 0 ) {} + + while ((RESET_ACTIVE_STATUS0 & RESET_CTRL0_USB0_RST) == 0) {} } -void usb_phy_enable() { +void usb_phy_enable() +{ CREG_CREG0 &= ~CREG_CREG0_USB0PHY; } -static void usb_clear_pending_interrupts(const uint32_t mask) { +static void usb_clear_pending_interrupts(const uint32_t mask) +{ USB0_ENDPTNAK = mask; USB0_ENDPTNAKEN = mask; USB0_USBSTS_D = mask; @@ -84,117 +88,118 @@ static void usb_clear_pending_interrupts(const uint32_t mask) { USB0_ENDPTCOMPLETE = USB0_ENDPTCOMPLETE & mask; } -static void usb_clear_all_pending_interrupts() { +static void usb_clear_all_pending_interrupts() +{ usb_clear_pending_interrupts(0xFFFFFFFF); } -static void usb_wait_for_endpoint_priming_to_finish(const uint32_t mask) { +static void usb_wait_for_endpoint_priming_to_finish(const uint32_t mask) +{ // Wait until controller has parsed new transfer descriptors and prepared // receive buffers. - while( USB0_ENDPTPRIME & mask ) {} + while (USB0_ENDPTPRIME & mask) {} } -static void usb_flush_endpoints(const uint32_t mask) { +static void usb_flush_endpoints(const uint32_t mask) +{ // Clear any primed buffers. If a packet is in progress, that transfer // will continue until completion. USB0_ENDPTFLUSH = mask; } -static void usb_wait_for_endpoint_flushing_to_finish(const uint32_t mask) { +static void usb_wait_for_endpoint_flushing_to_finish(const uint32_t mask) +{ // Wait until controller has flushed all endpoints / cleared any primed // buffers. - while( USB0_ENDPTFLUSH & mask ) {} + while (USB0_ENDPTFLUSH & mask) {} } -static void usb_flush_primed_endpoints(const uint32_t mask) { +static void usb_flush_primed_endpoints(const uint32_t mask) +{ usb_wait_for_endpoint_priming_to_finish(mask); usb_flush_endpoints(mask); usb_wait_for_endpoint_flushing_to_finish(mask); } -static void usb_flush_all_primed_endpoints() { +static void usb_flush_all_primed_endpoints() +{ usb_flush_primed_endpoints(0xFFFFFFFF); } static void usb_endpoint_set_type( const usb_endpoint_t* const endpoint, - const usb_transfer_type_t transfer_type -) { + const usb_transfer_type_t transfer_type) +{ // NOTE: UM10503 section 23.6.24 "Endpoint 1 to 5 control registers" says // that the disabled side of an endpoint must be set to a non-control type // (e.g. bulk, interrupt, or iso). const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - USB0_ENDPTCTRL(endpoint_number) - = ( USB0_ENDPTCTRL(endpoint_number) - & ~(USB0_ENDPTCTRL_TXT1_0_MASK | USB0_ENDPTCTRL_RXT_MASK) - ) - | ( USB0_ENDPTCTRL_TXT1_0(transfer_type) - | USB0_ENDPTCTRL_RXT(transfer_type) - ); + USB0_ENDPTCTRL(endpoint_number) = + (USB0_ENDPTCTRL(endpoint_number) & + ~(USB0_ENDPTCTRL_TXT1_0_MASK | USB0_ENDPTCTRL_RXT_MASK)) | + (USB0_ENDPTCTRL_TXT1_0(transfer_type) | + USB0_ENDPTCTRL_RXT(transfer_type)); } -static void usb_endpoint_enable( - const usb_endpoint_t* const endpoint -) { +static void usb_endpoint_enable(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { - USB0_ENDPTCTRL(endpoint_number) |= (USB0_ENDPTCTRL_TXE | USB0_ENDPTCTRL_TXR); + if (usb_endpoint_is_in(endpoint->address)) { + USB0_ENDPTCTRL(endpoint_number) |= + (USB0_ENDPTCTRL_TXE | USB0_ENDPTCTRL_TXR); } else { - USB0_ENDPTCTRL(endpoint_number) |= (USB0_ENDPTCTRL_RXE | USB0_ENDPTCTRL_RXR); + USB0_ENDPTCTRL(endpoint_number) |= + (USB0_ENDPTCTRL_RXE | USB0_ENDPTCTRL_RXR); } } -static void usb_endpoint_clear_pending_interrupts( - const usb_endpoint_t* const endpoint -) { +static void usb_endpoint_clear_pending_interrupts(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { - usb_clear_pending_interrupts(USB0_ENDPTCOMPLETE_ETCE(1 << endpoint_number)); + if (usb_endpoint_is_in(endpoint->address)) { + usb_clear_pending_interrupts( + USB0_ENDPTCOMPLETE_ETCE(1 << endpoint_number)); } else { - usb_clear_pending_interrupts(USB0_ENDPTCOMPLETE_ERCE(1 << endpoint_number)); + usb_clear_pending_interrupts( + USB0_ENDPTCOMPLETE_ERCE(1 << endpoint_number)); } } -void usb_endpoint_disable( - const usb_endpoint_t* const endpoint -) { +void usb_endpoint_disable(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { + if (usb_endpoint_is_in(endpoint->address)) { USB0_ENDPTCTRL(endpoint_number) &= ~(USB0_ENDPTCTRL_TXE); } else { USB0_ENDPTCTRL(endpoint_number) &= ~(USB0_ENDPTCTRL_RXE); } - usb_queue_flush_endpoint(endpoint); + usb_queue_flush_endpoint(endpoint); usb_endpoint_clear_pending_interrupts(endpoint); usb_endpoint_flush(endpoint); } void usb_endpoint_prime( const usb_endpoint_t* const endpoint, - usb_transfer_descriptor_t* const first_td -) { + usb_transfer_descriptor_t* const first_td) +{ usb_queue_head_t* const qh = usb_queue_head(endpoint->address); - + qh->next_dtd_pointer = first_td; - qh->total_bytes - &= ~( USB_TD_DTD_TOKEN_STATUS_ACTIVE - | USB_TD_DTD_TOKEN_STATUS_HALTED - ) - ; - + qh->total_bytes &= + ~(USB_TD_DTD_TOKEN_STATUS_ACTIVE | USB_TD_DTD_TOKEN_STATUS_HALTED); + const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { + if (usb_endpoint_is_in(endpoint->address)) { USB0_ENDPTPRIME = USB0_ENDPTPRIME_PETB(1 << endpoint_number); } else { USB0_ENDPTPRIME = USB0_ENDPTPRIME_PERB(1 << endpoint_number); } } -static bool usb_endpoint_is_priming( - const usb_endpoint_t* const endpoint -) { +static bool usb_endpoint_is_priming(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { + if (usb_endpoint_is_in(endpoint->address)) { return USB0_ENDPTPRIME & USB0_ENDPTPRIME_PETB(1 << endpoint_number); } else { return USB0_ENDPTPRIME & USB0_ENDPTPRIME_PERB(1 << endpoint_number); @@ -205,12 +210,12 @@ static bool usb_endpoint_is_priming( // the given endpoint, waiting until the endpoint has finished. void usb_endpoint_schedule_wait( const usb_endpoint_t* const endpoint, - usb_transfer_descriptor_t* const td -) { + usb_transfer_descriptor_t* const td) +{ // Ensure that endpoint is ready to be primed. // It may have been flushed due to an aborted transaction. // TODO: This should be preceded by a flush? - while( usb_endpoint_is_ready(endpoint) ) {} + while (usb_endpoint_is_ready(endpoint)) {} td->next_dtd_pointer = USB_TD_NEXT_DTD_POINTER_TERMINATE; @@ -225,8 +230,8 @@ void usb_endpoint_schedule_wait( void usb_endpoint_schedule_append( const usb_endpoint_t* const endpoint, usb_transfer_descriptor_t* const tail_td, - usb_transfer_descriptor_t* const new_td -) { + usb_transfer_descriptor_t* const new_td) +{ bool done; tail_td->next_dtd_pointer = new_td; @@ -241,22 +246,22 @@ void usb_endpoint_schedule_append( } while (!(USB0_USBCMD_D & USB0_USBCMD_D_ATDTW)); USB0_USBCMD_D &= ~USB0_USBCMD_D_ATDTW; - if(!done) { + if (!done) { usb_endpoint_prime(endpoint, new_td); } } -void usb_endpoint_flush( - const usb_endpoint_t* const endpoint -) { +void usb_endpoint_flush(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); usb_queue_flush_endpoint(endpoint); - if( usb_endpoint_is_in(endpoint->address) ) { + if (usb_endpoint_is_in(endpoint->address)) { usb_flush_primed_endpoints(USB0_ENDPTFLUSH_FETB(1 << endpoint_number)); } else { usb_flush_primed_endpoints(USB0_ENDPTFLUSH_FERB(1 << endpoint_number)); } } + /* static bool usb_endpoint_is_flushing( const usb_endpoint_t* const endpoint @@ -269,82 +274,81 @@ static bool usb_endpoint_is_flushing( } } */ -bool usb_endpoint_is_ready( - const usb_endpoint_t* const endpoint -) { +bool usb_endpoint_is_ready(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { + if (usb_endpoint_is_in(endpoint->address)) { return USB0_ENDPTSTAT & USB0_ENDPTSTAT_ETBR(1 << endpoint_number); } else { return USB0_ENDPTSTAT & USB0_ENDPTSTAT_ERBR(1 << endpoint_number); } } -bool usb_endpoint_is_complete( - const usb_endpoint_t* const endpoint -) { +bool usb_endpoint_is_complete(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { + if (usb_endpoint_is_in(endpoint->address)) { return USB0_ENDPTCOMPLETE & USB0_ENDPTCOMPLETE_ETCE(1 << endpoint_number); } else { return USB0_ENDPTCOMPLETE & USB0_ENDPTCOMPLETE_ERCE(1 << endpoint_number); } } -void usb_endpoint_stall( - const usb_endpoint_t* const endpoint -) { +void usb_endpoint_stall(const usb_endpoint_t* const endpoint) +{ // Endpoint is to be stalled as a pair -- both OUT and IN. // See UM10503 section 23.10.5.2 "Stalling" const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); USB0_ENDPTCTRL(endpoint_number) |= (USB0_ENDPTCTRL_RXS | USB0_ENDPTCTRL_TXS); - + // TODO: Also need to reset data toggle in both directions? } -void usb_endpoint_reset_data_toggle( - const usb_endpoint_t* const endpoint -) { +void usb_endpoint_reset_data_toggle(const usb_endpoint_t* const endpoint) +{ const uint_fast8_t endpoint_number = usb_endpoint_number(endpoint->address); - if( usb_endpoint_is_in(endpoint->address) ) { + if (usb_endpoint_is_in(endpoint->address)) { USB0_ENDPTCTRL(endpoint_number) |= USB0_ENDPTCTRL_TXR; } else { USB0_ENDPTCTRL(endpoint_number) |= USB0_ENDPTCTRL_RXR; } } -static void usb_controller_run() { +static void usb_controller_run() +{ USB0_USBCMD_D |= USB0_USBCMD_D_RS; } -static void usb_controller_stop() { +static void usb_controller_stop() +{ USB0_USBCMD_D &= ~USB0_USBCMD_D_RS; } -static uint_fast8_t usb_controller_is_resetting() { +static uint_fast8_t usb_controller_is_resetting() +{ return (USB0_USBCMD_D & USB0_USBCMD_D_RST) != 0; } -static void usb_controller_set_device_mode() { +static void usb_controller_set_device_mode() +{ // Set USB0 peripheral mode USB0_USBMODE_D = USB0_USBMODE_D_CM1_0(2); - + // Set device-related OTG flags // OTG termination: controls pull-down on USB_DM USB0_OTGSC = USB0_OTGSC_OT; } -usb_speed_t usb_speed( - const usb_device_t* const device -) { - if( device == usb_device_usb0 ) { - switch( USB0_PORTSC1_D & USB0_PORTSC1_D_PSPD_MASK ) { +usb_speed_t usb_speed(const usb_device_t* const device) +{ + if (device == usb_device_usb0) { + switch (USB0_PORTSC1_D & USB0_PORTSC1_D_PSPD_MASK) { case USB0_PORTSC1_D_PSPD(0): return USB_SPEED_FULL; - + case USB0_PORTSC1_D_PSPD(2): return USB_SPEED_HIGH; - + default: // TODO: What to do/return here? Is this even possible? return USB_SPEED_FULL; @@ -356,39 +360,46 @@ usb_speed_t usb_speed( } } -static void usb_clear_status(const uint32_t status) { +static void usb_clear_status(const uint32_t status) +{ USB0_USBSTS_D = status; } -static uint32_t usb_get_status() { - // Mask status flags with enabled flag interrupts. +static uint32_t usb_get_status() +{ + // Mask status flags with enabled flag interrupts. const uint32_t status = USB0_USBSTS_D & USB0_USBINTR_D; - // Clear flags that were just read, leaving alone any flags that - // were just set (after the read). It's important to read and - // reset flags atomically! :-) + // Clear flags that were just read, leaving alone any flags that + // were just set (after the read). It's important to read and + // reset flags atomically! :-) usb_clear_status(status); return status; } -static void usb_clear_endpoint_setup_status(const uint32_t endpoint_setup_status) { +static void usb_clear_endpoint_setup_status(const uint32_t endpoint_setup_status) +{ USB0_ENDPTSETUPSTAT = endpoint_setup_status; } -static uint32_t usb_get_endpoint_setup_status() { - return USB0_ENDPTSETUPSTAT; +static uint32_t usb_get_endpoint_setup_status() +{ + return USB0_ENDPTSETUPSTAT; } -static void usb_clear_endpoint_complete(const uint32_t endpoint_complete) { +static void usb_clear_endpoint_complete(const uint32_t endpoint_complete) +{ USB0_ENDPTCOMPLETE = endpoint_complete; } -static uint32_t usb_get_endpoint_complete() { +static uint32_t usb_get_endpoint_complete() +{ return USB0_ENDPTCOMPLETE; } -static void usb_disable_all_endpoints() { +static void usb_disable_all_endpoints() +{ // Endpoint 0 is always enabled. TODO: So why set ENDPTCTRL0? USB0_ENDPTCTRL0 &= ~(USB0_ENDPTCTRL0_RXE | USB0_ENDPTCTRL0_TXE); USB0_ENDPTCTRL1 &= ~(USB0_ENDPTCTRL1_RXE | USB0_ENDPTCTRL1_TXE); @@ -400,32 +411,30 @@ static void usb_disable_all_endpoints() { void usb_set_address_immediate( const usb_device_t* const device, - const uint_fast8_t address -) { - if( device == usb_device_usb0 ) { + const uint_fast8_t address) +{ + if (device == usb_device_usb0) { USB0_DEVICEADDR = USB0_DEVICEADDR_USBADR(address); } } -void usb_set_address_deferred( - const usb_device_t* const device, - const uint_fast8_t address -) { - if( device == usb_device_usb0 ) { - USB0_DEVICEADDR - = USB0_DEVICEADDR_USBADR(address) - | USB0_DEVICEADDR_USBADRA - ; +void usb_set_address_deferred(const usb_device_t* const device, const uint_fast8_t address) +{ + if (device == usb_device_usb0) { + USB0_DEVICEADDR = + USB0_DEVICEADDR_USBADR(address) | USB0_DEVICEADDR_USBADRA; } } -static void usb_reset_all_endpoints() { +static void usb_reset_all_endpoints() +{ usb_disable_all_endpoints(); usb_clear_all_pending_interrupts(); usb_flush_all_primed_endpoints(); } -static void usb_controller_reset() { +static void usb_controller_reset() +{ // TODO: Good to disable some USB interrupts to avoid priming new // new endpoints before the controller is reset? usb_reset_all_endpoints(); @@ -437,15 +446,16 @@ static void usb_controller_reset() { // all primed endpoints and stopping controller. USB0_USBCMD_D = USB0_USBCMD_D_RST; - while( usb_controller_is_resetting() ) {} + while (usb_controller_is_resetting()) {} } -static void usb_bus_reset(usb_device_t* const device) { +static void usb_bus_reset(usb_device_t* const device) +{ // According to UM10503 v1.4 section 23.10.3 "Bus reset": usb_reset_all_endpoints(); usb_set_address_immediate(device, 0); usb_set_configuration(device, 0); - + // TODO: Enable endpoint 0, which might not actually be necessary, // as the datasheet claims it can't be disabled. @@ -458,37 +468,32 @@ static void usb_bus_reset(usb_device_t* const device) { //} } -static void usb_interrupt_enable( - usb_device_t* const device -) { - if( device == usb_device_usb0 ) { +static void usb_interrupt_enable(usb_device_t* const device) +{ + if (device == usb_device_usb0) { nvic_enable_irq(NVIC_USB0_IRQ); } } -void usb_device_init( - const uint_fast8_t device_ordinal, - usb_device_t* const device -) { - if( device_ordinal == 0 ) { +void usb_device_init(const uint_fast8_t device_ordinal, usb_device_t* const device) +{ + if (device_ordinal == 0) { usb_device_usb0 = device; - + usb_phy_enable(); usb_controller_reset(); usb_controller_set_device_mode(); - + // Set interrupt threshold interval to 0 USB0_USBCMD_D &= ~USB0_USBCMD_D_ITC_MASK; - // Configure endpoint list address - USB0_ENDPOINTLISTADDR = (uint32_t)usb_qh; - + // Configure endpoint list address + USB0_ENDPOINTLISTADDR = (uint32_t) usb_qh; + // Enable interrupts - USB0_USBINTR_D = - USB0_USBINTR_D_UE - | USB0_USBINTR_D_UEE - | USB0_USBINTR_D_PCE - | USB0_USBINTR_D_URE + USB0_USBINTR_D = USB0_USBINTR_D_UE | USB0_USBINTR_D_UEE | + USB0_USBINTR_D_PCE | + USB0_USBINTR_D_URE //| USB0_USBINTR_D_SRE | USB0_USBINTR_D_SLE //| USB0_USBINTR_D_NAKE @@ -496,14 +501,14 @@ void usb_device_init( } } -void usb_run( - usb_device_t* const device -) { +void usb_run(usb_device_t* const device) +{ usb_interrupt_enable(device); usb_controller_run(device); } -static void copy_setup(usb_setup_t* const dst, const volatile uint8_t* const src) { +static void copy_setup(usb_setup_t* const dst, const volatile uint8_t* const src) +{ dst->request_type = src[0]; dst->request = src[1]; dst->value_l = src[2]; @@ -514,102 +519,108 @@ static void copy_setup(usb_setup_t* const dst, const volatile uint8_t* const src dst->length_h = src[7]; } -void usb_endpoint_init( - const usb_endpoint_t* const endpoint -) { +void usb_endpoint_init(const usb_endpoint_t* const endpoint) +{ usb_endpoint_flush(endpoint); - + uint_fast16_t max_packet_size = endpoint->device->descriptor[7]; usb_transfer_type_t transfer_type = USB_TRANSFER_TYPE_CONTROL; const uint8_t* const endpoint_descriptor = usb_endpoint_descriptor(endpoint); - if( endpoint_descriptor ) { - max_packet_size = usb_endpoint_descriptor_max_packet_size(endpoint_descriptor); - transfer_type = usb_endpoint_descriptor_transfer_type(endpoint_descriptor); + if (endpoint_descriptor) { + max_packet_size = + usb_endpoint_descriptor_max_packet_size(endpoint_descriptor); + transfer_type = + usb_endpoint_descriptor_transfer_type(endpoint_descriptor); } - + // TODO: There are more capabilities to adjust based on the endpoint // descriptor. usb_queue_head_t* const qh = usb_queue_head(endpoint->address); - qh->capabilities - = USB_QH_CAPABILITIES_MULT(0) - | USB_QH_CAPABILITIES_ZLT - | USB_QH_CAPABILITIES_MPL(max_packet_size) - | ((transfer_type == USB_TRANSFER_TYPE_CONTROL) ? USB_QH_CAPABILITIES_IOS : 0) - ; + qh->capabilities = USB_QH_CAPABILITIES_MULT(0) | USB_QH_CAPABILITIES_ZLT | + USB_QH_CAPABILITIES_MPL(max_packet_size) | + ((transfer_type == USB_TRANSFER_TYPE_CONTROL) ? USB_QH_CAPABILITIES_IOS : + 0); qh->current_dtd_pointer = 0; qh->next_dtd_pointer = USB_TD_NEXT_DTD_POINTER_TERMINATE; - qh->total_bytes - = USB_TD_DTD_TOKEN_TOTAL_BYTES(0) - | USB_TD_DTD_TOKEN_MULTO(0) - ; + qh->total_bytes = USB_TD_DTD_TOKEN_TOTAL_BYTES(0) | USB_TD_DTD_TOKEN_MULTO(0); qh->buffer_pointer_page[0] = 0; qh->buffer_pointer_page[1] = 0; qh->buffer_pointer_page[2] = 0; qh->buffer_pointer_page[3] = 0; qh->buffer_pointer_page[4] = 0; - + // This is how we look up an endpoint structure from an endpoint address: - qh->_reserved_0 = (uint32_t)endpoint; + qh->_reserved_0 = (uint32_t) endpoint; // TODO: Should NAK be enabled? I'm kinda squishy on this... //USB0_ENDPTNAKEN |= // USB0_ENDPTNAKEN_EPRNE(1 << endpoint_out->number); usb_endpoint_set_type(endpoint, transfer_type); - + usb_endpoint_enable(endpoint); } -static void usb_check_for_setup_events() { +static void usb_check_for_setup_events() +{ const uint32_t endptsetupstat = usb_get_endpoint_setup_status(); - if( endptsetupstat ) { - for( uint_fast8_t i=0; i<6; i++ ) { - const uint32_t endptsetupstat_bit = USB0_ENDPTSETUPSTAT_ENDPTSETUPSTAT(1 << i); - if( endptsetupstat & endptsetupstat_bit ) { - usb_endpoint_t* const endpoint = - usb_endpoint_from_address( - usb_endpoint_address(USB_TRANSFER_DIRECTION_OUT, i) - ); - if( endpoint && endpoint->setup_complete ) { - copy_setup(&endpoint->setup, usb_queue_head(endpoint->address)->setup); + if (endptsetupstat) { + for (uint_fast8_t i = 0; i < 6; i++) { + const uint32_t endptsetupstat_bit = + USB0_ENDPTSETUPSTAT_ENDPTSETUPSTAT(1 << i); + if (endptsetupstat & endptsetupstat_bit) { + usb_endpoint_t* const endpoint = + usb_endpoint_from_address(usb_endpoint_address( + USB_TRANSFER_DIRECTION_OUT, + i)); + if (endpoint && endpoint->setup_complete) { + copy_setup( + &endpoint->setup, + usb_queue_head(endpoint->address)->setup); // TODO: Clean up this duplicated effort by providing // a cleaner way to get the SETUP data. - copy_setup(&endpoint->in->setup, usb_queue_head(endpoint->address)->setup); - usb_clear_endpoint_setup_status(endptsetupstat_bit); + copy_setup( + &endpoint->in->setup, + usb_queue_head(endpoint->address)->setup); + usb_clear_endpoint_setup_status( + endptsetupstat_bit); endpoint->setup_complete(endpoint); } else { - usb_clear_endpoint_setup_status(endptsetupstat_bit); + usb_clear_endpoint_setup_status( + endptsetupstat_bit); } } } } } -static void usb_check_for_transfer_events() { +static void usb_check_for_transfer_events() +{ const uint32_t endptcomplete = usb_get_endpoint_complete(); - if( endptcomplete ) { - for( uint_fast8_t i=0; i<6; i++ ) { - - const uint32_t endptcomplete_out_bit = USB0_ENDPTCOMPLETE_ERCE(1 << i); - if( endptcomplete & endptcomplete_out_bit ) { + if (endptcomplete) { + for (uint_fast8_t i = 0; i < 6; i++) { + const uint32_t endptcomplete_out_bit = + USB0_ENDPTCOMPLETE_ERCE(1 << i); + if (endptcomplete & endptcomplete_out_bit) { usb_clear_endpoint_complete(endptcomplete_out_bit); - usb_endpoint_t* const endpoint = - usb_endpoint_from_address( - usb_endpoint_address(USB_TRANSFER_DIRECTION_OUT, i) - ); - if( endpoint && endpoint->transfer_complete ) { + usb_endpoint_t* const endpoint = + usb_endpoint_from_address(usb_endpoint_address( + USB_TRANSFER_DIRECTION_OUT, + i)); + if (endpoint && endpoint->transfer_complete) { endpoint->transfer_complete(endpoint); } } - const uint32_t endptcomplete_in_bit = USB0_ENDPTCOMPLETE_ETCE(1 << i); - if( endptcomplete & endptcomplete_in_bit ) { + const uint32_t endptcomplete_in_bit = + USB0_ENDPTCOMPLETE_ETCE(1 << i); + if (endptcomplete & endptcomplete_in_bit) { usb_clear_endpoint_complete(endptcomplete_in_bit); - usb_endpoint_t* const endpoint = - usb_endpoint_from_address( - usb_endpoint_address(USB_TRANSFER_DIRECTION_IN, i) - ); - if( endpoint && endpoint->transfer_complete ) { + usb_endpoint_t* const endpoint = + usb_endpoint_from_address(usb_endpoint_address( + USB_TRANSFER_DIRECTION_IN, + i)); + if (endpoint && endpoint->transfer_complete) { endpoint->transfer_complete(endpoint); } } @@ -617,15 +628,16 @@ static void usb_check_for_transfer_events() { } } -void usb0_isr() { +void usb0_isr() +{ const uint32_t status = usb_get_status(); - - if( status == 0 ) { + + if (status == 0) { // Nothing to do. return; } - - if( status & USB0_USBSTS_D_UI ) { + + if (status & USB0_USBSTS_D_UI) { // USB: // - Completed transaction transfer descriptor has IOC set. // - Short packet detected. @@ -633,29 +645,29 @@ void usb0_isr() { usb_check_for_setup_events(); usb_check_for_transfer_events(); - + // TODO: Reset ignored ENDPTSETUPSTAT and ENDPTCOMPLETE flags? } - if( status & USB0_USBSTS_D_SRI ) { + if (status & USB0_USBSTS_D_SRI) { // Start Of Frame received. } - if( status & USB0_USBSTS_D_PCI ) { + if (status & USB0_USBSTS_D_PCI) { // Port change detect: // Port controller entered full- or high-speed operational state. } - if( status & USB0_USBSTS_D_SLI ) { + if (status & USB0_USBSTS_D_SLI) { // Device controller suspend. } - if( status & USB0_USBSTS_D_URI ) { + if (status & USB0_USBSTS_D_URI) { // USB reset received. usb_bus_reset(usb_device_usb0); } - if( status & USB0_USBSTS_D_UEI ) { + if (status & USB0_USBSTS_D_UEI) { // USB error: // Completion of a USB transaction resulted in an error condition. // Set along with USBINT if the TD on which the error interrupt @@ -663,7 +675,7 @@ void usb0_isr() { // The device controller detects resume signalling only. } - if( status & USB0_USBSTS_D_NAKI ) { + if (status & USB0_USBSTS_D_NAKI) { // Both the TX/RX endpoint NAK bit and corresponding TX/RX endpoint // NAK enable bit are set. } diff --git a/firmware/common/usb.h b/firmware/common/usb.h index 69190517..1a520973 100644 --- a/firmware/common/usb.h +++ b/firmware/common/usb.h @@ -31,75 +31,47 @@ void usb_peripheral_reset(); void usb_phy_enable(); -void usb_device_init( - const uint_fast8_t device_ordinal, - usb_device_t* const device -); +void usb_device_init(const uint_fast8_t device_ordinal, usb_device_t* const device); -void usb_run( - usb_device_t* const device -); +void usb_run(usb_device_t* const device); -void usb_run_tasks( - const usb_device_t* const device -); +void usb_run_tasks(const usb_device_t* const device); -usb_speed_t usb_speed( - const usb_device_t* const device -); +usb_speed_t usb_speed(const usb_device_t* const device); void usb_set_address_immediate( const usb_device_t* const device, - const uint_fast8_t address -); + const uint_fast8_t address); void usb_set_address_deferred( const usb_device_t* const device, - const uint_fast8_t address -); + const uint_fast8_t address); -usb_endpoint_t* usb_endpoint_from_address( - const uint_fast8_t endpoint_address -); +usb_endpoint_t* usb_endpoint_from_address(const uint_fast8_t endpoint_address); -void usb_endpoint_init( - const usb_endpoint_t* const endpoint -); +void usb_endpoint_init(const usb_endpoint_t* const endpoint); -void usb_endpoint_stall( - const usb_endpoint_t* const endpoint -); +void usb_endpoint_stall(const usb_endpoint_t* const endpoint); -void usb_endpoint_disable( - const usb_endpoint_t* const endpoint -); +void usb_endpoint_disable(const usb_endpoint_t* const endpoint); -void usb_endpoint_reset_data_toggle( - const usb_endpoint_t* const endpoint -); +void usb_endpoint_reset_data_toggle(const usb_endpoint_t* const endpoint); -void usb_endpoint_flush( - const usb_endpoint_t* const endpoint -); +void usb_endpoint_flush(const usb_endpoint_t* const endpoint); -bool usb_endpoint_is_ready( - const usb_endpoint_t* const endpoint -); +bool usb_endpoint_is_ready(const usb_endpoint_t* const endpoint); void usb_endpoint_prime( const usb_endpoint_t* const endpoint, - usb_transfer_descriptor_t* const first_td -); + usb_transfer_descriptor_t* const first_td); void usb_endpoint_schedule_wait( const usb_endpoint_t* const endpoint, - usb_transfer_descriptor_t* const td -); + usb_transfer_descriptor_t* const td); void usb_endpoint_schedule_append( - const usb_endpoint_t* const endpoint, - usb_transfer_descriptor_t* const tail_td, - usb_transfer_descriptor_t* const new_td -); + const usb_endpoint_t* const endpoint, + usb_transfer_descriptor_t* const tail_td, + usb_transfer_descriptor_t* const new_td); -#endif//__USB_H__ +#endif //__USB_H__ diff --git a/firmware/common/usb_queue.c b/firmware/common/usb_queue.c index f789caea..ad7f8c71 100644 --- a/firmware/common/usb_queue.c +++ b/firmware/common/usb_queue.c @@ -33,198 +33,202 @@ usb_queue_t* endpoint_queues[12] = {}; -#define USB_ENDPOINT_INDEX(endpoint_address) (((endpoint_address & 0xF) * 2) + ((endpoint_address >> 7) & 1)) +#define USB_ENDPOINT_INDEX(endpoint_address) \ + (((endpoint_address & 0xF) * 2) + ((endpoint_address >> 7) & 1)) -static usb_queue_t* endpoint_queue( - const usb_endpoint_t* const endpoint -) { - uint32_t index = USB_ENDPOINT_INDEX(endpoint->address); - if (endpoint_queues[index] == NULL) - while (1) {} - return endpoint_queues[index]; +static usb_queue_t* endpoint_queue(const usb_endpoint_t* const endpoint) +{ + uint32_t index = USB_ENDPOINT_INDEX(endpoint->address); + if (endpoint_queues[index] == NULL) + while (1) {} + return endpoint_queues[index]; } -void usb_queue_init( - usb_queue_t* const queue -) { - uint32_t index = USB_ENDPOINT_INDEX(queue->endpoint->address); - if (endpoint_queues[index] != NULL) - while (1) {} - endpoint_queues[index] = queue; +void usb_queue_init(usb_queue_t* const queue) +{ + uint32_t index = USB_ENDPOINT_INDEX(queue->endpoint->address); + if (endpoint_queues[index] != NULL) + while (1) {} + endpoint_queues[index] = queue; - usb_transfer_t* t = queue->free_transfers; - for (unsigned int i=0; i < queue->pool_size - 1; i++, t++) { - t->next = t+1; - t->queue = queue; - } - t->next = NULL; - t->queue = queue; + usb_transfer_t* t = queue->free_transfers; + for (unsigned int i = 0; i < queue->pool_size - 1; i++, t++) { + t->next = t + 1; + t->queue = queue; + } + t->next = NULL; + t->queue = queue; } /* Allocate a transfer */ -static usb_transfer_t* allocate_transfer( - usb_queue_t* const queue -) { - bool aborted; - usb_transfer_t* transfer; - if (queue->free_transfers == NULL) - return NULL; +static usb_transfer_t* allocate_transfer(usb_queue_t* const queue) +{ + bool aborted; + usb_transfer_t* transfer; + if (queue->free_transfers == NULL) + return NULL; - do { - transfer = (void *) __ldrex((uint32_t *) &queue->free_transfers); - aborted = __strex((uint32_t) transfer->next, (uint32_t *) &queue->free_transfers); - } while (aborted); - transfer->next = NULL; - return transfer; + do { + transfer = (void*) __ldrex((uint32_t*) &queue->free_transfers); + aborted = + __strex((uint32_t) transfer->next, + (uint32_t*) &queue->free_transfers); + } while (aborted); + transfer->next = NULL; + return transfer; } /* Place a transfer in the free list */ static void free_transfer(usb_transfer_t* const transfer) { - usb_queue_t* const queue = transfer->queue; - bool aborted; - do { - transfer->next = (void *) __ldrex((uint32_t *) &queue->free_transfers); - aborted = __strex((uint32_t) transfer, (uint32_t *) &queue->free_transfers); - } while (aborted); + usb_queue_t* const queue = transfer->queue; + bool aborted; + do { + transfer->next = (void*) __ldrex((uint32_t*) &queue->free_transfers); + aborted = + __strex((uint32_t) transfer, (uint32_t*) &queue->free_transfers); + } while (aborted); } /* Add a transfer to the end of an endpoint's queue. Returns the old * tail or NULL is the queue was empty */ -static usb_transfer_t* endpoint_queue_transfer( - usb_transfer_t* const transfer -) { - usb_queue_t* const queue = transfer->queue; - transfer->next = NULL; - if (queue->active != NULL) { - usb_transfer_t* t = queue->active; - while (t->next != NULL) t = t->next; - t->next = transfer; - return t; - } else { - queue->active = transfer; - return NULL; - } +static usb_transfer_t* endpoint_queue_transfer(usb_transfer_t* const transfer) +{ + usb_queue_t* const queue = transfer->queue; + transfer->next = NULL; + if (queue->active != NULL) { + usb_transfer_t* t = queue->active; + while (t->next != NULL) + t = t->next; + t->next = transfer; + return t; + } else { + queue->active = transfer; + return NULL; + } } - + static void usb_queue_flush_queue(usb_queue_t* const queue) { - cm_disable_interrupts(); - while (queue->active) { - usb_transfer_t* transfer = queue->active; - queue->active = transfer->next; - free_transfer(transfer); - } - cm_enable_interrupts(); + cm_disable_interrupts(); + while (queue->active) { + usb_transfer_t* transfer = queue->active; + queue->active = transfer->next; + free_transfer(transfer); + } + cm_enable_interrupts(); } void usb_queue_flush_endpoint(const usb_endpoint_t* const endpoint) { - usb_queue_flush_queue(endpoint_queue(endpoint)); + usb_queue_flush_queue(endpoint_queue(endpoint)); } int usb_transfer_schedule( const usb_endpoint_t* const endpoint, void* const data, const uint32_t maximum_length, - const transfer_completion_cb completion_cb, - void* const user_data -) { - usb_queue_t* const queue = endpoint_queue(endpoint); - usb_transfer_t* const transfer = allocate_transfer(queue); - if (transfer == NULL) return -1; - usb_transfer_descriptor_t* const td = &transfer->td; + const transfer_completion_cb completion_cb, + void* const user_data) +{ + usb_queue_t* const queue = endpoint_queue(endpoint); + usb_transfer_t* const transfer = allocate_transfer(queue); + if (transfer == NULL) + return -1; + usb_transfer_descriptor_t* const td = &transfer->td; // Configure the transfer descriptor - td->next_dtd_pointer = USB_TD_NEXT_DTD_POINTER_TERMINATE; - td->total_bytes = - USB_TD_DTD_TOKEN_TOTAL_BYTES(maximum_length) - | USB_TD_DTD_TOKEN_IOC - | USB_TD_DTD_TOKEN_MULTO(0) - | USB_TD_DTD_TOKEN_STATUS_ACTIVE - ; - td->buffer_pointer_page[0] = (uint32_t)data; - td->buffer_pointer_page[1] = ((uint32_t)data + 0x1000) & 0xfffff000; - td->buffer_pointer_page[2] = ((uint32_t)data + 0x2000) & 0xfffff000; - td->buffer_pointer_page[3] = ((uint32_t)data + 0x3000) & 0xfffff000; - td->buffer_pointer_page[4] = ((uint32_t)data + 0x4000) & 0xfffff000; + td->next_dtd_pointer = USB_TD_NEXT_DTD_POINTER_TERMINATE; + td->total_bytes = USB_TD_DTD_TOKEN_TOTAL_BYTES(maximum_length) | + USB_TD_DTD_TOKEN_IOC | USB_TD_DTD_TOKEN_MULTO(0) | + USB_TD_DTD_TOKEN_STATUS_ACTIVE; + td->buffer_pointer_page[0] = (uint32_t) data; + td->buffer_pointer_page[1] = ((uint32_t) data + 0x1000) & 0xfffff000; + td->buffer_pointer_page[2] = ((uint32_t) data + 0x2000) & 0xfffff000; + td->buffer_pointer_page[3] = ((uint32_t) data + 0x3000) & 0xfffff000; + td->buffer_pointer_page[4] = ((uint32_t) data + 0x4000) & 0xfffff000; - // Fill in transfer fields - transfer->maximum_length = maximum_length; - transfer->completion_cb = completion_cb; - transfer->user_data = user_data; + // Fill in transfer fields + transfer->maximum_length = maximum_length; + transfer->completion_cb = completion_cb; + transfer->user_data = user_data; - cm_disable_interrupts(); - usb_transfer_t* tail = endpoint_queue_transfer(transfer); - if (tail == NULL) { - // The queue is currently empty, we need to re-prime - usb_endpoint_schedule_wait(queue->endpoint, &transfer->td); - } else { - // The queue is currently running, try to append - usb_endpoint_schedule_append(queue->endpoint, &tail->td, &transfer->td); - } - cm_enable_interrupts(); - return 0; + cm_disable_interrupts(); + usb_transfer_t* tail = endpoint_queue_transfer(transfer); + if (tail == NULL) { + // The queue is currently empty, we need to re-prime + usb_endpoint_schedule_wait(queue->endpoint, &transfer->td); + } else { + // The queue is currently running, try to append + usb_endpoint_schedule_append(queue->endpoint, &tail->td, &transfer->td); + } + cm_enable_interrupts(); + return 0; } - + int usb_transfer_schedule_block( const usb_endpoint_t* const endpoint, void* const data, const uint32_t maximum_length, - const transfer_completion_cb completion_cb, - void* const user_data -) { - int ret; - do { - ret = usb_transfer_schedule(endpoint, data, maximum_length, - completion_cb, user_data); - } while (ret == -1); - return 0; + const transfer_completion_cb completion_cb, + void* const user_data) +{ + int ret; + do { + ret = usb_transfer_schedule( + endpoint, + data, + maximum_length, + completion_cb, + user_data); + } while (ret == -1); + return 0; } -int usb_transfer_schedule_ack( - const usb_endpoint_t* const endpoint -) { - return usb_transfer_schedule_block(endpoint, 0, 0, NULL, NULL); +int usb_transfer_schedule_ack(const usb_endpoint_t* const endpoint) +{ + return usb_transfer_schedule_block(endpoint, 0, 0, NULL, NULL); } /* Called when an endpoint might have completed a transfer */ void usb_queue_transfer_complete(usb_endpoint_t* const endpoint) { - usb_queue_t* const queue = endpoint_queue(endpoint); - if (queue == NULL) - while(1) {} // Uh oh - usb_transfer_t* transfer = queue->active; + usb_queue_t* const queue = endpoint_queue(endpoint); + if (queue == NULL) + while (1) {} // Uh oh + usb_transfer_t* transfer = queue->active; - while (transfer != NULL) { - uint8_t status = transfer->td.total_bytes; + while (transfer != NULL) { + uint8_t status = transfer->td.total_bytes; - // Check for failures - if ( status & USB_TD_DTD_TOKEN_STATUS_HALTED - || status & USB_TD_DTD_TOKEN_STATUS_BUFFER_ERROR - || status & USB_TD_DTD_TOKEN_STATUS_TRANSACTION_ERROR) { - // TODO: Uh oh, do something useful here - while (1) {} - } + // Check for failures + if (status & USB_TD_DTD_TOKEN_STATUS_HALTED || + status & USB_TD_DTD_TOKEN_STATUS_BUFFER_ERROR || + status & USB_TD_DTD_TOKEN_STATUS_TRANSACTION_ERROR) { + // TODO: Uh oh, do something useful here + while (1) {} + } - // Still not finished - if (status & USB_TD_DTD_TOKEN_STATUS_ACTIVE) - break; + // Still not finished + if (status & USB_TD_DTD_TOKEN_STATUS_ACTIVE) + break; - // Advance the head. We need to do this before invoking the completion - // callback as it might attempt to schedule a new transfer - queue->active = transfer->next; - usb_transfer_t* next = transfer->next; + // Advance the head. We need to do this before invoking the completion + // callback as it might attempt to schedule a new transfer + queue->active = transfer->next; + usb_transfer_t* next = transfer->next; - // Invoke completion callback - unsigned int total_bytes = (transfer->td.total_bytes & USB_TD_DTD_TOKEN_TOTAL_BYTES_MASK) >> USB_TD_DTD_TOKEN_TOTAL_BYTES_SHIFT; - unsigned int transferred = transfer->maximum_length - total_bytes; - if (transfer->completion_cb) - transfer->completion_cb(transfer->user_data, transferred); + // Invoke completion callback + unsigned int total_bytes = + (transfer->td.total_bytes & USB_TD_DTD_TOKEN_TOTAL_BYTES_MASK) >> + USB_TD_DTD_TOKEN_TOTAL_BYTES_SHIFT; + unsigned int transferred = transfer->maximum_length - total_bytes; + if (transfer->completion_cb) + transfer->completion_cb(transfer->user_data, transferred); - // Advance head and free transfer - free_transfer(transfer); - transfer = next; - } + // Advance head and free transfer + free_transfer(transfer); + transfer = next; + } } diff --git a/firmware/common/usb_queue.h b/firmware/common/usb_queue.h index 36663427..e96a4565 100644 --- a/firmware/common/usb_queue.h +++ b/firmware/common/usb_queue.h @@ -33,31 +33,29 @@ typedef void (*transfer_completion_cb)(void*, unsigned int); // This is an opaque datatype. Thou shall not touch these members. struct _usb_transfer_t { - struct _usb_transfer_t* next; - usb_transfer_descriptor_t td ATTR_ALIGNED(64); - unsigned int maximum_length; - struct _usb_queue_t* queue; - transfer_completion_cb completion_cb; - void* user_data; + struct _usb_transfer_t* next; + usb_transfer_descriptor_t td ATTR_ALIGNED(64); + unsigned int maximum_length; + struct _usb_queue_t* queue; + transfer_completion_cb completion_cb; + void* user_data; }; // This is an opaque datatype. Thou shall not touch these members. struct _usb_queue_t { - struct usb_endpoint_t* endpoint; - const unsigned int pool_size; - usb_transfer_t* volatile free_transfers; - usb_transfer_t* volatile active; + struct usb_endpoint_t* endpoint; + const unsigned int pool_size; + usb_transfer_t* volatile free_transfers; + usb_transfer_t* volatile active; }; -#define USB_DECLARE_QUEUE(endpoint_name) \ - struct _usb_queue_t endpoint_name##_queue; -#define USB_DEFINE_QUEUE(endpoint_name, _pool_size) \ - struct _usb_transfer_t endpoint_name##_transfers[_pool_size]; \ - struct _usb_queue_t endpoint_name##_queue = { \ - .endpoint = &endpoint_name, \ - .free_transfers = endpoint_name##_transfers, \ - .pool_size = _pool_size \ - }; +#define USB_DECLARE_QUEUE(endpoint_name) struct _usb_queue_t endpoint_name##_queue; +#define USB_DEFINE_QUEUE(endpoint_name, _pool_size) \ + struct _usb_transfer_t endpoint_name##_transfers[_pool_size]; \ + struct _usb_queue_t endpoint_name##_queue = { \ + .endpoint = &endpoint_name, \ + .free_transfers = endpoint_name##_transfers, \ + .pool_size = _pool_size}; void usb_queue_flush_endpoint(const usb_endpoint_t* const endpoint); @@ -65,28 +63,20 @@ int usb_transfer_schedule( const usb_endpoint_t* const endpoint, void* const data, const uint32_t maximum_length, - const transfer_completion_cb completion_cb, - void* const user_data -); + const transfer_completion_cb completion_cb, + void* const user_data); int usb_transfer_schedule_block( const usb_endpoint_t* const endpoint, void* const data, const uint32_t maximum_length, - const transfer_completion_cb completion_cb, - void* const user_data -); + const transfer_completion_cb completion_cb, + void* const user_data); -int usb_transfer_schedule_ack( - const usb_endpoint_t* const endpoint -); +int usb_transfer_schedule_ack(const usb_endpoint_t* const endpoint); -void usb_queue_init( - usb_queue_t* const queue -); +void usb_queue_init(usb_queue_t* const queue); -void usb_queue_transfer_complete( - usb_endpoint_t* const endpoint -); +void usb_queue_transfer_complete(usb_endpoint_t* const endpoint); -#endif//__USB_QUEUE_H__ +#endif //__USB_QUEUE_H__ diff --git a/firmware/common/usb_request.c b/firmware/common/usb_request.c index f9226c7f..4fab7a70 100644 --- a/firmware/common/usb_request.c +++ b/firmware/common/usb_request.c @@ -25,70 +25,64 @@ #include -static void usb_request( - usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { +static void usb_request(usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) +{ usb_request_status_t status = USB_REQUEST_STATUS_STALL; usb_request_handler_fn handler = 0; - - switch( endpoint->setup.request_type & USB_SETUP_REQUEST_TYPE_mask ) { + + switch (endpoint->setup.request_type & USB_SETUP_REQUEST_TYPE_mask) { case USB_SETUP_REQUEST_TYPE_STANDARD: handler = usb_request_handlers.standard; break; - + case USB_SETUP_REQUEST_TYPE_CLASS: handler = usb_request_handlers.class; break; - + case USB_SETUP_REQUEST_TYPE_VENDOR: handler = usb_request_handlers.vendor; break; - + case USB_SETUP_REQUEST_TYPE_RESERVED: handler = usb_request_handlers.reserved; break; } - - if( handler ) { + + if (handler) { status = handler(endpoint, stage); } - if( status != USB_REQUEST_STATUS_OK ) { + if (status != USB_REQUEST_STATUS_OK) { // USB 2.0 section 9.2.7 "Request Error" usb_endpoint_stall(endpoint); } } -void usb_setup_complete( - usb_endpoint_t* const endpoint -) { +void usb_setup_complete(usb_endpoint_t* const endpoint) +{ usb_request(endpoint, USB_TRANSFER_STAGE_SETUP); } -void usb_control_out_complete( - usb_endpoint_t* const endpoint -) { - const bool device_to_host = - endpoint->setup.request_type >> USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift; - if( device_to_host ) { +void usb_control_out_complete(usb_endpoint_t* const endpoint) +{ + const bool device_to_host = endpoint->setup.request_type >> + USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift; + if (device_to_host) { usb_request(endpoint, USB_TRANSFER_STAGE_STATUS); } else { usb_request(endpoint, USB_TRANSFER_STAGE_DATA); } - usb_queue_transfer_complete(endpoint); + usb_queue_transfer_complete(endpoint); } -void usb_control_in_complete( - usb_endpoint_t* const endpoint -) { - const bool device_to_host = - endpoint->setup.request_type >> USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift; - if( device_to_host ) { +void usb_control_in_complete(usb_endpoint_t* const endpoint) +{ + const bool device_to_host = endpoint->setup.request_type >> + USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift; + if (device_to_host) { usb_request(endpoint, USB_TRANSFER_STAGE_DATA); } else { usb_request(endpoint, USB_TRANSFER_STAGE_STATUS); } - usb_queue_transfer_complete(endpoint); + usb_queue_transfer_complete(endpoint); } - diff --git a/firmware/common/usb_request.h b/firmware/common/usb_request.h index 9c1ef84f..e6de9328 100644 --- a/firmware/common/usb_request.h +++ b/firmware/common/usb_request.h @@ -41,11 +41,10 @@ typedef enum { USB_REQUEST_STATUS_OK = 0, USB_REQUEST_STATUS_STALL = 1, } usb_request_status_t; - + typedef usb_request_status_t (*usb_request_handler_fn)( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); typedef struct { usb_request_handler_fn standard; @@ -56,16 +55,10 @@ typedef struct { extern const usb_request_handlers_t usb_request_handlers; -void usb_setup_complete( - usb_endpoint_t* const endpoint -); +void usb_setup_complete(usb_endpoint_t* const endpoint); -void usb_control_in_complete( - usb_endpoint_t* const endpoint -); +void usb_control_in_complete(usb_endpoint_t* const endpoint); -void usb_control_out_complete( - usb_endpoint_t* const endpoint -); +void usb_control_out_complete(usb_endpoint_t* const endpoint); -#endif//__USB_REQUEST_H__ +#endif //__USB_REQUEST_H__ diff --git a/firmware/common/usb_standard_request.c b/firmware/common/usb_standard_request.c index b3386f71..4e77486a 100644 --- a/firmware/common/usb_standard_request.c +++ b/firmware/common/usb_standard_request.c @@ -28,61 +28,57 @@ #include "usb_type.h" #include "usb_queue.h" -const uint8_t* usb_endpoint_descriptor( - const usb_endpoint_t* const endpoint -) { +const uint8_t* usb_endpoint_descriptor(const usb_endpoint_t* const endpoint) +{ const usb_configuration_t* const configuration = endpoint->device->configuration; - if( configuration ) { + if (configuration) { const uint8_t* descriptor = configuration->descriptor; - while( descriptor[0] != 0 ) { - if( descriptor[1] == USB_DESCRIPTOR_TYPE_ENDPOINT ) { - if( descriptor[2] == endpoint->address ) { + while (descriptor[0] != 0) { + if (descriptor[1] == USB_DESCRIPTOR_TYPE_ENDPOINT) { + if (descriptor[2] == endpoint->address) { return descriptor; } } descriptor += descriptor[0]; } } - + return 0; } - + uint_fast16_t usb_endpoint_descriptor_max_packet_size( - const uint8_t* const endpoint_descriptor -) { + const uint8_t* const endpoint_descriptor) +{ return (endpoint_descriptor[5] << 8) | endpoint_descriptor[4]; } usb_transfer_type_t usb_endpoint_descriptor_transfer_type( - const uint8_t* const endpoint_descriptor -) { + const uint8_t* const endpoint_descriptor) +{ return (endpoint_descriptor[3] & 0x3); } void (*usb_configuration_changed_cb)(usb_device_t* const) = NULL; -void usb_set_configuration_changed_cb( - void (*callback)(usb_device_t* const) -) { +void usb_set_configuration_changed_cb(void (*callback)(usb_device_t* const)) +{ usb_configuration_changed_cb = callback; } bool usb_set_configuration( usb_device_t* const device, - const uint_fast8_t configuration_number -) { - + const uint_fast8_t configuration_number) +{ const usb_configuration_t* new_configuration = 0; - if( configuration_number != 0 ) { - + if (configuration_number != 0) { // Locate requested configuration. - if( device->configurations ) { + if (device->configurations) { usb_configuration_t** configurations = *(device->configurations); uint32_t i = 0; const usb_speed_t usb_speed_current = usb_speed(device); - while( configurations[i] ) { - if( (configurations[i]->speed == usb_speed_current) && - (configurations[i]->number == configuration_number) ) { + while (configurations[i]) { + if ((configurations[i]->speed == usb_speed_current) && + (configurations[i]->number == configuration_number)) { new_configuration = configurations[i]; break; } @@ -91,12 +87,12 @@ bool usb_set_configuration( } // Requested configuration not found: request error. - if( new_configuration == 0 ) { + if (new_configuration == 0) { return false; } } - - if( new_configuration != device->configuration ) { + + if (new_configuration != device->configuration) { // Configuration changed. device->configuration = new_configuration; } @@ -106,38 +102,42 @@ bool usb_set_configuration( return true; } - + static usb_request_status_t usb_send_descriptor( usb_endpoint_t* const endpoint, - const uint8_t* const descriptor_data -) { + const uint8_t* const descriptor_data) +{ const uint32_t setup_length = endpoint->setup.length; uint32_t descriptor_length = descriptor_data[0]; - if( descriptor_data[1] == USB_DESCRIPTOR_TYPE_CONFIGURATION ) { + if (descriptor_data[1] == USB_DESCRIPTOR_TYPE_CONFIGURATION) { descriptor_length = (descriptor_data[3] << 8) | descriptor_data[2]; } // We cast the const away but this shouldn't be a problem as this is a write transfer usb_transfer_schedule_block( endpoint->in, (uint8_t* const) descriptor_data, - (setup_length > descriptor_length) ? descriptor_length : setup_length, - NULL, NULL - ); + (setup_length > descriptor_length) ? descriptor_length : setup_length, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); return USB_REQUEST_STATUS_OK; } -static usb_request_status_t usb_send_descriptor_string( - usb_endpoint_t* const endpoint -) { +static usb_request_status_t usb_send_descriptor_string(usb_endpoint_t* const endpoint) +{ if ((endpoint->setup.value_l == 0xee) && - (endpoint->device->wcid_string_descriptor != NULL)) { /* MS WCID string */ - return usb_send_descriptor(endpoint, endpoint->device->wcid_string_descriptor); + (endpoint->device->wcid_string_descriptor != NULL)) { /* MS WCID string */ + return usb_send_descriptor( + endpoint, + endpoint->device->wcid_string_descriptor); } else { uint_fast8_t index = endpoint->setup.value_l; - for( uint_fast8_t i=0; endpoint->device->descriptor_strings[i] != 0; i++ ) { - if( i == index ) { - return usb_send_descriptor(endpoint, endpoint->device->descriptor_strings[i]); + for (uint_fast8_t i = 0; endpoint->device->descriptor_strings[i] != 0; + i++) { + if (i == index) { + return usb_send_descriptor( + endpoint, + endpoint->device->descriptor_strings[i]); } } } @@ -147,14 +147,16 @@ static usb_request_status_t usb_send_descriptor_string( static usb_request_status_t usb_send_descriptor_config( usb_endpoint_t* const endpoint, usb_speed_t speed, - const uint8_t config_num -) { + const uint8_t config_num) +{ usb_configuration_t** config = *(endpoint->device->configurations); unsigned int i = 0; - for( ; *config != NULL; config++ ) { - if( (*config)->speed == speed) { + for (; *config != NULL; config++) { + if ((*config)->speed == speed) { if (i == config_num) { - return usb_send_descriptor(endpoint, (*config)->descriptor); + return usb_send_descriptor( + endpoint, + (*config)->descriptor); } else { i++; } @@ -164,34 +166,48 @@ static usb_request_status_t usb_send_descriptor_config( } static usb_request_status_t usb_standard_request_get_descriptor_setup( - usb_endpoint_t* const endpoint -) { - switch( endpoint->setup.value_h ) { + usb_endpoint_t* const endpoint) +{ + switch (endpoint->setup.value_h) { case USB_DESCRIPTOR_TYPE_DEVICE: return usb_send_descriptor(endpoint, endpoint->device->descriptor); - + case USB_DESCRIPTOR_TYPE_CONFIGURATION: // TODO: Duplicated code. Refactor. - if( usb_speed(endpoint->device) == USB_SPEED_HIGH ) { - return usb_send_descriptor_config(endpoint, USB_SPEED_HIGH, endpoint->setup.value_l); + if (usb_speed(endpoint->device) == USB_SPEED_HIGH) { + return usb_send_descriptor_config( + endpoint, + USB_SPEED_HIGH, + endpoint->setup.value_l); } else { - return usb_send_descriptor_config(endpoint, USB_SPEED_FULL, endpoint->setup.value_l); + return usb_send_descriptor_config( + endpoint, + USB_SPEED_FULL, + endpoint->setup.value_l); } - + case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER: - return usb_send_descriptor(endpoint, endpoint->device->qualifier_descriptor); + return usb_send_descriptor( + endpoint, + endpoint->device->qualifier_descriptor); case USB_DESCRIPTOR_TYPE_OTHER_SPEED_CONFIGURATION: // TODO: Duplicated code. Refactor. - if( usb_speed(endpoint->device) == USB_SPEED_HIGH ) { - return usb_send_descriptor_config(endpoint, USB_SPEED_FULL, endpoint->setup.value_l); + if (usb_speed(endpoint->device) == USB_SPEED_HIGH) { + return usb_send_descriptor_config( + endpoint, + USB_SPEED_FULL, + endpoint->setup.value_l); } else { - return usb_send_descriptor_config(endpoint, USB_SPEED_HIGH, endpoint->setup.value_l); + return usb_send_descriptor_config( + endpoint, + USB_SPEED_HIGH, + endpoint->setup.value_l); } - + case USB_DESCRIPTOR_TYPE_STRING: return usb_send_descriptor_string(endpoint); - + case USB_DESCRIPTOR_TYPE_INTERFACE: case USB_DESCRIPTOR_TYPE_ENDPOINT: default: @@ -201,12 +217,12 @@ static usb_request_status_t usb_standard_request_get_descriptor_setup( static usb_request_status_t usb_standard_request_get_descriptor( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - switch( stage ) { + const usb_transfer_stage_t stage) +{ + switch (stage) { case USB_TRANSFER_STAGE_SETUP: return usb_standard_request_get_descriptor_setup(endpoint); - + case USB_TRANSFER_STAGE_DATA: case USB_TRANSFER_STAGE_STATUS: return USB_REQUEST_STATUS_OK; @@ -217,18 +233,22 @@ static usb_request_status_t usb_standard_request_get_descriptor( } usb_request_status_t usb_vendor_request_read_wcid( - usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { if ((endpoint->setup.index == 0x04) && - (endpoint->device->wcid_feature_descriptor != NULL)) { - usb_send_descriptor(endpoint, endpoint->device->wcid_feature_descriptor); + (endpoint->device->wcid_feature_descriptor != NULL)) { + usb_send_descriptor( + endpoint, + endpoint->device->wcid_feature_descriptor); return USB_REQUEST_STATUS_OK; } if ((endpoint->setup.index == 0x05) && - (endpoint->device->wcid_extended_properties_descriptor != NULL)) { - usb_send_descriptor(endpoint, endpoint->device->wcid_extended_properties_descriptor); + (endpoint->device->wcid_extended_properties_descriptor != NULL)) { + usb_send_descriptor( + endpoint, + endpoint->device->wcid_extended_properties_descriptor); return USB_REQUEST_STATUS_OK; } return USB_REQUEST_STATUS_STALL; @@ -239,8 +259,8 @@ usb_request_status_t usb_vendor_request_read_wcid( /*********************************************************************/ static usb_request_status_t usb_standard_request_set_address_setup( - usb_endpoint_t* const endpoint -) { + usb_endpoint_t* const endpoint) +{ usb_set_address_deferred(endpoint->device, endpoint->setup.value_l); usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; @@ -248,12 +268,12 @@ static usb_request_status_t usb_standard_request_set_address_setup( static usb_request_status_t usb_standard_request_set_address( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - switch( stage ) { + const usb_transfer_stage_t stage) +{ + switch (stage) { case USB_TRANSFER_STAGE_SETUP: return usb_standard_request_set_address_setup(endpoint); - + case USB_TRANSFER_STAGE_DATA: case USB_TRANSFER_STAGE_STATUS: /* NOTE: Not necessary to set address here, as DEVICEADR.USBADRA bit @@ -261,7 +281,7 @@ static usb_request_status_t usb_standard_request_set_address( * operation on IN ACK. */ return USB_REQUEST_STATUS_OK; - + default: return USB_REQUEST_STATUS_STALL; } @@ -270,10 +290,10 @@ static usb_request_status_t usb_standard_request_set_address( /*********************************************************************/ static usb_request_status_t usb_standard_request_set_configuration_setup( - usb_endpoint_t* const endpoint -) { + usb_endpoint_t* const endpoint) +{ const uint8_t usb_configuration = endpoint->setup.value_l; - if( usb_set_configuration(endpoint->device, usb_configuration) ) { + if (usb_set_configuration(endpoint->device, usb_configuration)) { usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } else { @@ -283,16 +303,16 @@ static usb_request_status_t usb_standard_request_set_configuration_setup( static usb_request_status_t usb_standard_request_set_configuration( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - switch( stage ) { + const usb_transfer_stage_t stage) +{ + switch (stage) { case USB_TRANSFER_STAGE_SETUP: return usb_standard_request_set_configuration_setup(endpoint); - + case USB_TRANSFER_STAGE_DATA: case USB_TRANSFER_STAGE_STATUS: return USB_REQUEST_STATUS_OK; - + default: return USB_REQUEST_STATUS_STALL; } @@ -301,14 +321,19 @@ static usb_request_status_t usb_standard_request_set_configuration( /*********************************************************************/ static usb_request_status_t usb_standard_request_get_configuration_setup( - usb_endpoint_t* const endpoint -) { - if( endpoint->setup.length == 1 ) { + usb_endpoint_t* const endpoint) +{ + if (endpoint->setup.length == 1) { endpoint->buffer[0] = 0; - if( endpoint->device->configuration ) { + if (endpoint->device->configuration) { endpoint->buffer[0] = endpoint->device->configuration->number; } - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 1, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); return USB_REQUEST_STATUS_OK; } else { @@ -318,12 +343,12 @@ static usb_request_status_t usb_standard_request_get_configuration_setup( static usb_request_status_t usb_standard_request_get_configuration( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - switch( stage ) { + const usb_transfer_stage_t stage) +{ + switch (stage) { case USB_TRANSFER_STAGE_SETUP: return usb_standard_request_get_configuration_setup(endpoint); - + case USB_TRANSFER_STAGE_DATA: case USB_TRANSFER_STAGE_STATUS: return USB_REQUEST_STATUS_OK; @@ -334,13 +359,18 @@ static usb_request_status_t usb_standard_request_get_configuration( } static usb_request_status_t usb_standard_request_get_status_setup( - usb_endpoint_t* const endpoint -) { - if( endpoint->setup.length == 2 ) { + usb_endpoint_t* const endpoint) +{ + if (endpoint->setup.length == 2) { endpoint->buffer[0] = 0; endpoint->buffer[1] = 0; - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 2, NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 2, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); return USB_REQUEST_STATUS_OK; } else { @@ -348,12 +378,11 @@ static usb_request_status_t usb_standard_request_get_status_setup( } } - static usb_request_status_t usb_standard_request_get_status( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - switch( stage ) { + const usb_transfer_stage_t stage) +{ + switch (stage) { case USB_TRANSFER_STAGE_SETUP: return usb_standard_request_get_status_setup(endpoint); @@ -369,16 +398,14 @@ static usb_request_status_t usb_standard_request_get_status( static usb_request_status_t usb_standard_request_clear_feature_setup( usb_endpoint_t* const endpoint) { - switch (endpoint->setup.value) { - case USB_FEATURE_SELECTOR_ENDPOINT_HALT: - usb_endpoint_reset_data_toggle( - usb_endpoint_from_address(endpoint->setup.index) - ); - usb_transfer_schedule_ack(endpoint->in); - return USB_REQUEST_STATUS_OK; - default: - return USB_REQUEST_STATUS_STALL; + case USB_FEATURE_SELECTOR_ENDPOINT_HALT: + usb_endpoint_reset_data_toggle( + usb_endpoint_from_address(endpoint->setup.index)); + usb_transfer_schedule_ack(endpoint->in); + return USB_REQUEST_STATUS_OK; + default: + return USB_REQUEST_STATUS_STALL; } } @@ -403,21 +430,21 @@ static usb_request_status_t usb_standard_request_clear_feature( usb_request_status_t usb_standard_request( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - switch( endpoint->setup.request ) { + const usb_transfer_stage_t stage) +{ + switch (endpoint->setup.request) { case USB_STANDARD_REQUEST_GET_STATUS: return usb_standard_request_get_status(endpoint, stage); case USB_STANDARD_REQUEST_GET_DESCRIPTOR: return usb_standard_request_get_descriptor(endpoint, stage); - + case USB_STANDARD_REQUEST_SET_ADDRESS: return usb_standard_request_set_address(endpoint, stage); - + case USB_STANDARD_REQUEST_SET_CONFIGURATION: return usb_standard_request_set_configuration(endpoint, stage); - + case USB_STANDARD_REQUEST_GET_CONFIGURATION: return usb_standard_request_get_configuration(endpoint, stage); diff --git a/firmware/common/usb_standard_request.h b/firmware/common/usb_standard_request.h index 50b92c0d..f79a06ac 100644 --- a/firmware/common/usb_standard_request.h +++ b/firmware/common/usb_standard_request.h @@ -25,35 +25,26 @@ #include "usb_type.h" #include "usb_request.h" -void usb_set_configuration_changed_cb( - void (*callback)(usb_device_t* const) -); +void usb_set_configuration_changed_cb(void (*callback)(usb_device_t* const)); usb_request_status_t usb_vendor_request_read_wcid( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); usb_request_status_t usb_standard_request( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); -const uint8_t* usb_endpoint_descriptor( - const usb_endpoint_t* const endpoint -); +const uint8_t* usb_endpoint_descriptor(const usb_endpoint_t* const endpoint); uint_fast16_t usb_endpoint_descriptor_max_packet_size( - const uint8_t* const endpoint_descriptor -); + const uint8_t* const endpoint_descriptor); usb_transfer_type_t usb_endpoint_descriptor_transfer_type( - const uint8_t* const endpoint_descriptor -); + const uint8_t* const endpoint_descriptor); bool usb_set_configuration( usb_device_t* const device, - const uint_fast8_t configuration_number -); + const uint_fast8_t configuration_number); -#endif//__USB_STANDARD_REQUEST_H__ +#endif //__USB_STANDARD_REQUEST_H__ diff --git a/firmware/common/usb_type.h b/firmware/common/usb_type.h index 3063b09d..9dcdaa2a 100644 --- a/firmware/common/usb_type.h +++ b/firmware/common/usb_type.h @@ -26,32 +26,38 @@ #include // TODO: Move this to some common compiler-tricks location. -#define ATTR_PACKED __attribute__((packed)) -#define ATTR_ALIGNED(x) __attribute__ ((aligned(x))) -#define ATTR_SECTION(x) __attribute__ ((section(x))) +#define ATTR_PACKED __attribute__((packed)) +#define ATTR_ALIGNED(x) __attribute__((aligned(x))) +#define ATTR_SECTION(x) __attribute__((section(x))) typedef struct ATTR_PACKED { uint8_t request_type; uint8_t request; + union { struct { uint8_t value_l; uint8_t value_h; }; + uint16_t value; }; + union { struct { uint8_t index_l; uint8_t index_h; }; + uint16_t index; }; + union { struct { uint8_t length_l; uint8_t length_h; }; + uint16_t length; }; } usb_setup_t; @@ -77,23 +83,26 @@ typedef enum { typedef enum { USB_SETUP_REQUEST_TYPE_shift = 5, USB_SETUP_REQUEST_TYPE_mask = 3 << USB_SETUP_REQUEST_TYPE_shift, - + USB_SETUP_REQUEST_TYPE_STANDARD = 0 << USB_SETUP_REQUEST_TYPE_shift, USB_SETUP_REQUEST_TYPE_CLASS = 1 << USB_SETUP_REQUEST_TYPE_shift, USB_SETUP_REQUEST_TYPE_VENDOR = 2 << USB_SETUP_REQUEST_TYPE_shift, USB_SETUP_REQUEST_TYPE_RESERVED = 3 << USB_SETUP_REQUEST_TYPE_shift, - + USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift = 7, - USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_mask = 1 << USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift, - USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_HOST_TO_DEVICE = 0 << USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift, - USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_DEVICE_TO_HOST = 1 << USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift, + USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_mask = + 1 << USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift, + USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_HOST_TO_DEVICE = + 0 << USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift, + USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_DEVICE_TO_HOST = + 1 << USB_SETUP_REQUEST_TYPE_DATA_TRANSFER_DIRECTION_shift, } usb_setup_request_type_t; typedef enum { USB_TRANSFER_DIRECTION_OUT = 0, USB_TRANSFER_DIRECTION_IN = 1, } usb_transfer_direction_t; - + typedef enum { USB_DESCRIPTOR_TYPE_DEVICE = 1, USB_DESCRIPTOR_TYPE_CONFIGURATION = 2, @@ -137,9 +146,10 @@ typedef struct { } usb_device_t; typedef struct usb_endpoint_t usb_endpoint_t; + struct usb_endpoint_t { usb_setup_t setup; - uint8_t buffer[8]; // Buffer for use during IN stage. + uint8_t buffer[8]; // Buffer for use during IN stage. const uint_fast8_t address; usb_device_t* const device; usb_endpoint_t* const in; @@ -148,4 +158,4 @@ struct usb_endpoint_t { void (*transfer_complete)(usb_endpoint_t* const endpoint); }; -#endif//__USB_TYPE_H__ +#endif //__USB_TYPE_H__ diff --git a/firmware/common/w25q80bv.c b/firmware/common/w25q80bv.c index 3fda43c8..914c8cbb 100644 --- a/firmware/common/w25q80bv.c +++ b/firmware/common/w25q80bv.c @@ -45,10 +45,10 @@ #define W25Q80BV_DEVICE_ID 0xAB #define W25Q80BV_UNIQUE_ID 0x4B -#define W25Q80BV_STATUS_BUSY 0x01 -#define W25Q80BV_STATUS_WEL 0x02 +#define W25Q80BV_STATUS_BUSY 0x01 +#define W25Q80BV_STATUS_WEL 0x02 -#define W25Q80BV_DEVICE_ID_RES 0x13 /* Expected device_id for W25Q80BV */ +#define W25Q80BV_DEVICE_ID_RES 0x13 /* Expected device_id for W25Q80BV */ /* * Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI. @@ -66,24 +66,21 @@ void w25q80bv_setup(w25q80bv_driver_t* const drv) do { device_id = w25q80bv_get_device_id(drv); - } while(device_id != W25Q80BV_DEVICE_ID_RES && - device_id != W25Q16DV_DEVICE_ID_RES); + } while (device_id != W25Q80BV_DEVICE_ID_RES && + device_id != W25Q16DV_DEVICE_ID_RES); } uint8_t w25q80bv_get_status(w25q80bv_driver_t* const drv) { - uint8_t data[] = { W25Q80BV_READ_STATUS1, 0xFF }; + uint8_t data[] = {W25Q80BV_READ_STATUS1, 0xFF}; spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data)); return data[1]; } -/* Release power down / Device ID */ +/* Release power down / Device ID */ uint8_t w25q80bv_get_device_id(w25q80bv_driver_t* const drv) { - uint8_t data[] = { - W25Q80BV_DEVICE_ID, - 0xFF, 0xFF, 0xFF, 0xFF - }; + uint8_t data[] = {W25Q80BV_DEVICE_ID, 0xFF, 0xFF, 0xFF, 0xFF}; spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data)); return data[4]; } @@ -92,13 +89,22 @@ void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t* { uint8_t data[] = { W25Q80BV_UNIQUE_ID, - 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF - }; + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF}; spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data)); - for(size_t i=0; i<8; i++) { - unique_id->id_8b[i] = data[5+i]; + for (size_t i = 0; i < 8; i++) { + unique_id->id_8b[i] = data[5 + i]; } } @@ -111,7 +117,7 @@ void w25q80bv_write_enable(w25q80bv_driver_t* const drv) { w25q80bv_wait_while_busy(drv); - uint8_t data[] = { W25Q80BV_WRITE_ENABLE }; + uint8_t data[] = {W25Q80BV_WRITE_ENABLE}; spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data)); while (!(w25q80bv_get_status(drv) & W25Q80BV_STATUS_WEL)) {} } @@ -122,18 +128,22 @@ void w25q80bv_chip_erase(w25q80bv_driver_t* const drv) do { device_id = w25q80bv_get_device_id(drv); - } while(device_id != W25Q80BV_DEVICE_ID_RES && - device_id != W25Q16DV_DEVICE_ID_RES); + } while (device_id != W25Q80BV_DEVICE_ID_RES && + device_id != W25Q16DV_DEVICE_ID_RES); w25q80bv_wait_while_busy(drv); w25q80bv_write_enable(drv); - uint8_t data[] = { W25Q80BV_CHIP_ERASE }; + uint8_t data[] = {W25Q80BV_CHIP_ERASE}; spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data)); } /* write up a 256 byte page or partial page */ -static void w25q80bv_page_program(w25q80bv_driver_t* const drv, const uint32_t addr, const uint16_t len, uint8_t* data) +static void w25q80bv_page_program( + w25q80bv_driver_t* const drv, + const uint32_t addr, + const uint16_t len, + uint8_t* data) { /* do nothing if asked to write beyond a page boundary */ if (((addr & 0xFF) + len) > drv->page_len) @@ -150,31 +160,31 @@ static void w25q80bv_page_program(w25q80bv_driver_t* const drv, const uint32_t a W25Q80BV_PAGE_PROGRAM, (addr & 0xFF0000) >> 16, (addr & 0xFF00) >> 8, - addr & 0xFF - }; + addr & 0xFF}; - const spi_transfer_t transfers[] = { - { header, ARRAY_SIZE(header) }, - { data, len } - }; + const spi_transfer_t transfers[] = {{header, ARRAY_SIZE(header)}, {data, len}}; spi_bus_transfer_gather(drv->bus, transfers, ARRAY_SIZE(transfers)); } /* write an arbitrary number of bytes */ -void w25q80bv_program(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len, uint8_t* data) +void w25q80bv_program( + w25q80bv_driver_t* const drv, + uint32_t addr, + uint32_t len, + uint8_t* data) { uint16_t first_block_len; uint8_t device_id; do { device_id = w25q80bv_get_device_id(drv); - } while(device_id != W25Q80BV_DEVICE_ID_RES && - device_id != W25Q16DV_DEVICE_ID_RES); - + } while (device_id != W25Q80BV_DEVICE_ID_RES && + device_id != W25Q16DV_DEVICE_ID_RES); + /* do nothing if we would overflow the flash */ - if ((len > drv->num_bytes) || (addr > drv->num_bytes) - || ((addr + len) > drv->num_bytes)) + if ((len > drv->num_bytes) || (addr > drv->num_bytes) || + ((addr + len) > drv->num_bytes)) return; /* handle start not at page boundary */ @@ -203,11 +213,15 @@ void w25q80bv_program(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len, } /* write an arbitrary number of bytes */ -void w25q80bv_read(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len, uint8_t* const data) +void w25q80bv_read( + w25q80bv_driver_t* const drv, + uint32_t addr, + uint32_t len, + uint8_t* const data) { /* do nothing if we would overflow the flash */ - if ((len > drv->num_bytes) || (addr > drv->num_bytes) - || ((addr + len) > drv->num_bytes)) + if ((len > drv->num_bytes) || (addr > drv->num_bytes) || + ((addr + len) > drv->num_bytes)) return; w25q80bv_wait_while_busy(drv); @@ -217,13 +231,9 @@ void w25q80bv_read(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len, ui (addr & 0xFF0000) >> 16, (addr & 0xFF00) >> 8, addr & 0xFF, - 0x00 - }; + 0x00}; - const spi_transfer_t transfers[] = { - { header, ARRAY_SIZE(header) }, - { data, len } - }; + const spi_transfer_t transfers[] = {{header, ARRAY_SIZE(header)}, {data, len}}; spi_bus_transfer_gather(drv->bus, transfers, ARRAY_SIZE(transfers)); } @@ -232,16 +242,16 @@ void w25q80bv_clear_status(w25q80bv_driver_t* const drv) { w25q80bv_wait_while_busy(drv); w25q80bv_write_enable(drv); - uint8_t data[] = { W25Q80BV_WRITE_STATUS, 0x00, 0x00 }; + uint8_t data[] = {W25Q80BV_WRITE_STATUS, 0x00, 0x00}; spi_bus_transfer(drv->bus, data, ARRAY_SIZE(data)); } void w25q80bv_get_full_status(w25q80bv_driver_t* const drv, uint8_t* data) { - uint8_t cmd[] = { W25Q80BV_READ_STATUS1, 0xFF }; + uint8_t cmd[] = {W25Q80BV_READ_STATUS1, 0xFF}; spi_bus_transfer(drv->bus, cmd, ARRAY_SIZE(cmd)); data[0] = cmd[1]; - cmd[0] =W25Q80BV_READ_STATUS2; + cmd[0] = W25Q80BV_READ_STATUS2; cmd[1] = 0xFF; spi_bus_transfer(drv->bus, cmd, ARRAY_SIZE(cmd)); data[1] = cmd[1]; diff --git a/firmware/common/w25q80bv.h b/firmware/common/w25q80bv.h index d98dd302..b3570685 100644 --- a/firmware/common/w25q80bv.h +++ b/firmware/common/w25q80bv.h @@ -27,16 +27,15 @@ #include #include -#define W25Q80BV_DEVICE_ID_RES 0x13 /* Expected device_id for W25Q80BV */ -#define W25Q16DV_DEVICE_ID_RES 0x14 /* Expected device_id for W25Q16DV */ +#define W25Q80BV_DEVICE_ID_RES 0x13 /* Expected device_id for W25Q80BV */ +#define W25Q16DV_DEVICE_ID_RES 0x14 /* Expected device_id for W25Q16DV */ #include "spi_bus.h" #include "gpio.h" -typedef union -{ +typedef union { uint64_t id_64b; uint32_t id_32b[2]; /* 2*32bits 64bits Unique ID */ - uint8_t id_8b[8]; /* 8*8bits 64bits Unique ID */ + uint8_t id_8b[8]; /* 8*8bits 64bits Unique ID */ } w25q80bv_unique_id_t; struct w25q80bv_driver_t; @@ -55,10 +54,18 @@ struct w25q80bv_driver_t { void w25q80bv_setup(w25q80bv_driver_t* const drv); void w25q80bv_get_full_status(w25q80bv_driver_t* const drv, uint8_t* data); void w25q80bv_chip_erase(w25q80bv_driver_t* const drv); -void w25q80bv_program(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len, uint8_t* data); +void w25q80bv_program( + w25q80bv_driver_t* const drv, + uint32_t addr, + uint32_t len, + uint8_t* data); uint8_t w25q80bv_get_device_id(w25q80bv_driver_t* const drv); void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t* unique_id); -void w25q80bv_read(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len, uint8_t* const data); +void w25q80bv_read( + w25q80bv_driver_t* const drv, + uint32_t addr, + uint32_t len, + uint8_t* const data); void w25q80bv_clear_status(w25q80bv_driver_t* const drv); -#endif//__W25Q80BV_H__ +#endif //__W25Q80BV_H__ diff --git a/firmware/common/w25q80bv_target.c b/firmware/common/w25q80bv_target.c index 3dd3a284..c9aef3fa 100644 --- a/firmware/common/w25q80bv_target.c +++ b/firmware/common/w25q80bv_target.c @@ -28,8 +28,9 @@ * automatically? */ -void w25q80bv_target_init(w25q80bv_driver_t* const drv) { - (void)drv; +void w25q80bv_target_init(w25q80bv_driver_t* const drv) +{ + (void) drv; /* Init SPIFI GPIO to Normal GPIO */ @@ -45,11 +46,11 @@ void w25q80bv_target_init(w25q80bv_driver_t* const drv) { scu_pinmux(P3_7, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); // P3_8 SPIFI SPIFI_CS => GPIO5[11] scu_pinmux(P3_8, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)); - + /* configure SSP pins */ scu_pinmux(SCU_SSP0_CIPO, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); scu_pinmux(SCU_SSP0_COPI, (SCU_SSP_IO | SCU_CONF_FUNCTION5)); - scu_pinmux(SCU_SSP0_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); + scu_pinmux(SCU_SSP0_SCK, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); /* configure GPIO pins */ scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST); diff --git a/firmware/common/w25q80bv_target.h b/firmware/common/w25q80bv_target.h index e36f94ae..c2889268 100644 --- a/firmware/common/w25q80bv_target.h +++ b/firmware/common/w25q80bv_target.h @@ -26,4 +26,4 @@ void w25q80bv_target_init(w25q80bv_driver_t* const drv); -#endif/*__W25Q80BV_TARGET_H__*/ +#endif /*__W25Q80BV_TARGET_H__*/ diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c index 5da07363..afb779c4 100644 --- a/firmware/hackrf_usb/hackrf_usb.c +++ b/firmware/hackrf_usb/hackrf_usb.c @@ -52,7 +52,7 @@ #include "usb_api_m0_state.h" #include "cpld_xc2c.h" #include "portapack.h" - + #include "hackrf_ui.h" extern uint32_t __m0_start__; @@ -95,7 +95,7 @@ static usb_request_handler_fn vendor_request_handler[] = { NULL, #endif usb_vendor_request_set_freq_explicit, - usb_vendor_request_read_wcid, // USB_WCID_VENDOR_REQ + usb_vendor_request_read_wcid, // USB_WCID_VENDOR_REQ usb_vendor_request_init_sweep, usb_vendor_request_operacake_get_boards, usb_vendor_request_operacake_set_ports, @@ -125,17 +125,18 @@ static const uint32_t vendor_request_handler_count = usb_request_status_t usb_vendor_request( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { + const usb_transfer_stage_t stage) +{ usb_request_status_t status = USB_REQUEST_STATUS_STALL; - - if( endpoint->setup.request < vendor_request_handler_count ) { - usb_request_handler_fn handler = vendor_request_handler[endpoint->setup.request]; - if( handler ) { + + if (endpoint->setup.request < vendor_request_handler_count) { + usb_request_handler_fn handler = + vendor_request_handler[endpoint->setup.request]; + if (handler) { status = handler(endpoint, stage); } } - + return status; } @@ -146,12 +147,11 @@ const usb_request_handlers_t usb_request_handlers = { .reserved = 0, }; -void usb_configuration_changed( - usb_device_t* const device -) { +void usb_configuration_changed(usb_device_t* const device) +{ /* Reset transceiver to idle state until other commands are received */ request_transceiver_mode(TRANSCEIVER_MODE_OFF); - if( device->configuration->number == 1 ) { + if (device->configuration->number == 1) { // transceiver configuration led_on(LED1); } else { @@ -165,19 +165,24 @@ void usb_configuration_changed( void usb_set_descriptor_by_serial_number(void) { iap_cmd_res_t iap_cmd_res; - + /* Read IAP Serial Number Identification */ iap_cmd_res.cmd_param.command_code = IAP_CMD_READ_SERIAL_NO; iap_cmd_call(&iap_cmd_res); - + if (iap_cmd_res.status_res.status_ret == CMD_SUCCESS) { - usb_descriptor_string_serial_number[0] = USB_DESCRIPTOR_STRING_SERIAL_BUF_LEN; + usb_descriptor_string_serial_number[0] = + USB_DESCRIPTOR_STRING_SERIAL_BUF_LEN; usb_descriptor_string_serial_number[1] = USB_DESCRIPTOR_TYPE_STRING; - + /* 32 characters of serial number, convert to UTF-16LE */ - for (size_t i=0; i> 3] >> (28 - (i & 7) * 4)) & 0xf; - const char c = (nibble > 9) ? ('a' + nibble - 10) : ('0' + nibble); + for (size_t i = 0; i < USB_DESCRIPTOR_STRING_SERIAL_LEN; i++) { + const uint_fast8_t nibble = + (iap_cmd_res.status_res.iap_result[i >> 3] >> + (28 - (i & 7) * 4)) & + 0xf; + const char c = + (nibble > 9) ? ('a' + nibble - 10) : ('0' + nibble); usb_descriptor_string_serial_number[2 + i * 2] = c; usb_descriptor_string_serial_number[3 + i * 2] = 0x00; } @@ -187,28 +192,34 @@ void usb_set_descriptor_by_serial_number(void) } } -static bool cpld_jtag_sram_load(jtag_t* const jtag) { +static bool cpld_jtag_sram_load(jtag_t* const jtag) +{ cpld_jtag_take(jtag); cpld_xc2c64a_jtag_sram_write(jtag, &cpld_hackrf_program_sram); - const bool success = cpld_xc2c64a_jtag_sram_verify(jtag, &cpld_hackrf_program_sram, &cpld_hackrf_verify); + const bool success = cpld_xc2c64a_jtag_sram_verify( + jtag, + &cpld_hackrf_program_sram, + &cpld_hackrf_verify); cpld_jtag_release(jtag); return success; } -static void m0_rom_to_ram() { - uint32_t *dest = &__ram_m0_start__; +static void m0_rom_to_ram() +{ + uint32_t* dest = &__ram_m0_start__; // Calculate the base address of ROM - uint32_t base = (uint32_t)(&_etext_rom - (&_etext_ram - &_text_ram)); + uint32_t base = (uint32_t) (&_etext_rom - (&_etext_ram - &_text_ram)); // M0 image location, relative to the start of ROM - uint32_t src = (uint32_t)&__m0_start__; + uint32_t src = (uint32_t) &__m0_start__; - uint32_t len = (uint32_t)&__m0_end__ - (uint32_t)src; - memcpy(dest, (uint32_t*)(base + src), len); + uint32_t len = (uint32_t) &__m0_end__ - (uint32_t) src; + memcpy(dest, (uint32_t*) (base + src), len); } -int main(void) { +int main(void) +{ // Copy M0 image from ROM before SPIFI is disabled m0_rom_to_ram(); @@ -223,9 +234,9 @@ int main(void) { cpu_clock_init(); /* Wake the M0 */ - ipc_start_m0((uint32_t)&__ram_m0_start__); + ipc_start_m0((uint32_t) &__ram_m0_start__); - if( !cpld_jtag_sram_load(&jtag_cpld) ) { + if (!cpld_jtag_sram_load(&jtag_cpld)) { halt_and_flash(6000000); } @@ -239,9 +250,9 @@ int main(void) { usb_set_configuration_changed_cb(usb_configuration_changed); usb_peripheral_reset(); - + usb_device_init(0, &usb_device); - + usb_queue_init(&usb_endpoint_control_out_queue); usb_queue_init(&usb_endpoint_control_in_queue); usb_queue_init(&usb_endpoint_bulk_out_queue); @@ -249,24 +260,24 @@ int main(void) { usb_endpoint_init(&usb_endpoint_control_out); usb_endpoint_init(&usb_endpoint_control_in); - + nvic_set_priority(NVIC_USB0_IRQ, 255); hackrf_ui()->init(); usb_run(&usb_device); - + rf_path_init(&rf_path); bool operacake_allow_gpio; - if( hackrf_ui()->operacake_gpio_compatible() ) { + if (hackrf_ui()->operacake_gpio_compatible()) { operacake_allow_gpio = true; } else { operacake_allow_gpio = false; } operacake_init(operacake_allow_gpio); - while(true) { + while (true) { transceiver_request_t request; // Briefly disable USB interrupt so that we can diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c index f3d8ab2b..7383493c 100644 --- a/firmware/hackrf_usb/usb_api_board_info.c +++ b/firmware/hackrf_usb/usb_api_board_info.c @@ -33,68 +33,86 @@ char version_string[] = VERSION_STRING; usb_request_status_t usb_vendor_request_read_board_id( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { endpoint->buffer[0] = BOARD_ID; - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 1, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); } return USB_REQUEST_STATUS_OK; } usb_request_status_t usb_vendor_request_read_version_string( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint8_t length; if (stage == USB_TRANSFER_STAGE_SETUP) { - length = (uint8_t)strlen(version_string); - usb_transfer_schedule_block(endpoint->in, version_string, length, NULL, NULL); + length = (uint8_t) strlen(version_string); + usb_transfer_schedule_block( + endpoint->in, + version_string, + length, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); } return USB_REQUEST_STATUS_OK; } static read_partid_serialno_t read_partid_serialno; + usb_request_status_t usb_vendor_request_read_partid_serialno( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint8_t length; iap_cmd_res_t iap_cmd_res; - if (stage == USB_TRANSFER_STAGE_SETUP) - { + if (stage == USB_TRANSFER_STAGE_SETUP) { /* Read IAP Part Number Identification */ iap_cmd_res.cmd_param.command_code = IAP_CMD_READ_PART_ID_NO; iap_cmd_call(&iap_cmd_res); - if(iap_cmd_res.status_res.status_ret != CMD_SUCCESS) + if (iap_cmd_res.status_res.status_ret != CMD_SUCCESS) return USB_REQUEST_STATUS_STALL; read_partid_serialno.part_id[0] = iap_cmd_res.status_res.iap_result[0]; read_partid_serialno.part_id[1] = iap_cmd_res.status_res.iap_result[1]; - + /* Read IAP Serial Number Identification */ iap_cmd_res.cmd_param.command_code = IAP_CMD_READ_SERIAL_NO; iap_cmd_call(&iap_cmd_res); - if(iap_cmd_res.status_res.status_ret != CMD_SUCCESS) + if (iap_cmd_res.status_res.status_ret != CMD_SUCCESS) return USB_REQUEST_STATUS_STALL; read_partid_serialno.serial_no[0] = iap_cmd_res.status_res.iap_result[0]; read_partid_serialno.serial_no[1] = iap_cmd_res.status_res.iap_result[1]; read_partid_serialno.serial_no[2] = iap_cmd_res.status_res.iap_result[2]; read_partid_serialno.serial_no[3] = iap_cmd_res.status_res.iap_result[3]; - - length = (uint8_t)sizeof(read_partid_serialno_t); - usb_transfer_schedule_block(endpoint->in, &read_partid_serialno, length, - NULL, NULL); + + length = (uint8_t) sizeof(read_partid_serialno_t); + usb_transfer_schedule_block( + endpoint->in, + &read_partid_serialno, + length, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); } return USB_REQUEST_STATUS_OK; } usb_request_status_t usb_vendor_request_reset( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { wwdt_reset(100000); diff --git a/firmware/hackrf_usb/usb_api_board_info.h b/firmware/hackrf_usb/usb_api_board_info.h index 39824b8d..03dd62a6 100644 --- a/firmware/hackrf_usb/usb_api_board_info.h +++ b/firmware/hackrf_usb/usb_api_board_info.h @@ -34,12 +34,16 @@ typedef struct { } read_partid_serialno_t; usb_request_status_t usb_vendor_request_read_board_id( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_read_version_string( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_read_partid_serialno( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_reset( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); #endif /* end of include guard: __USB_API_BOARD_INFO_H__ */ diff --git a/firmware/hackrf_usb/usb_api_cpld.c b/firmware/hackrf_usb/usb_api_cpld.c index fa709ded..611fe9c9 100644 --- a/firmware/hackrf_usb/usb_api_cpld.c +++ b/firmware/hackrf_usb/usb_api_cpld.c @@ -39,8 +39,8 @@ volatile bool cpld_wait = false; static void cpld_buffer_refilled(void* user_data, unsigned int length) { - (void)user_data; - (void)length; + (void) user_data; + (void) length; cpld_wait = false; } @@ -52,8 +52,7 @@ static void refill_cpld_buffer(void) cpld_xsvf_buffer, sizeof(cpld_xsvf_buffer), cpld_buffer_refilled, - NULL - ); + NULL); // Wait until transfer finishes while (cpld_wait) {} @@ -68,14 +67,14 @@ void cpld_update(void) refill_cpld_buffer(); - error = cpld_jtag_program(&jtag_cpld, sizeof(cpld_xsvf_buffer), - cpld_xsvf_buffer, - refill_cpld_buffer); - if(error == 0) - { + error = cpld_jtag_program( + &jtag_cpld, + sizeof(cpld_xsvf_buffer), + cpld_xsvf_buffer, + refill_cpld_buffer); + if (error == 0) { halt_and_flash(6000000); - }else - { + } else { /* LED3 (Red) steady on error */ led_on(LED3); while (1) {} @@ -83,25 +82,32 @@ void cpld_update(void) } usb_request_status_t usb_vendor_request_cpld_checksum( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { static uint32_t cpld_crc; uint8_t length; - if (stage == USB_TRANSFER_STAGE_SETUP) - { + if (stage == USB_TRANSFER_STAGE_SETUP) { cpld_jtag_take(&jtag_cpld); - const bool checksum_success = cpld_xc2c64a_jtag_checksum(&jtag_cpld, &cpld_hackrf_verify, &cpld_crc); + const bool checksum_success = cpld_xc2c64a_jtag_checksum( + &jtag_cpld, + &cpld_hackrf_verify, + &cpld_crc); cpld_jtag_release(&jtag_cpld); - if(!checksum_success) { + if (!checksum_success) { return USB_REQUEST_STATUS_STALL; } - - length = (uint8_t)sizeof(cpld_crc); + + length = (uint8_t) sizeof(cpld_crc); memcpy(endpoint->buffer, &cpld_crc, length); - usb_transfer_schedule_block(endpoint->in, endpoint->buffer, length, - NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + endpoint->buffer, + length, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); } return USB_REQUEST_STATUS_OK; diff --git a/firmware/hackrf_usb/usb_api_cpld.h b/firmware/hackrf_usb/usb_api_cpld.h index 5b82eca5..7532a38e 100644 --- a/firmware/hackrf_usb/usb_api_cpld.h +++ b/firmware/hackrf_usb/usb_api_cpld.h @@ -31,6 +31,7 @@ void cpld_update(void); usb_request_status_t usb_vendor_request_cpld_checksum( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); #endif /* end of include guard: __USB_API_CPLD_H__ */ diff --git a/firmware/hackrf_usb/usb_api_m0_state.c b/firmware/hackrf_usb/usb_api_m0_state.c index aadefb10..62aa6464 100644 --- a/firmware/hackrf_usb/usb_api_m0_state.c +++ b/firmware/hackrf_usb/usb_api_m0_state.c @@ -43,15 +43,15 @@ void m0_set_mode(enum m0_mode mode) usb_request_status_t usb_vendor_request_get_m0_state( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) - { + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { usb_transfer_schedule_block( endpoint->in, (void*) &m0_state, sizeof(m0_state), - NULL, NULL); + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); return USB_REQUEST_STATUS_OK; } else { diff --git a/firmware/hackrf_usb/usb_api_m0_state.h b/firmware/hackrf_usb/usb_api_m0_state.h index db752829..68a51d72 100644 --- a/firmware/hackrf_usb/usb_api_m0_state.h +++ b/firmware/hackrf_usb/usb_api_m0_state.h @@ -63,6 +63,7 @@ extern volatile struct m0_state m0_state; void m0_set_mode(enum m0_mode mode); usb_request_status_t usb_vendor_request_get_m0_state( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); -#endif/*__M0_STATE_H__*/ +#endif /*__M0_STATE_H__*/ diff --git a/firmware/hackrf_usb/usb_api_operacake.c b/firmware/hackrf_usb/usb_api_operacake.c index 6001a361..08701ae9 100644 --- a/firmware/hackrf_usb/usb_api_operacake.c +++ b/firmware/hackrf_usb/usb_api_operacake.c @@ -28,7 +28,8 @@ #include usb_request_status_t usb_vendor_request_operacake_get_boards( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { operacake_get_boards(endpoint->buffer); @@ -39,7 +40,8 @@ usb_request_status_t usb_vendor_request_operacake_get_boards( } usb_request_status_t usb_vendor_request_operacake_set_ports( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint8_t address, port_a, port_b; address = endpoint->setup.value & 0xFF; @@ -53,26 +55,31 @@ usb_request_status_t usb_vendor_request_operacake_set_ports( } static unsigned char data[MAX_OPERACAKE_RANGES * 5]; + usb_request_status_t usb_vendor_request_operacake_set_ranges( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint16_t i, freq_min, freq_max, num_ranges = 0; uint8_t port; - + if (stage == USB_TRANSFER_STAGE_SETUP) { - num_ranges = endpoint->setup.length / 5; - if((num_ranges == 0) || (num_ranges > MAX_OPERACAKE_RANGES)) { + num_ranges = endpoint->setup.length / 5; + if ((num_ranges == 0) || (num_ranges > MAX_OPERACAKE_RANGES)) { return USB_REQUEST_STATUS_STALL; } operacake_clear_ranges(); - usb_transfer_schedule_block(endpoint->out, &data, - endpoint->setup.length, NULL, NULL); + usb_transfer_schedule_block( + endpoint->out, + &data, + endpoint->setup.length, + NULL, + NULL); } else if (stage == USB_TRANSFER_STAGE_DATA) { - - for(i=0; isetup.length; i+=5) { - freq_min = data[i] << 8 | data[i+1]; - freq_max = data[i+2] << 8 | data[i+3]; - port = data[i+4]; + for (i = 0; i < endpoint->setup.length; i += 5) { + freq_min = data[i] << 8 | data[i + 1]; + freq_max = data[i + 2] << 8 | data[i + 3]; + port = data[i + 4]; operacake_add_range(freq_min, freq_max, port); } usb_transfer_schedule_ack(endpoint->in); @@ -81,7 +88,8 @@ usb_request_status_t usb_vendor_request_operacake_set_ranges( } usb_request_status_t usb_vendor_request_operacake_gpio_test( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint16_t test_result; uint8_t address = endpoint->setup.value & 0xFF; @@ -89,14 +97,20 @@ usb_request_status_t usb_vendor_request_operacake_gpio_test( test_result = gpio_test(address); endpoint->buffer[0] = test_result & 0xff; endpoint->buffer[1] = test_result >> 8; - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 2, NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 2, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); } return USB_REQUEST_STATUS_OK; } usb_request_status_t usb_vendor_request_operacake_set_mode( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint8_t address, mode; address = endpoint->setup.value & 0xFF; @@ -109,7 +123,8 @@ usb_request_status_t usb_vendor_request_operacake_set_mode( } usb_request_status_t usb_vendor_request_operacake_get_mode( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint8_t address; address = endpoint->setup.value & 0xFF; @@ -122,8 +137,10 @@ usb_request_status_t usb_vendor_request_operacake_get_mode( } static struct operacake_dwell_times dwell_times[SCT_EVENT_COUNT]; + usb_request_status_t usb_vendor_request_operacake_set_dwell_times( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint16_t count; uint32_t dwell; @@ -131,17 +148,22 @@ usb_request_status_t usb_vendor_request_operacake_set_dwell_times( if (stage == USB_TRANSFER_STAGE_SETUP) { count = endpoint->setup.length / 5; - if((count == 0) || (count > SCT_EVENT_COUNT)) { + if ((count == 0) || (count > SCT_EVENT_COUNT)) { return USB_REQUEST_STATUS_STALL; } - usb_transfer_schedule_block(endpoint->out, &data, - endpoint->setup.length, NULL, NULL); + usb_transfer_schedule_block( + endpoint->out, + &data, + endpoint->setup.length, + NULL, + NULL); } else if (stage == USB_TRANSFER_STAGE_DATA) { count = endpoint->setup.length / 5; - for(int i = 0; i < count; i++) { - dwell = data[(i*5)+0] | (data[(i*5)+1] << 8) | (data[(i*5)+2] << 16) | (data[(i*5)+3] << 24); - port = data[(i*5)+4]; + for (int i = 0; i < count; i++) { + dwell = data[(i * 5) + 0] | (data[(i * 5) + 1] << 8) | + (data[(i * 5) + 2] << 16) | (data[(i * 5) + 3] << 24); + port = data[(i * 5) + 4]; dwell_times[i].dwell = dwell; dwell_times[i].port = port; } diff --git a/firmware/hackrf_usb/usb_api_operacake.h b/firmware/hackrf_usb/usb_api_operacake.h index c39cebee..f9524433 100644 --- a/firmware/hackrf_usb/usb_api_operacake.h +++ b/firmware/hackrf_usb/usb_api_operacake.h @@ -25,25 +25,32 @@ #include #include -usb_request_status_t usb_vendor_request_operacake_get_boards( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); +usb_request_status_t usb_vendor_request_operacake_get_boards( + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_operacake_set_ports( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_operacake_set_ranges( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_operacake_gpio_test( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_operacake_set_mode( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_operacake_get_mode( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_operacake_set_dwell_times( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); #endif /* end of include guard: __USB_API_OPERACAKE_H__ */ diff --git a/firmware/hackrf_usb/usb_api_register.c b/firmware/hackrf_usb/usb_api_register.c index eaeadece..09aed5d4 100644 --- a/firmware/hackrf_usb/usb_api_register.c +++ b/firmware/hackrf_usb/usb_api_register.c @@ -34,12 +34,15 @@ usb_request_status_t usb_vendor_request_write_max2837( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - if( endpoint->setup.index < MAX2837_NUM_REGS ) { - if( endpoint->setup.value < MAX2837_DATA_REGS_MAX_VALUE ) { - max2837_reg_write(&max2837, endpoint->setup.index, endpoint->setup.value); + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { + if (endpoint->setup.index < MAX2837_NUM_REGS) { + if (endpoint->setup.value < MAX2837_DATA_REGS_MAX_VALUE) { + max2837_reg_write( + &max2837, + endpoint->setup.index, + endpoint->setup.value); usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } @@ -52,15 +55,20 @@ usb_request_status_t usb_vendor_request_write_max2837( usb_request_status_t usb_vendor_request_read_max2837( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - if( endpoint->setup.index < MAX2837_NUM_REGS ) { - const uint16_t value = max2837_reg_read(&max2837, endpoint->setup.index); + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { + if (endpoint->setup.index < MAX2837_NUM_REGS) { + const uint16_t value = + max2837_reg_read(&max2837, endpoint->setup.index); endpoint->buffer[0] = value & 0xff; endpoint->buffer[1] = value >> 8; - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 2, - NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 2, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); return USB_REQUEST_STATUS_OK; } @@ -72,12 +80,15 @@ usb_request_status_t usb_vendor_request_read_max2837( usb_request_status_t usb_vendor_request_write_si5351c( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - if( endpoint->setup.index < 256 ) { - if( endpoint->setup.value < 256 ) { - si5351c_write_single(&clock_gen, endpoint->setup.index, endpoint->setup.value); + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { + if (endpoint->setup.index < 256) { + if (endpoint->setup.value < 256) { + si5351c_write_single( + &clock_gen, + endpoint->setup.index, + endpoint->setup.value); usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } @@ -90,14 +101,19 @@ usb_request_status_t usb_vendor_request_write_si5351c( usb_request_status_t usb_vendor_request_read_si5351c( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - if( endpoint->setup.index < 256 ) { - const uint8_t value = si5351c_read_single(&clock_gen, endpoint->setup.index); + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { + if (endpoint->setup.index < 256) { + const uint8_t value = + si5351c_read_single(&clock_gen, endpoint->setup.index); endpoint->buffer[0] = value; - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, - NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 1, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); return USB_REQUEST_STATUS_OK; } @@ -110,13 +126,14 @@ usb_request_status_t usb_vendor_request_read_si5351c( #ifndef RAD1O usb_request_status_t usb_vendor_request_write_rffc5071( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) - { - if( endpoint->setup.index < RFFC5071_NUM_REGS ) - { - rffc5071_reg_write(&mixer, endpoint->setup.index, endpoint->setup.value); + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { + if (endpoint->setup.index < RFFC5071_NUM_REGS) { + rffc5071_reg_write( + &mixer, + endpoint->setup.index, + endpoint->setup.value); usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } @@ -128,18 +145,20 @@ usb_request_status_t usb_vendor_request_write_rffc5071( usb_request_status_t usb_vendor_request_read_rffc5071( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { + const usb_transfer_stage_t stage) +{ uint16_t value; - if( stage == USB_TRANSFER_STAGE_SETUP ) - { - if( endpoint->setup.index < RFFC5071_NUM_REGS ) - { + if (stage == USB_TRANSFER_STAGE_SETUP) { + if (endpoint->setup.index < RFFC5071_NUM_REGS) { value = rffc5071_reg_read(&mixer, endpoint->setup.index); endpoint->buffer[0] = value & 0xff; endpoint->buffer[1] = value >> 8; - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 2, - NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 2, + NULL, + NULL); usb_transfer_schedule_ack(endpoint->out); return USB_REQUEST_STATUS_OK; } @@ -152,8 +171,8 @@ usb_request_status_t usb_vendor_request_read_rffc5071( usb_request_status_t usb_vendor_request_set_clkout_enable( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { + const usb_transfer_stage_t stage) +{ if (stage == USB_TRANSFER_STAGE_SETUP) { si5351c_clkout_enable(&clock_gen, endpoint->setup.value); usb_transfer_schedule_ack(endpoint->in); diff --git a/firmware/hackrf_usb/usb_api_register.h b/firmware/hackrf_usb/usb_api_register.h index 9fef6eed..25f51aca 100644 --- a/firmware/hackrf_usb/usb_api_register.h +++ b/firmware/hackrf_usb/usb_api_register.h @@ -28,31 +28,24 @@ usb_request_status_t usb_vendor_request_write_max2837( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_read_max2837( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_write_si5351c( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_read_si5351c( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_write_rffc5071( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_read_rffc5071( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_clkout_enable( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); #endif /* end of include guard: __USB_API_REGISTER_H__ */ diff --git a/firmware/hackrf_usb/usb_api_spiflash.c b/firmware/hackrf_usb/usb_api_spiflash.c index 769fa0bc..80773660 100644 --- a/firmware/hackrf_usb/usb_api_spiflash.c +++ b/firmware/hackrf_usb/usb_api_spiflash.c @@ -34,7 +34,8 @@ uint8_t spiflash_buffer[256U]; usb_request_status_t usb_vendor_request_erase_spiflash( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv); @@ -47,7 +48,8 @@ usb_request_status_t usb_vendor_request_erase_spiflash( } usb_request_status_t usb_vendor_request_write_spiflash( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint32_t addr = 0; uint16_t len = 0; @@ -55,12 +57,16 @@ usb_request_status_t usb_vendor_request_write_spiflash( if (stage == USB_TRANSFER_STAGE_SETUP) { addr = (endpoint->setup.value << 16) | endpoint->setup.index; len = endpoint->setup.length; - if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) - || ((addr + len) > spi_flash.num_bytes)) { + if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) || + ((addr + len) > spi_flash.num_bytes)) { return USB_REQUEST_STATUS_STALL; } else { - usb_transfer_schedule_block(endpoint->out, &spiflash_buffer[0], len, - NULL, NULL); + usb_transfer_schedule_block( + endpoint->out, + &spiflash_buffer[0], + len, + NULL, + NULL); spi_bus_start(spi_flash.bus, &ssp_config_w25q80bv); w25q80bv_setup(&spi_flash); return USB_REQUEST_STATUS_OK; @@ -69,8 +75,8 @@ usb_request_status_t usb_vendor_request_write_spiflash( addr = (endpoint->setup.value << 16) | endpoint->setup.index; len = endpoint->setup.length; /* This check is redundant but makes me feel better. */ - if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) - || ((addr + len) > spi_flash.num_bytes)) { + if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) || + ((addr + len) > spi_flash.num_bytes)) { return USB_REQUEST_STATUS_STALL; } else { w25q80bv_program(&spi_flash, addr, len, &spiflash_buffer[0]); @@ -83,50 +89,56 @@ usb_request_status_t usb_vendor_request_write_spiflash( } usb_request_status_t usb_vendor_request_read_spiflash( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint32_t addr; uint16_t len; - if (stage == USB_TRANSFER_STAGE_SETUP) - { + if (stage == USB_TRANSFER_STAGE_SETUP) { addr = (endpoint->setup.value << 16) | endpoint->setup.index; len = endpoint->setup.length; - if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) - || ((addr + len) > spi_flash.num_bytes)) { + if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) || + ((addr + len) > spi_flash.num_bytes)) { return USB_REQUEST_STATUS_STALL; } else { w25q80bv_read(&spi_flash, addr, len, &spiflash_buffer[0]); - usb_transfer_schedule_block(endpoint->in, &spiflash_buffer[0], len, - NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &spiflash_buffer[0], + len, + NULL, + NULL); return USB_REQUEST_STATUS_OK; } - } else if (stage == USB_TRANSFER_STAGE_DATA) - { - addr = (endpoint->setup.value << 16) | endpoint->setup.index; - len = endpoint->setup.length; - /* This check is redundant but makes me feel better. */ - if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) - || ((addr + len) > spi_flash.num_bytes)) - { - return USB_REQUEST_STATUS_STALL; - } else - { - usb_transfer_schedule_ack(endpoint->out); - return USB_REQUEST_STATUS_OK; - } - } else - { + } else if (stage == USB_TRANSFER_STAGE_DATA) { + addr = (endpoint->setup.value << 16) | endpoint->setup.index; + len = endpoint->setup.length; + /* This check is redundant but makes me feel better. */ + if ((len > spi_flash.page_len) || (addr > spi_flash.num_bytes) || + ((addr + len) > spi_flash.num_bytes)) { + return USB_REQUEST_STATUS_STALL; + } else { + usb_transfer_schedule_ack(endpoint->out); + return USB_REQUEST_STATUS_OK; + } + } else { return USB_REQUEST_STATUS_OK; } } usb_request_status_t usb_vendor_request_spiflash_status( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { w25q80bv_get_full_status(&spi_flash, endpoint->buffer); - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 2, NULL, NULL); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 2, + NULL, + NULL); return USB_REQUEST_STATUS_OK; } else if (stage == USB_TRANSFER_STAGE_DATA) { usb_transfer_schedule_ack(endpoint->out); @@ -137,11 +149,12 @@ usb_request_status_t usb_vendor_request_spiflash_status( } usb_request_status_t usb_vendor_request_spiflash_clear_status( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { w25q80bv_clear_status(&spi_flash); usb_transfer_schedule_ack(endpoint->in); } -return USB_REQUEST_STATUS_OK; + return USB_REQUEST_STATUS_OK; } diff --git a/firmware/hackrf_usb/usb_api_spiflash.h b/firmware/hackrf_usb/usb_api_spiflash.h index 3d17203d..c8976be4 100644 --- a/firmware/hackrf_usb/usb_api_spiflash.h +++ b/firmware/hackrf_usb/usb_api_spiflash.h @@ -27,14 +27,19 @@ #include usb_request_status_t usb_vendor_request_erase_spiflash( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_write_spiflash( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_read_spiflash( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_spiflash_status( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_spiflash_clear_status( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); #endif /* end of include guard: __USB_API_SPIFLASH_H__ */ diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c index 4c1cba3e..a6b40846 100644 --- a/firmware/hackrf_usb/usb_api_sweep.c +++ b/firmware/hackrf_usb/usb_api_sweep.c @@ -32,10 +32,10 @@ #include -#define MIN(x,y) ((x)<(y)?(x):(y)) -#define MAX(x,y) ((x)>(y)?(x):(y)) -#define FREQ_GRANULARITY 1000000 -#define MAX_RANGES 10 +#define MIN(x, y) ((x) < (y) ? (x) : (y)) +#define MAX(x, y) ((x) > (y) ? (x) : (y)) +#define FREQ_GRANULARITY 1000000 +#define MAX_RANGES 10 #define THROWAWAY_BUFFERS 2 static uint64_t sweep_freq; @@ -49,45 +49,51 @@ static enum sweep_style style = LINEAR; /* Do this before starting sweep mode with request_transceiver_mode(). */ usb_request_status_t usb_vendor_request_init_sweep( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { uint32_t num_bytes; int i; if (stage == USB_TRANSFER_STAGE_SETUP) { num_bytes = (endpoint->setup.index << 16) | endpoint->setup.value; dwell_blocks = num_bytes / 0x4000; - if(1 > dwell_blocks) { + if (1 > dwell_blocks) { return USB_REQUEST_STATUS_STALL; } num_ranges = (endpoint->setup.length - 9) / (2 * sizeof(frequencies[0])); - if((1 > num_ranges) || (MAX_RANGES < num_ranges)) { + if ((1 > num_ranges) || (MAX_RANGES < num_ranges)) { return USB_REQUEST_STATUS_STALL; } - usb_transfer_schedule_block(endpoint->out, &data, - endpoint->setup.length, NULL, NULL); + usb_transfer_schedule_block( + endpoint->out, + &data, + endpoint->setup.length, + NULL, + NULL); } else if (stage == USB_TRANSFER_STAGE_DATA) { - step_width = ((uint32_t)(data[3]) << 24) | ((uint32_t)(data[2]) << 16) - | ((uint32_t)(data[1]) << 8) | data[0]; - if(1 > step_width) { + step_width = ((uint32_t) (data[3]) << 24) | ((uint32_t) (data[2]) << 16) | + ((uint32_t) (data[1]) << 8) | data[0]; + if (1 > step_width) { return USB_REQUEST_STATUS_STALL; } - offset = ((uint32_t)(data[7]) << 24) | ((uint32_t)(data[6]) << 16) - | ((uint32_t)(data[5]) << 8) | data[4]; + offset = ((uint32_t) (data[7]) << 24) | ((uint32_t) (data[6]) << 16) | + ((uint32_t) (data[5]) << 8) | data[4]; style = data[8]; - if(INTERLEAVED < style) { + if (INTERLEAVED < style) { return USB_REQUEST_STATUS_STALL; } - for(i=0; i<(num_ranges*2); i++) { - frequencies[i] = ((uint16_t)(data[10+i*2]) << 8) + data[9+i*2]; + for (i = 0; i < (num_ranges * 2); i++) { + frequencies[i] = + ((uint16_t) (data[10 + i * 2]) << 8) + data[9 + i * 2]; } - sweep_freq = (uint64_t)frequencies[0] * FREQ_GRANULARITY; + sweep_freq = (uint64_t) frequencies[0] * FREQ_GRANULARITY; set_freq(sweep_freq + offset); usb_transfer_schedule_ack(endpoint->in); } return USB_REQUEST_STATUS_OK; } -void sweep_bulk_transfer_complete(void *user_data, unsigned int bytes_transferred) +void sweep_bulk_transfer_complete(void* user_data, unsigned int bytes_transferred) { (void) user_data; (void) bytes_transferred; @@ -97,7 +103,8 @@ void sweep_bulk_transfer_complete(void *user_data, unsigned int bytes_transferre m0_state.m4_count += 3 * 0x4000; } -void sweep_mode(uint32_t seq) { +void sweep_mode(uint32_t seq) +{ // Sweep mode is implemented using timed M0 operations, as follows: // // 0. M4 initially puts the M0 into RX mode, with an m0_count threshold @@ -126,7 +133,7 @@ void sweep_mode(uint32_t seq) { bool odd = true; uint16_t range = 0; - uint8_t *buffer; + uint8_t* buffer; transceiver_startup(TRANSCEIVER_MODE_RX_SWEEP); @@ -137,7 +144,6 @@ void sweep_mode(uint32_t seq) { baseband_streaming_enable(&sgpio_config); while (transceiver_request.seq == seq) { - // Wait for M0 to finish receiving a buffer. while (m0_state.active_mode != M0_MODE_WAIT) if (transceiver_request.seq != seq) @@ -150,45 +156,52 @@ void sweep_mode(uint32_t seq) { // Write metadata to buffer. buffer = &usb_bulk_buffer[phase * 0x4000]; *buffer = 0x7f; - *(buffer+1) = 0x7f; - *(buffer+2) = sweep_freq & 0xff; - *(buffer+3) = (sweep_freq >> 8) & 0xff; - *(buffer+4) = (sweep_freq >> 16) & 0xff; - *(buffer+5) = (sweep_freq >> 24) & 0xff; - *(buffer+6) = (sweep_freq >> 32) & 0xff; - *(buffer+7) = (sweep_freq >> 40) & 0xff; - *(buffer+8) = (sweep_freq >> 48) & 0xff; - *(buffer+9) = (sweep_freq >> 56) & 0xff; + *(buffer + 1) = 0x7f; + *(buffer + 2) = sweep_freq & 0xff; + *(buffer + 3) = (sweep_freq >> 8) & 0xff; + *(buffer + 4) = (sweep_freq >> 16) & 0xff; + *(buffer + 5) = (sweep_freq >> 24) & 0xff; + *(buffer + 6) = (sweep_freq >> 32) & 0xff; + *(buffer + 7) = (sweep_freq >> 40) & 0xff; + *(buffer + 8) = (sweep_freq >> 48) & 0xff; + *(buffer + 9) = (sweep_freq >> 56) & 0xff; // Set up IN transfer of buffer. usb_transfer_schedule_block( &usb_endpoint_bulk_in, buffer, 0x4000, - sweep_bulk_transfer_complete, NULL - ); + sweep_bulk_transfer_complete, + NULL); // Use other buffer next time. phase = (phase + 1) % 2; - if ( ++blocks_queued == dwell_blocks ) { + if (++blocks_queued == dwell_blocks) { // Calculate next sweep frequency. - if(INTERLEAVED == style) { - if(!odd && ((sweep_freq + step_width) >= ((uint64_t)frequencies[1+range*2] * FREQ_GRANULARITY))) { + if (INTERLEAVED == style) { + if (!odd && + ((sweep_freq + step_width) >= + ((uint64_t) frequencies[1 + range * 2] * + FREQ_GRANULARITY))) { range = (range + 1) % num_ranges; - sweep_freq = (uint64_t)frequencies[range*2] * FREQ_GRANULARITY; + sweep_freq = (uint64_t) frequencies[range * 2] * + FREQ_GRANULARITY; } else { - if(odd) { - sweep_freq += step_width/4; + if (odd) { + sweep_freq += step_width / 4; } else { - sweep_freq += 3*step_width/4; + sweep_freq += 3 * step_width / 4; } } odd = !odd; } else { - if((sweep_freq + step_width) >= ((uint64_t)frequencies[1+range*2] * FREQ_GRANULARITY)) { + if ((sweep_freq + step_width) >= + ((uint64_t) frequencies[1 + range * 2] * + FREQ_GRANULARITY)) { range = (range + 1) % num_ranges; - sweep_freq = (uint64_t)frequencies[range*2] * FREQ_GRANULARITY; + sweep_freq = (uint64_t) frequencies[range * 2] * + FREQ_GRANULARITY; } else { sweep_freq += step_width; } diff --git a/firmware/hackrf_usb/usb_api_sweep.h b/firmware/hackrf_usb/usb_api_sweep.h index bdc3ba7c..09e3a90b 100644 --- a/firmware/hackrf_usb/usb_api_sweep.h +++ b/firmware/hackrf_usb/usb_api_sweep.h @@ -32,7 +32,8 @@ enum sweep_style { }; usb_request_status_t usb_vendor_request_init_sweep( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); void sweep_mode(uint32_t seq); diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c index 7acc41f8..6ed0aaae 100644 --- a/firmware/hackrf_usb/usb_api_transceiver.c +++ b/firmware/hackrf_usb/usb_api_transceiver.c @@ -70,11 +70,12 @@ set_sample_r_params_t set_sample_r_params; usb_request_status_t usb_vendor_request_set_baseband_filter_bandwidth( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - const uint32_t bandwidth = (endpoint->setup.index << 16) | endpoint->setup.value; - if( baseband_filter_bandwidth_set(bandwidth) ) { + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { + const uint32_t bandwidth = + (endpoint->setup.index << 16) | endpoint->setup.value; + if (baseband_filter_bandwidth_set(bandwidth)) { usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } @@ -86,53 +87,57 @@ usb_request_status_t usb_vendor_request_set_baseband_filter_bandwidth( usb_request_status_t usb_vendor_request_set_freq( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage) + const usb_transfer_stage_t stage) { - if (stage == USB_TRANSFER_STAGE_SETUP) - { - usb_transfer_schedule_block(endpoint->out, &set_freq_params, sizeof(set_freq_params_t), - NULL, NULL); + if (stage == USB_TRANSFER_STAGE_SETUP) { + usb_transfer_schedule_block( + endpoint->out, + &set_freq_params, + sizeof(set_freq_params_t), + NULL, + NULL); return USB_REQUEST_STATUS_OK; - } else if (stage == USB_TRANSFER_STAGE_DATA) - { - const uint64_t freq = set_freq_params.freq_mhz * 1000000ULL + set_freq_params.freq_hz; - if( set_freq(freq) ) - { + } else if (stage == USB_TRANSFER_STAGE_DATA) { + const uint64_t freq = + set_freq_params.freq_mhz * 1000000ULL + set_freq_params.freq_hz; + if (set_freq(freq)) { usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } return USB_REQUEST_STATUS_STALL; - } else - { + } else { return USB_REQUEST_STATUS_OK; } } usb_request_status_t usb_vendor_request_set_sample_rate_frac( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage) + const usb_transfer_stage_t stage) { - if (stage == USB_TRANSFER_STAGE_SETUP) - { - usb_transfer_schedule_block(endpoint->out, &set_sample_r_params, sizeof(set_sample_r_params_t), - NULL, NULL); + if (stage == USB_TRANSFER_STAGE_SETUP) { + usb_transfer_schedule_block( + endpoint->out, + &set_sample_r_params, + sizeof(set_sample_r_params_t), + NULL, + NULL); return USB_REQUEST_STATUS_OK; - } else if (stage == USB_TRANSFER_STAGE_DATA) - { - if( sample_rate_frac_set(set_sample_r_params.freq_hz * 2, set_sample_r_params.divider ) ) - { + } else if (stage == USB_TRANSFER_STAGE_DATA) { + if (sample_rate_frac_set( + set_sample_r_params.freq_hz * 2, + set_sample_r_params.divider)) { usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } return USB_REQUEST_STATUS_STALL; - } else - { + } else { return USB_REQUEST_STATUS_OK; } } usb_request_status_t usb_vendor_request_set_amp_enable( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { switch (endpoint->setup.value) { @@ -156,50 +161,71 @@ usb_request_status_t usb_vendor_request_set_lna_gain( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - const uint8_t value = max2837_set_lna_gain(&max2837, endpoint->setup.index); - endpoint->buffer[0] = value; - if(value) hackrf_ui()->set_bb_lna_gain(endpoint->setup.index); - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, - NULL, NULL); - usb_transfer_schedule_ack(endpoint->out); - return USB_REQUEST_STATUS_OK; + if (stage == USB_TRANSFER_STAGE_SETUP) { + const uint8_t value = + max2837_set_lna_gain(&max2837, endpoint->setup.index); + endpoint->buffer[0] = value; + if (value) + hackrf_ui()->set_bb_lna_gain(endpoint->setup.index); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 1, + NULL, + NULL); + usb_transfer_schedule_ack(endpoint->out); + return USB_REQUEST_STATUS_OK; } return USB_REQUEST_STATUS_OK; } usb_request_status_t usb_vendor_request_set_vga_gain( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - const uint8_t value = max2837_set_vga_gain(&max2837, endpoint->setup.index); - endpoint->buffer[0] = value; - if(value) hackrf_ui()->set_bb_vga_gain(endpoint->setup.index); - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, - NULL, NULL); - usb_transfer_schedule_ack(endpoint->out); - return USB_REQUEST_STATUS_OK; + if (stage == USB_TRANSFER_STAGE_SETUP) { + const uint8_t value = + max2837_set_vga_gain(&max2837, endpoint->setup.index); + endpoint->buffer[0] = value; + if (value) + hackrf_ui()->set_bb_vga_gain(endpoint->setup.index); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 1, + NULL, + NULL); + usb_transfer_schedule_ack(endpoint->out); + return USB_REQUEST_STATUS_OK; } return USB_REQUEST_STATUS_OK; } usb_request_status_t usb_vendor_request_set_txvga_gain( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - const uint8_t value = max2837_set_txvga_gain(&max2837, endpoint->setup.index); - endpoint->buffer[0] = value; - if(value) hackrf_ui()->set_bb_tx_vga_gain(endpoint->setup.index); - usb_transfer_schedule_block(endpoint->in, &endpoint->buffer, 1, - NULL, NULL); - usb_transfer_schedule_ack(endpoint->out); - return USB_REQUEST_STATUS_OK; + if (stage == USB_TRANSFER_STAGE_SETUP) { + const uint8_t value = + max2837_set_txvga_gain(&max2837, endpoint->setup.index); + endpoint->buffer[0] = value; + if (value) + hackrf_ui()->set_bb_tx_vga_gain(endpoint->setup.index); + usb_transfer_schedule_block( + endpoint->in, + &endpoint->buffer, + 1, + NULL, + NULL); + usb_transfer_schedule_ack(endpoint->out); + return USB_REQUEST_STATUS_OK; } return USB_REQUEST_STATUS_OK; } usb_request_status_t usb_vendor_request_set_antenna_enable( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { switch (endpoint->setup.value) { @@ -224,12 +250,18 @@ usb_request_status_t usb_vendor_request_set_freq_explicit( const usb_transfer_stage_t stage) { if (stage == USB_TRANSFER_STAGE_SETUP) { - usb_transfer_schedule_block(endpoint->out, &explicit_params, - sizeof(struct set_freq_explicit_params), NULL, NULL); + usb_transfer_schedule_block( + endpoint->out, + &explicit_params, + sizeof(struct set_freq_explicit_params), + NULL, + NULL); return USB_REQUEST_STATUS_OK; } else if (stage == USB_TRANSFER_STAGE_DATA) { - if (set_freq_explicit(explicit_params.if_freq_hz, - explicit_params.lo_freq_hz, explicit_params.path)) { + if (set_freq_explicit( + explicit_params.if_freq_hz, + explicit_params.lo_freq_hz, + explicit_params.path)) { usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; } @@ -243,7 +275,8 @@ static volatile hw_sync_mode_t _hw_sync_mode = HW_SYNC_MODE_OFF; static volatile uint32_t _tx_underrun_limit; static volatile uint32_t _rx_overrun_limit; -void set_hw_sync_mode(const hw_sync_mode_t new_hw_sync_mode) { +void set_hw_sync_mode(const hw_sync_mode_t new_hw_sync_mode) +{ _hw_sync_mode = new_hw_sync_mode; } @@ -276,8 +309,8 @@ void transceiver_shutdown(void) m0_set_mode(M0_MODE_IDLE); } -void transceiver_startup(const transceiver_mode_t mode) { - +void transceiver_startup(const transceiver_mode_t mode) +{ hackrf_ui()->set_transceiver_mode(mode); switch (mode) { @@ -308,8 +341,8 @@ usb_request_status_t usb_vendor_request_set_transceiver_mode( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { - switch( endpoint->setup.value ) { + if (stage == USB_TRANSFER_STAGE_SETUP) { + switch (endpoint->setup.value) { case TRANSCEIVER_MODE_OFF: case TRANSCEIVER_MODE_RX: case TRANSCEIVER_MODE_TX: @@ -330,7 +363,7 @@ usb_request_status_t usb_vendor_request_set_hw_sync_mode( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { + if (stage == USB_TRANSFER_STAGE_SETUP) { set_hw_sync_mode(endpoint->setup.value); usb_transfer_schedule_ack(endpoint->in); return USB_REQUEST_STATUS_OK; @@ -341,9 +374,9 @@ usb_request_status_t usb_vendor_request_set_hw_sync_mode( usb_request_status_t usb_vendor_request_set_tx_underrun_limit( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { uint32_t value = (endpoint->setup.index << 16) + endpoint->setup.value; _tx_underrun_limit = value; usb_transfer_schedule_ack(endpoint->in); @@ -353,9 +386,9 @@ usb_request_status_t usb_vendor_request_set_tx_underrun_limit( usb_request_status_t usb_vendor_request_set_rx_overrun_limit( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { - if( stage == USB_TRANSFER_STAGE_SETUP ) { + const usb_transfer_stage_t stage) +{ + if (stage == USB_TRANSFER_STAGE_SETUP) { uint32_t value = (endpoint->setup.index << 16) + endpoint->setup.value; _rx_overrun_limit = value; usb_transfer_schedule_ack(endpoint->in); @@ -363,13 +396,14 @@ usb_request_status_t usb_vendor_request_set_rx_overrun_limit( return USB_REQUEST_STATUS_OK; } -void transceiver_bulk_transfer_complete(void *user_data, unsigned int bytes_transferred) +void transceiver_bulk_transfer_complete(void* user_data, unsigned int bytes_transferred) { (void) user_data; m0_state.m4_count += bytes_transferred; } -void rx_mode(uint32_t seq) { +void rx_mode(uint32_t seq) +{ uint32_t usb_count = 0; transceiver_startup(TRANSCEIVER_MODE_RX); @@ -383,8 +417,7 @@ void rx_mode(uint32_t seq) { &usb_bulk_buffer[usb_count & USB_BULK_BUFFER_MASK], USB_TRANSFER_SIZE, transceiver_bulk_transfer_complete, - NULL - ); + NULL); usb_count += USB_TRANSFER_SIZE; } } @@ -392,7 +425,8 @@ void rx_mode(uint32_t seq) { transceiver_shutdown(); } -void tx_mode(uint32_t seq) { +void tx_mode(uint32_t seq) +{ unsigned int usb_count = 0; transceiver_startup(TRANSCEIVER_MODE_TX); @@ -403,8 +437,7 @@ void tx_mode(uint32_t seq) { &usb_bulk_buffer[0x0000], USB_TRANSFER_SIZE, transceiver_bulk_transfer_complete, - NULL - ); + NULL); usb_count += USB_TRANSFER_SIZE; // Enable streaming. The M0 is in TX_START mode, and will automatically @@ -420,8 +453,7 @@ void tx_mode(uint32_t seq) { &usb_bulk_buffer[usb_count & USB_BULK_BUFFER_MASK], USB_TRANSFER_SIZE, transceiver_bulk_transfer_complete, - NULL - ); + NULL); usb_count += USB_TRANSFER_SIZE; } } diff --git a/firmware/hackrf_usb/usb_api_transceiver.h b/firmware/hackrf_usb/usb_api_transceiver.h index ef865b63..242e1ceb 100644 --- a/firmware/hackrf_usb/usb_api_transceiver.h +++ b/firmware/hackrf_usb/usb_api_transceiver.h @@ -48,24 +48,32 @@ usb_request_status_t usb_vendor_request_set_sample_rate_frac( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_amp_enable( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_lna_gain( usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_vga_gain( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_txvga_gain( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_antenna_enable( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_freq_explicit( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_hw_sync_mode( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_tx_underrun_limit( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); usb_request_status_t usb_vendor_request_set_rx_overrun_limit( - usb_endpoint_t* const endpoint, const usb_transfer_stage_t stage); + usb_endpoint_t* const endpoint, + const usb_transfer_stage_t stage); void request_transceiver_mode(transceiver_mode_t mode); void transceiver_startup(transceiver_mode_t mode); @@ -75,4 +83,4 @@ void rx_mode(uint32_t seq); void tx_mode(uint32_t seq); void off_mode(uint32_t seq); -#endif/*__USB_API_TRANSCEIVER_H__*/ +#endif /*__USB_API_TRANSCEIVER_H__*/ diff --git a/firmware/hackrf_usb/usb_api_ui.c b/firmware/hackrf_usb/usb_api_ui.c index ebb9ab9e..5cb5ac81 100644 --- a/firmware/hackrf_usb/usb_api_ui.c +++ b/firmware/hackrf_usb/usb_api_ui.c @@ -30,8 +30,8 @@ usb_request_status_t usb_vendor_request_set_ui_enable( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -) { + const usb_transfer_stage_t stage) +{ if (stage == USB_TRANSFER_STAGE_SETUP) { hackrf_ui_set_enable(endpoint->setup.value); usb_transfer_schedule_ack(endpoint->in); diff --git a/firmware/hackrf_usb/usb_api_ui.h b/firmware/hackrf_usb/usb_api_ui.h index 720d74f7..c313cb83 100644 --- a/firmware/hackrf_usb/usb_api_ui.h +++ b/firmware/hackrf_usb/usb_api_ui.h @@ -27,7 +27,6 @@ usb_request_status_t usb_vendor_request_set_ui_enable( usb_endpoint_t* const endpoint, - const usb_transfer_stage_t stage -); + const usb_transfer_stage_t stage); #endif /* end of include guard: __USB_API_UI_H__ */ diff --git a/firmware/hackrf_usb/usb_bulk_buffer.h b/firmware/hackrf_usb/usb_bulk_buffer.h index 25e710ee..f87ce9c3 100644 --- a/firmware/hackrf_usb/usb_bulk_buffer.h +++ b/firmware/hackrf_usb/usb_bulk_buffer.h @@ -35,4 +35,4 @@ */ extern uint8_t usb_bulk_buffer[USB_BULK_BUFFER_SIZE]; -#endif/*__USB_BULK_BUFFER_H__*/ +#endif /*__USB_BULK_BUFFER_H__*/ diff --git a/firmware/hackrf_usb/usb_descriptor.c b/firmware/hackrf_usb/usb_descriptor.c index f37718d3..4aabeaeb 100644 --- a/firmware/hackrf_usb/usb_descriptor.c +++ b/firmware/hackrf_usb/usb_descriptor.c @@ -24,139 +24,138 @@ #include "usb_type.h" #include "usb_descriptor.h" -#define USB_VENDOR_ID (0x1D50) +#define USB_VENDOR_ID (0x1D50) #ifdef HACKRF_ONE -#define USB_PRODUCT_ID (0x6089) + #define USB_PRODUCT_ID (0x6089) #elif JAWBREAKER -#define USB_PRODUCT_ID (0x604B) + #define USB_PRODUCT_ID (0x604B) #elif RAD1O -#define USB_PRODUCT_ID (0xCC15) + #define USB_PRODUCT_ID (0xCC15) #else -#define USB_PRODUCT_ID (0xFFFF) + #define USB_PRODUCT_ID (0xFFFF) #endif -#define USB_API_VERSION (0x0106) +#define USB_API_VERSION (0x0106) -#define USB_WORD(x) (x & 0xFF), ((x >> 8) & 0xFF) +#define USB_WORD(x) (x & 0xFF), ((x >> 8) & 0xFF) -#define USB_MAX_PACKET0 (64) -#define USB_MAX_PACKET_BULK_FS (64) -#define USB_MAX_PACKET_BULK_HS (512) +#define USB_MAX_PACKET0 (64) +#define USB_MAX_PACKET_BULK_FS (64) +#define USB_MAX_PACKET_BULK_HS (512) -#define USB_BULK_IN_EP_ADDR (0x81) -#define USB_BULK_OUT_EP_ADDR (0x02) +#define USB_BULK_IN_EP_ADDR (0x81) +#define USB_BULK_OUT_EP_ADDR (0x02) -#define USB_STRING_LANGID (0x0409) +#define USB_STRING_LANGID (0x0409) uint8_t usb_descriptor_device[] = { - 18, // bLength - USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType - USB_WORD(0x0200), // bcdUSB - 0x00, // bDeviceClass - 0x00, // bDeviceSubClass - 0x00, // bDeviceProtocol - USB_MAX_PACKET0, // bMaxPacketSize0 - USB_WORD(USB_VENDOR_ID), // idVendor - USB_WORD(USB_PRODUCT_ID), // idProduct - USB_WORD(USB_API_VERSION), // bcdDevice - 0x01, // iManufacturer - 0x02, // iProduct - 0x04, // iSerialNumber - 0x01 // bNumConfigurations + 18, // bLength + USB_DESCRIPTOR_TYPE_DEVICE, // bDescriptorType + USB_WORD(0x0200), // bcdUSB + 0x00, // bDeviceClass + 0x00, // bDeviceSubClass + 0x00, // bDeviceProtocol + USB_MAX_PACKET0, // bMaxPacketSize0 + USB_WORD(USB_VENDOR_ID), // idVendor + USB_WORD(USB_PRODUCT_ID), // idProduct + USB_WORD(USB_API_VERSION), // bcdDevice + 0x01, // iManufacturer + 0x02, // iProduct + 0x04, // iSerialNumber + 0x01 // bNumConfigurations }; uint8_t usb_descriptor_device_qualifier[] = { - 10, // bLength - USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER, // bDescriptorType - USB_WORD(0x0200), // bcdUSB - 0x00, // bDeviceClass - 0x00, // bDeviceSubClass - 0x00, // bDeviceProtocol - 64, // bMaxPacketSize0 - 0x01, // bNumOtherSpeedConfigurations - 0x00 // bReserved + 10, // bLength + USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER, // bDescriptorType + USB_WORD(0x0200), // bcdUSB + 0x00, // bDeviceClass + 0x00, // bDeviceSubClass + 0x00, // bDeviceProtocol + 64, // bMaxPacketSize0 + 0x01, // bNumOtherSpeedConfigurations + 0x00 // bReserved }; uint8_t usb_descriptor_configuration_full_speed[] = { - 9, // bLength - USB_DESCRIPTOR_TYPE_CONFIGURATION, // bDescriptorType - USB_WORD(32), // wTotalLength - 0x01, // bNumInterfaces - 0x01, // bConfigurationValue - 0x03, // iConfiguration - 0x80, // bmAttributes: USB-powered - 250, // bMaxPower: 500mA + 9, // bLength + USB_DESCRIPTOR_TYPE_CONFIGURATION, // bDescriptorType + USB_WORD(32), // wTotalLength + 0x01, // bNumInterfaces + 0x01, // bConfigurationValue + 0x03, // iConfiguration + 0x80, // bmAttributes: USB-powered + 250, // bMaxPower: 500mA - 9, // bLength - USB_DESCRIPTOR_TYPE_INTERFACE, // bDescriptorType - 0x00, // bInterfaceNumber - 0x00, // bAlternateSetting - 0x02, // bNumEndpoints - 0xFF, // bInterfaceClass: vendor-specific - 0xFF, // bInterfaceSubClass - 0xFF, // bInterfaceProtocol: vendor-specific - 0x00, // iInterface + 9, // bLength + USB_DESCRIPTOR_TYPE_INTERFACE, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + 0xFF, // bInterfaceClass: vendor-specific + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol: vendor-specific + 0x00, // iInterface - 7, // bLength - USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType - USB_BULK_IN_EP_ADDR, // bEndpointAddress - 0x02, // bmAttributes: BULK - USB_WORD(USB_MAX_PACKET_BULK_FS), // wMaxPacketSize - 0x00, // bInterval: no NAK + 7, // bLength + USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType + USB_BULK_IN_EP_ADDR, // bEndpointAddress + 0x02, // bmAttributes: BULK + USB_WORD(USB_MAX_PACKET_BULK_FS), // wMaxPacketSize + 0x00, // bInterval: no NAK - 7, // bLength - USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType - USB_BULK_OUT_EP_ADDR, // bEndpointAddress - 0x02, // bmAttributes: BULK - USB_WORD(USB_MAX_PACKET_BULK_FS), // wMaxPacketSize - 0x00, // bInterval: no NAK + 7, // bLength + USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType + USB_BULK_OUT_EP_ADDR, // bEndpointAddress + 0x02, // bmAttributes: BULK + USB_WORD(USB_MAX_PACKET_BULK_FS), // wMaxPacketSize + 0x00, // bInterval: no NAK - 0, // TERMINATOR + 0, // TERMINATOR }; uint8_t usb_descriptor_configuration_high_speed[] = { - 9, // bLength - USB_DESCRIPTOR_TYPE_CONFIGURATION, // bDescriptorType - USB_WORD(32), // wTotalLength - 0x01, // bNumInterfaces - 0x01, // bConfigurationValue - 0x03, // iConfiguration - 0x80, // bmAttributes: USB-powered - 250, // bMaxPower: 500mA + 9, // bLength + USB_DESCRIPTOR_TYPE_CONFIGURATION, // bDescriptorType + USB_WORD(32), // wTotalLength + 0x01, // bNumInterfaces + 0x01, // bConfigurationValue + 0x03, // iConfiguration + 0x80, // bmAttributes: USB-powered + 250, // bMaxPower: 500mA - 9, // bLength - USB_DESCRIPTOR_TYPE_INTERFACE, // bDescriptorType - 0x00, // bInterfaceNumber - 0x00, // bAlternateSetting - 0x02, // bNumEndpoints - 0xFF, // bInterfaceClass: vendor-specific - 0xFF, // bInterfaceSubClass - 0xFF, // bInterfaceProtocol: vendor-specific - 0x00, // iInterface + 9, // bLength + USB_DESCRIPTOR_TYPE_INTERFACE, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + 0xFF, // bInterfaceClass: vendor-specific + 0xFF, // bInterfaceSubClass + 0xFF, // bInterfaceProtocol: vendor-specific + 0x00, // iInterface - 7, // bLength - USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType - USB_BULK_IN_EP_ADDR, // bEndpointAddress - 0x02, // bmAttributes: BULK - USB_WORD(USB_MAX_PACKET_BULK_HS), // wMaxPacketSize - 0x00, // bInterval: no NAK + 7, // bLength + USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType + USB_BULK_IN_EP_ADDR, // bEndpointAddress + 0x02, // bmAttributes: BULK + USB_WORD(USB_MAX_PACKET_BULK_HS), // wMaxPacketSize + 0x00, // bInterval: no NAK - 7, // bLength - USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType - USB_BULK_OUT_EP_ADDR, // bEndpointAddress - 0x02, // bmAttributes: BULK - USB_WORD(USB_MAX_PACKET_BULK_HS), // wMaxPacketSize - 0x00, // bInterval: no NAK + 7, // bLength + USB_DESCRIPTOR_TYPE_ENDPOINT, // bDescriptorType + USB_BULK_OUT_EP_ADDR, // bEndpointAddress + 0x02, // bmAttributes: BULK + USB_WORD(USB_MAX_PACKET_BULK_HS), // wMaxPacketSize + 0x00, // bInterval: no NAK - 0, // TERMINATOR + 0, // TERMINATOR }; - uint8_t usb_descriptor_string_languages[] = { - 0x04, // bLength - USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType - USB_WORD(USB_STRING_LANGID), // wLANGID + 0x04, // bLength + USB_DESCRIPTOR_TYPE_STRING, // bDescriptorType + USB_WORD(USB_STRING_LANGID), // wLANGID }; // clang-format off diff --git a/firmware/hackrf_usb/usb_descriptor.h b/firmware/hackrf_usb/usb_descriptor.h index e8c9d507..4a63a640 100644 --- a/firmware/hackrf_usb/usb_descriptor.h +++ b/firmware/hackrf_usb/usb_descriptor.h @@ -30,7 +30,8 @@ extern uint8_t usb_descriptor_string_manufacturer[]; extern uint8_t usb_descriptor_string_product[]; #define USB_DESCRIPTOR_STRING_SERIAL_LEN 32 -#define USB_DESCRIPTOR_STRING_SERIAL_BUF_LEN (USB_DESCRIPTOR_STRING_SERIAL_LEN*2 + 2) /* UTF-16LE */ +#define USB_DESCRIPTOR_STRING_SERIAL_BUF_LEN \ + (USB_DESCRIPTOR_STRING_SERIAL_LEN * 2 + 2) /* UTF-16LE */ extern uint8_t usb_descriptor_string_serial_number[]; extern uint8_t* usb_descriptor_strings[]; diff --git a/firmware/hackrf_usb/usb_device.c b/firmware/hackrf_usb/usb_device.c index 4803e024..798f8d9a 100644 --- a/firmware/hackrf_usb/usb_device.c +++ b/firmware/hackrf_usb/usb_device.c @@ -38,7 +38,6 @@ usb_configuration_t usb_configuration_full_speed = { .descriptor = usb_descriptor_configuration_full_speed, }; - usb_configuration_t* usb_configurations[] = { &usb_configuration_high_speed, &usb_configuration_full_speed, diff --git a/firmware/hackrf_usb/usb_endpoint.c b/firmware/hackrf_usb/usb_endpoint.c index 623f9d1f..8094aefc 100644 --- a/firmware/hackrf_usb/usb_endpoint.c +++ b/firmware/hackrf_usb/usb_endpoint.c @@ -56,8 +56,7 @@ usb_endpoint_t usb_endpoint_bulk_in = { .in = &usb_endpoint_bulk_in, .out = 0, .setup_complete = 0, - .transfer_complete = usb_queue_transfer_complete -}; + .transfer_complete = usb_queue_transfer_complete}; static USB_DEFINE_QUEUE(usb_endpoint_bulk_in, 1); usb_endpoint_t usb_endpoint_bulk_out = { @@ -66,8 +65,5 @@ usb_endpoint_t usb_endpoint_bulk_out = { .in = 0, .out = &usb_endpoint_bulk_out, .setup_complete = 0, - .transfer_complete = usb_queue_transfer_complete -}; + .transfer_complete = usb_queue_transfer_complete}; static USB_DEFINE_QUEUE(usb_endpoint_bulk_out, 1); - - diff --git a/host/hackrf-tools/src/hackrf_clock.c b/host/hackrf-tools/src/hackrf_clock.c index 5acfcc6a..e4935caf 100644 --- a/host/hackrf-tools/src/hackrf_clock.c +++ b/host/hackrf-tools/src/hackrf_clock.c @@ -28,24 +28,25 @@ #ifndef bool typedef int bool; -#define true 1 -#define false 0 + #define true 1 + #define false 0 #endif -#define CLOCK_UNDEFINED 0xFF +#define CLOCK_UNDEFINED 0xFF #define REGISTER_INVALID 32767 -int parse_int(char* s, uint8_t* const value) { +int parse_int(char* s, uint8_t* const value) +{ uint_fast8_t base = 10; char* s_end; long long_value; - if( strlen(s) > 2 ) { - if( s[0] == '0' ) { - if( (s[1] == 'x') || (s[1] == 'X') ) { + if (strlen(s) > 2) { + if (s[0] == '0') { + if ((s[1] == 'x') || (s[1] == 'X')) { base = 16; s += 2; - } else if( (s[1] == 'b') || (s[1] == 'B') ) { + } else if ((s[1] == 'b') || (s[1] == 'B')) { base = 2; s += 2; } @@ -54,177 +55,189 @@ int parse_int(char* s, uint8_t* const value) { s_end = s; long_value = strtol(s, &s_end, base); - if( (s != s_end) && (*s_end == 0) ) { - *value = (uint8_t)long_value; + if ((s != s_end) && (*s_end == 0)) { + *value = (uint8_t) long_value; return HACKRF_SUCCESS; } else { return HACKRF_ERROR_INVALID_PARAM; } } -int si5351c_read_register(hackrf_device* device, const uint16_t register_number) { +int si5351c_read_register(hackrf_device* device, const uint16_t register_number) +{ uint16_t register_value; int result = hackrf_si5351c_read(device, register_number, ®ister_value); - - if( result == HACKRF_SUCCESS ) { + + if (result == HACKRF_SUCCESS) { printf("[%3d] -> 0x%02x\n", register_number, register_value); } else { - printf("hackrf_si5351c_read() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_si5351c_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); } - + return result; } int si5351c_write_register( hackrf_device* device, const uint16_t register_number, - const uint16_t register_value -) { + const uint16_t register_value) +{ int result = HACKRF_SUCCESS; result = hackrf_si5351c_write(device, register_number, register_value); - - if( result == HACKRF_SUCCESS ) { + + if (result == HACKRF_SUCCESS) { printf("0x%2x -> [%3d]\n", register_value, register_number); } else { - printf("hackrf_max2837_write() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_max2837_write() failed: %s (%d)\n", + hackrf_error_name(result), + result); } - + return result; } -#define SI5351C_CLK_POWERDOWN (1<<7) -#define SI5351C_CLK_INT_MODE (1<<6) -#define SI5351C_CLK_PLL_SRC (1<<5) -#define SI5351C_CLK_INV (1<<4) +#define SI5351C_CLK_POWERDOWN (1 << 7) +#define SI5351C_CLK_INT_MODE (1 << 6) +#define SI5351C_CLK_PLL_SRC (1 << 5) +#define SI5351C_CLK_INV (1 << 4) #define SI5351C_CLK_SRC_XTAL 0 #define SI5351C_CLK_SRC_CLKIN 1 #define SI5351C_CLK_SRC_MULTISYNTH_0_4 2 #define SI5351C_CLK_SRC_MULTISYNTH_SELF 3 -void print_clk_control(uint16_t clk_ctrl) { +void print_clk_control(uint16_t clk_ctrl) +{ uint8_t clk_src, clk_pwr; printf("\tclock control = "); - if(clk_ctrl & SI5351C_CLK_POWERDOWN) + if (clk_ctrl & SI5351C_CLK_POWERDOWN) printf("Down, "); else printf("Up, "); - if(clk_ctrl & SI5351C_CLK_INT_MODE) + if (clk_ctrl & SI5351C_CLK_INT_MODE) printf("Int Mode, "); else printf("Frac Mode, "); - if(clk_ctrl & SI5351C_CLK_PLL_SRC) + if (clk_ctrl & SI5351C_CLK_PLL_SRC) printf("PLL src B, "); else printf("PLL src A, "); - if(clk_ctrl & SI5351C_CLK_INV) + if (clk_ctrl & SI5351C_CLK_INV) printf("Inverted, "); clk_src = (clk_ctrl >> 2) & 0x3; switch (clk_src) { - case 0: - printf("XTAL, "); - break; - case 1: - printf("CLKIN, "); - break; - case 2: - printf("MULTISYNTH 0 4, "); - break; - case 3: - printf("MULTISYNTH SELF, "); - break; + case 0: + printf("XTAL, "); + break; + case 1: + printf("CLKIN, "); + break; + case 2: + printf("MULTISYNTH 0 4, "); + break; + case 3: + printf("MULTISYNTH SELF, "); + break; } clk_pwr = clk_ctrl & 0x3; switch (clk_pwr) { - case 0: - printf("2 mA\n"); - break; - case 1: - printf("4 mA\n"); - break; - case 2: - printf("6 mA\n"); - break; - case 3: - printf("8 mA\n"); - break; + case 0: + printf("2 mA\n"); + break; + case 1: + printf("4 mA\n"); + break; + case 2: + printf("6 mA\n"); + break; + case 3: + printf("8 mA\n"); + break; } } -int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number) { +int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number) +{ uint_fast8_t i, reg_base, reg_number; uint16_t parameters[8], clk_control; - uint32_t p1,p2,p3,r_div; - uint_fast8_t div_lut[] = {1,2,4,8,16,32,64,128}; + uint32_t p1, p2, p3, r_div; + uint_fast8_t div_lut[] = {1, 2, 4, 8, 16, 32, 64, 128}; int result; printf("MS%d:\n", ms_number); - result = hackrf_si5351c_read(device, 16+ms_number, &clk_control); - if( result != HACKRF_SUCCESS ) { + result = hackrf_si5351c_read(device, 16 + ms_number, &clk_control); + if (result != HACKRF_SUCCESS) { return result; } print_clk_control(clk_control); - if(ms_number <6){ + if (ms_number < 6) { reg_base = 42 + (ms_number * 8); - for(i=0; i<8; i++) { + for (i = 0; i < 8; i++) { reg_number = reg_base + i; result = hackrf_si5351c_read(device, reg_number, ¶meters[i]); - if( result != HACKRF_SUCCESS ) { + if (result != HACKRF_SUCCESS) { return result; } } - p1 = ((parameters[2] & 0x03) << 16) - | (parameters[3] << 8) - | parameters[4]; - p2 = ((parameters[5] & 0x0F) << 16) - | (parameters[6] << 8) - | parameters[7]; - p3 = ((parameters[5] & 0xF0) << 12) - | (parameters[0] << 8) - | parameters[1]; + p1 = ((parameters[2] & 0x03) << 16) | (parameters[3] << 8) | + parameters[4]; + p2 = ((parameters[5] & 0x0F) << 16) | (parameters[6] << 8) | + parameters[7]; + p3 = ((parameters[5] & 0xF0) << 12) | (parameters[0] << 8) | + parameters[1]; r_div = (parameters[2] >> 4) & 0x7; printf("\tp1 = %u\n", p1); printf("\tp2 = %u\n", p2); printf("\tp3 = %u\n", p3); - if(p3) - printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", ((double)800 / (double)(((double)p1*p3 + p2 + 512*p3)/(double)(128*p3))) / div_lut[r_div] ); + if (p3) + printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", + ((double) 800 / + (double) (((double) p1 * p3 + p2 + 512 * p3) / (double) (128 * p3))) / + div_lut[r_div]); } else { // MS6 and 7 are integer only unsigned int parms; reg_base = 90; - for(i=0; i<3; i++) { + for (i = 0; i < 3; i++) { uint_fast8_t reg_number = reg_base + i; - int result = hackrf_si5351c_read(device, reg_number, ¶meters[i]); - if( result != HACKRF_SUCCESS ) { + int result = + hackrf_si5351c_read(device, reg_number, ¶meters[i]); + if (result != HACKRF_SUCCESS) { return result; } } - r_div = (ms_number == 6) ? parameters[2] & 0x7 : (parameters[2] & 0x70) >> 4 ; + r_div = (ms_number == 6) ? parameters[2] & 0x7 : + (parameters[2] & 0x70) >> 4; parms = (ms_number == 6) ? parameters[0] : parameters[1]; printf("\tp1_int = %u\n", parms); - if(parms) - printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", (800.0f / parms) / div_lut[r_div] ); + if (parms) + printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", + (800.0f / parms) / div_lut[r_div]); } printf("\toutput divider = %u\n", div_lut[r_div]); return HACKRF_SUCCESS; } -int si5351c_read_configuration(hackrf_device* device) { +int si5351c_read_configuration(hackrf_device* device) +{ uint_fast8_t ms_number; int result; - - for(ms_number=0; ms_number<8; ms_number++) { + + for (ms_number = 0; ms_number < 8; ms_number++) { result = si5351c_read_multisynth_config(device, ms_number); - if( result != HACKRF_SUCCESS ) { + if (result != HACKRF_SUCCESS) { return result; } } return HACKRF_SUCCESS; } -static void usage() { +static void usage() +{ printf("hackrf_clock - HackRF clock configuration utility\n"); printf("Usage:\n"); printf("\t-h, --help: this help\n"); @@ -237,15 +250,16 @@ static void usage() { } static struct option long_options[] = { - { "help", no_argument, 0, 'h' }, - { "read", required_argument, 0, 'r' }, - { "all", no_argument, 0, 'a' }, - { "clkout", required_argument, 0, 'o' }, - { "device", required_argument, 0, 'd' }, - { 0, 0, 0, 0 }, + {"help", no_argument, 0, 'h'}, + {"read", required_argument, 0, 'r'}, + {"all", no_argument, 0, 'a'}, + {"clkout", required_argument, 0, 'o'}, + {"device", required_argument, 0, 'd'}, + {0, 0, 0, 0}, }; -int main(int argc, char** argv) { +int main(int argc, char** argv) +{ hackrf_device* device = NULL; int opt, option_index = 0; bool read = false; @@ -255,13 +269,16 @@ int main(int argc, char** argv) { const char* serial_number = NULL; int result = hackrf_init(); - if(result) { - printf("hackrf_init() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - while( (opt = getopt_long(argc, argv, "r:ao:d:h?", long_options, &option_index)) != EOF ) { - switch( opt ) { + while ((opt = getopt_long(argc, argv, "r:ao:d:h?", long_options, &option_index)) != + EOF) { + switch (opt) { case 'r': read = true; result = parse_int(optarg, &clock); @@ -290,35 +307,42 @@ int main(int argc, char** argv) { return EXIT_FAILURE; } - if(result != HACKRF_SUCCESS) { - printf("argument error: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + printf("argument error: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } } - if(!clkout && !read) { - fprintf(stderr, "Either read or enable CLKOUT option must be specified.\n"); + if (!clkout && !read) { + fprintf(stderr, + "Either read or enable CLKOUT option must be specified.\n"); usage(); return EXIT_FAILURE; } result = hackrf_open_by_serial(serial_number, &device); - if(result) { - printf("hackrf_open() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - if(clkout) { + if (clkout) { result = hackrf_set_clkout_enable(device, clkout_enable); - if(result) { - printf("hackrf_set_clkout_enable() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_set_clkout_enable() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } } - if(read) { - if(clock == CLOCK_UNDEFINED) + if (read) { + if (clock == CLOCK_UNDEFINED) si5351c_read_configuration(device); else { printf("%d\n", clock); @@ -327,11 +351,13 @@ int main(int argc, char** argv) { } result = hackrf_close(device); - if(result) { - printf("hackrf_close() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } hackrf_exit(); - return EXIT_SUCCESS; + return EXIT_SUCCESS; } diff --git a/host/hackrf-tools/src/hackrf_cpldjtag.c b/host/hackrf-tools/src/hackrf_cpldjtag.c index 1735f93e..414fdbb9 100644 --- a/host/hackrf-tools/src/hackrf_cpldjtag.c +++ b/host/hackrf-tools/src/hackrf_cpldjtag.c @@ -31,23 +31,23 @@ #include #ifdef _MSC_VER -#ifdef _WIN64 + #ifdef _WIN64 typedef int64_t ssize_t; -#else + #else typedef int32_t ssize_t; -#endif + #endif #endif /* input file shouldn't be any longer than this */ #define MAX_XSVF_LENGTH 0x10000 -#define PACKET_LEN 4096 +#define PACKET_LEN 4096 uint8_t data[MAX_XSVF_LENGTH]; static struct option long_options[] = { - { "xsvf", required_argument, 0, 'x' }, - { "device", required_argument, 0, 'd' }, - { "help", no_argument, 0, 'h' }, - { 0, 0, 0, 0 }, + {"xsvf", required_argument, 0, 'x'}, + {"device", required_argument, 0, 'd'}, + {"help", no_argument, 0, 'h'}, + {0, 0, 0, 0}, }; int parse_int(char* s, uint32_t* const value) @@ -57,7 +57,7 @@ int parse_int(char* s, uint32_t* const value) long long_value; if (strlen(s) > 2) { - if (s[0] == '0') { + if (s[0] == '0') { if ((s[1] == 'x') || (s[1] == 'X')) { base = 16; s += 2; @@ -100,8 +100,8 @@ int main(int argc, char** argv) ssize_t bytes_read; uint8_t* pdata = &data[0]; - while ((opt = getopt_long(argc, argv, "x:d:h?", long_options, - &option_index)) != EOF) { + while ((opt = getopt_long(argc, argv, "x:d:h?", long_options, &option_index)) != + EOF) { switch (opt) { case 'x': path = optarg; @@ -129,8 +129,7 @@ int main(int argc, char** argv) } infile = fopen(path, "rb"); - if (infile == NULL) - { + if (infile == NULL) { fprintf(stderr, "Failed to open file: %s\n", path); return EXIT_FAILURE; } @@ -150,10 +149,11 @@ int main(int argc, char** argv) total_length = length; bytes_read = fread(data, 1, total_length, infile); - if (bytes_read != total_length) - { - fprintf(stderr, "Failed to read all bytes (read %d bytes instead of %d bytes).\n", - (int)bytes_read, total_length); + if (bytes_read != total_length) { + fprintf(stderr, + "Failed to read all bytes (read %d bytes instead of %d bytes).\n", + (int) bytes_read, + total_length); fclose(infile); infile = NULL; return EXIT_FAILURE; @@ -161,25 +161,30 @@ int main(int argc, char** argv) result = hackrf_init(); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_init() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } result = hackrf_open_by_serial(serial_number, &device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_open() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } printf("LED1/2/3 blinking means CPLD program success.\nLED3/RED steady means error.\n"); printf("Wait message 'Write finished' or in case of LED3/RED steady, Power OFF/Disconnect the HackRF.\n"); result = hackrf_cpld_write(device, pdata, total_length); - if (result != HACKRF_SUCCESS) - { - fprintf(stderr, "hackrf_cpld_write() failed: %s (%d)\n", - hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_cpld_write() failed: %s (%d)\n", + hackrf_error_name(result), + result); fclose(infile); infile = NULL; return EXIT_FAILURE; @@ -190,10 +195,11 @@ int main(int argc, char** argv) fflush(stdout); result = hackrf_close(device); - if( result != HACKRF_SUCCESS ) - { - fprintf(stderr, "hackrf_close() failed: %s (%d)\n", - hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); fclose(infile); infile = NULL; return EXIT_FAILURE; diff --git a/host/hackrf-tools/src/hackrf_debug.c b/host/hackrf-tools/src/hackrf_debug.c index 83030153..138556e9 100644 --- a/host/hackrf-tools/src/hackrf_debug.c +++ b/host/hackrf-tools/src/hackrf_debug.c @@ -30,23 +30,24 @@ #ifndef bool typedef int bool; -#define true 1 -#define false 0 + #define true 1 + #define false 0 #endif #define REGISTER_INVALID 32767 -int parse_int(char* s, uint32_t* const value) { +int parse_int(char* s, uint32_t* const value) +{ uint_fast8_t base = 10; char* s_end; long long_value; - if( strlen(s) > 2 ) { - if( s[0] == '0' ) { - if( (s[1] == 'x') || (s[1] == 'X') ) { + if (strlen(s) > 2) { + if (s[0] == '0') { + if ((s[1] == 'x') || (s[1] == 'X')) { base = 16; s += 2; - } else if( (s[1] == 'b') || (s[1] == 'B') ) { + } else if ((s[1] == 'b') || (s[1] == 'B')) { base = 2; s += 2; } @@ -55,33 +56,38 @@ int parse_int(char* s, uint32_t* const value) { s_end = s; long_value = strtol(s, &s_end, base); - if( (s != s_end) && (*s_end == 0) ) { - *value = (uint32_t)long_value; + if ((s != s_end) && (*s_end == 0)) { + *value = (uint32_t) long_value; return HACKRF_SUCCESS; } else { return HACKRF_ERROR_INVALID_PARAM; } } -int max2837_read_register(hackrf_device* device, const uint16_t register_number) { +int max2837_read_register(hackrf_device* device, const uint16_t register_number) +{ uint16_t register_value; - int result = hackrf_max2837_read(device, (uint8_t)register_number, ®ister_value); - - if( result == HACKRF_SUCCESS ) { + int result = + hackrf_max2837_read(device, (uint8_t) register_number, ®ister_value); + + if (result == HACKRF_SUCCESS) { printf("[%2d] -> 0x%03x\n", register_number, register_value); } else { - printf("hackrf_max2837_read() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_max2837_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); } return result; } -int max2837_read_registers(hackrf_device* device) { +int max2837_read_registers(hackrf_device* device) +{ uint16_t register_number; int result = HACKRF_SUCCESS; - - for(register_number=0; register_number<32; register_number++) { + + for (register_number = 0; register_number < 32; register_number++) { result = max2837_read_register(device, register_number); - if( result != HACKRF_SUCCESS ) { + if (result != HACKRF_SUCCESS) { break; } } @@ -91,189 +97,203 @@ int max2837_read_registers(hackrf_device* device) { int max2837_write_register( hackrf_device* device, const uint16_t register_number, - const uint16_t register_value -) { + const uint16_t register_value) +{ int result = HACKRF_SUCCESS; - result = hackrf_max2837_write(device, (uint8_t)register_number, register_value); - - if( result == HACKRF_SUCCESS ) { + result = hackrf_max2837_write(device, (uint8_t) register_number, register_value); + + if (result == HACKRF_SUCCESS) { printf("0x%03x -> [%2d]\n", register_value, register_number); } else { - printf("hackrf_max2837_write() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_max2837_write() failed: %s (%d)\n", + hackrf_error_name(result), + result); } return result; } -int si5351c_read_register(hackrf_device* device, const uint16_t register_number) { +int si5351c_read_register(hackrf_device* device, const uint16_t register_number) +{ uint16_t register_value; int result = hackrf_si5351c_read(device, register_number, ®ister_value); - - if( result == HACKRF_SUCCESS ) { + + if (result == HACKRF_SUCCESS) { printf("[%3d] -> 0x%02x\n", register_number, register_value); } else { - printf("hackrf_si5351c_read() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_si5351c_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); } - + return result; } -int si5351c_read_registers(hackrf_device* device) { +int si5351c_read_registers(hackrf_device* device) +{ uint16_t register_number; int result = HACKRF_SUCCESS; - - for(register_number=0; register_number<256; register_number++) { + + for (register_number = 0; register_number < 256; register_number++) { result = si5351c_read_register(device, register_number); - if( result != HACKRF_SUCCESS ) { + if (result != HACKRF_SUCCESS) { break; } } - + return result; } int si5351c_write_register( hackrf_device* device, const uint16_t register_number, - const uint16_t register_value -) { + const uint16_t register_value) +{ int result = HACKRF_SUCCESS; result = hackrf_si5351c_write(device, register_number, register_value); - - if( result == HACKRF_SUCCESS ) { + + if (result == HACKRF_SUCCESS) { printf("0x%2x -> [%3d]\n", register_value, register_number); } else { - printf("hackrf_max2837_write() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_max2837_write() failed: %s (%d)\n", + hackrf_error_name(result), + result); } - + return result; } -#define SI5351C_CLK_POWERDOWN (1<<7) -#define SI5351C_CLK_INT_MODE (1<<6) -#define SI5351C_CLK_PLL_SRC (1<<5) -#define SI5351C_CLK_INV (1<<4) +#define SI5351C_CLK_POWERDOWN (1 << 7) +#define SI5351C_CLK_INT_MODE (1 << 6) +#define SI5351C_CLK_PLL_SRC (1 << 5) +#define SI5351C_CLK_INV (1 << 4) #define SI5351C_CLK_SRC_XTAL 0 #define SI5351C_CLK_SRC_CLKIN 1 #define SI5351C_CLK_SRC_MULTISYNTH_0_4 2 #define SI5351C_CLK_SRC_MULTISYNTH_SELF 3 -void print_clk_control(uint16_t clk_ctrl) { +void print_clk_control(uint16_t clk_ctrl) +{ uint8_t clk_src, clk_pwr; printf("\tclock control = \n"); - if(clk_ctrl & SI5351C_CLK_POWERDOWN) + if (clk_ctrl & SI5351C_CLK_POWERDOWN) printf("\t\tPower Down\n"); else printf("\t\tPower Up\n"); - if(clk_ctrl & SI5351C_CLK_INT_MODE) + if (clk_ctrl & SI5351C_CLK_INT_MODE) printf("\t\tInt Mode\n"); else printf("\t\tFrac Mode\n"); - if(clk_ctrl & SI5351C_CLK_PLL_SRC) + if (clk_ctrl & SI5351C_CLK_PLL_SRC) printf("\t\tPLL src B\n"); else printf("\t\tPLL src A\n"); - if(clk_ctrl & SI5351C_CLK_INV) + if (clk_ctrl & SI5351C_CLK_INV) printf("\t\tInverted\n"); clk_src = (clk_ctrl >> 2) & 0x3; switch (clk_src) { - case 0: - printf("\t\tXTAL\n"); - break; - case 1: - printf("\t\tCLKIN\n"); - break; - case 2: - printf("\t\tMULTISYNTH 0 4\n"); - break; - case 3: - printf("\t\tMULTISYNTH SELF\n"); - break; + case 0: + printf("\t\tXTAL\n"); + break; + case 1: + printf("\t\tCLKIN\n"); + break; + case 2: + printf("\t\tMULTISYNTH 0 4\n"); + break; + case 3: + printf("\t\tMULTISYNTH SELF\n"); + break; } clk_pwr = clk_ctrl & 0x3; switch (clk_pwr) { - case 0: - printf("\t\t2 mA\n"); - break; - case 1: - printf("\t\t4 mA\n"); - break; - case 2: - printf("\t\t6 mA\n"); - break; - case 3: - printf("\t\t8 mA\n"); - break; + case 0: + printf("\t\t2 mA\n"); + break; + case 1: + printf("\t\t4 mA\n"); + break; + case 2: + printf("\t\t6 mA\n"); + break; + case 3: + printf("\t\t8 mA\n"); + break; } } -int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number) { +int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_number) +{ uint_fast8_t i, reg_base, reg_number; uint16_t parameters[8], clk_control; - uint32_t p1,p2,p3,r_div; - uint_fast8_t div_lut[] = {1,2,4,8,16,32,64,128}; + uint32_t p1, p2, p3, r_div; + uint_fast8_t div_lut[] = {1, 2, 4, 8, 16, 32, 64, 128}; int result; printf("MS%d:", ms_number); - result = hackrf_si5351c_read(device, 16+ms_number, &clk_control); - if( result != HACKRF_SUCCESS ) { + result = hackrf_si5351c_read(device, 16 + ms_number, &clk_control); + if (result != HACKRF_SUCCESS) { return result; } print_clk_control(clk_control); - if(ms_number <6){ + if (ms_number < 6) { reg_base = 42 + (ms_number * 8); - for(i=0; i<8; i++) { + for (i = 0; i < 8; i++) { reg_number = reg_base + i; result = hackrf_si5351c_read(device, reg_number, ¶meters[i]); - if( result != HACKRF_SUCCESS ) { + if (result != HACKRF_SUCCESS) { return result; } } - p1 = ((parameters[2] & 0x03) << 16) - | (parameters[3] << 8) - | parameters[4]; - p2 = ((parameters[5] & 0x0F) << 16) - | (parameters[6] << 8) - | parameters[7]; - p3 = ((parameters[5] & 0xF0) << 12) - | (parameters[0] << 8) - | parameters[1]; + p1 = ((parameters[2] & 0x03) << 16) | (parameters[3] << 8) | + parameters[4]; + p2 = ((parameters[5] & 0x0F) << 16) | (parameters[6] << 8) | + parameters[7]; + p3 = ((parameters[5] & 0xF0) << 12) | (parameters[0] << 8) | + parameters[1]; r_div = (parameters[2] >> 4) & 0x7; printf("\tp1 = %u\n", p1); printf("\tp2 = %u\n", p2); printf("\tp3 = %u\n", p3); - if(p3) - printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", ((double)800 / (double)(((double)p1*p3 + p2 + 512*p3)/(double)(128*p3))) / div_lut[r_div] ); + if (p3) + printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", + ((double) 800 / + (double) (((double) p1 * p3 + p2 + 512 * p3) / (double) (128 * p3))) / + div_lut[r_div]); } else { // MS6 and 7 are integer only unsigned int parms; reg_base = 90; - for(i=0; i<3; i++) { + for (i = 0; i < 3; i++) { uint_fast8_t reg_number = reg_base + i; - int result = hackrf_si5351c_read(device, reg_number, ¶meters[i]); - if( result != HACKRF_SUCCESS ) { + int result = + hackrf_si5351c_read(device, reg_number, ¶meters[i]); + if (result != HACKRF_SUCCESS) { return result; } } - r_div = (ms_number == 6) ? parameters[2] & 0x7 : (parameters[2] & 0x70) >> 4 ; + r_div = (ms_number == 6) ? parameters[2] & 0x7 : + (parameters[2] & 0x70) >> 4; parms = (ms_number == 6) ? parameters[0] : parameters[1]; printf("\tp1_int = %u\n", parms); - if(parms) - printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", (800.0f / parms) / div_lut[r_div] ); + if (parms) + printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", + (800.0f / parms) / div_lut[r_div]); } printf("\toutput divider = %u\n", div_lut[r_div]); return HACKRF_SUCCESS; } -int si5351c_read_configuration(hackrf_device* device) { +int si5351c_read_configuration(hackrf_device* device) +{ uint_fast8_t ms_number; int result; - - for(ms_number=0; ms_number<8; ms_number++) { + + for (ms_number = 0; ms_number < 8; ms_number++) { result = si5351c_read_multisynth_config(device, ms_number); - if( result != HACKRF_SUCCESS ) { + if (result != HACKRF_SUCCESS) { return result; } } @@ -287,47 +307,54 @@ int si5351c_read_configuration(hackrf_device* device) { * we use that name here and present it to the user. */ -int rffc5072_read_register(hackrf_device* device, const uint16_t register_number) { +int rffc5072_read_register(hackrf_device* device, const uint16_t register_number) +{ uint16_t register_value; - int result = hackrf_rffc5071_read(device, (uint8_t)register_number, ®ister_value); - - if( result == HACKRF_SUCCESS ) { + int result = + hackrf_rffc5071_read(device, (uint8_t) register_number, ®ister_value); + + if (result == HACKRF_SUCCESS) { printf("[%2d] -> 0x%03x\n", register_number, register_value); } else { - printf("hackrf_rffc5071_read() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_rffc5071_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); } - + return result; } -int rffc5072_read_registers(hackrf_device* device) { +int rffc5072_read_registers(hackrf_device* device) +{ uint16_t register_number; int result = HACKRF_SUCCESS; - - for(register_number=0; register_number<31; register_number++) { + + for (register_number = 0; register_number < 31; register_number++) { result = rffc5072_read_register(device, register_number); - if( result != HACKRF_SUCCESS ) { + if (result != HACKRF_SUCCESS) { break; } } - + return result; } int rffc5072_write_register( hackrf_device* device, const uint16_t register_number, - const uint16_t register_value -) { + const uint16_t register_value) +{ int result = HACKRF_SUCCESS; - result = hackrf_rffc5071_write(device, (uint8_t)register_number, register_value); - - if( result == HACKRF_SUCCESS ) { + result = hackrf_rffc5071_write(device, (uint8_t) register_number, register_value); + + if (result == HACKRF_SUCCESS) { printf("0x%03x -> [%2d]\n", register_value, register_number); } else { - printf("hackrf_rffc5071_write() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_rffc5071_write() failed: %s (%d)\n", + hackrf_error_name(result), + result); } - + return result; } @@ -338,69 +365,79 @@ enum parts { PART_RFFC5072 = 3, }; -int read_register(hackrf_device* device, uint8_t part, - const uint16_t register_number) { +int read_register(hackrf_device* device, uint8_t part, const uint16_t register_number) +{ switch (part) { - case PART_MAX2837: - return max2837_read_register(device, register_number); - case PART_SI5351C: - return si5351c_read_register(device, register_number); - case PART_RFFC5072: - return rffc5072_read_register(device, register_number); + case PART_MAX2837: + return max2837_read_register(device, register_number); + case PART_SI5351C: + return si5351c_read_register(device, register_number); + case PART_RFFC5072: + return rffc5072_read_register(device, register_number); } return HACKRF_ERROR_INVALID_PARAM; } -int read_registers(hackrf_device* device, uint8_t part) { +int read_registers(hackrf_device* device, uint8_t part) +{ switch (part) { - case PART_MAX2837: - return max2837_read_registers(device); - case PART_SI5351C: - return si5351c_read_registers(device); - case PART_RFFC5072: - return rffc5072_read_registers(device); + case PART_MAX2837: + return max2837_read_registers(device); + case PART_SI5351C: + return si5351c_read_registers(device); + case PART_RFFC5072: + return rffc5072_read_registers(device); } return HACKRF_ERROR_INVALID_PARAM; } -int write_register(hackrf_device* device, uint8_t part, - const uint16_t register_number, - const uint16_t register_value) { +int write_register( + hackrf_device* device, + uint8_t part, + const uint16_t register_number, + const uint16_t register_value) +{ switch (part) { - case PART_MAX2837: - return max2837_write_register(device, register_number, register_value); - case PART_SI5351C: - return si5351c_write_register(device, register_number, register_value); - case PART_RFFC5072: - return rffc5072_write_register(device, register_number, register_value); + case PART_MAX2837: + return max2837_write_register(device, register_number, register_value); + case PART_SI5351C: + return si5351c_write_register(device, register_number, register_value); + case PART_RFFC5072: + return rffc5072_write_register(device, register_number, register_value); } return HACKRF_ERROR_INVALID_PARAM; } -static const char * mode_name(uint32_t mode) { - const char *mode_names[] = {"IDLE", "WAIT", "RX", "TX_START", "TX_RUN"}; +static const char* mode_name(uint32_t mode) +{ + const char* mode_names[] = {"IDLE", "WAIT", "RX", "TX_START", "TX_RUN"}; const uint32_t num_modes = sizeof(mode_names) / sizeof(mode_names[0]); if (mode < num_modes) - return mode_names[mode]; + return mode_names[mode]; else - return "UNKNOWN"; + return "UNKNOWN"; } -static const char * error_name(uint32_t error) { - const char *error_names[] = {"NONE", "RX_TIMEOUT", "TX_TIMEOUT"}; +static const char* error_name(uint32_t error) +{ + const char* error_names[] = {"NONE", "RX_TIMEOUT", "TX_TIMEOUT"}; const uint32_t num_errors = sizeof(error_names) / sizeof(error_names[0]); if (error < num_errors) - return error_names[error]; + return error_names[error]; else - return "UNKNOWN"; + return "UNKNOWN"; } -static void print_state(hackrf_m0_state *state) { +static void print_state(hackrf_m0_state* state) +{ printf("M0 state:\n"); printf("Requested mode: %u (%s) [%s]\n", - state->requested_mode, mode_name(state->requested_mode), - state->request_flag ? "pending" : "complete"); - printf("Active mode: %u (%s)\n", state->active_mode, mode_name(state->active_mode)); + state->requested_mode, + mode_name(state->requested_mode), + state->request_flag ? "pending" : "complete"); + printf("Active mode: %u (%s)\n", + state->active_mode, + mode_name(state->active_mode)); printf("M0 count: %u bytes\n", state->m0_count); printf("M4 count: %u bytes\n", state->m4_count); printf("Number of shortfalls: %u\n", state->num_shortfalls); @@ -411,7 +448,8 @@ static void print_state(hackrf_m0_state *state) { printf("Error: %u (%s)\n", state->error, error_name(state->error)); } -static void usage() { +static void usage() +{ printf("\nUsage:\n"); printf("\t-h, --help: this help\n"); printf("\t-n, --register : set register number for read/write operations\n"); @@ -435,23 +473,24 @@ static void usage() { } static struct option long_options[] = { - { "config", no_argument, 0, 'c' }, - { "register", required_argument, 0, 'n' }, - { "write", required_argument, 0, 'w' }, - { "read", no_argument, 0, 'r' }, - { "device", no_argument, 0, 'd' }, - { "help", no_argument, 0, 'h' }, - { "max2837", no_argument, 0, 'm' }, - { "si5351c", no_argument, 0, 's' }, - { "rffc5072", no_argument, 0, 'f' }, - { "state", no_argument, 0, 'S' }, - { "tx-underrun-limit", required_argument, 0, 'T' }, - { "rx-overrun-limit", required_argument, 0, 'R' }, - { "ui", required_argument, 0, 'u' }, - { 0, 0, 0, 0 }, + {"config", no_argument, 0, 'c'}, + {"register", required_argument, 0, 'n'}, + {"write", required_argument, 0, 'w'}, + {"read", no_argument, 0, 'r'}, + {"device", no_argument, 0, 'd'}, + {"help", no_argument, 0, 'h'}, + {"max2837", no_argument, 0, 'm'}, + {"si5351c", no_argument, 0, 's'}, + {"rffc5072", no_argument, 0, 'f'}, + {"state", no_argument, 0, 'S'}, + {"tx-underrun-limit", required_argument, 0, 'T'}, + {"rx-overrun-limit", required_argument, 0, 'R'}, + {"ui", required_argument, 0, 'u'}, + {0, 0, 0, 0}, }; -int main(int argc, char** argv) { +int main(int argc, char** argv) +{ int opt; uint32_t register_number = REGISTER_INVALID; uint32_t register_value; @@ -471,17 +510,24 @@ int main(int argc, char** argv) { bool set_rx_limit = false; int result = hackrf_init(); - if(result) { - printf("hackrf_init() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - while( (opt = getopt_long(argc, argv, "n:rw:d:cmsfST:R:h?u:", long_options, &option_index)) != EOF ) { - switch( opt ) { + while ((opt = getopt_long( + argc, + argv, + "n:rw:d:cmsfST:R:h?u:", + long_options, + &option_index)) != EOF) { + switch (opt) { case 'n': result = parse_int(optarg, ®ister_number); break; - + case 'w': write = true; result = parse_int(optarg, ®ister_value); @@ -490,7 +536,7 @@ int main(int argc, char** argv) { case 'r': read = true; break; - + case 'c': dump_config = true; break; @@ -511,25 +557,25 @@ int main(int argc, char** argv) { case 'd': serial_number = optarg; break; - + case 'm': - if(part != PART_NONE) { + if (part != PART_NONE) { fprintf(stderr, "Only one part can be specified.'\n"); return EXIT_FAILURE; } part = PART_MAX2837; break; - + case 's': - if(part != PART_NONE) { + if (part != PART_NONE) { fprintf(stderr, "Only one part can be specified.'\n"); return EXIT_FAILURE; } part = PART_SI5351C; break; - + case 'f': - if(part != PART_NONE) { + if (part != PART_NONE) { fprintf(stderr, "Only one part can be specified.'\n"); return EXIT_FAILURE; } @@ -551,101 +597,115 @@ int main(int argc, char** argv) { return EXIT_FAILURE; } - if(result != HACKRF_SUCCESS) { - printf("argument error: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + printf("argument error: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } } - if(write && read) { + if (write && read) { fprintf(stderr, "Read and write options are mutually exclusive.\n"); usage(); return EXIT_FAILURE; } - if(write && dump_config) { + if (write && dump_config) { fprintf(stderr, "Config and write options are mutually exclusive.\n"); usage(); return EXIT_FAILURE; } - if(dump_config && part != PART_SI5351C) { + if (dump_config && part != PART_SI5351C) { fprintf(stderr, "Config option is only valid for SI5351C.\n"); usage(); return EXIT_FAILURE; } - if(!(write || read || dump_config || dump_state || set_tx_limit || set_rx_limit || set_ui)) { + if (!(write || read || dump_config || dump_state || set_tx_limit || + set_rx_limit || set_ui)) { fprintf(stderr, "Specify read, write, or config option.\n"); usage(); return EXIT_FAILURE; } - if(part == PART_NONE && !set_ui && !dump_state && !set_tx_limit && !set_rx_limit) { + if (part == PART_NONE && !set_ui && !dump_state && !set_tx_limit && + !set_rx_limit) { fprintf(stderr, "Specify a part to read, write, or print config from.\n"); usage(); return EXIT_FAILURE; } result = hackrf_open_by_serial(serial_number, &device); - if(result) { - printf("hackrf_open() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - if(write) { + if (write) { result = write_register(device, part, register_number, register_value); } - if(read) { - if(register_number == REGISTER_INVALID) { + if (read) { + if (register_number == REGISTER_INVALID) { result = read_registers(device, part); } else { result = read_register(device, part, register_number); } } - if(dump_config) { + if (dump_config) { si5351c_read_configuration(device); } if (set_tx_limit) { result = hackrf_set_tx_underrun_limit(device, tx_limit); - if(result != HACKRF_SUCCESS) { - printf("hackrf_set_tx_underrun_limit() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + printf("hackrf_set_tx_underrun_limit() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } } if (set_rx_limit) { result = hackrf_set_rx_overrun_limit(device, rx_limit); - if(result != HACKRF_SUCCESS) { - printf("hackrf_set_rx_overrun_limit() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + printf("hackrf_set_rx_overrun_limit() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } } - if(dump_state) { + if (dump_state) { hackrf_m0_state state; result = hackrf_get_m0_state(device, &state); - if(result != HACKRF_SUCCESS) { - printf("hackrf_get_m0_state() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + printf("hackrf_get_m0_state() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } print_state(&state); } - if(set_ui) { + if (set_ui) { result = hackrf_set_ui_enable(device, ui_enable); } result = hackrf_close(device); - if(result) { - printf("hackrf_close() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } hackrf_exit(); - return EXIT_SUCCESS; + return EXIT_SUCCESS; } diff --git a/host/hackrf-tools/src/hackrf_info.c b/host/hackrf-tools/src/hackrf_info.c index c151d649..e726c014 100644 --- a/host/hackrf-tools/src/hackrf_info.c +++ b/host/hackrf-tools/src/hackrf_info.c @@ -34,44 +34,49 @@ int main(void) uint16_t usb_version; read_partid_serialno_t read_partid_serialno; uint8_t operacakes[8]; - hackrf_device_list_t *list; + hackrf_device_list_t* list; hackrf_device* device; int i, j; result = hackrf_init(); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_init() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } printf("hackrf_info version: %s\n", TOOL_RELEASE); - printf("libhackrf version: %s (%s)\n", hackrf_library_release(), - hackrf_library_version()); - + printf("libhackrf version: %s (%s)\n", + hackrf_library_release(), + hackrf_library_version()); + list = hackrf_device_list(); - - if (list->devicecount < 1 ) { + + if (list->devicecount < 1) { printf("No HackRF boards found.\n"); return EXIT_FAILURE; } - + for (i = 0; i < list->devicecount; i++) { if (i > 0) printf("\n"); - + printf("Found HackRF\n"); printf("Index: %d\n", i); - + if (list->serial_numbers[i]) printf("Serial number: %s\n", list->serial_numbers[i]); device = NULL; result = hackrf_device_list_open(list, i, &device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_open() failed: %s (%d)\n", - hackrf_error_name(result), result); - if(result == HACKRF_ERROR_LIBUSB) { + fprintf(stderr, + "hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); + if (result == HACKRF_ERROR_LIBUSB) { continue; } return EXIT_FAILURE; @@ -79,73 +84,92 @@ int main(void) result = hackrf_board_id_read(device, &board_id); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_board_id_read() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_board_id_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - printf("Board ID Number: %d (%s)\n", board_id, - hackrf_board_id_name(board_id)); + printf("Board ID Number: %d (%s)\n", + board_id, + hackrf_board_id_name(board_id)); result = hackrf_version_string_read(device, &version[0], 255); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_version_string_read() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_version_string_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } result = hackrf_usb_api_version_read(device, &usb_version); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_usb_api_version_read() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_usb_api_version_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - printf("Firmware Version: %s (API:%x.%02x)\n", version, - (usb_version>>8)&0xFF, usb_version&0xFF); + printf("Firmware Version: %s (API:%x.%02x)\n", + version, + (usb_version >> 8) & 0xFF, + usb_version & 0xFF); - result = hackrf_board_partid_serialno_read(device, &read_partid_serialno); + result = hackrf_board_partid_serialno_read(device, &read_partid_serialno); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_board_partid_serialno_read() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_board_partid_serialno_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - printf("Part ID Number: 0x%08x 0x%08x\n", - read_partid_serialno.part_id[0], - read_partid_serialno.part_id[1]); + printf("Part ID Number: 0x%08x 0x%08x\n", + read_partid_serialno.part_id[0], + read_partid_serialno.part_id[1]); result = hackrf_get_operacake_boards(device, &operacakes[0]); - if ((result != HACKRF_SUCCESS) && (result != HACKRF_ERROR_USB_API_VERSION)) { - fprintf(stderr, "hackrf_get_operacake_boards() failed: %s (%d)\n", - hackrf_error_name(result), result); - return EXIT_FAILURE; + if ((result != HACKRF_SUCCESS) && + (result != HACKRF_ERROR_USB_API_VERSION)) { + fprintf(stderr, + "hackrf_get_operacake_boards() failed: %s (%d)\n", + hackrf_error_name(result), + result); + return EXIT_FAILURE; } - if(result == HACKRF_SUCCESS) { - for(j=0; j<8; j++) { - if(operacakes[j] == HACKRF_OPERACAKE_ADDRESS_INVALID) + if (result == HACKRF_SUCCESS) { + for (j = 0; j < 8; j++) { + if (operacakes[j] == HACKRF_OPERACAKE_ADDRESS_INVALID) break; printf("Opera Cake found, address: %d\n", operacakes[j]); } } - + #ifdef HACKRF_ISSUE_609_IS_FIXED uint32_t cpld_crc = 0; result = hackrf_cpld_checksum(device, &cpld_crc); - if ((result != HACKRF_SUCCESS) && (result != HACKRF_ERROR_USB_API_VERSION)) { - fprintf(stderr, "hackrf_cpld_checksum() failed: %s (%d)\n", - hackrf_error_name(result), result); - return EXIT_FAILURE; + if ((result != HACKRF_SUCCESS) && + (result != HACKRF_ERROR_USB_API_VERSION)) { + fprintf(stderr, + "hackrf_cpld_checksum() failed: %s (%d)\n", + hackrf_error_name(result), + result); + return EXIT_FAILURE; } - if(result == HACKRF_SUCCESS) { + if (result == HACKRF_SUCCESS) { printf("CPLD checksum: 0x%08x\n", cpld_crc); } #endif /* HACKRF_ISSUE_609_IS_FIXED */ result = hackrf_close(device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_close() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); } } - + hackrf_device_list_free(list); hackrf_exit(); diff --git a/host/hackrf-tools/src/hackrf_operacake.c b/host/hackrf-tools/src/hackrf_operacake.c index 763a673a..7da90a70 100644 --- a/host/hackrf-tools/src/hackrf_operacake.c +++ b/host/hackrf-tools/src/hackrf_operacake.c @@ -28,20 +28,21 @@ #ifndef bool typedef int bool; -#define true 1 -#define false 0 + #define true 1 + #define false 0 #endif #define FREQ_MIN_MHZ (0) /* 0 MHz */ #define FREQ_MAX_MHZ (7250) /* 7250 MHz */ #define INVALID_ADDRESS 0xFF -#define INVALID_MODE 0xFF -#define INVALID_PORT 0xFF +#define INVALID_MODE 0xFF +#define INVALID_PORT 0xFF #define GPIO_TEST_DISABLED 0xFFFF -static void usage() { +static void usage() +{ printf("\nUsage:\n"); printf("\t-h, --help: this help\n"); printf("\t-d, --device : specify a particular device by serial number\n"); @@ -57,54 +58,57 @@ static void usage() { } static struct option long_options[] = { - { "device", required_argument, 0, 'd' }, - { "address", required_argument, 0, 'o' }, - { "mode", required_argument, 0, 'm' }, - { "list", no_argument, 0, 'l' }, - { "gpio_test", no_argument, 0, 'g' }, - { "help", no_argument, 0, 'h' }, - { 0, 0, 0, 0 }, + {"device", required_argument, 0, 'd'}, + {"address", required_argument, 0, 'o'}, + {"mode", required_argument, 0, 'm'}, + {"list", no_argument, 0, 'l'}, + {"gpio_test", no_argument, 0, 'g'}, + {"help", no_argument, 0, 'h'}, + {0, 0, 0, 0}, }; -int parse_uint16(char* const s, uint16_t* const value) { +int parse_uint16(char* const s, uint16_t* const value) +{ char* s_end = s; const long long_value = strtol(s, &s_end, 10); - if( (s != s_end) && (*s_end == 0) ) { - *value = (uint16_t)long_value; + if ((s != s_end) && (*s_end == 0)) { + *value = (uint16_t) long_value; return HACKRF_SUCCESS; } else { return HACKRF_ERROR_INVALID_PARAM; } } -int parse_uint32(char* const s, uint32_t* const value) { +int parse_uint32(char* const s, uint32_t* const value) +{ char* s_end = s; const long long_value = strtol(s, &s_end, 10); - if( (s != s_end) && (*s_end == 0) ) { - *value = (uint32_t)long_value; + if ((s != s_end) && (*s_end == 0)) { + *value = (uint32_t) long_value; return HACKRF_SUCCESS; } else { return HACKRF_ERROR_INVALID_PARAM; } } -int parse_port(char* str, uint8_t* port) { +int parse_port(char* str, uint8_t* port) +{ uint16_t tmp_port; int result; - if(str[0] == 'A' || str[0] == 'B') { + if (str[0] == 'A' || str[0] == 'B') { // The port was specified as a side and number eg. A1 or B3 - result = parse_uint16(str+1, &tmp_port); + result = parse_uint16(str + 1, &tmp_port); if (result != HACKRF_SUCCESS) return result; - if(tmp_port >= 5 || tmp_port <= 0) { + if (tmp_port >= 5 || tmp_port <= 0) { fprintf(stderr, "invalid port: %s\n", str); return HACKRF_ERROR_INVALID_PARAM; } // Value was a valid port between 0-4 - if(str[0] == 'A') { + if (str[0] == 'A') { // A1=0, A2=1, A3=2, A4=3 tmp_port -= 1; } else { @@ -122,7 +126,8 @@ int parse_port(char* str, uint8_t* port) { return HACKRF_SUCCESS; } -int parse_range(char* s, hackrf_operacake_freq_range* range) { +int parse_range(char* s, hackrf_operacake_freq_range* range) +{ char port[16]; float min; float max; @@ -141,7 +146,8 @@ int parse_range(char* s, hackrf_operacake_freq_range* range) { return HACKRF_ERROR_INVALID_PARAM; } -int parse_dwell(char* s, hackrf_operacake_dwell_time* dwell_time) { +int parse_dwell(char* s, hackrf_operacake_dwell_time* dwell_time) +{ int result; char port[16]; float dwell; @@ -156,7 +162,7 @@ int parse_dwell(char* s, hackrf_operacake_dwell_time* dwell_time) { fprintf(stderr, "dwell time cannot be 0\n"); return HACKRF_ERROR_INVALID_PARAM; } - dwell_time->dwell = (uint32_t)dwell; + dwell_time->dwell = (uint32_t) dwell; return HACKRF_SUCCESS; } else if (sscanf(s, "%15[^:]", port) == 1) { result = parse_port(port, &dwell_time->port); @@ -170,7 +176,8 @@ int parse_dwell(char* s, hackrf_operacake_dwell_time* dwell_time) { return HACKRF_ERROR_INVALID_PARAM; } -int main(int argc, char** argv) { +int main(int argc, char** argv) +{ int opt; const char* serial_number = NULL; uint8_t operacake_address = 0; @@ -193,13 +200,20 @@ int main(int argc, char** argv) { uint32_t default_dwell = 0; int result = hackrf_init(); - if( result ) { - printf("hackrf_init() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); return -1; } - while( (opt = getopt_long(argc, argv, "d:o:a:m:b:lf:t:w:hg?", long_options, &option_index)) != EOF ) { - switch( opt ) { + while ((opt = getopt_long( + argc, + argv, + "d:o:a:m:b:lf:t:w:hg?", + long_options, + &option_index)) != EOF) { + switch (opt) { case 'd': serial_number = optarg; break; @@ -220,7 +234,7 @@ int main(int argc, char** argv) { set_mode = true; } else { fprintf(stderr, - "argument error: mode must be one of [manual, frequency, time].\n"); + "argument error: mode must be one of [manual, frequency, time].\n"); usage(); return EXIT_FAILURE; } @@ -229,8 +243,8 @@ int main(int argc, char** argv) { case 'f': if (HACKRF_OPERACAKE_MAX_FREQ_RANGES == range_idx) { fprintf(stderr, - "argument error: specify a maximum of %u frequency ranges.\n", - HACKRF_OPERACAKE_MAX_FREQ_RANGES); + "argument error: specify a maximum of %u frequency ranges.\n", + HACKRF_OPERACAKE_MAX_FREQ_RANGES); usage(); return EXIT_FAILURE; } @@ -239,16 +253,16 @@ int main(int argc, char** argv) { fprintf(stderr, "failed to parse range\n"); return EXIT_FAILURE; } - if(ranges[range_idx].freq_min >= ranges[range_idx].freq_max) { + if (ranges[range_idx].freq_min >= ranges[range_idx].freq_max) { fprintf(stderr, - "argument error: freq_max must be greater than freq_min.\n"); + "argument error: freq_max must be greater than freq_min.\n"); usage(); return EXIT_FAILURE; } - if(FREQ_MAX_MHZ < ranges[range_idx].freq_max) { + if (FREQ_MAX_MHZ < ranges[range_idx].freq_max) { fprintf(stderr, - "argument error: freq_max may not be higher than %u.\n", - FREQ_MAX_MHZ); + "argument error: freq_max may not be higher than %u.\n", + FREQ_MAX_MHZ); usage(); return EXIT_FAILURE; } @@ -256,10 +270,10 @@ int main(int argc, char** argv) { break; case 't': - if(HACKRF_OPERACAKE_MAX_DWELL_TIMES == dwell_idx) { + if (HACKRF_OPERACAKE_MAX_DWELL_TIMES == dwell_idx) { fprintf(stderr, - "argument error: specify a maximum of %u dwell times.\n", - HACKRF_OPERACAKE_MAX_DWELL_TIMES); + "argument error: specify a maximum of %u dwell times.\n", + HACKRF_OPERACAKE_MAX_DWELL_TIMES); usage(); return EXIT_FAILURE; } @@ -325,30 +339,36 @@ int main(int argc, char** argv) { result = hackrf_open_by_serial(serial_number, &device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_open() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } if (set_mode) { result = hackrf_set_operacake_mode(device, operacake_address, mode); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_set_operacake_mode() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_set_operacake_mode() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } } - if(list) { + if (list) { result = hackrf_get_operacake_boards(device, operacakes); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_get_operacake_boards() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_get_operacake_boards() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } printf("Opera Cakes found: "); - for(i=0; i<8; i++) { - if(operacakes[i] != HACKRF_OPERACAKE_ADDRESS_INVALID) { + for (i = 0; i < 8; i++) { + if (operacakes[i] != HACKRF_OPERACAKE_ADDRESS_INVALID) { printf("\n\tAddress: %d", operacakes[i]); enum operacake_switching_mode mode; hackrf_get_operacake_mode(device, i, &mode); @@ -365,84 +385,102 @@ int main(int argc, char** argv) { operacake_count++; } } - if(!operacake_count) + if (!operacake_count) printf("None"); printf("\n"); } - if(gpio_test) { + if (gpio_test) { uint16_t test_result; uint8_t reg, mask = 0x7; - result = hackrf_operacake_gpio_test(device, operacake_address, &test_result); + result = hackrf_operacake_gpio_test( + device, + operacake_address, + &test_result); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_operacake_gpio_test() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_operacake_gpio_test() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - - if(test_result == GPIO_TEST_DISABLED) { + + if (test_result == GPIO_TEST_DISABLED) { fprintf(stderr, "GPIO mode diabled.\n"); fprintf(stderr, "Remove additional addon boards and retry.\n"); - }else if(test_result) { + } else if (test_result) { fprintf(stderr, "GPIO test failed\n"); fprintf(stderr, "Pin\tHigh\tShorts\tLow\n"); reg = test_result & mask; - fprintf(stderr, "u2ctrl1\t%d\t%d\t%d\n", - (reg>>2) & 1, - (reg>>1) & 1, - reg & 1); + fprintf(stderr, + "u2ctrl1\t%d\t%d\t%d\n", + (reg >> 2) & 1, + (reg >> 1) & 1, + reg & 1); test_result >>= 3; reg = test_result & mask; - fprintf(stderr, "u2ctrl0\t%d\t%d\t%d\n", - (reg>>2) & 1, - (reg>>1) & 1, - reg & 1); + fprintf(stderr, + "u2ctrl0\t%d\t%d\t%d\n", + (reg >> 2) & 1, + (reg >> 1) & 1, + reg & 1); test_result >>= 3; reg = test_result & mask; - fprintf(stderr, "u3ctrl1\t%d\t%d\t%d\n", - (reg>>2) & 1, - (reg>>1) & 1, - reg & 1); + fprintf(stderr, + "u3ctrl1\t%d\t%d\t%d\n", + (reg >> 2) & 1, + (reg >> 1) & 1, + reg & 1); test_result >>= 3; reg = test_result & mask; - fprintf(stderr, "u3ctrl0\t%d\t%d\t%d\n", - (reg>>2) & 1, - (reg>>1) & 1, - reg & 1); + fprintf(stderr, + "u3ctrl0\t%d\t%d\t%d\n", + (reg >> 2) & 1, + (reg >> 1) & 1, + reg & 1); test_result >>= 3; reg = test_result & mask; - fprintf(stderr, "u1ctrl \t%d\t%d\t%d\n", - (reg>>2) & 1, - (reg>>1) & 1, - reg & 1); + fprintf(stderr, + "u1ctrl \t%d\t%d\t%d\n", + (reg >> 2) & 1, + (reg >> 1) & 1, + reg & 1); } else { fprintf(stderr, "GPIO test passed\n"); } } - if(set_ports) { + if (set_ports) { // Set other port to "don't care" if not set - if(port_a == INVALID_PORT) { - if(port_b >= 4) { + if (port_a == INVALID_PORT) { + if (port_b >= 4) { port_a = 0; } else { port_a = 4; } } - if(port_b == INVALID_PORT) { - if(port_a >= 4) { + if (port_b == INVALID_PORT) { + if (port_a >= 4) { port_b = 0; } else { port_b = 4; } } - if(((port_a<=3) && (port_b<=3)) || ((port_a>=4) && (port_b>=4))) { - fprintf(stderr, "Port A and B cannot be connected to the same side\n"); - return EXIT_FAILURE; + if (((port_a <= 3) && (port_b <= 3)) || + ((port_a >= 4) && (port_b >= 4))) { + fprintf(stderr, + "Port A and B cannot be connected to the same side\n"); + return EXIT_FAILURE; } - result = hackrf_set_operacake_ports(device, operacake_address, port_a, port_b); - if( result ) { - printf("hackrf_set_operacake_ports() failed: %s (%d)\n", hackrf_error_name(result), result); + result = hackrf_set_operacake_ports( + device, + operacake_address, + port_a, + port_b); + if (result) { + printf("hackrf_set_operacake_ports() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } } @@ -450,16 +488,19 @@ int main(int argc, char** argv) { if (range_idx) { result = hackrf_set_operacake_freq_ranges(device, ranges, range_idx); if (result) { - printf("hackrf_set_operacake_freq_ranges() failed: %s (%d)\n", hackrf_error_name(result), result); + printf("hackrf_set_operacake_freq_ranges() failed: %s (%d)\n", + hackrf_error_name(result), + result); return -1; } } - if(dwell_idx) { + if (dwell_idx) { for (i = 0; i < dwell_idx; i++) { if (dwell_times[i].dwell == 0) { if (default_dwell == 0) { - fprintf(stderr, "port '%u' set to use default dwell time, but default dwell time is not set. Use -w argument to set default dwell time.\n", + fprintf(stderr, + "port '%u' set to use default dwell time, but default dwell time is not set. Use -w argument to set default dwell time.\n", dwell_times[i].port); return EXIT_FAILURE; } @@ -467,15 +508,19 @@ int main(int argc, char** argv) { } } result = hackrf_set_operacake_dwell_times(device, dwell_times, dwell_idx); - if( result ) { - printf("hackrf_set_operacake_dwell_times() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_set_operacake_dwell_times() failed: %s (%d)\n", + hackrf_error_name(result), + result); return -1; } } result = hackrf_close(device); - if( result ) { - printf("hackrf_close() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result) { + printf("hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); return -1; } hackrf_exit(); diff --git a/host/hackrf-tools/src/hackrf_spiflash.c b/host/hackrf-tools/src/hackrf_spiflash.c index c4f525e8..105f2211 100644 --- a/host/hackrf-tools/src/hackrf_spiflash.c +++ b/host/hackrf-tools/src/hackrf_spiflash.c @@ -31,34 +31,34 @@ #ifndef bool typedef int bool; -#define true 1 -#define false 0 + #define true 1 + #define false 0 #endif #ifdef _MSC_VER -#ifdef _WIN64 + #ifdef _WIN64 typedef int64_t ssize_t; -#else + #else typedef int32_t ssize_t; -#endif + #endif #endif /* 8 Mbit flash */ #define MAX_LENGTH 0x100000 static struct option long_options[] = { - { "address", required_argument, 0, 'a' }, - { "length", required_argument, 0, 'l' }, - { "read", required_argument, 0, 'r' }, - { "write", required_argument, 0, 'w' }, - { "compatibility", no_argument, 0, 'c' }, - { "device", required_argument, 0, 'd' }, - { "reset", no_argument, 0, 'R' }, - { "status", no_argument, 0, 's' }, - { "clear", no_argument, 0, 'c' }, - { "verbose", no_argument, 0, 'v' }, - { "help", no_argument, 0, 'h' }, - { 0, 0, 0, 0 }, + {"address", required_argument, 0, 'a'}, + {"length", required_argument, 0, 'l'}, + {"read", required_argument, 0, 'r'}, + {"write", required_argument, 0, 'w'}, + {"compatibility", no_argument, 0, 'c'}, + {"device", required_argument, 0, 'd'}, + {"reset", no_argument, 0, 'R'}, + {"status", no_argument, 0, 's'}, + {"clear", no_argument, 0, 'c'}, + {"verbose", no_argument, 0, 'v'}, + {"help", no_argument, 0, 'h'}, + {0, 0, 0, 0}, }; /* Check for USB product string descriptor text in firmware file @@ -68,23 +68,22 @@ static struct option long_options[] = { */ int compatibility_check(uint8_t* data, int length, hackrf_device* device) { - int str_len, i,j; + int str_len, i, j; bool match = false; uint8_t board_id; char* dev_str; hackrf_board_id_read(device, &board_id); - switch(board_id) - { + switch (board_id) { case BOARD_ID_JAWBREAKER: dev_str = "HackRF Jawbreaker"; str_len = 17; break; case BOARD_ID_HACKRF_ONE: - dev_str = "HackRF One"; + dev_str = "HackRF One"; str_len = 10; break; case BOARD_ID_RAD1O: - dev_str = "rad1o"; + dev_str = "rad1o"; str_len = 5; break; default: @@ -92,17 +91,17 @@ int compatibility_check(uint8_t* data, int length, hackrf_device* device) return 1; } // Search for dev_str in uint8_t array of bytes that we're flashing - for(i=0; i 2) { - if (s[0] == '0') { + if (s[0] == '0') { if ((s[1] == 'x') || (s[1] == 'X')) { base = 16; s += 2; @@ -178,7 +177,11 @@ int main(int argc, char** argv) bool clear_status = false; uint16_t usb_api; - while ((opt = getopt_long(argc, argv, "a:l:r:w:id:scvRh?", long_options, + while ((opt = getopt_long( + argc, + argv, + "a:l:r:w:id:scvRh?", + long_options, &option_index)) != EOF) { switch (opt) { case 'a': @@ -202,7 +205,7 @@ int main(int argc, char** argv) case 'i': ignore_compat_check = true; break; - + case 'd': serial_number = optarg; break; @@ -235,35 +238,37 @@ int main(int argc, char** argv) } if (result != HACKRF_SUCCESS) { - fprintf(stderr, "argument error: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "argument error: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } } - if(write && read) { + if (write && read) { fprintf(stderr, "Read and write options are mutually exclusive.\n"); usage(); return EXIT_FAILURE; } - if(!(write || read || reset || read_status || clear_status)) { + if (!(write || read || reset || read_status || clear_status)) { fprintf(stderr, "Specify either read, write, or reset option.\n"); usage(); return EXIT_FAILURE; } - - if( write ) - { + + if (write) { infile = fopen(path, "rb"); - if(infile == NULL) - { + if (infile == NULL) { printf("Error opening file %s\n", path); return EXIT_FAILURE; } /* Get size of the file */ - fseek(infile, 0, SEEK_END); /* Not really portable but work on major OS Linux/Win32 */ + fseek(infile, + 0, + SEEK_END); /* Not really portable but work on major OS Linux/Win32 */ length = ftell(infile); /* Move to start */ rewind(infile); @@ -272,16 +277,16 @@ int main(int argc, char** argv) if (length == 0) { fprintf(stderr, "Requested transfer of zero bytes.\n"); - if(infile != NULL) + if (infile != NULL) fclose(infile); usage(); return EXIT_FAILURE; } - if ((length > MAX_LENGTH) || (address > MAX_LENGTH) - || ((address + length) > MAX_LENGTH)) { + if ((length > MAX_LENGTH) || (address > MAX_LENGTH) || + ((address + length) > MAX_LENGTH)) { fprintf(stderr, "Request exceeds size of flash memory.\n"); - if(infile != NULL) + if (infile != NULL) fclose(infile); usage(); return EXIT_FAILURE; @@ -289,8 +294,7 @@ int main(int argc, char** argv) if (read) { infile = fopen(path, "wb"); - if(infile == NULL) - { + if (infile == NULL) { printf("Error to open file %s\n", path); return EXIT_FAILURE; } @@ -298,36 +302,42 @@ int main(int argc, char** argv) result = hackrf_init(); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_init() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } result = hackrf_open_by_serial(serial_number, &device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_open() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - if(read_status) { + if (read_status) { result = hackrf_spiflash_status(device, status); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_spiflash_status() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_spiflash_status() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - if(!verbose) { + if (!verbose) { printf("Status: 0x%02x %02x\n", status[0], status[1]); } else { - printf("SRP0\t%x\nSEC\t%x\nTB\t%x\nBP\t%x\nWEL\t%x\nBusy\t%x\n", + printf("SRP0\t%x\nSEC\t%x\nTB\t%x\nBP\t%x\nWEL\t%x\nBusy\t%x\n", (status[0] & 0x80) >> 7, (status[0] & 0x40) >> 6, (status[0] & 0x20) >> 5, (status[0] & 0x1C) >> 2, (status[0] & 0x02) >> 1, status[0] & 0x01); - printf("SUS\t%x\nCMP\t%x\nLB\t%x\nRes\t%x\nQE\t%x\nSRP1\t%x\n", + printf("SUS\t%x\nCMP\t%x\nLB\t%x\nRes\t%x\nQE\t%x\nSRP1\t%x\n", (status[1] & 0x80) >> 7, (status[1] & 0x40) >> 6, (status[1] & 0x38) >> 3, @@ -337,57 +347,65 @@ int main(int argc, char** argv) } } - if(clear_status) { + if (clear_status) { result = hackrf_spiflash_clear_status(device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_spiflash_clear_status() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_spiflash_clear_status() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } } - if(read) { + if (read) { ssize_t bytes_written; tmp_length = length; - while (tmp_length) - { + while (tmp_length) { xfer_len = (tmp_length > 256) ? 256 : tmp_length; - if( verbose ) printf("Reading %d bytes from 0x%06x.\n", xfer_len, address); + if (verbose) + printf("Reading %d bytes from 0x%06x.\n", + xfer_len, + address); result = hackrf_spiflash_read(device, address, xfer_len, pdata); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_spiflash_read() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_spiflash_read() failed: %s (%d)\n", + hackrf_error_name(result), + result); fclose(infile); infile = NULL; return EXIT_FAILURE; - } + } address += xfer_len; pdata += xfer_len; tmp_length -= xfer_len; } bytes_written = fwrite(data, 1, length, infile); if (bytes_written != length) { - fprintf(stderr, "Failed write to file (wrote %d bytes).\n", - (int)bytes_written); + fprintf(stderr, + "Failed write to file (wrote %d bytes).\n", + (int) bytes_written); fclose(infile); infile = NULL; return EXIT_FAILURE; } } - if(write) { + if (write) { ssize_t bytes_read = fread(data, 1, length, infile); if (bytes_read != length) { - fprintf(stderr, "Failed read file (read %d bytes).\n", - (int)bytes_read); + fprintf(stderr, + "Failed read file (read %d bytes).\n", + (int) bytes_read); fclose(infile); infile = NULL; return EXIT_FAILURE; } - if(!ignore_compat_check) { + if (!ignore_compat_check) { printf("Checking target device compatibility\n"); result = compatibility_check(data, length, device); - if(result) { + if (result) { printf("Compatibility test failed.\n"); fclose(infile); infile = NULL; @@ -397,20 +415,28 @@ int main(int argc, char** argv) printf("Erasing SPI flash.\n"); result = hackrf_spiflash_erase(device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_spiflash_erase() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_spiflash_erase() failed: %s (%d)\n", + hackrf_error_name(result), + result); fclose(infile); infile = NULL; return EXIT_FAILURE; } - if( !verbose ) printf("Writing %d bytes at 0x%06x.\n", length, address); + if (!verbose) + printf("Writing %d bytes at 0x%06x.\n", length, address); while (length) { xfer_len = (length > 256) ? 256 : length; - if( verbose ) printf("Writing %d bytes at 0x%06x.\n", xfer_len, address); + if (verbose) + printf("Writing %d bytes at 0x%06x.\n", + xfer_len, + address); result = hackrf_spiflash_write(device, address, xfer_len, pdata); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_spiflash_write() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_spiflash_write() failed: %s (%d)\n", + hackrf_error_name(result), + result); fclose(infile); infile = NULL; return EXIT_FAILURE; @@ -426,16 +452,20 @@ int main(int argc, char** argv) infile = NULL; } - if(reset) { + if (reset) { result = hackrf_reset(device); if (result != HACKRF_SUCCESS) { if (result == HACKRF_ERROR_USB_API_VERSION) { hackrf_usb_api_version_read(device, &usb_api); - fprintf(stderr, "Reset is not supported by firmware API %x.%02x\n", - (usb_api>>8)&0xFF, usb_api&0xFF); + fprintf(stderr, + "Reset is not supported by firmware API %x.%02x\n", + (usb_api >> 8) & 0xFF, + usb_api & 0xFF); } else { - fprintf(stderr, "hackrf_reset() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_reset() failed: %s (%d)\n", + hackrf_error_name(result), + result); } return EXIT_FAILURE; } @@ -443,8 +473,10 @@ int main(int argc, char** argv) result = hackrf_close(device); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_close() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } diff --git a/host/hackrf-tools/src/hackrf_sweep.c b/host/hackrf-tools/src/hackrf_sweep.c index 795ab1fb..5574112b 100644 --- a/host/hackrf-tools/src/hackrf_sweep.c +++ b/host/hackrf-tools/src/hackrf_sweep.c @@ -40,25 +40,26 @@ #ifndef bool typedef int bool; -#define true 1 -#define false 0 + #define true 1 + #define false 0 #endif #ifdef _WIN32 -#define _USE_MATH_DEFINES -#include -#ifdef _MSC_VER + #define _USE_MATH_DEFINES + #include + #ifdef _MSC_VER -#ifdef _WIN64 + #ifdef _WIN64 typedef int64_t ssize_t; -#else + #else typedef int32_t ssize_t; -#endif + #endif -#define strtoull _strtoui64 -#define snprintf _snprintf + #define strtoull _strtoui64 + #define snprintf _snprintf -int gettimeofday(struct timeval *tv, void* ignored) { +int gettimeofday(struct timeval* tv, void* ignored) +{ FILETIME ft; unsigned __int64 tmp = 0; if (NULL != tv) { @@ -68,65 +69,67 @@ int gettimeofday(struct timeval *tv, void* ignored) { tmp |= ft.dwLowDateTime; tmp /= 10; tmp -= 11644473600000000Ui64; - tv->tv_sec = (long)(tmp / 1000000UL); - tv->tv_usec = (long)(tmp % 1000000UL); + tv->tv_sec = (long) (tmp / 1000000UL); + tv->tv_usec = (long) (tmp % 1000000UL); } return 0; } -#endif + #endif #endif #if defined(__GNUC__) -#include -#include + #include + #include #endif #include #include -#define FD_BUFFER_SIZE (8*1024) +#define FD_BUFFER_SIZE (8 * 1024) #define FREQ_ONE_MHZ (1000000ull) #define FREQ_MIN_MHZ (0) /* 0 MHz */ #define FREQ_MAX_MHZ (7250) /* 7250 MHz */ -#define DEFAULT_SAMPLE_RATE_HZ (20000000) /* 20MHz default sample rate */ +#define DEFAULT_SAMPLE_RATE_HZ (20000000) /* 20MHz default sample rate */ #define DEFAULT_BASEBAND_FILTER_BANDWIDTH (15000000) /* 15MHz default */ #define TUNE_STEP (DEFAULT_SAMPLE_RATE_HZ / FREQ_ONE_MHZ) -#define OFFSET 7500000 +#define OFFSET 7500000 #define BLOCKS_PER_TRANSFER 16 -#define THROWAWAY_BLOCKS 2 +#define THROWAWAY_BLOCKS 2 #if defined _WIN32 - #define m_sleep(a) Sleep( (a) ) + #define m_sleep(a) Sleep((a)) #else - #define m_sleep(a) usleep((a*1000)) + #define m_sleep(a) usleep((a * 1000)) #endif uint32_t num_sweeps = 0; int num_ranges = 0; -uint16_t frequencies[MAX_SWEEP_RANGES*2]; +uint16_t frequencies[MAX_SWEEP_RANGES * 2]; int step_count; -static float TimevalDiff(const struct timeval *a, const struct timeval *b) { - return (a->tv_sec - b->tv_sec) + 1e-6f * (a->tv_usec - b->tv_usec); +static float TimevalDiff(const struct timeval* a, const struct timeval* b) +{ + return (a->tv_sec - b->tv_sec) + 1e-6f * (a->tv_usec - b->tv_usec); } -int parse_u32(char* s, uint32_t* const value) { +int parse_u32(char* s, uint32_t* const value) +{ uint_fast8_t base = 10; char* s_end; uint64_t ulong_value; - if( strlen(s) > 2 ) { - if( s[0] == '0' ) { - if( (s[1] == 'x') || (s[1] == 'X') ) { + if (strlen(s) > 2) { + if (s[0] == '0') { + if ((s[1] == 'x') || (s[1] == 'X')) { base = 16; s += 2; - } else if( (s[1] == 'b') || (s[1] == 'B') ) { + } else if ((s[1] == 'b') || (s[1] == 'B')) { base = 2; s += 2; } @@ -135,18 +138,19 @@ int parse_u32(char* s, uint32_t* const value) { s_end = s; ulong_value = strtoul(s, &s_end, base); - if( (s != s_end) && (*s_end == 0) ) { - *value = (uint32_t)ulong_value; + if ((s != s_end) && (*s_end == 0)) { + *value = (uint32_t) ulong_value; return HACKRF_SUCCESS; } else { return HACKRF_ERROR_INVALID_PARAM; } } -int parse_u32_range(char* s, uint32_t* const value_min, uint32_t* const value_max) { +int parse_u32_range(char* s, uint32_t* const value_min, uint32_t* const value_max) +{ int result; - char *sep = strchr(s, ':'); + char* sep = strchr(s, ':'); if (!sep) return HACKRF_ERROR_INVALID_PARAM; @@ -185,11 +189,11 @@ volatile bool sweep_started = false; int fftSize = 20; double fft_bin_width; -fftwf_complex *fftwIn = NULL; -fftwf_complex *fftwOut = NULL; +fftwf_complex* fftwIn = NULL; +fftwf_complex* fftwOut = NULL; fftwf_plan fftwPlan = NULL; -fftwf_complex *ifftwIn = NULL; -fftwf_complex *ifftwOut = NULL; +fftwf_complex* ifftwIn = NULL; +fftwf_complex* ifftwOut = NULL; fftwf_plan ifftwPlan = NULL; uint32_t ifft_idx = 0; float* pwr; @@ -203,136 +207,158 @@ float logPower(fftwf_complex in, float scale) return (float) (log2(magsq) * 10.0f / log2(10.0f)); } -int rx_callback(hackrf_transfer* transfer) { +int rx_callback(hackrf_transfer* transfer) +{ int8_t* buf; uint8_t* ubuf; uint64_t frequency; /* in Hz */ uint64_t band_edge; uint32_t record_length; int i, j, ifft_bins; - struct tm *fft_time; + struct tm* fft_time; char time_str[50]; struct timeval usb_transfer_time; - if(NULL == outfile) { + if (NULL == outfile) { return -1; } - if(do_exit) { + if (do_exit) { return 0; } gettimeofday(&usb_transfer_time, NULL); byte_count += transfer->valid_length; buf = (int8_t*) transfer->buffer; ifft_bins = fftSize * step_count; - for(j=0; j i; i++) { - ifftwIn[ifft_idx + i][0] = fftwOut[i + 1 + (fftSize*5)/8][0]; - ifftwIn[ifft_idx + i][1] = fftwOut[i + 1 + (fftSize*5)/8][1]; + fwrite(&pwr[1 + fftSize / 8], sizeof(float), fftSize / 4, outfile); + } else if (ifft_output) { + ifft_idx = (uint32_t) round( + (frequency - (uint64_t) (FREQ_ONE_MHZ * frequencies[0])) / + fft_bin_width); + ifft_idx = (ifft_idx + ifft_bins / 2) % ifft_bins; + for (i = 0; (fftSize / 4) > i; i++) { + ifftwIn[ifft_idx + i][0] = + fftwOut[i + 1 + (fftSize * 5) / 8][0]; + ifftwIn[ifft_idx + i][1] = + fftwOut[i + 1 + (fftSize * 5) / 8][1]; } ifft_idx += fftSize / 2; ifft_idx %= ifft_bins; - for(i = 0; (fftSize / 4) > i; i++) { - ifftwIn[ifft_idx + i][0] = fftwOut[i + 1 + (fftSize/8)][0]; - ifftwIn[ifft_idx + i][1] = fftwOut[i + 1 + (fftSize/8)][1]; + for (i = 0; (fftSize / 4) > i; i++) { + ifftwIn[ifft_idx + i][0] = + fftwOut[i + 1 + (fftSize / 8)][0]; + ifftwIn[ifft_idx + i][1] = + fftwOut[i + 1 + (fftSize / 8)][1]; } } else { time_t time_stamp_seconds = usb_transfer_time.tv_sec; fft_time = localtime(&time_stamp_seconds); strftime(time_str, 50, "%Y-%m-%d, %H:%M:%S", fft_time); - fprintf(outfile, "%s.%06ld, %" PRIu64 ", %" PRIu64 ", %.2f, %u", - time_str, - (long int)usb_transfer_time.tv_usec, - (uint64_t)(frequency), - (uint64_t)(frequency+DEFAULT_SAMPLE_RATE_HZ/4), - fft_bin_width, - fftSize); - for(i = 0; (fftSize / 4) > i; i++) { - fprintf(outfile, ", %.2f", pwr[i + 1 + (fftSize*5)/8]); + fprintf(outfile, + "%s.%06ld, %" PRIu64 ", %" PRIu64 ", %.2f, %u", + time_str, + (long int) usb_transfer_time.tv_usec, + (uint64_t) (frequency), + (uint64_t) (frequency + DEFAULT_SAMPLE_RATE_HZ / 4), + fft_bin_width, + fftSize); + for (i = 0; (fftSize / 4) > i; i++) { + fprintf(outfile, + ", %.2f", + pwr[i + 1 + (fftSize * 5) / 8]); } fprintf(outfile, "\n"); - fprintf(outfile, "%s.%06ld, %" PRIu64 ", %" PRIu64 ", %.2f, %u", - time_str, - (long int)usb_transfer_time.tv_usec, - (uint64_t)(frequency+(DEFAULT_SAMPLE_RATE_HZ/2)), - (uint64_t)(frequency+((DEFAULT_SAMPLE_RATE_HZ*3)/4)), - fft_bin_width, - fftSize); - for(i = 0; (fftSize / 4) > i; i++) { - fprintf(outfile, ", %.2f", pwr[i + 1 + (fftSize/8)]); + fprintf(outfile, + "%s.%06ld, %" PRIu64 ", %" PRIu64 ", %.2f, %u", + time_str, + (long int) usb_transfer_time.tv_usec, + (uint64_t) (frequency + (DEFAULT_SAMPLE_RATE_HZ / 2)), + (uint64_t) (frequency + ((DEFAULT_SAMPLE_RATE_HZ * 3) / 4)), + fft_bin_width, + fftSize); + for (i = 0; (fftSize / 4) > i; i++) { + fprintf(outfile, ", %.2f", pwr[i + 1 + (fftSize / 8)]); } fprintf(outfile, "\n"); } @@ -340,16 +366,20 @@ int rx_callback(hackrf_transfer* transfer) { return 0; } -static void usage() { +static void usage() +{ fprintf(stderr, "Usage:\n"); fprintf(stderr, "\t[-h] # this help\n"); fprintf(stderr, "\t[-d serial_number] # Serial number of desired HackRF\n"); fprintf(stderr, "\t[-a amp_enable] # RX RF amplifier 1=Enable, 0=Disable\n"); - fprintf(stderr, "\t[-f freq_min:freq_max] # minimum and maximum frequencies in MHz\n"); - fprintf(stderr, "\t[-p antenna_enable] # Antenna port power, 1=Enable, 0=Disable\n"); + fprintf(stderr, + "\t[-f freq_min:freq_max] # minimum and maximum frequencies in MHz\n"); + fprintf(stderr, + "\t[-p antenna_enable] # Antenna port power, 1=Enable, 0=Disable\n"); fprintf(stderr, "\t[-l gain_db] # RX LNA (IF) gain, 0-40dB, 8dB steps\n"); fprintf(stderr, "\t[-g gain_db] # RX VGA (baseband) gain, 0-62dB, 2dB steps\n"); - fprintf(stderr, "\t[-w bin_width] # FFT bin width (frequency resolution) in Hz, 2445-5000000\n"); + fprintf(stderr, + "\t[-w bin_width] # FFT bin width (frequency resolution) in Hz, 2445-5000000\n"); fprintf(stderr, "\t[-1] # one shot mode\n"); fprintf(stderr, "\t[-N num_sweeps] # Number of sweeps to perform\n"); fprintf(stderr, "\t[-B] # binary output\n"); @@ -357,14 +387,15 @@ static void usage() { fprintf(stderr, "\t-r filename # output file\n"); fprintf(stderr, "\n"); fprintf(stderr, "Output fields:\n"); - fprintf(stderr, "\tdate, time, hz_low, hz_high, hz_bin_width, num_samples, dB, dB, . . .\n"); + fprintf(stderr, + "\tdate, time, hz_low, hz_high, hz_bin_width, num_samples, dB, dB, . . .\n"); } static hackrf_device* device = NULL; #ifdef _MSC_VER -BOOL WINAPI -sighandler(int signum) { +BOOL WINAPI sighandler(int signum) +{ if (CTRL_C_EVENT == signum) { fprintf(stderr, "Caught signal %d\n", signum); do_exit = true; @@ -373,13 +404,15 @@ sighandler(int signum) { return FALSE; } #else -void sigint_callback_handler(int signum) { +void sigint_callback_handler(int signum) +{ fprintf(stderr, "Caught signal %d\n", signum); do_exit = true; } #endif -int main(int argc, char** argv) { +int main(int argc, char** argv) +{ int opt, i, result = 0; const char* path = NULL; const char* serial_number = NULL; @@ -388,16 +421,14 @@ int main(int argc, char** argv) { struct timeval time_prev; float time_diff; float sweep_rate = 0; - unsigned int lna_gain=16, vga_gain=20; + unsigned int lna_gain = 16, vga_gain = 20; uint32_t freq_min = 0; uint32_t freq_max = 6000; uint32_t requested_fft_bin_width; - - while( (opt = getopt(argc, argv, "a:f:p:l:g:d:n:N:w:1BIr:h?")) != EOF ) { + while ((opt = getopt(argc, argv, "a:f:p:l:g:d:n:N:w:1BIr:h?")) != EOF) { result = HACKRF_SUCCESS; - switch( opt ) - { + switch (opt) { case 'd': serial_number = optarg; break; @@ -409,28 +440,28 @@ int main(int argc, char** argv) { case 'f': result = parse_u32_range(optarg, &freq_min, &freq_max); - if(freq_min >= freq_max) { + if (freq_min >= freq_max) { fprintf(stderr, - "argument error: freq_max must be greater than freq_min.\n"); + "argument error: freq_max must be greater than freq_min.\n"); usage(); return EXIT_FAILURE; } - if(FREQ_MAX_MHZ 1 ) { + if (amp) { + if (amp_enable > 1) { fprintf(stderr, "argument error: amp_enable shall be 0 or 1.\n"); usage(); return EXIT_FAILURE; @@ -507,25 +543,28 @@ int main(int argc, char** argv) { if (antenna) { if (antenna_enable > 1) { - fprintf(stderr, "argument error: antenna_enable shall be 0 or 1.\n"); + fprintf(stderr, + "argument error: antenna_enable shall be 0 or 1.\n"); usage(); return EXIT_FAILURE; } } if (0 == num_ranges) { - frequencies[0] = (uint16_t)freq_min; - frequencies[1] = (uint16_t)freq_max; + frequencies[0] = (uint16_t) freq_min; + frequencies[1] = (uint16_t) freq_max; num_ranges++; } - if(binary_output && ifft_output) { - fprintf(stderr, "argument error: binary output (-B) and IFFT output (-I) are mutually exclusive.\n"); + if (binary_output && ifft_output) { + fprintf(stderr, + "argument error: binary output (-B) and IFFT output (-I) are mutually exclusive.\n"); return EXIT_FAILURE; } - if(ifft_output && (1 < num_ranges)) { - fprintf(stderr, "argument error: only one frequency range is supported in IFFT output (-I) mode.\n"); + if (ifft_output && (1 < num_ranges)) { + fprintf(stderr, + "argument error: only one frequency range is supported in IFFT output (-I) mode.\n"); return EXIT_FAILURE; } @@ -534,9 +573,9 @@ int main(int argc, char** argv) { * for interleaved mode. With our fixed sample rate of 20 Msps, that * results in a maximum bin width of 5000000 Hz. */ - if(4 > fftSize) { + if (4 > fftSize) { fprintf(stderr, - "argument error: FFT bin width (-w) must be no more than 5000000\n"); + "argument error: FFT bin width (-w) must be no more than 5000000\n"); return EXIT_FAILURE; } @@ -548,9 +587,9 @@ int main(int argc, char** argv) { * makes our maximum supported fftSize 8180. With our fixed sample * rate of 20 Msps, that results in a minimum bin width of 2445 Hz. */ - if(8180 < fftSize) { + if (8180 < fftSize) { fprintf(stderr, - "argument error: FFT bin width (-w) must be no less than 2445\n"); + "argument error: FFT bin width (-w) must be no less than 2445\n"); return EXIT_FAILURE; } @@ -558,60 +597,67 @@ int main(int argc, char** argv) { * number of FFT bins is equal to an odd multiple of four. * (e.g. 4, 12, 20, 28, 36, . . .) */ - while((fftSize + 4) % 8) { + while ((fftSize + 4) % 8) { fftSize++; } - fft_bin_width = (double)DEFAULT_SAMPLE_RATE_HZ / fftSize; - fftwIn = (fftwf_complex*)fftwf_malloc(sizeof(fftwf_complex) * fftSize); - fftwOut = (fftwf_complex*)fftwf_malloc(sizeof(fftwf_complex) * fftSize); - fftwPlan = fftwf_plan_dft_1d(fftSize, fftwIn, fftwOut, FFTW_FORWARD, FFTW_MEASURE); - pwr = (float*)fftwf_malloc(sizeof(float) * fftSize); - window = (float*)fftwf_malloc(sizeof(float) * fftSize); + fft_bin_width = (double) DEFAULT_SAMPLE_RATE_HZ / fftSize; + fftwIn = (fftwf_complex*) fftwf_malloc(sizeof(fftwf_complex) * fftSize); + fftwOut = (fftwf_complex*) fftwf_malloc(sizeof(fftwf_complex) * fftSize); + fftwPlan = + fftwf_plan_dft_1d(fftSize, fftwIn, fftwOut, FFTW_FORWARD, FFTW_MEASURE); + pwr = (float*) fftwf_malloc(sizeof(float) * fftSize); + window = (float*) fftwf_malloc(sizeof(float) * fftSize); for (i = 0; i < fftSize; i++) { window[i] = (float) (0.5f * (1.0f - cos(2 * M_PI * i / (fftSize - 1)))); } #ifdef _MSC_VER - if(binary_output) { + if (binary_output) { _setmode(_fileno(stdout), _O_BINARY); } #endif result = hackrf_init(); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_init() failed: %s (%d)\n", hackrf_error_name(result), result); - usage(); - return EXIT_FAILURE; - } - - result = hackrf_open_by_serial(serial_number, &device); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_open() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } - if((NULL == path) || (strcmp(path, "-") == 0)) { + result = hackrf_open_by_serial(serial_number, &device); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); + usage(); + return EXIT_FAILURE; + } + + if ((NULL == path) || (strcmp(path, "-") == 0)) { outfile = stdout; } else { outfile = fopen(path, "wb"); } - if(NULL == outfile) { + if (NULL == outfile) { fprintf(stderr, "Failed to open file: %s\n", path); return EXIT_FAILURE; } /* Change outfile buffer to have bigger one to store or read data on/to HDD */ - result = setvbuf(outfile , NULL , _IOFBF , FD_BUFFER_SIZE); - if( result != 0 ) { + result = setvbuf(outfile, NULL, _IOFBF, FD_BUFFER_SIZE); + if (result != 0) { fprintf(stderr, "setvbuf() failed: %d\n", result); usage(); return EXIT_FAILURE; } #ifdef _MSC_VER - SetConsoleCtrlHandler( (PHANDLER_ROUTINE) sighandler, TRUE ); + SetConsoleCtrlHandler((PHANDLER_ROUTINE) sighandler, TRUE); #else signal(SIGINT, &sigint_callback_handler); signal(SIGILL, &sigint_callback_handler); @@ -620,22 +666,30 @@ int main(int argc, char** argv) { signal(SIGTERM, &sigint_callback_handler); signal(SIGABRT, &sigint_callback_handler); #endif - fprintf(stderr, "call hackrf_sample_rate_set(%.03f MHz)\n", - ((float)DEFAULT_SAMPLE_RATE_HZ/(float)FREQ_ONE_MHZ)); + fprintf(stderr, + "call hackrf_sample_rate_set(%.03f MHz)\n", + ((float) DEFAULT_SAMPLE_RATE_HZ / (float) FREQ_ONE_MHZ)); result = hackrf_set_sample_rate_manual(device, DEFAULT_SAMPLE_RATE_HZ, 1); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_sample_rate_set() failed: %s (%d)\n", - hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_sample_rate_set() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } - fprintf(stderr, "call hackrf_baseband_filter_bandwidth_set(%.03f MHz)\n", - ((float)DEFAULT_BASEBAND_FILTER_BANDWIDTH/(float)FREQ_ONE_MHZ)); - result = hackrf_set_baseband_filter_bandwidth(device, DEFAULT_BASEBAND_FILTER_BANDWIDTH); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_baseband_filter_bandwidth_set() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "call hackrf_baseband_filter_bandwidth_set(%.03f MHz)\n", + ((float) DEFAULT_BASEBAND_FILTER_BANDWIDTH / (float) FREQ_ONE_MHZ)); + result = hackrf_set_baseband_filter_bandwidth( + device, + DEFAULT_BASEBAND_FILTER_BANDWIDTH); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_baseband_filter_bandwidth_set() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } @@ -648,41 +702,64 @@ int main(int argc, char** argv) { * bandwidth. Increase high end of range if necessary to accommodate a * whole number of steps, minimum 1. */ - for(i = 0; i < num_ranges; i++) { - step_count = 1 + (frequencies[2*i+1] - frequencies[2*i] - 1) - / TUNE_STEP; - frequencies[2*i+1] = (uint16_t) (frequencies[2*i] + step_count * TUNE_STEP); - fprintf(stderr, "Sweeping from %u MHz to %u MHz\n", - frequencies[2*i], frequencies[2*i+1]); + for (i = 0; i < num_ranges; i++) { + step_count = + 1 + (frequencies[2 * i + 1] - frequencies[2 * i] - 1) / TUNE_STEP; + frequencies[2 * i + 1] = + (uint16_t) (frequencies[2 * i] + step_count * TUNE_STEP); + fprintf(stderr, + "Sweeping from %u MHz to %u MHz\n", + frequencies[2 * i], + frequencies[2 * i + 1]); } - if(ifft_output) { - ifftwIn = (fftwf_complex*)fftwf_malloc(sizeof(fftwf_complex) * fftSize * step_count); - ifftwOut = (fftwf_complex*)fftwf_malloc(sizeof(fftwf_complex) * fftSize * step_count); - ifftwPlan = fftwf_plan_dft_1d(fftSize * step_count, ifftwIn, ifftwOut, FFTW_BACKWARD, FFTW_MEASURE); + if (ifft_output) { + ifftwIn = (fftwf_complex*) fftwf_malloc( + sizeof(fftwf_complex) * fftSize * step_count); + ifftwOut = (fftwf_complex*) fftwf_malloc( + sizeof(fftwf_complex) * fftSize * step_count); + ifftwPlan = fftwf_plan_dft_1d( + fftSize * step_count, + ifftwIn, + ifftwOut, + FFTW_BACKWARD, + FFTW_MEASURE); } - result = hackrf_init_sweep(device, frequencies, num_ranges, BYTES_PER_BLOCK, - TUNE_STEP * FREQ_ONE_MHZ, OFFSET, INTERLEAVED); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_init_sweep() failed: %s (%d)\n", - hackrf_error_name(result), result); + result = hackrf_init_sweep( + device, + frequencies, + num_ranges, + BYTES_PER_BLOCK, + TUNE_STEP * FREQ_ONE_MHZ, + OFFSET, + INTERLEAVED); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_init_sweep() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } result |= hackrf_start_rx_sweep(device, rx_callback, NULL); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_start_rx_sweep() failed: %s (%d)\n", hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_start_rx_sweep() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } if (amp) { fprintf(stderr, "call hackrf_set_amp_enable(%u)\n", amp_enable); - result = hackrf_set_amp_enable(device, (uint8_t)amp_enable); + result = hackrf_set_amp_enable(device, (uint8_t) amp_enable); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_set_amp_enable() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_set_amp_enable() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } @@ -690,10 +767,12 @@ int main(int argc, char** argv) { if (antenna) { fprintf(stderr, "call hackrf_set_antenna_enable(%u)\n", antenna_enable); - result = hackrf_set_antenna_enable(device, (uint8_t)antenna_enable); + result = hackrf_set_antenna_enable(device, (uint8_t) antenna_enable); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_set_antenna_enable() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_set_antenna_enable() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } @@ -703,20 +782,24 @@ int main(int argc, char** argv) { time_prev = t_start; fprintf(stderr, "Stop with Ctrl-C\n"); - while((hackrf_is_streaming(device) == HACKRF_TRUE) && (do_exit == false)) { + while ((hackrf_is_streaming(device) == HACKRF_TRUE) && (do_exit == false)) { float time_difference; m_sleep(50); gettimeofday(&time_now, NULL); if (TimevalDiff(&time_now, &time_prev) >= 1.0f) { time_difference = TimevalDiff(&time_now, &t_start); - sweep_rate = (float)sweep_count / time_difference; - fprintf(stderr, "%" PRIu64 " total sweeps completed, %.2f sweeps/second\n", - sweep_count, sweep_rate); + sweep_rate = (float) sweep_count / time_difference; + fprintf(stderr, + "%" PRIu64 + " total sweeps completed, %.2f sweeps/second\n", + sweep_count, + sweep_rate); if (byte_count == 0) { exit_code = EXIT_FAILURE; - fprintf(stderr, "\nCouldn't transfer any data for one second.\n"); + fprintf(stderr, + "\nCouldn't transfer any data for one second.\n"); break; } byte_count = 0; @@ -725,26 +808,33 @@ int main(int argc, char** argv) { } fflush(outfile); - result = hackrf_is_streaming(device); + result = hackrf_is_streaming(device); if (do_exit) { fprintf(stderr, "\nExiting...\n"); } else { - fprintf(stderr, "\nExiting... hackrf_is_streaming() result: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "\nExiting... hackrf_is_streaming() result: %s (%d)\n", + hackrf_error_name(result), + result); } gettimeofday(&time_now, NULL); time_diff = TimevalDiff(&time_now, &t_start); - if((sweep_rate == 0) && (time_diff > 0)) + if ((sweep_rate == 0) && (time_diff > 0)) sweep_rate = sweep_count / time_diff; - fprintf(stderr, "Total sweeps: %" PRIu64 " in %.5f seconds (%.2f sweeps/second)\n", - sweep_count, time_diff, sweep_rate); + fprintf(stderr, + "Total sweeps: %" PRIu64 " in %.5f seconds (%.2f sweeps/second)\n", + sweep_count, + time_diff, + sweep_rate); - if(device != NULL) { + if (device != NULL) { result = hackrf_close(device); - if(result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_close() failed: %s (%d)\n", - hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); } else { fprintf(stderr, "hackrf_close() done\n"); } @@ -754,7 +844,7 @@ int main(int argc, char** argv) { } fflush(outfile); - if ( ( outfile != NULL ) && ( outfile != stdout ) ) { + if ((outfile != NULL) && (outfile != stdout)) { fclose(outfile); outfile = NULL; fprintf(stderr, "fclose() done\n"); diff --git a/host/hackrf-tools/src/hackrf_transfer.c b/host/hackrf-tools/src/hackrf_transfer.c index 6c65894e..f39f9517 100644 --- a/host/hackrf-tools/src/hackrf_transfer.c +++ b/host/hackrf-tools/src/hackrf_transfer.c @@ -39,25 +39,25 @@ #ifndef bool typedef int bool; -#define true 1 -#define false 0 + #define true 1 + #define false 0 #endif #ifdef _WIN32 -#include + #include -#ifdef _MSC_VER + #ifdef _MSC_VER -#ifdef _WIN64 + #ifdef _WIN64 typedef int64_t ssize_t; -#else + #else typedef int32_t ssize_t; -#endif + #endif -#define strtoull _strtoui64 -#define snprintf _snprintf + #define strtoull _strtoui64 + #define snprintf _snprintf -int gettimeofday(struct timeval *tv, void* ignored) +int gettimeofday(struct timeval* tv, void* ignored) { FILETIME ft; unsigned __int64 tmp = 0; @@ -68,34 +68,34 @@ int gettimeofday(struct timeval *tv, void* ignored) tmp |= ft.dwLowDateTime; tmp /= 10; tmp -= 11644473600000000Ui64; - tv->tv_sec = (long)(tmp / 1000000UL); - tv->tv_usec = (long)(tmp % 1000000UL); + tv->tv_sec = (long) (tmp / 1000000UL); + tv->tv_usec = (long) (tmp % 1000000UL); } return 0; } -#endif + #endif #endif #if defined(__GNUC__) -#include -#include + #include + #include #endif #include -#define FD_BUFFER_SIZE (8*1024) +#define FD_BUFFER_SIZE (8 * 1024) #define FREQ_ONE_MHZ (1000000ll) -#define DEFAULT_FREQ_HZ (900000000ll) /* 900MHz */ -#define FREQ_MIN_HZ (0ull) /* 0 Hz */ -#define FREQ_MAX_HZ (7250000000ll) /* 7250MHz */ -#define IF_MIN_HZ (2150000000ll) -#define IF_MAX_HZ (2750000000ll) -#define LO_MIN_HZ (84375000ll) -#define LO_MAX_HZ (5400000000ll) -#define DEFAULT_LO_HZ (1000000000ll) +#define DEFAULT_FREQ_HZ (900000000ll) /* 900MHz */ +#define FREQ_MIN_HZ (0ull) /* 0 Hz */ +#define FREQ_MAX_HZ (7250000000ll) /* 7250MHz */ +#define IF_MIN_HZ (2150000000ll) +#define IF_MAX_HZ (2750000000ll) +#define LO_MIN_HZ (84375000ll) +#define LO_MAX_HZ (5400000000ll) +#define DEFAULT_LO_HZ (1000000000ll) #define DEFAULT_SAMPLE_RATE_HZ (10000000) /* 10MHz default sample rate */ @@ -107,14 +107,14 @@ int gettimeofday(struct timeval *tv, void* ignored) #define BASEBAND_FILTER_BW_MAX (28000000) /* 28 MHz max value */ #if defined _WIN32 - #define sleep(a) Sleep( (a*1000) ) + #define sleep(a) Sleep((a * 1000)) #endif typedef enum { - TRANSCEIVER_MODE_OFF = 0, - TRANSCEIVER_MODE_RX = 1, - TRANSCEIVER_MODE_TX = 2, - TRANSCEIVER_MODE_SS = 3, + TRANSCEIVER_MODE_OFF = 0, + TRANSCEIVER_MODE_RX = 1, + TRANSCEIVER_MODE_TX = 2, + TRANSCEIVER_MODE_SS = 3, } transceiver_mode_t; typedef enum { @@ -128,27 +128,27 @@ typedef struct { } stats_t; /* WAVE or RIFF WAVE file format containing IQ 2x8bits data for HackRF compatible with SDR# Wav IQ file */ -typedef struct -{ - char groupID[4]; /* 'RIFF' */ - uint32_t size; /* File size + 8bytes */ - char riffType[4]; /* 'WAVE'*/ +typedef struct { + char groupID[4]; /* 'RIFF' */ + uint32_t size; /* File size + 8bytes */ + char riffType[4]; /* 'WAVE'*/ } t_WAVRIFF_hdr; -#define FormatID "fmt " /* chunkID for Format Chunk. NOTE: There is a space at the end of this ID. */ +#define FormatID \ + "fmt " /* chunkID for Format Chunk. NOTE: There is a space at the end of this ID. */ typedef struct { - char chunkID[4]; /* 'fmt ' */ - uint32_t chunkSize; /* 16 fixed */ - uint16_t wFormatTag; /* 1 fixed */ - uint16_t wChannels; /* 2 fixed */ - uint32_t dwSamplesPerSec; /* Freq Hz sampling */ - uint32_t dwAvgBytesPerSec; /* Freq Hz sampling x 2 */ - uint16_t wBlockAlign; /* 2 fixed */ - uint16_t wBitsPerSample; /* 8 fixed */ + char chunkID[4]; /* 'fmt ' */ + uint32_t chunkSize; /* 16 fixed */ + uint16_t wFormatTag; /* 1 fixed */ + uint16_t wChannels; /* 2 fixed */ + uint32_t dwSamplesPerSec; /* Freq Hz sampling */ + uint32_t dwAvgBytesPerSec; /* Freq Hz sampling x 2 */ + uint16_t wBlockAlign; /* 2 fixed */ + uint16_t wBitsPerSample; /* 8 fixed */ } t_FormatChunk; -typedef struct { +typedef struct { char chunkID[4]; /* 'data' */ uint32_t chunkSize; /* Size of data in bytes */ @@ -163,16 +163,14 @@ typedef struct { t_wav_file_hdr wave_file_hdr = { /* t_WAVRIFF_hdr */ - { - /* groupID */ - { 'R', 'I', 'F', 'F' }, - 0, /* size to update later */ - { 'W', 'A', 'V', 'E' } - }, + {/* groupID */ + {'R', 'I', 'F', 'F'}, + 0, /* size to update later */ + {'W', 'A', 'V', 'E'}}, /* t_FormatChunk */ { /* char chunkID[4]; */ - { 'f', 'm', 't', ' ' }, + {'f', 'm', 't', ' '}, 16, /* uint32_t chunkSize; */ 1, /* uint16_t wFormatTag; 1 fixed */ 2, /* uint16_t wChannels; 2 fixed */ @@ -183,40 +181,39 @@ t_wav_file_hdr wave_file_hdr = { }, /* t_DataChunk */ { - /* char chunkID[4]; */ - { 'd', 'a', 't', 'a' }, - 0, /* uint32_t chunkSize; to update later */ - } -}; + /* char chunkID[4]; */ + {'d', 'a', 't', 'a'}, + 0, /* uint32_t chunkSize; to update later */ + }}; static transceiver_mode_t transceiver_mode = TRANSCEIVER_MODE_RX; #define U64TOA_MAX_DIGIT (31) -typedef struct -{ - char data[U64TOA_MAX_DIGIT+1]; + +typedef struct { + char data[U64TOA_MAX_DIGIT + 1]; } t_u64toa; t_u64toa ascii_u64_data1; t_u64toa ascii_u64_data2; -static float -TimevalDiff(const struct timeval *a, const struct timeval *b) +static float TimevalDiff(const struct timeval* a, const struct timeval* b) { - return (a->tv_sec - b->tv_sec) + 1e-6f * (a->tv_usec - b->tv_usec); + return (a->tv_sec - b->tv_sec) + 1e-6f * (a->tv_usec - b->tv_usec); } -int parse_u64(char* s, uint64_t* const value) { +int parse_u64(char* s, uint64_t* const value) +{ uint_fast8_t base = 10; char* s_end; uint64_t u64_value; - if( strlen(s) > 2 ) { - if( s[0] == '0' ) { - if( (s[1] == 'x') || (s[1] == 'X') ) { + if (strlen(s) > 2) { + if (s[0] == '0') { + if ((s[1] == 'x') || (s[1] == 'X')) { base = 16; s += 2; - } else if( (s[1] == 'b') || (s[1] == 'B') ) { + } else if ((s[1] == 'b') || (s[1] == 'B')) { base = 2; s += 2; } @@ -225,7 +222,7 @@ int parse_u64(char* s, uint64_t* const value) { s_end = s; u64_value = strtoull(s, &s_end, base); - if( (s != s_end) && (*s_end == 0) ) { + if ((s != s_end) && (*s_end == 0)) { *value = u64_value; return HACKRF_SUCCESS; } else { @@ -233,17 +230,18 @@ int parse_u64(char* s, uint64_t* const value) { } } -int parse_u32(char* s, uint32_t* const value) { +int parse_u32(char* s, uint32_t* const value) +{ uint_fast8_t base = 10; char* s_end; uint64_t ulong_value; - if( strlen(s) > 2 ) { - if( s[0] == '0' ) { - if( (s[1] == 'x') || (s[1] == 'X') ) { + if (strlen(s) > 2) { + if (s[0] == '0') { + if ((s[1] == 'x') || (s[1] == 'X')) { base = 16; s += 2; - } else if( (s[1] == 'b') || (s[1] == 'B') ) { + } else if ((s[1] == 'b') || (s[1] == 'B')) { base = 2; s += 2; } @@ -252,8 +250,8 @@ int parse_u32(char* s, uint32_t* const value) { s_end = s; ulong_value = strtoul(s, &s_end, base); - if( (s != s_end) && (*s_end == 0) ) { - *value = (uint32_t)ulong_value; + if ((s != s_end) && (*s_end == 0)) { + *value = (uint32_t) ulong_value; return HACKRF_SUCCESS; } else { return HACKRF_ERROR_INVALID_PARAM; @@ -261,7 +259,8 @@ int parse_u32(char* s, uint32_t* const value) { } /* Parse frequencies as doubles to take advantage of notation parsing */ -int parse_frequency_i64(char* optarg, char* endptr, int64_t* value) { +int parse_frequency_i64(char* optarg, char* endptr, int64_t* value) +{ *value = (int64_t) strtod(optarg, &endptr); if (optarg == endptr) { return HACKRF_ERROR_INVALID_PARAM; @@ -269,7 +268,8 @@ int parse_frequency_i64(char* optarg, char* endptr, int64_t* value) { return HACKRF_SUCCESS; } -int parse_frequency_u32(char* optarg, char* endptr, uint32_t* value) { +int parse_frequency_u32(char* optarg, char* endptr, uint32_t* value) +{ *value = (uint32_t) strtod(optarg, &endptr); if (optarg == endptr) { return HACKRF_ERROR_INVALID_PARAM; @@ -277,15 +277,14 @@ int parse_frequency_u32(char* optarg, char* endptr, uint32_t* value) { return HACKRF_SUCCESS; } -static char *stringrev(char *str) +static char* stringrev(char* str) { char *p1, *p2; - if(! str || ! *str) + if (!str || !*str) return str; - for(p1 = str, p2 = str + strlen(str) - 1; p2 > p1; ++p1, --p2) - { + for (p1 = str, p2 = str + strlen(str) - 1; p2 > p1; ++p1, --p2) { *p1 ^= *p2; *p2 ^= *p1; *p1 ^= *p2; @@ -295,7 +294,7 @@ static char *stringrev(char *str) char* u64toa(uint64_t val, t_u64toa* str) { - #define BASE (10ull) /* Base10 by default */ +#define BASE (10ull) /* Base10 by default */ uint64_t sum; int pos; int digit; @@ -306,16 +305,15 @@ char* u64toa(uint64_t val, t_u64toa* str) max_len = U64TOA_MAX_DIGIT; pos = 0; - do - { + do { digit = (sum % BASE); str->data[pos] = digit + '0'; pos++; sum /= BASE; - }while( (sum>0) && (pos < max_len) ); + } while ((sum > 0) && (pos < max_len)); - if( (pos == max_len) && (sum>0) ) + if ((pos == max_len) && (sum > 0)) return NULL; str->data[pos] = '\0'; @@ -341,7 +339,7 @@ uint64_t stream_size = 0; uint32_t stream_head = 0; uint32_t stream_tail = 0; uint32_t stream_drop = 0; -uint8_t *stream_buf = NULL; +uint8_t* stream_buf = NULL; /* * To report amplitude, best would be dB(fullscale) and the variance, @@ -352,7 +350,8 @@ uint8_t *stream_buf = NULL; * Clamping would produce a sigmoid curve, so with a signal of variable intensity you're * probably getting substantial overload anytime this reports more than about -6dBfs. */ -uint64_t stream_amplitude = 0; /* sum of magnitudes of all I&Q samples, reset on the periodic report */ +uint64_t stream_amplitude = + 0; /* sum of magnitudes of all I&Q samples, reset on the periodic report */ bool transmit = false; struct timeval time_start; @@ -391,17 +390,17 @@ uint32_t baseband_filter_bw_hz = 0; bool repeat = false; bool crystal_correct = false; -uint32_t crystal_correct_ppm ; +uint32_t crystal_correct_ppm; int requested_mode_count = 0; -int rx_callback(hackrf_transfer* transfer) { +int rx_callback(hackrf_transfer* transfer) +{ size_t bytes_to_write; size_t bytes_written; unsigned int i; - if( file != NULL ) - { + if (file != NULL) { byte_count += transfer->valid_length; bytes_to_write = transfer->valid_length; if (limit_num_samples) { @@ -413,34 +412,46 @@ int rx_callback(hackrf_transfer* transfer) { // accumulate stream_amplitude: for (i = 0; i < bytes_to_write; i++) { - stream_amplitude += abs((signed char)transfer->buffer[i]); + stream_amplitude += abs((signed char) transfer->buffer[i]); } if (receive_wav) { /* convert .wav contents from signed to unsigned */ for (i = 0; i < bytes_to_write; i++) { - transfer->buffer[i] ^= (uint8_t)0x80; + transfer->buffer[i] ^= (uint8_t) 0x80; } } - if (stream_size>0){ + if (stream_size > 0) { #ifndef _WIN32 - if ((stream_size-1+stream_head-stream_tail)%stream_size buffer,bytes_to_write); + } else { + if (stream_tail + bytes_to_write <= stream_size) { + memcpy(stream_buf + stream_tail, + transfer->buffer, + bytes_to_write); } else { - memcpy(stream_buf+stream_tail,transfer->buffer,(stream_size-stream_tail)); - memcpy(stream_buf,transfer->buffer+(stream_size-stream_tail),bytes_to_write-(stream_size-stream_tail)); + memcpy(stream_buf + stream_tail, + transfer->buffer, + (stream_size - stream_tail)); + memcpy(stream_buf, + transfer->buffer + + (stream_size - stream_tail), + bytes_to_write - + (stream_size - stream_tail)); }; - __atomic_store_n(&stream_tail,(stream_tail+bytes_to_write)%stream_size,__ATOMIC_RELEASE); - } + __atomic_store_n( + &stream_tail, + (stream_tail + bytes_to_write) % stream_size, + __ATOMIC_RELEASE); + } #endif - return 0; + return 0; } else { bytes_written = fwrite(transfer->buffer, 1, bytes_to_write, file); - if ((bytes_written != bytes_to_write) - || (limit_num_samples && (bytes_to_xfer == 0))) { + if ((bytes_written != bytes_to_write) || + (limit_num_samples && (bytes_to_xfer == 0))) { return -1; } else { return 0; @@ -451,7 +462,8 @@ int rx_callback(hackrf_transfer* transfer) { } } -int tx_callback(hackrf_transfer* transfer) { +int tx_callback(hackrf_transfer* transfer) +{ size_t bytes_to_read; size_t bytes_read; unsigned int i; @@ -462,11 +474,10 @@ int tx_callback(hackrf_transfer* transfer) { byte_count += transfer->valid_length; bytes_to_read = transfer->valid_length; for (i = 0; i < bytes_to_read; i++) { - stream_amplitude += abs((signed char)transfer->buffer[i]); + stream_amplitude += abs((signed char) transfer->buffer[i]); } - if( file != NULL ) - { + if (file != NULL) { if (limit_num_samples) { if (bytes_to_read >= bytes_to_xfer) { /* @@ -479,22 +490,26 @@ int tx_callback(hackrf_transfer* transfer) { } bytes_read = fread(transfer->buffer, 1, bytes_to_read, file); if (limit_num_samples && (bytes_to_xfer == 0)) { - return -1; + return -1; } if (bytes_read != bytes_to_read) { - if (repeat) { - fprintf(stderr, "Input file end reached. Rewind to beginning.\n"); - rewind(file); - fread(transfer->buffer + bytes_read, 1, bytes_to_read - bytes_read, file); - return 0; - } else { - return -1; /* not repeat mode, end of file */ - } + if (repeat) { + fprintf(stderr, + "Input file end reached. Rewind to beginning.\n"); + rewind(file); + fread(transfer->buffer + bytes_read, + 1, + bytes_to_read - bytes_read, + file); + return 0; + } else { + return -1; /* not repeat mode, end of file */ + } } else { return 0; } - } else { // transceiver_mode == TRANSCEIVER_MODE_SS + } else { // transceiver_mode == TRANSCEIVER_MODE_SS /* Transmit continuous wave with specific amplitude */ if (limit_num_samples) { if (bytes_to_read >= bytes_to_xfer) { @@ -503,7 +518,7 @@ int tx_callback(hackrf_transfer* transfer) { bytes_to_xfer -= bytes_to_read; } - for(i = 0;ibuffer[i] = amplitude; if (limit_num_samples && (bytes_to_xfer == 0)) { @@ -514,7 +529,7 @@ int tx_callback(hackrf_transfer* transfer) { } } -static int update_stats(hackrf_device *device, hackrf_m0_state *state, stats_t *stats) +static int update_stats(hackrf_device* device, hackrf_m0_state* state, stats_t* stats) { int result = hackrf_get_m0_state(device, state); @@ -543,14 +558,17 @@ static int update_stats(hackrf_device *device, hackrf_m0_state *state, stats_t * stats->m0_total += 0x100000000; if (state->m4_count < (stats->m4_total & 0xFFFFFFFF)) stats->m4_total += 0x100000000; - stats->m0_total = (stats->m0_total & 0xFFFFFFFF00000000) | state->m0_count; - stats->m4_total = (stats->m4_total & 0xFFFFFFFF00000000) | state->m4_count; + stats->m0_total = + (stats->m0_total & 0xFFFFFFFF00000000) | state->m0_count; + stats->m4_total = + (stats->m4_total & 0xFFFFFFFF00000000) | state->m4_count; } return result; } -static void usage() { +static void usage() +{ printf("Usage:\n"); printf("\t-h # this help\n"); printf("\t[-d serial_number] # Serial number of desired HackRF.\n"); @@ -559,14 +577,14 @@ static void usage() { printf("\t-w # Receive data into file with WAV header and automatic name.\n"); printf("\t # This is for SDR# compatibility and may not work with other software.\n"); printf("\t[-f freq_hz] # Frequency in Hz [%sMHz to %sMHz].\n", - u64toa((FREQ_MIN_HZ/FREQ_ONE_MHZ),&ascii_u64_data1), - u64toa((FREQ_MAX_HZ/FREQ_ONE_MHZ),&ascii_u64_data2)); + u64toa((FREQ_MIN_HZ / FREQ_ONE_MHZ), &ascii_u64_data1), + u64toa((FREQ_MAX_HZ / FREQ_ONE_MHZ), &ascii_u64_data2)); printf("\t[-i if_freq_hz] # Intermediate Frequency (IF) in Hz [%sMHz to %sMHz].\n", - u64toa((IF_MIN_HZ/FREQ_ONE_MHZ),&ascii_u64_data1), - u64toa((IF_MAX_HZ/FREQ_ONE_MHZ),&ascii_u64_data2)); + u64toa((IF_MIN_HZ / FREQ_ONE_MHZ), &ascii_u64_data1), + u64toa((IF_MAX_HZ / FREQ_ONE_MHZ), &ascii_u64_data2)); printf("\t[-o lo_freq_hz] # Front-end Local Oscillator (LO) frequency in Hz [%sMHz to %sMHz].\n", - u64toa((LO_MIN_HZ/FREQ_ONE_MHZ),&ascii_u64_data1), - u64toa((LO_MAX_HZ/FREQ_ONE_MHZ),&ascii_u64_data2)); + u64toa((LO_MIN_HZ / FREQ_ONE_MHZ), &ascii_u64_data1), + u64toa((LO_MAX_HZ / FREQ_ONE_MHZ), &ascii_u64_data2)); printf("\t[-m image_reject] # Image rejection filter selection, 0=bypass, 1=low pass, 2=high pass.\n"); printf("\t[-a amp_enable] # RX/TX RF amplifier 1=Enable, 0=Disable.\n"); printf("\t[-p antenna_enable] # Antenna port power, 1=Enable, 0=Disable.\n"); @@ -574,17 +592,17 @@ static void usage() { printf("\t[-g gain_db] # RX VGA (baseband) gain, 0-62dB, 2dB steps\n"); printf("\t[-x gain_db] # TX VGA (IF) gain, 0-47dB, 1dB steps\n"); printf("\t[-s sample_rate_hz] # Sample rate in Hz (2-20MHz, default %sMHz).\n", - u64toa((DEFAULT_SAMPLE_RATE_HZ/FREQ_ONE_MHZ),&ascii_u64_data1)); + u64toa((DEFAULT_SAMPLE_RATE_HZ / FREQ_ONE_MHZ), &ascii_u64_data1)); printf("\t[-n num_samples] # Number of samples to transfer (default is unlimited).\n"); #ifndef _WIN32 -/* The required atomic load/store functions aren't available when using C with MSVC */ + /* The required atomic load/store functions aren't available when using C with MSVC */ printf("\t[-S buf_size] # Enable receive streaming with buffer size buf_size.\n"); #endif printf("\t[-B] # Print buffer statistics during transfer\n"); printf("\t[-c amplitude] # CW signal source mode, amplitude 0-127 (DC value to DAC).\n"); - printf("\t[-R] # Repeat TX mode (default is off) \n"); + printf("\t[-R] # Repeat TX mode (default is off) \n"); printf("\t[-b baseband_filter_bw_hz] # Set baseband filter bandwidth in Hz.\n"); - printf("\tPossible values: 1.75/2.5/3.5/5/5.5/6/7/8/9/10/12/14/15/20/24/28MHz, default <= 0.75 * sample_rate_hz.\n" ); + printf("\tPossible values: 1.75/2.5/3.5/5/5.5/6/7/8/9/10/12/14/15/20/24/28MHz, default <= 0.75 * sample_rate_hz.\n"); printf("\t[-C ppm] # Set Internal crystal clock error in ppm.\n"); printf("\t[-H hw_sync_enable] # Synchronise USB transfer using GPIO pins.\n"); } @@ -592,8 +610,7 @@ static void usage() { static hackrf_device* device = NULL; #ifdef _MSC_VER -BOOL WINAPI -sighandler(int signum) +BOOL WINAPI sighandler(int signum) { if (CTRL_C_EVENT == signum) { fprintf(stderr, "Caught signal %d\n", signum); @@ -603,7 +620,7 @@ sighandler(int signum) return FALSE; } #else -void sigint_callback_handler(int signum) +void sigint_callback_handler(int signum) { fprintf(stderr, "Caught signal %d\n", signum); do_exit = true; @@ -613,7 +630,8 @@ void sigint_callback_handler(int signum) #define PATH_FILE_MAX_LEN (FILENAME_MAX) #define DATE_TIME_MAX_LEN (32) -int main(int argc, char** argv) { +int main(int argc, char** argv) +{ int opt; char path_file[PATH_FILE_MAX_LEN]; char date_time[DATE_TIME_MAX_LEN]; @@ -622,20 +640,19 @@ int main(int argc, char** argv) { char* endptr = NULL; int result; time_t rawtime; - struct tm * timeinfo; + struct tm* timeinfo; long int file_pos; int exit_code = EXIT_SUCCESS; struct timeval t_end; float time_diff; - unsigned int lna_gain=8, vga_gain=20, txvga_gain=0; + unsigned int lna_gain = 8, vga_gain = 20, txvga_gain = 0; hackrf_m0_state state; stats_t stats = {0, 0}; - - while( (opt = getopt(argc, argv, "H:wr:t:f:i:o:m:a:p:s:n:b:l:g:x:c:d:C:RS:Bh?")) != EOF ) - { + + while ((opt = getopt(argc, argv, "H:wr:t:f:i:o:m:a:p:s:n:b:l:g:x:c:d:C:RS:Bh?")) != + EOF) { result = HACKRF_SUCCESS; - switch( opt ) - { + switch (opt) { case 'H': hw_sync = true; result = parse_u32(optarg, &hw_sync_enable); @@ -644,13 +661,13 @@ int main(int argc, char** argv) { receive_wav = true; requested_mode_count++; break; - + case 'r': receive = true; requested_mode_count++; path = optarg; break; - + case 't': transmit = true; requested_mode_count++; @@ -663,7 +680,7 @@ int main(int argc, char** argv) { case 'S': result = parse_u64(optarg, &stream_size); - stream_buf = calloc(1,stream_size); + stream_buf = calloc(1, stream_size); break; case 'f': @@ -724,7 +741,10 @@ int main(int argc, char** argv) { break; case 'b': - result = parse_frequency_u32(optarg, endptr, &baseband_filter_bw_hz); + result = parse_frequency_u32( + optarg, + endptr, + &baseband_filter_bw_hz); baseband_filter_bw = true; break; @@ -734,11 +754,11 @@ int main(int argc, char** argv) { result = parse_u32(optarg, &litude); break; - case 'R': - repeat = true; - break; - - case 'C': + case 'R': + repeat = true; + break; + + case 'C': crystal_correct = true; result = parse_u32(optarg, &crystal_correct_ppm); break; @@ -753,12 +773,17 @@ int main(int argc, char** argv) { usage(); return EXIT_FAILURE; } - - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "argument error: '-%c %s' %s (%d)\n", opt, optarg, hackrf_error_name(result), result); + + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "argument error: '-%c %s' %s (%d)\n", + opt, + optarg, + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; - } + } } if (lna_gain % 8) @@ -768,9 +793,10 @@ int main(int argc, char** argv) { fprintf(stderr, "warning: vga_gain (-g) must be a multiple of 2\n"); if (samples_to_xfer >= SAMPLES_TO_XFER_MAX) { - fprintf(stderr, "argument error: num_samples must be less than %s/%sMio\n", - u64toa(SAMPLES_TO_XFER_MAX,&ascii_u64_data1), - u64toa((SAMPLES_TO_XFER_MAX/FREQ_ONE_MHZ),&ascii_u64_data2)); + fprintf(stderr, + "argument error: num_samples must be less than %s/%sMio\n", + u64toa(SAMPLES_TO_XFER_MAX, &ascii_u64_data1), + u64toa((SAMPLES_TO_XFER_MAX / FREQ_ONE_MHZ), &ascii_u64_data2)); usage(); return EXIT_FAILURE; } @@ -778,41 +804,48 @@ int main(int argc, char** argv) { if (if_freq || lo_freq || image_reject) { /* explicit tuning selected */ if (!if_freq) { - fprintf(stderr, "argument error: if_freq_hz must be specified for explicit tuning.\n"); + fprintf(stderr, + "argument error: if_freq_hz must be specified for explicit tuning.\n"); usage(); return EXIT_FAILURE; } if (!image_reject) { - fprintf(stderr, "argument error: image_reject must be specified for explicit tuning.\n"); + fprintf(stderr, + "argument error: image_reject must be specified for explicit tuning.\n"); usage(); return EXIT_FAILURE; } if (!lo_freq && (image_reject_selection != RF_PATH_FILTER_BYPASS)) { - fprintf(stderr, "argument error: lo_freq_hz must be specified for explicit tuning unless image_reject is set to bypass.\n"); + fprintf(stderr, + "argument error: lo_freq_hz must be specified for explicit tuning unless image_reject is set to bypass.\n"); usage(); return EXIT_FAILURE; } if ((if_freq_hz > IF_MAX_HZ) || (if_freq_hz < IF_MIN_HZ)) { - fprintf(stderr, "argument error: if_freq_hz shall be between %s and %s.\n", - u64toa(IF_MIN_HZ,&ascii_u64_data1), - u64toa(IF_MAX_HZ,&ascii_u64_data2)); + fprintf(stderr, + "argument error: if_freq_hz shall be between %s and %s.\n", + u64toa(IF_MIN_HZ, &ascii_u64_data1), + u64toa(IF_MAX_HZ, &ascii_u64_data2)); usage(); return EXIT_FAILURE; } if ((lo_freq_hz > LO_MAX_HZ) || (lo_freq_hz < LO_MIN_HZ)) { - fprintf(stderr, "argument error: lo_freq_hz shall be between %s and %s.\n", - u64toa(LO_MIN_HZ,&ascii_u64_data1), - u64toa(LO_MAX_HZ,&ascii_u64_data2)); + fprintf(stderr, + "argument error: lo_freq_hz shall be between %s and %s.\n", + u64toa(LO_MIN_HZ, &ascii_u64_data1), + u64toa(LO_MAX_HZ, &ascii_u64_data2)); usage(); return EXIT_FAILURE; } if (image_reject_selection > 2) { - fprintf(stderr, "argument error: image_reject must be 0, 1, or 2 .\n"); + fprintf(stderr, + "argument error: image_reject must be 0, 1, or 2 .\n"); usage(); return EXIT_FAILURE; } if (automatic_tuning) { - fprintf(stderr, "warning: freq_hz ignored by explicit tuning selection.\n"); + fprintf(stderr, + "warning: freq_hz ignored by explicit tuning selection.\n"); automatic_tuning = false; } switch (image_reject_selection) { @@ -829,15 +862,16 @@ int main(int argc, char** argv) { freq_hz = DEFAULT_FREQ_HZ; break; } - fprintf(stderr, "explicit tuning specified for %s Hz.\n", - u64toa(freq_hz,&ascii_u64_data1)); + fprintf(stderr, + "explicit tuning specified for %s Hz.\n", + u64toa(freq_hz, &ascii_u64_data1)); } else if (automatic_tuning) { - if(freq_hz > FREQ_MAX_HZ) - { - fprintf(stderr, "argument error: freq_hz shall be between %s and %s.\n", - u64toa(FREQ_MIN_HZ,&ascii_u64_data1), - u64toa(FREQ_MAX_HZ,&ascii_u64_data2)); + if (freq_hz > FREQ_MAX_HZ) { + fprintf(stderr, + "argument error: freq_hz shall be between %s and %s.\n", + u64toa(FREQ_MIN_HZ, &ascii_u64_data1), + u64toa(FREQ_MAX_HZ, &ascii_u64_data2)); usage(); return EXIT_FAILURE; } @@ -847,9 +881,8 @@ int main(int argc, char** argv) { automatic_tuning = true; } - if( amp ) { - if( amp_enable > 1 ) - { + if (amp) { + if (amp_enable > 1) { fprintf(stderr, "argument error: amp_enable shall be 0 or 1.\n"); usage(); return EXIT_FAILURE; @@ -858,81 +891,90 @@ int main(int argc, char** argv) { if (antenna) { if (antenna_enable > 1) { - fprintf(stderr, "argument error: antenna_enable shall be 0 or 1.\n"); + fprintf(stderr, + "argument error: antenna_enable shall be 0 or 1.\n"); usage(); return EXIT_FAILURE; } } - if( sample_rate == false ) - { + if (sample_rate == false) { sample_rate_hz = DEFAULT_SAMPLE_RATE_HZ; } - if( baseband_filter_bw ) - { + if (baseband_filter_bw) { if (baseband_filter_bw_hz > BASEBAND_FILTER_BW_MAX) { - fprintf(stderr, "argument error: baseband_filter_bw_hz must be less or equal to %u Hz/%.03f MHz\n", - BASEBAND_FILTER_BW_MAX, (float)(BASEBAND_FILTER_BW_MAX/FREQ_ONE_MHZ)); + fprintf(stderr, + "argument error: baseband_filter_bw_hz must be less or equal to %u Hz/%.03f MHz\n", + BASEBAND_FILTER_BW_MAX, + (float) (BASEBAND_FILTER_BW_MAX / FREQ_ONE_MHZ)); usage(); return EXIT_FAILURE; } if (baseband_filter_bw_hz < BASEBAND_FILTER_BW_MIN) { - fprintf(stderr, "argument error: baseband_filter_bw_hz must be greater or equal to %u Hz/%.03f MHz\n", - BASEBAND_FILTER_BW_MIN, (float)(BASEBAND_FILTER_BW_MIN/FREQ_ONE_MHZ)); + fprintf(stderr, + "argument error: baseband_filter_bw_hz must be greater or equal to %u Hz/%.03f MHz\n", + BASEBAND_FILTER_BW_MIN, + (float) (BASEBAND_FILTER_BW_MIN / FREQ_ONE_MHZ)); usage(); return EXIT_FAILURE; } /* Compute nearest freq for bw filter */ - baseband_filter_bw_hz = hackrf_compute_baseband_filter_bw(baseband_filter_bw_hz); + baseband_filter_bw_hz = + hackrf_compute_baseband_filter_bw(baseband_filter_bw_hz); } - if(requested_mode_count > 1) { + if (requested_mode_count > 1) { fprintf(stderr, "specify only one of: -t, -c, -r, -w\n"); usage(); return EXIT_FAILURE; } - if(requested_mode_count < 1) { + if (requested_mode_count < 1) { fprintf(stderr, "specify one of: -t, -c, -r, -w\n"); usage(); return EXIT_FAILURE; } - if( receive ) { + if (receive) { transceiver_mode = TRANSCEIVER_MODE_RX; } - if( transmit ) { + if (transmit) { transceiver_mode = TRANSCEIVER_MODE_TX; } if (signalsource) { transceiver_mode = TRANSCEIVER_MODE_SS; - if (amplitude >127) { - fprintf(stderr, "argument error: amplitude shall be in between 0 and 127.\n"); + if (amplitude > 127) { + fprintf(stderr, + "argument error: amplitude shall be in between 0 and 127.\n"); usage(); return EXIT_FAILURE; } } - if( receive_wav ) - { - time (&rawtime); - timeinfo = localtime (&rawtime); + if (receive_wav) { + time(&rawtime); + timeinfo = localtime(&rawtime); transceiver_mode = TRANSCEIVER_MODE_RX; /* File format HackRF Year(2013), Month(11), Day(28), Hour Min Sec+Z, Freq kHz, IQ.wav */ strftime(date_time, DATE_TIME_MAX_LEN, "%Y%m%d_%H%M%S", timeinfo); - snprintf(path_file, PATH_FILE_MAX_LEN, "HackRF_%sZ_%ukHz_IQ.wav", date_time, (uint32_t)(freq_hz/(1000ull)) ); + snprintf( + path_file, + PATH_FILE_MAX_LEN, + "HackRF_%sZ_%ukHz_IQ.wav", + date_time, + (uint32_t) (freq_hz / (1000ull))); path = path_file; fprintf(stderr, "Receive wav file: %s\n", path); - } + } // In signal source mode, the PATH argument is neglected. if (transceiver_mode != TRANSCEIVER_MODE_SS) { - if( path == NULL ) { + if (path == NULL) { fprintf(stderr, "specify a path to a file to transmit/receive\n"); usage(); return EXIT_FAILURE; @@ -940,30 +982,34 @@ int main(int argc, char** argv) { } // Change the freq and sample rate to correct the crystal clock error. - if( crystal_correct ) { - - sample_rate_hz = (uint32_t)((double)sample_rate_hz * (1000000 - crystal_correct_ppm)/1000000+0.5); - freq_hz = freq_hz * (1000000 - crystal_correct_ppm)/1000000; - + if (crystal_correct) { + sample_rate_hz = + (uint32_t) ((double) sample_rate_hz * (1000000 - crystal_correct_ppm) / 1000000 + 0.5); + freq_hz = freq_hz * (1000000 - crystal_correct_ppm) / 1000000; } result = hackrf_init(); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_init() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_init() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } - + result = hackrf_open_by_serial(serial_number, &device); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_open() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_open() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } - + if (transceiver_mode != TRANSCEIVER_MODE_SS) { - if( transceiver_mode == TRANSCEIVER_MODE_RX ) - { + if (transceiver_mode == TRANSCEIVER_MODE_RX) { if (strcmp(path, "-") == 0) { file = stdout; } else { @@ -976,14 +1022,14 @@ int main(int argc, char** argv) { file = fopen(path, "rb"); } } - - if( file == NULL ) { + + if (file == NULL) { fprintf(stderr, "Failed to open file: %s\n", path); return EXIT_FAILURE; } /* Change file buffer to have bigger one to store or read data on/to HDD */ - result = setvbuf(file , NULL , _IOFBF , FD_BUFFER_SIZE); - if( result != 0 ) { + result = setvbuf(file, NULL, _IOFBF, FD_BUFFER_SIZE); + if (result != 0) { fprintf(stderr, "setvbuf() failed: %d\n", result); usage(); return EXIT_FAILURE; @@ -991,13 +1037,12 @@ int main(int argc, char** argv) { } /* Write Wav header */ - if( receive_wav ) - { + if (receive_wav) { fwrite(&wave_file_hdr, 1, sizeof(t_wav_file_hdr), file); } - + #ifdef _MSC_VER - SetConsoleCtrlHandler( (PHANDLER_ROUTINE) sighandler, TRUE ); + SetConsoleCtrlHandler((PHANDLER_ROUTINE) sighandler, TRUE); #else signal(SIGINT, &sigint_callback_handler); signal(SIGILL, &sigint_callback_handler); @@ -1006,33 +1051,51 @@ int main(int argc, char** argv) { signal(SIGTERM, &sigint_callback_handler); signal(SIGABRT, &sigint_callback_handler); #endif - fprintf(stderr, "call hackrf_set_sample_rate(%u Hz/%.03f MHz)\n", sample_rate_hz,((float)sample_rate_hz/(float)FREQ_ONE_MHZ)); + fprintf(stderr, + "call hackrf_set_sample_rate(%u Hz/%.03f MHz)\n", + sample_rate_hz, + ((float) sample_rate_hz / (float) FREQ_ONE_MHZ)); result = hackrf_set_sample_rate(device, sample_rate_hz); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_set_sample_rate() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_set_sample_rate() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } - if( baseband_filter_bw ) { - fprintf(stderr, "call hackrf_baseband_filter_bandwidth_set(%d Hz/%.03f MHz)\n", - baseband_filter_bw_hz, ((float)baseband_filter_bw_hz/(float)FREQ_ONE_MHZ)); - result = hackrf_set_baseband_filter_bandwidth(device, baseband_filter_bw_hz); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_baseband_filter_bandwidth_set() failed: %s (%d)\n", hackrf_error_name(result), result); + if (baseband_filter_bw) { + fprintf(stderr, + "call hackrf_baseband_filter_bandwidth_set(%d Hz/%.03f MHz)\n", + baseband_filter_bw_hz, + ((float) baseband_filter_bw_hz / (float) FREQ_ONE_MHZ)); + result = hackrf_set_baseband_filter_bandwidth( + device, + baseband_filter_bw_hz); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_baseband_filter_bandwidth_set() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } } fprintf(stderr, "call hackrf_set_hw_sync_mode(%d)\n", hw_sync_enable); - result = hackrf_set_hw_sync_mode(device, hw_sync_enable ? HW_SYNC_MODE_ON : HW_SYNC_MODE_OFF); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_set_hw_sync_mode() failed: %s (%d)\n", hackrf_error_name(result), result); + result = hackrf_set_hw_sync_mode( + device, + hw_sync_enable ? HW_SYNC_MODE_ON : HW_SYNC_MODE_OFF); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_set_hw_sync_mode() failed: %s (%d)\n", + hackrf_error_name(result), + result); return EXIT_FAILURE; } - if( transceiver_mode == TRANSCEIVER_MODE_RX ) { + if (transceiver_mode == TRANSCEIVER_MODE_RX) { result = hackrf_set_vga_gain(device, vga_gain); result |= hackrf_set_lna_gain(device, lna_gain); result |= hackrf_start_rx(device, rx_callback, NULL); @@ -1040,41 +1103,58 @@ int main(int argc, char** argv) { result = hackrf_set_txvga_gain(device, txvga_gain); result |= hackrf_start_tx(device, tx_callback, NULL); } - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_start_?x() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_start_?x() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } if (automatic_tuning) { - fprintf(stderr, "call hackrf_set_freq(%s Hz/%.03f MHz)\n", - u64toa(freq_hz, &ascii_u64_data1),((double)freq_hz/(double)FREQ_ONE_MHZ) ); + fprintf(stderr, + "call hackrf_set_freq(%s Hz/%.03f MHz)\n", + u64toa(freq_hz, &ascii_u64_data1), + ((double) freq_hz / (double) FREQ_ONE_MHZ)); result = hackrf_set_freq(device, freq_hz); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_set_freq() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_set_freq() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } } else { - fprintf(stderr, "call hackrf_set_freq_explicit() with %s Hz IF, %s Hz LO, %s\n", - u64toa(if_freq_hz,&ascii_u64_data1), - u64toa(lo_freq_hz,&ascii_u64_data2), - hackrf_filter_path_name(image_reject_selection)); - result = hackrf_set_freq_explicit(device, if_freq_hz, lo_freq_hz, - image_reject_selection); + fprintf(stderr, + "call hackrf_set_freq_explicit() with %s Hz IF, %s Hz LO, %s\n", + u64toa(if_freq_hz, &ascii_u64_data1), + u64toa(lo_freq_hz, &ascii_u64_data2), + hackrf_filter_path_name(image_reject_selection)); + result = hackrf_set_freq_explicit( + device, + if_freq_hz, + lo_freq_hz, + image_reject_selection); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_set_freq_explicit() failed: %s (%d)\n", - hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_set_freq_explicit() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } } - if( amp ) { + if (amp) { fprintf(stderr, "call hackrf_set_amp_enable(%u)\n", amp_enable); - result = hackrf_set_amp_enable(device, (uint8_t)amp_enable); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_set_amp_enable() failed: %s (%d)\n", hackrf_error_name(result), result); + result = hackrf_set_amp_enable(device, (uint8_t) amp_enable); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_set_amp_enable() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } @@ -1082,137 +1162,166 @@ int main(int argc, char** argv) { if (antenna) { fprintf(stderr, "call hackrf_set_antenna_enable(%u)\n", antenna_enable); - result = hackrf_set_antenna_enable(device, (uint8_t)antenna_enable); + result = hackrf_set_antenna_enable(device, (uint8_t) antenna_enable); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_set_antenna_enable() failed: %s (%d)\n", hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_set_antenna_enable() failed: %s (%d)\n", + hackrf_error_name(result), + result); usage(); return EXIT_FAILURE; } } - if( limit_num_samples ) { - fprintf(stderr, "samples_to_xfer %s/%sMio\n", - u64toa(samples_to_xfer,&ascii_u64_data1), - u64toa((samples_to_xfer/FREQ_ONE_MHZ),&ascii_u64_data2) ); + if (limit_num_samples) { + fprintf(stderr, + "samples_to_xfer %s/%sMio\n", + u64toa(samples_to_xfer, &ascii_u64_data1), + u64toa((samples_to_xfer / FREQ_ONE_MHZ), &ascii_u64_data2)); } - + gettimeofday(&t_start, NULL); gettimeofday(&time_start, NULL); fprintf(stderr, "Stop with Ctrl-C\n"); - while( (hackrf_is_streaming(device) == HACKRF_TRUE) && - (do_exit == false) ) - { + while ((hackrf_is_streaming(device) == HACKRF_TRUE) && (do_exit == false)) { uint32_t byte_count_now; struct timeval time_now; float time_difference, rate; - if (stream_size>0) { + if (stream_size > 0) { #ifndef _WIN32 - if(stream_head==stream_tail) { + if (stream_head == stream_tail) { usleep(10000); // queue empty - } else { + } else { ssize_t len; ssize_t bytes_written; - uint32_t _st= __atomic_load_n(&stream_tail,__ATOMIC_ACQUIRE); - if(stream_head<_st) - len=_st-stream_head; + uint32_t _st = + __atomic_load_n(&stream_tail, __ATOMIC_ACQUIRE); + if (stream_head < _st) + len = _st - stream_head; else - len=stream_size-stream_head; - bytes_written = fwrite(stream_buf+stream_head, 1, len, file); + len = stream_size - stream_head; + bytes_written = + fwrite(stream_buf + stream_head, 1, len, file); if (len != bytes_written) { fprintf(stderr, "write failed"); - do_exit=true; + do_exit = true; }; - stream_head=(stream_head+len)%stream_size; - } - if(stream_drop>0) { - uint32_t drops= __atomic_exchange_n (&stream_drop,0,__ATOMIC_SEQ_CST); + stream_head = (stream_head + len) % stream_size; + } + if (stream_drop > 0) { + uint32_t drops = __atomic_exchange_n( + &stream_drop, + 0, + __ATOMIC_SEQ_CST); fprintf(stderr, "dropped frames: [%d]\n", drops); - } + } #endif } else { - uint64_t stream_amplitude_now; + uint64_t stream_amplitude_now; sleep(1); gettimeofday(&time_now, NULL); - + byte_count_now = byte_count; byte_count = 0; - stream_amplitude_now = stream_amplitude; - stream_amplitude = 0; - if (byte_count_now < sample_rate_hz/20) // Don't report on very short frames + stream_amplitude_now = stream_amplitude; + stream_amplitude = 0; + if (byte_count_now < + sample_rate_hz / 20) // Don't report on very short frames stream_amplitude_now = 0; time_difference = TimevalDiff(&time_now, &time_start); - rate = (float)byte_count_now / time_difference; - if (byte_count_now == 0 && hw_sync == true && hw_sync_enable != 0) { - fprintf(stderr, "Waiting for sync...\n"); + rate = (float) byte_count_now / time_difference; + if (byte_count_now == 0 && hw_sync == true && + hw_sync_enable != 0) { + fprintf(stderr, "Waiting for sync...\n"); } else { - // This is only an approximate measure, to assist getting receive levels right: - double full_scale_ratio = ((double)stream_amplitude_now / (byte_count_now ? byte_count_now : 1))/128; - double dB_full_scale_ratio = 10*log10(full_scale_ratio); - // Guard against ridiculous reports - if (dB_full_scale_ratio > 1) - dB_full_scale_ratio = -0.0; - fprintf(stderr, "%4.1f MiB / %5.3f sec = %4.1f MiB/second, amplitude %3.1f dBfs", - (byte_count_now / 1e6f), - time_difference, - (rate / 1e6f), - dB_full_scale_ratio - ); - if (display_stats) { - bool tx = transmit || signalsource; - result = update_stats(device, &state, &stats); - if (result != HACKRF_SUCCESS) - fprintf(stderr, "\nhackrf_get_m0_state() failed: %s (%d)\n", hackrf_error_name(result), result); - else - fprintf(stderr, ", %d bytes %s in buffer, %u %s, longest %u bytes\n", - tx ? state.m4_count - state.m0_count : state.m0_count - state.m4_count, - tx ? "filled" : "free", - state.num_shortfalls, - tx ? "underruns" : "overruns", - state.longest_shortfall); - } else { - fprintf(stderr, "\n"); - } + // This is only an approximate measure, to assist getting receive levels right: + double full_scale_ratio = + ((double) stream_amplitude_now / + (byte_count_now ? byte_count_now : 1)) / + 128; + double dB_full_scale_ratio = 10 * log10(full_scale_ratio); + // Guard against ridiculous reports + if (dB_full_scale_ratio > 1) + dB_full_scale_ratio = -0.0; + fprintf(stderr, + "%4.1f MiB / %5.3f sec = %4.1f MiB/second, amplitude %3.1f dBfs", + (byte_count_now / 1e6f), + time_difference, + (rate / 1e6f), + dB_full_scale_ratio); + if (display_stats) { + bool tx = transmit || signalsource; + result = update_stats(device, &state, &stats); + if (result != HACKRF_SUCCESS) + fprintf(stderr, + "\nhackrf_get_m0_state() failed: %s (%d)\n", + hackrf_error_name(result), + result); + else + fprintf(stderr, + ", %d bytes %s in buffer, %u %s, longest %u bytes\n", + tx ? state.m4_count - + state.m0_count : + state.m0_count - + state.m4_count, + tx ? "filled" : "free", + state.num_shortfalls, + tx ? "underruns" : "overruns", + state.longest_shortfall); + } else { + fprintf(stderr, "\n"); + } } time_start = time_now; - if (byte_count_now == 0 && (hw_sync == false || hw_sync_enable == 0)) { + if (byte_count_now == 0 && + (hw_sync == false || hw_sync_enable == 0)) { exit_code = EXIT_FAILURE; - fprintf(stderr, "\nCouldn't transfer any bytes for one second.\n"); + fprintf(stderr, + "\nCouldn't transfer any bytes for one second.\n"); break; } } } - result = hackrf_is_streaming(device); - if (do_exit) - { + result = hackrf_is_streaming(device); + if (do_exit) { fprintf(stderr, "\nExiting...\n"); } else { - fprintf(stderr, "\nExiting... hackrf_is_streaming() result: %s (%d)\n", hackrf_error_name(result), result); + fprintf(stderr, + "\nExiting... hackrf_is_streaming() result: %s (%d)\n", + hackrf_error_name(result), + result); } gettimeofday(&t_end, NULL); time_diff = TimevalDiff(&t_end, &t_start); fprintf(stderr, "Total time: %5.5f s\n", time_diff); - if(device != NULL) { - if(receive || receive_wav) { + if (device != NULL) { + if (receive || receive_wav) { result = hackrf_stop_rx(device); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_stop_rx() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_stop_rx() failed: %s (%d)\n", + hackrf_error_name(result), + result); } else { fprintf(stderr, "hackrf_stop_rx() done\n"); } } - if(transmit || signalsource) { + if (transmit || signalsource) { result = hackrf_stop_tx(device); - if( result != HACKRF_SUCCESS ) { - fprintf(stderr, "hackrf_stop_tx() failed: %s (%d)\n", hackrf_error_name(result), result); - }else { + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_stop_tx() failed: %s (%d)\n", + hackrf_error_name(result), + result); + } else { fprintf(stderr, "hackrf_stop_tx() done\n"); } } @@ -1220,7 +1329,10 @@ int main(int argc, char** argv) { if (display_stats) { result = update_stats(device, &state, &stats); if (result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_get_m0_state() failed: %s (%d)\n", hackrf_error_name(result), result); + fprintf(stderr, + "hackrf_get_m0_state() failed: %s (%d)\n", + hackrf_error_name(result), + result); } else { fprintf(stderr, "Transfer statistics:\n" @@ -1230,14 +1342,18 @@ int main(int argc, char** argv) { stats.m0_total, stats.m4_total, state.num_shortfalls, - (transmit || signalsource) ? "underruns" : "overruns", + (transmit || signalsource) ? "underruns" : + "overruns", state.longest_shortfall); } } result = hackrf_close(device); - if(result != HACKRF_SUCCESS) { - fprintf(stderr, "hackrf_close() failed: %s (%d)\n", hackrf_error_name(result), result); + if (result != HACKRF_SUCCESS) { + fprintf(stderr, + "hackrf_close() failed: %s (%d)\n", + hackrf_error_name(result), + result); } else { fprintf(stderr, "hackrf_close() done\n"); } @@ -1246,21 +1362,21 @@ int main(int argc, char** argv) { fprintf(stderr, "hackrf_exit() done\n"); } - if(file != NULL) - { - if( receive_wav ) - { + if (file != NULL) { + if (receive_wav) { /* Get size of file */ file_pos = ftell(file); /* Update Wav Header */ - wave_file_hdr.hdr.size = file_pos-8; + wave_file_hdr.hdr.size = file_pos - 8; wave_file_hdr.fmt_chunk.dwSamplesPerSec = sample_rate_hz; - wave_file_hdr.fmt_chunk.dwAvgBytesPerSec = wave_file_hdr.fmt_chunk.dwSamplesPerSec*2; - wave_file_hdr.data_chunk.chunkSize = file_pos - sizeof(t_wav_file_hdr); + wave_file_hdr.fmt_chunk.dwAvgBytesPerSec = + wave_file_hdr.fmt_chunk.dwSamplesPerSec * 2; + wave_file_hdr.data_chunk.chunkSize = + file_pos - sizeof(t_wav_file_hdr); /* Overwrite header with updated data */ rewind(file); fwrite(&wave_file_hdr, 1, sizeof(t_wav_file_hdr), file); - } + } if (file != stdin) { fflush(file); } diff --git a/host/libhackrf/src/hackrf.c b/host/libhackrf/src/hackrf.c index b418a1c6..7e3453cd 100644 --- a/host/libhackrf/src/hackrf.c +++ b/host/libhackrf/src/hackrf.c @@ -26,33 +26,33 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI #include #include #ifndef _WIN32 -#include + #include #endif #include #ifdef _WIN32 -/* Avoid redefinition of timespec from time.h (included by libusb.h) */ -#define HAVE_STRUCT_TIMESPEC 1 -#define strdup _strdup + /* Avoid redefinition of timespec from time.h (included by libusb.h) */ + #define HAVE_STRUCT_TIMESPEC 1 + #define strdup _strdup #endif #include #ifndef bool typedef int bool; -#define true 1 -#define false 0 + #define true 1 + #define false 0 #endif #ifdef HACKRF_BIG_ENDIAN -#define TO_LE(x) __builtin_bswap32(x) -#define TO_LE64(x) __builtin_bswap64(x) -#define FROM_LE16(x) __builtin_bswap16(x) -#define FROM_LE32(x) __builtin_bswap32(x) + #define TO_LE(x) __builtin_bswap32(x) + #define TO_LE64(x) __builtin_bswap64(x) + #define FROM_LE16(x) __builtin_bswap16(x) + #define FROM_LE32(x) __builtin_bswap32(x) #else -#define TO_LE(x) x -#define TO_LE64(x) x -#define FROM_LE16(x) x -#define FROM_LE32(x) x + #define TO_LE(x) x + #define TO_LE64(x) x + #define FROM_LE16(x) x + #define FROM_LE32(x) x #endif // TODO: Factor this into a shared #include so that firmware can use @@ -117,24 +117,25 @@ typedef enum { HACKRF_HW_SYNC_MODE_ON = 1, } hackrf_hw_sync_mode; -#define TRANSFER_COUNT 4 -#define TRANSFER_BUFFER_SIZE 262144 +#define TRANSFER_COUNT 4 +#define TRANSFER_BUFFER_SIZE 262144 #define USB_MAX_SERIAL_LENGTH 32 struct hackrf_device { libusb_device_handle* usb_device; struct libusb_transfer** transfers; hackrf_sample_block_cb_fn callback; - volatile bool transfer_thread_started; /* volatile shared between threads (read only) */ + volatile bool + transfer_thread_started; /* volatile shared between threads (read only) */ pthread_t transfer_thread; volatile bool streaming; /* volatile shared between threads (read only) */ void* rx_ctx; void* tx_ctx; volatile bool do_exit; unsigned char buffer[TRANSFER_COUNT * TRANSFER_BUFFER_SIZE]; - bool transfers_setup; /* true if the USB transfers have been setup */ - pthread_mutex_t transfer_lock; /* must be held to cancel or restart transfers */ - volatile int active_transfers; /* number of active transfers */ + bool transfers_setup; /* true if the USB transfers have been setup */ + pthread_mutex_t transfer_lock; /* must be held to cancel or restart transfers */ + volatile int active_transfers; /* number of active transfers */ pthread_cond_t all_finished_cv; /* signalled when all transfers have finished */ pthread_mutex_t all_finished_lock; /* used to protect all_finished */ }; @@ -144,30 +145,29 @@ typedef struct { } max2837_ft_t; static const max2837_ft_t max2837_ft[] = { - { 1750000 }, - { 2500000 }, - { 3500000 }, - { 5000000 }, - { 5500000 }, - { 6000000 }, - { 7000000 }, - { 8000000 }, - { 9000000 }, - { 10000000 }, - { 12000000 }, - { 14000000 }, - { 15000000 }, - { 20000000 }, - { 24000000 }, - { 28000000 }, - { 0 } -}; + {1750000}, + {2500000}, + {3500000}, + {5000000}, + {5500000}, + {6000000}, + {7000000}, + {8000000}, + {9000000}, + {10000000}, + {12000000}, + {14000000}, + {15000000}, + {20000000}, + {24000000}, + {28000000}, + {0}}; -#define USB_API_REQUIRED(device, version) \ -uint16_t usb_version = 0; \ -hackrf_usb_api_version_read(device, &usb_version); \ -if(usb_version < version) \ - return HACKRF_ERROR_USB_API_VERSION; +#define USB_API_REQUIRED(device, version) \ + uint16_t usb_version = 0; \ + hackrf_usb_api_version_read(device, &usb_version); \ + if (usb_version < version) \ + return HACKRF_ERROR_USB_API_VERSION; static const uint16_t hackrf_usb_vid = 0x1d50; static const uint16_t hackrf_jawbreaker_usb_pid = 0x604b; @@ -188,7 +188,7 @@ int last_libusb_error = LIBUSB_SUCCESS; */ static int transfers_check_setup(hackrf_device* device) { - if( (device->transfers != NULL) && (device->transfers_setup == true) ) + if ((device->transfers != NULL) && (device->transfers_setup == true)) return true; return false; } @@ -214,17 +214,15 @@ static int cancel_transfers(hackrf_device* device) // If we're cancelling transfers for any reason, we're shutting down. device->streaming = false; - if(transfers_check_setup(device) == true) - { + if (transfers_check_setup(device) == true) { // Take lock while cancelling transfers. This blocks the // transfer completion callback from restarting a transfer // while we're in the middle of trying to cancel them all. pthread_mutex_lock(&device->transfer_lock); - for(transfer_index=0; transfer_indextransfers[transfer_index] != NULL ) - { + for (transfer_index = 0; transfer_index < TRANSFER_COUNT; + transfer_index++) { + if (device->transfers[transfer_index] != NULL) { libusb_cancel_transfer(device->transfers[transfer_index]); } } @@ -242,7 +240,9 @@ static int cancel_transfers(hackrf_device* device) // have finished, either by completing or being fully cancelled. pthread_mutex_lock(&device->all_finished_lock); while (device->active_transfers > 0) { - pthread_cond_wait(&device->all_finished_cv, &device->all_finished_lock); + pthread_cond_wait( + &device->all_finished_cv, + &device->all_finished_lock); } pthread_mutex_unlock(&device->all_finished_lock); @@ -256,13 +256,11 @@ static int free_transfers(hackrf_device* device) { uint32_t transfer_index; - if( device->transfers != NULL ) - { + if (device->transfers != NULL) { // libusb_close() should free all transfers referenced from this array. - for(transfer_index=0; transfer_indextransfers[transfer_index] != NULL ) - { + for (transfer_index = 0; transfer_index < TRANSFER_COUNT; + transfer_index++) { + if (device->transfers[transfer_index] != NULL) { libusb_free_transfer(device->transfers[transfer_index]); device->transfers[transfer_index] = NULL; } @@ -275,22 +273,21 @@ static int free_transfers(hackrf_device* device) static int allocate_transfers(hackrf_device* const device) { - if( device->transfers == NULL ) - { + if (device->transfers == NULL) { uint32_t transfer_index; - device->transfers = (struct libusb_transfer**) calloc(TRANSFER_COUNT, sizeof(struct libusb_transfer)); - if( device->transfers == NULL ) - { + device->transfers = (struct libusb_transfer**) calloc( + TRANSFER_COUNT, + sizeof(struct libusb_transfer)); + if (device->transfers == NULL) { return HACKRF_ERROR_NO_MEM; } memset(device->buffer, 0, TRANSFER_COUNT * TRANSFER_BUFFER_SIZE); - for(transfer_index=0; transfer_indextransfers[transfer_index] = libusb_alloc_transfer(0); - if( device->transfers[transfer_index] == NULL ) - { + if (device->transfers[transfer_index] == NULL) { return HACKRF_ERROR_LIBUSB; } @@ -302,11 +299,9 @@ static int allocate_transfers(hackrf_device* const device) TRANSFER_BUFFER_SIZE, NULL, device, - 0 - ); + 0); - if( device->transfers[transfer_index]->buffer == NULL ) - { + if (device->transfers[transfer_index]->buffer == NULL) { return HACKRF_ERROR_NO_MEM; } } @@ -323,16 +318,14 @@ static int prepare_transfers( { int error; uint32_t transfer_index; - if( device->transfers != NULL ) - { - for(transfer_index=0; transfer_indextransfers != NULL) { + for (transfer_index = 0; transfer_index < TRANSFER_COUNT; + transfer_index++) { device->transfers[transfer_index]->endpoint = endpoint_address; device->transfers[transfer_index]->callback = callback; error = libusb_submit_transfer(device->transfers[transfer_index]); - if( error != 0 ) - { + if (error != 0) { last_libusb_error = error; return HACKRF_ERROR_LIBUSB; } @@ -355,28 +348,24 @@ static int detach_kernel_drivers(libusb_device_handle* usb_device_handle) dev = libusb_get_device(usb_device_handle); result = libusb_get_active_config_descriptor(dev, &config); - if( result < 0 ) - { + if (result < 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } num_interfaces = config->bNumInterfaces; libusb_free_config_descriptor(config); - for(i=0; iusb_devicecount = (int) libusb_get_device_list(g_libusb_context, (libusb_device ***)&list->usb_devices); - - list->serial_numbers = calloc(list->usb_devicecount, sizeof(void *)); - list->usb_board_ids = calloc(list->usb_devicecount, sizeof(enum hackrf_usb_board_id)); + + list->usb_devicecount = (int) libusb_get_device_list( + g_libusb_context, + (libusb_device***) &list->usb_devices); + + list->serial_numbers = calloc(list->usb_devicecount, sizeof(void*)); + list->usb_board_ids = + calloc(list->usb_devicecount, sizeof(enum hackrf_usb_board_id)); list->usb_device_index = calloc(list->usb_devicecount, sizeof(int)); - - if ( list->serial_numbers == NULL || list->usb_board_ids == NULL || list->usb_device_index == NULL) { + + if (list->serial_numbers == NULL || list->usb_board_ids == NULL || + list->usb_device_index == NULL) { hackrf_device_list_free(list); return NULL; } - - for (i=0; iusb_devicecount; i++) { + + for (i = 0; i < list->usb_devicecount; i++) { struct libusb_device_descriptor device_descriptor; libusb_get_device_descriptor(list->usb_devices[i], &device_descriptor); - - if( device_descriptor.idVendor == hackrf_usb_vid ) { - if((device_descriptor.idProduct == hackrf_one_usb_pid) || - (device_descriptor.idProduct == hackrf_jawbreaker_usb_pid) || - (device_descriptor.idProduct == rad1o_usb_pid)) { + + if (device_descriptor.idVendor == hackrf_usb_vid) { + if ((device_descriptor.idProduct == hackrf_one_usb_pid) || + (device_descriptor.idProduct == hackrf_jawbreaker_usb_pid) || + (device_descriptor.idProduct == rad1o_usb_pid)) { idx = list->devicecount++; list->usb_board_ids[idx] = device_descriptor.idProduct; list->usb_device_index[idx] = i; - + serial_descriptor_index = device_descriptor.iSerialNumber; - if( serial_descriptor_index > 0 ) { - if( libusb_open(list->usb_devices[i], &usb_device) != 0 ) { + if (serial_descriptor_index > 0) { + if (libusb_open( + list->usb_devices[i], + &usb_device) != 0) { usb_device = NULL; continue; } - serial_number_length = libusb_get_string_descriptor_ascii(usb_device, serial_descriptor_index, (unsigned char*)serial_number, sizeof(serial_number)); - if( serial_number_length >= USB_MAX_SERIAL_LENGTH ) - serial_number_length = USB_MAX_SERIAL_LENGTH; + serial_number_length = + libusb_get_string_descriptor_ascii( + usb_device, + serial_descriptor_index, + (unsigned char*) serial_number, + sizeof(serial_number)); + if (serial_number_length >= USB_MAX_SERIAL_LENGTH) + serial_number_length = + USB_MAX_SERIAL_LENGTH; serial_number[serial_number_length] = 0; list->serial_numbers[idx] = strdup(serial_number); - + libusb_close(usb_device); usb_device = NULL; } } } } - + return list; } -void ADDCALL hackrf_device_list_free(hackrf_device_list_t *list) +void ADDCALL hackrf_device_list_free(hackrf_device_list_t* list) { int i; - - libusb_free_device_list((libusb_device **)list->usb_devices, 1); - + + libusb_free_device_list((libusb_device**) list->usb_devices, 1); + for (i = 0; i < list->devicecount; i++) { if (list->serial_numbers[i]) free(list->serial_numbers[i]); } - + free(list->serial_numbers); free(list->usb_board_ids); free(list->usb_device_index); @@ -558,37 +549,51 @@ libusb_device_handle* hackrf_open_usb(const char* const desired_serial_number) ssize_t i; char serial_number[64]; int serial_number_length; - - if( desired_serial_number ) { + + if (desired_serial_number) { /* If a shorter serial number is specified, only match against the suffix. * Should probably complain if the match is not unique, currently doesn't. */ match_len = strlen(desired_serial_number); - if ( match_len > 32 ) + if (match_len > 32) return NULL; } - - for (i=0; i 0 ) { - if( libusb_open(devices[i], &usb_device) != 0 ) { + + if (device_descriptor.idVendor == hackrf_usb_vid) { + if ((device_descriptor.idProduct == hackrf_one_usb_pid) || + (device_descriptor.idProduct == hackrf_jawbreaker_usb_pid) || + (device_descriptor.idProduct == rad1o_usb_pid)) { + if (desired_serial_number != NULL) { + const uint_fast8_t serial_descriptor_index = + device_descriptor.iSerialNumber; + if (serial_descriptor_index > 0) { + if (libusb_open( + devices[i], + &usb_device) != 0) { usb_device = NULL; continue; } - serial_number_length = libusb_get_string_descriptor_ascii(usb_device, serial_descriptor_index, (unsigned char*)serial_number, sizeof(serial_number)); - if( serial_number_length >= USB_MAX_SERIAL_LENGTH ) - serial_number_length = USB_MAX_SERIAL_LENGTH; + serial_number_length = + libusb_get_string_descriptor_ascii( + usb_device, + serial_descriptor_index, + (unsigned char*) + serial_number, + sizeof(serial_number)); + if (serial_number_length >= + USB_MAX_SERIAL_LENGTH) + serial_number_length = + USB_MAX_SERIAL_LENGTH; serial_number[serial_number_length] = 0; - if( strncmp(serial_number + serial_number_length-match_len, desired_serial_number, match_len) == 0 ) { + if (strncmp(serial_number + + serial_number_length - + match_len, + desired_serial_number, + match_len) == 0) { break; } else { libusb_close(usb_device); @@ -602,9 +607,9 @@ libusb_device_handle* hackrf_open_usb(const char* const desired_serial_number) } } } - + libusb_free_device_list(devices, 1); - + return usb_device; } @@ -615,26 +620,23 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d //int speed = libusb_get_device_speed(usb_device); // TODO: Error or warning if not high speed USB? - + result = set_hackrf_configuration(usb_device, USB_CONFIG_STANDARD); - if( result != LIBUSB_SUCCESS ) - { + if (result != LIBUSB_SUCCESS) { libusb_close(usb_device); return result; } result = libusb_claim_interface(usb_device, 0); - if( result != LIBUSB_SUCCESS ) - { + if (result != LIBUSB_SUCCESS) { last_libusb_error = result; libusb_close(usb_device); return HACKRF_ERROR_LIBUSB; } lib_device = NULL; - lib_device = (hackrf_device*)calloc(1, sizeof(*lib_device)); - if( lib_device == NULL ) - { + lib_device = (hackrf_device*) calloc(1, sizeof(*lib_device)); + if (lib_device == NULL) { libusb_release_interface(usb_device, 0); libusb_close(usb_device); return HACKRF_ERROR_NO_MEM; @@ -649,8 +651,7 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d lib_device->active_transfers = 0; result = pthread_mutex_init(&lib_device->transfer_lock, NULL); - if( result != 0 ) - { + if (result != 0) { free(lib_device); libusb_release_interface(usb_device, 0); libusb_close(usb_device); @@ -658,8 +659,7 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d } result = pthread_mutex_init(&lib_device->all_finished_lock, NULL); - if( result != 0 ) - { + if (result != 0) { free(lib_device); libusb_release_interface(usb_device, 0); libusb_close(usb_device); @@ -667,8 +667,7 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d } result = pthread_cond_init(&lib_device->all_finished_cv, NULL); - if( result != 0 ) - { + if (result != 0) { free(lib_device); libusb_release_interface(usb_device, 0); libusb_close(usb_device); @@ -676,8 +675,7 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d } result = allocate_transfers(lib_device); - if( result != 0 ) - { + if (result != 0) { free(lib_device); libusb_release_interface(usb_device, 0); libusb_close(usb_device); @@ -701,94 +699,101 @@ static int hackrf_open_setup(libusb_device_handle* usb_device, hackrf_device** d int ADDCALL hackrf_open(hackrf_device** device) { libusb_device_handle* usb_device; - - if( device == NULL ) - { + + if (device == NULL) { return HACKRF_ERROR_INVALID_PARAM; } - - usb_device = libusb_open_device_with_vid_pid(g_libusb_context, hackrf_usb_vid, hackrf_one_usb_pid); - - if( usb_device == NULL ) - { - usb_device = libusb_open_device_with_vid_pid(g_libusb_context, hackrf_usb_vid, hackrf_jawbreaker_usb_pid); + + usb_device = libusb_open_device_with_vid_pid( + g_libusb_context, + hackrf_usb_vid, + hackrf_one_usb_pid); + + if (usb_device == NULL) { + usb_device = libusb_open_device_with_vid_pid( + g_libusb_context, + hackrf_usb_vid, + hackrf_jawbreaker_usb_pid); } - - if( usb_device == NULL ) - { - usb_device = libusb_open_device_with_vid_pid(g_libusb_context, hackrf_usb_vid, rad1o_usb_pid); + + if (usb_device == NULL) { + usb_device = libusb_open_device_with_vid_pid( + g_libusb_context, + hackrf_usb_vid, + rad1o_usb_pid); } - - if( usb_device == NULL ) - { + + if (usb_device == NULL) { return HACKRF_ERROR_NOT_FOUND; } - + return hackrf_open_setup(usb_device, device); } -int ADDCALL hackrf_open_by_serial(const char* const desired_serial_number, hackrf_device** device) +int ADDCALL hackrf_open_by_serial( + const char* const desired_serial_number, + hackrf_device** device) { libusb_device_handle* usb_device; - - if( desired_serial_number == NULL ) - { + + if (desired_serial_number == NULL) { return hackrf_open(device); } - - if( device == NULL ) - { + + if (device == NULL) { return HACKRF_ERROR_INVALID_PARAM; } - + usb_device = hackrf_open_usb(desired_serial_number); - - if( usb_device == NULL ) - { + + if (usb_device == NULL) { return HACKRF_ERROR_NOT_FOUND; } - + return hackrf_open_setup(usb_device, device); } -int ADDCALL hackrf_device_list_open(hackrf_device_list_t *list, int idx, hackrf_device** device) +int ADDCALL hackrf_device_list_open( + hackrf_device_list_t* list, + int idx, + hackrf_device** device) { libusb_device_handle* usb_device; int i, result; - - if( device == NULL || list == NULL || idx < 0 || idx >= list->devicecount ) - { + + if (device == NULL || list == NULL || idx < 0 || idx >= list->devicecount) { return HACKRF_ERROR_INVALID_PARAM; } - + i = list->usb_device_index[idx]; result = libusb_open(list->usb_devices[i], &usb_device); - if(result != 0) { + if (result != 0) { usb_device = NULL; last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } - + return hackrf_open_setup(usb_device, device); } -int ADDCALL hackrf_set_transceiver_mode(hackrf_device* device, hackrf_transceiver_mode value) +int ADDCALL hackrf_set_transceiver_mode( + hackrf_device* device, + hackrf_transceiver_mode value) { int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SET_TRANSCEIVER_MODE, value, 0, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -796,12 +801,14 @@ int ADDCALL hackrf_set_transceiver_mode(hackrf_device* device, hackrf_transceive } } -int ADDCALL hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value) +int ADDCALL hackrf_max2837_read( + hackrf_device* device, + uint8_t register_number, + uint16_t* value) { int result; - if( register_number >= 32 ) - { + if (register_number >= 32) { return HACKRF_ERROR_INVALID_PARAM; } @@ -811,13 +818,11 @@ int ADDCALL hackrf_max2837_read(hackrf_device* device, uint8_t register_number, HACKRF_VENDOR_REQUEST_MAX2837_READ, 0, register_number, - (unsigned char*)value, + (unsigned char*) value, 2, - 0 - ); + 0); - if( result < 2 ) - { + if (result < 2) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -825,32 +830,32 @@ int ADDCALL hackrf_max2837_read(hackrf_device* device, uint8_t register_number, } } -int ADDCALL hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value) +int ADDCALL hackrf_max2837_write( + hackrf_device* device, + uint8_t register_number, + uint16_t value) { int result; - - if( register_number >= 32 ) - { + + if (register_number >= 32) { return HACKRF_ERROR_INVALID_PARAM; } - if( value >= 0x400 ) - { + if (value >= 0x400) { return HACKRF_ERROR_INVALID_PARAM; } result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_MAX2837_WRITE, value, register_number, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -858,13 +863,15 @@ int ADDCALL hackrf_max2837_write(hackrf_device* device, uint8_t register_number, } } -int ADDCALL hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value) +int ADDCALL hackrf_si5351c_read( + hackrf_device* device, + uint16_t register_number, + uint16_t* value) { uint8_t temp_value; int result; - - if( register_number >= 256 ) - { + + if (register_number >= 256) { return HACKRF_ERROR_INVALID_PARAM; } @@ -875,13 +882,11 @@ int ADDCALL hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, HACKRF_VENDOR_REQUEST_SI5351C_READ, 0, register_number, - (unsigned char*)&temp_value, + (unsigned char*) &temp_value, 1, - 0 - ); + 0); - if( result < 1 ) - { + if (result < 1) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -890,31 +895,32 @@ int ADDCALL hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, } } -int ADDCALL hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value) +int ADDCALL hackrf_si5351c_write( + hackrf_device* device, + uint16_t register_number, + uint16_t value) { int result; - - if( register_number >= 256 ) - { + + if (register_number >= 256) { return HACKRF_ERROR_INVALID_PARAM; } - if( value >= 256 ) { + if (value >= 256) { return HACKRF_ERROR_INVALID_PARAM; } result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SI5351C_WRITE, value, register_number, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -922,22 +928,23 @@ int ADDCALL hackrf_si5351c_write(hackrf_device* device, uint16_t register_number } } -int ADDCALL hackrf_set_baseband_filter_bandwidth(hackrf_device* device, const uint32_t bandwidth_hz) +int ADDCALL hackrf_set_baseband_filter_bandwidth( + hackrf_device* device, + const uint32_t bandwidth_hz) { int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_BASEBAND_FILTER_BANDWIDTH_SET, bandwidth_hz & 0xffff, bandwidth_hz >> 16, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -945,13 +952,14 @@ int ADDCALL hackrf_set_baseband_filter_bandwidth(hackrf_device* device, const ui } } - -int ADDCALL hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value) +int ADDCALL hackrf_rffc5071_read( + hackrf_device* device, + uint8_t register_number, + uint16_t* value) { int result; - - if( register_number >= 31 ) - { + + if (register_number >= 31) { return HACKRF_ERROR_INVALID_PARAM; } @@ -961,13 +969,11 @@ int ADDCALL hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, HACKRF_VENDOR_REQUEST_RFFC5071_READ, 0, register_number, - (unsigned char*)value, + (unsigned char*) value, 2, - 0 - ); + 0); - if( result < 2 ) - { + if (result < 2) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -975,28 +981,29 @@ int ADDCALL hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, } } -int ADDCALL hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value) +int ADDCALL hackrf_rffc5071_write( + hackrf_device* device, + uint8_t register_number, + uint16_t value) { int result; - - if( register_number >= 31 ) - { + + if (register_number >= 31) { return HACKRF_ERROR_INVALID_PARAM; } result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_RFFC5071_WRITE, value, register_number, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1015,13 +1022,11 @@ int ADDCALL hackrf_get_m0_state(hackrf_device* device, hackrf_m0_state* state) HACKRF_VENDOR_REQUEST_GET_M0_STATE, 0, 0, - (unsigned char*)state, + (unsigned char*) state, sizeof(hackrf_m0_state), - 0 - ); + 0); - if( result < sizeof(hackrf_m0_state) ) - { + if (result < sizeof(hackrf_m0_state)) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1047,17 +1052,16 @@ int ADDCALL hackrf_set_tx_underrun_limit(hackrf_device* device, uint32_t value) result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SET_TX_UNDERRUN_LIMIT, value & 0xffff, value >> 16, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1072,17 +1076,16 @@ int ADDCALL hackrf_set_rx_overrun_limit(hackrf_device* device, uint32_t value) result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SET_RX_OVERRUN_LIMIT, value & 0xffff, value >> 16, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1095,17 +1098,16 @@ int ADDCALL hackrf_spiflash_erase(hackrf_device* device) int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SPIFLASH_ERASE, 0, 0, NULL, 0, - 0 - ); + 0); - if (result != 0) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1113,29 +1115,30 @@ int ADDCALL hackrf_spiflash_erase(hackrf_device* device) } } -int ADDCALL hackrf_spiflash_write(hackrf_device* device, const uint32_t address, - const uint16_t length, unsigned char* const data) +int ADDCALL hackrf_spiflash_write( + hackrf_device* device, + const uint32_t address, + const uint16_t length, + unsigned char* const data) { int result; - - if (address > 0x0FFFFF) - { + + if (address > 0x0FFFFF) { return HACKRF_ERROR_INVALID_PARAM; } result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SPIFLASH_WRITE, address >> 16, address & 0xFFFF, data, length, - 0 - ); + 0); - if (result < length) - { + if (result < length) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1143,13 +1146,15 @@ int ADDCALL hackrf_spiflash_write(hackrf_device* device, const uint32_t address, } } -int ADDCALL hackrf_spiflash_read(hackrf_device* device, const uint32_t address, - const uint16_t length, unsigned char* data) +int ADDCALL hackrf_spiflash_read( + hackrf_device* device, + const uint32_t address, + const uint16_t length, + unsigned char* data) { int result; - - if (address > 0x0FFFFF) - { + + if (address > 0x0FFFFF) { return HACKRF_ERROR_INVALID_PARAM; } @@ -1161,11 +1166,9 @@ int ADDCALL hackrf_spiflash_read(hackrf_device* device, const uint32_t address, address & 0xFFFF, data, length, - 0 - ); + 0); - if (result < length) - { + if (result < length) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1186,11 +1189,9 @@ int ADDCALL hackrf_spiflash_status(hackrf_device* device, uint8_t* data) 0, data, 2, - 0 - ); + 0); - if (result < 1) - { + if (result < 1) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1204,17 +1205,16 @@ int ADDCALL hackrf_spiflash_clear_status(hackrf_device* device) int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SPIFLASH_CLEAR_STATUS, 0, 0, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1222,19 +1222,20 @@ int ADDCALL hackrf_spiflash_clear_status(hackrf_device* device) } } -int ADDCALL hackrf_cpld_write(hackrf_device* device, - unsigned char* const data, const unsigned int total_length) +int ADDCALL hackrf_cpld_write( + hackrf_device* device, + unsigned char* const data, + const unsigned int total_length) { const unsigned int chunk_size = 512; unsigned int i; int result, transferred = 0; - + result = hackrf_set_transceiver_mode(device, TRANSCEIVER_MODE_CPLD_UPDATE); if (result != 0) return result; - - for (i = 0; i < total_length; i += chunk_size) - { + + for (i = 0; i < total_length; i += chunk_size) { result = libusb_bulk_transfer( device->usb_device, LIBUSB_ENDPOINT_OUT | 2, @@ -1264,11 +1265,9 @@ int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value) 0, value, 1, - 0 - ); + 0); - if (result < 1) - { + if (result < 1) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1276,8 +1275,10 @@ int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value) } } -int ADDCALL hackrf_version_string_read(hackrf_device* device, char* version, - uint8_t length) +int ADDCALL hackrf_version_string_read( + hackrf_device* device, + char* version, + uint8_t length) { int result; result = libusb_control_transfer( @@ -1286,13 +1287,11 @@ int ADDCALL hackrf_version_string_read(hackrf_device* device, char* version, HACKRF_VENDOR_REQUEST_VERSION_STRING_READ, 0, 0, - (unsigned char*)version, + (unsigned char*) version, length, - 0 - ); + 0); - if (result < 0) - { + if (result < 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1301,8 +1300,9 @@ int ADDCALL hackrf_version_string_read(hackrf_device* device, char* version, } } -extern ADDAPI int ADDCALL hackrf_usb_api_version_read(hackrf_device* device, - uint16_t* version) +extern ADDAPI int ADDCALL hackrf_usb_api_version_read( + hackrf_device* device, + uint16_t* version) { int result; libusb_device* dev; @@ -1320,10 +1320,11 @@ extern ADDAPI int ADDCALL hackrf_usb_api_version_read(hackrf_device* device, typedef struct { uint32_t freq_mhz; /* From 0 to 6000+MHz */ - uint32_t freq_hz; /* From 0 to 999999Hz */ - /* Final Freq = freq_mhz+freq_hz */ + uint32_t freq_hz; /* From 0 to 999999Hz */ + /* Final Freq = freq_mhz+freq_hz */ } set_freq_params_t; -#define FREQ_ONE_MHZ (1000*1000ull) + +#define FREQ_ONE_MHZ (1000 * 1000ull) int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz) { @@ -1332,27 +1333,26 @@ int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz) set_freq_params_t set_freq_params; uint8_t length; int result; - + /* Convert Freq Hz 64bits to Freq MHz (32bits) & Freq Hz (32bits) */ - l_freq_mhz = (uint32_t)(freq_hz / FREQ_ONE_MHZ); - l_freq_hz = (uint32_t)(freq_hz - (((uint64_t)l_freq_mhz) * FREQ_ONE_MHZ)); + l_freq_mhz = (uint32_t) (freq_hz / FREQ_ONE_MHZ); + l_freq_hz = (uint32_t) (freq_hz - (((uint64_t) l_freq_mhz) * FREQ_ONE_MHZ)); set_freq_params.freq_mhz = TO_LE(l_freq_mhz); set_freq_params.freq_hz = TO_LE(l_freq_hz); length = sizeof(set_freq_params_t); result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SET_FREQ, 0, 0, - (unsigned char*)&set_freq_params, + (unsigned char*) &set_freq_params, length, - 0 - ); + 0); - if (result < length) - { + if (result < length) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1366,9 +1366,11 @@ struct set_freq_explicit_params { uint8_t path; /* image rejection filter path */ }; -int ADDCALL hackrf_set_freq_explicit(hackrf_device* device, - const uint64_t if_freq_hz, const uint64_t lo_freq_hz, - const enum rf_path_filter path) +int ADDCALL hackrf_set_freq_explicit( + hackrf_device* device, + const uint64_t if_freq_hz, + const uint64_t lo_freq_hz, + const enum rf_path_filter path) { struct set_freq_explicit_params params; uint8_t length; @@ -1379,7 +1381,7 @@ int ADDCALL hackrf_set_freq_explicit(hackrf_device* device, } if ((path != RF_PATH_FILTER_BYPASS) && - (lo_freq_hz < 84375000 || lo_freq_hz > 5400000000)) { + (lo_freq_hz < 84375000 || lo_freq_hz > 5400000000)) { return HACKRF_ERROR_INVALID_PARAM; } @@ -1389,22 +1391,21 @@ int ADDCALL hackrf_set_freq_explicit(hackrf_device* device, params.if_freq_hz = TO_LE(if_freq_hz); params.lo_freq_hz = TO_LE(lo_freq_hz); - params.path = (uint8_t)path; + params.path = (uint8_t) path; length = sizeof(struct set_freq_explicit_params); result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SET_FREQ_EXPLICIT, 0, 0, - (unsigned char*)¶ms, + (unsigned char*) ¶ms, length, - 0 - ); + 0); - if (result < length) - { + if (result < length) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1417,15 +1418,15 @@ typedef struct { uint32_t divider; } set_fracrate_params_t; - /* * You should probably use hackrf_set_sample_rate() below instead of this * function. They both result in automatic baseband filter selection as * described below. */ -int ADDCALL hackrf_set_sample_rate_manual(hackrf_device* device, - const uint32_t freq_hz, - const uint32_t divider) +int ADDCALL hackrf_set_sample_rate_manual( + hackrf_device* device, + const uint32_t freq_hz, + const uint32_t divider) { set_fracrate_params_t set_fracrate_params; uint8_t length; @@ -1437,22 +1438,23 @@ int ADDCALL hackrf_set_sample_rate_manual(hackrf_device* device, result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SAMPLE_RATE_SET, 0, 0, - (unsigned char*)&set_fracrate_params, + (unsigned char*) &set_fracrate_params, length, - 0 - ); + 0); - if (result < length) - { + if (result < length) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { - return hackrf_set_baseband_filter_bandwidth(device, - hackrf_compute_baseband_filter_bw((uint32_t)(0.75*freq_hz/divider))); + return hackrf_set_baseband_filter_bandwidth( + device, + hackrf_compute_baseband_filter_bw( + (uint32_t) (0.75 * freq_hz / divider))); } } @@ -1466,7 +1468,7 @@ int ADDCALL hackrf_set_sample_rate(hackrf_device* device, const double freq) { const int MAX_N = 32; uint32_t freq_hz, divider; - double freq_frac = 1.0 + freq - (int)freq; + double freq_frac = 1.0 + freq - (int) freq; uint64_t a, m; int i, e; @@ -1474,6 +1476,7 @@ int ADDCALL hackrf_set_sample_rate(hackrf_device* device, const double freq) uint64_t u64; double d; } v; + v.d = freq; e = (v.u64 >> 52) - 1023; @@ -1483,11 +1486,11 @@ int ADDCALL hackrf_set_sample_rate(hackrf_device* device, const double freq) v.d = freq_frac; v.u64 &= m; - m &= ~((1 << (e+4)) - 1); + m &= ~((1 << (e + 4)) - 1); a = 0; - for (i=1; iusb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_AMP_ENABLE, value, 0, NULL, 0, - 0 - ); + 0); - if (result != 0) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1525,11 +1527,13 @@ int ADDCALL hackrf_set_amp_enable(hackrf_device* device, const uint8_t value) } } -int ADDCALL hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno) +int ADDCALL hackrf_board_partid_serialno_read( + hackrf_device* device, + read_partid_serialno_t* read_partid_serialno) { uint8_t length; int result; - + length = sizeof(read_partid_serialno_t); result = libusb_control_transfer( device->usb_device, @@ -1537,23 +1541,26 @@ int ADDCALL hackrf_board_partid_serialno_read(hackrf_device* device, read_partid HACKRF_VENDOR_REQUEST_BOARD_PARTID_SERIALNO_READ, 0, 0, - (unsigned char*)read_partid_serialno, + (unsigned char*) read_partid_serialno, length, - 0 - ); + 0); - if (result < length) - { + if (result < length) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { - - read_partid_serialno->part_id[0] = TO_LE(read_partid_serialno->part_id[0]); - read_partid_serialno->part_id[1] = TO_LE(read_partid_serialno->part_id[1]); - read_partid_serialno->serial_no[0] = TO_LE(read_partid_serialno->serial_no[0]); - read_partid_serialno->serial_no[1] = TO_LE(read_partid_serialno->serial_no[1]); - read_partid_serialno->serial_no[2] = TO_LE(read_partid_serialno->serial_no[2]); - read_partid_serialno->serial_no[3] = TO_LE(read_partid_serialno->serial_no[3]); + read_partid_serialno->part_id[0] = + TO_LE(read_partid_serialno->part_id[0]); + read_partid_serialno->part_id[1] = + TO_LE(read_partid_serialno->part_id[1]); + read_partid_serialno->serial_no[0] = + TO_LE(read_partid_serialno->serial_no[0]); + read_partid_serialno->serial_no[1] = + TO_LE(read_partid_serialno->serial_no[1]); + read_partid_serialno->serial_no[2] = + TO_LE(read_partid_serialno->serial_no[2]); + read_partid_serialno->serial_no[3] = + TO_LE(read_partid_serialno->serial_no[3]); return HACKRF_SUCCESS; } @@ -1563,9 +1570,8 @@ int ADDCALL hackrf_set_lna_gain(hackrf_device* device, uint32_t value) { int result; uint8_t retval; - - if( value > 40 ) - { + + if (value > 40) { return HACKRF_ERROR_INVALID_PARAM; } @@ -1578,11 +1584,9 @@ int ADDCALL hackrf_set_lna_gain(hackrf_device* device, uint32_t value) value, &retval, 1, - 0 - ); + 0); - if( result != 1 || !retval ) - { + if (result != 1 || !retval) { return HACKRF_ERROR_INVALID_PARAM; } else { return HACKRF_SUCCESS; @@ -1593,9 +1597,8 @@ int ADDCALL hackrf_set_vga_gain(hackrf_device* device, uint32_t value) { int result; uint8_t retval; - - if( value > 62 ) - { + + if (value > 62) { return HACKRF_ERROR_INVALID_PARAM; } @@ -1608,11 +1611,9 @@ int ADDCALL hackrf_set_vga_gain(hackrf_device* device, uint32_t value) value, &retval, 1, - 0 - ); + 0); - if( result != 1 || !retval ) - { + if (result != 1 || !retval) { return HACKRF_ERROR_INVALID_PARAM; } else { return HACKRF_SUCCESS; @@ -1623,9 +1624,8 @@ int ADDCALL hackrf_set_txvga_gain(hackrf_device* device, uint32_t value) { int result; uint8_t retval; - - if( value > 47 ) - { + + if (value > 47) { return HACKRF_ERROR_INVALID_PARAM; } @@ -1637,11 +1637,9 @@ int ADDCALL hackrf_set_txvga_gain(hackrf_device* device, uint32_t value) value, &retval, 1, - 0 - ); + 0); - if( result != 1 || !retval ) - { + if (result != 1 || !retval) { return HACKRF_ERROR_INVALID_PARAM; } else { return HACKRF_SUCCESS; @@ -1653,17 +1651,16 @@ int ADDCALL hackrf_set_antenna_enable(hackrf_device* device, const uint8_t value int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_ANTENNA_ENABLE, value, 0, NULL, 0, - 0 - ); + 0); - if (result != 0) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -1673,15 +1670,13 @@ int ADDCALL hackrf_set_antenna_enable(hackrf_device* device, const uint8_t value static void* transfer_threadproc(void* arg) { - hackrf_device* device = (hackrf_device*)arg; + hackrf_device* device = (hackrf_device*) arg; int error; - struct timeval timeout = { 0, 500000 }; + struct timeval timeout = {0, 500000}; - while(device->do_exit == false ) - { + while (device->do_exit == false) { error = libusb_handle_events_timeout(g_libusb_context, &timeout); - if( (error != 0) && (error != LIBUSB_ERROR_INTERRUPTED) ) - { + if ((error != 0) && (error != LIBUSB_ERROR_INTERRUPTED)) { device->streaming = false; } } @@ -1689,7 +1684,9 @@ static void* transfer_threadproc(void* arg) return NULL; } -static void transfer_finished(struct hackrf_device* device, struct libusb_transfer* finished_transfer) +static void transfer_finished( + struct hackrf_device* device, + struct libusb_transfer* finished_transfer) { // If a transfer finished for any reason, we're shutting down. device->streaming = false; @@ -1705,25 +1702,23 @@ static void transfer_finished(struct hackrf_device* device, struct libusb_transf pthread_mutex_unlock(&device->all_finished_lock); } -static void LIBUSB_CALL hackrf_libusb_transfer_callback(struct libusb_transfer* usb_transfer) +static void LIBUSB_CALL +hackrf_libusb_transfer_callback(struct libusb_transfer* usb_transfer) { - hackrf_device* device = (hackrf_device*)usb_transfer->user_data; + hackrf_device* device = (hackrf_device*) usb_transfer->user_data; bool resubmit; int result; - if(usb_transfer->status == LIBUSB_TRANSFER_COMPLETED) - { + if (usb_transfer->status == LIBUSB_TRANSFER_COMPLETED) { hackrf_transfer transfer = { .device = device, .buffer = usb_transfer->buffer, .buffer_length = usb_transfer->length, .valid_length = usb_transfer->actual_length, .rx_ctx = device->rx_ctx, - .tx_ctx = device->tx_ctx - }; + .tx_ctx = device->tx_ctx}; - if (device->streaming && device->callback(&transfer) == 0) - { + if (device->streaming && device->callback(&transfer) == 0) { // Take lock to make sure that we don't restart a // transfer whilst cancel_transfers() is in the middle // of stopping them. @@ -1752,8 +1747,7 @@ static int kill_transfer_thread(hackrf_device* device) void* value; int result; - if( device->transfer_thread_started != false ) - { + if (device->transfer_thread_started != false) { /* * Cancel transfers. This call will block until the transfer * thread has handled all completion callbacks. @@ -1771,12 +1765,10 @@ static int kill_transfer_thread(hackrf_device* device) value = NULL; result = pthread_join(device->transfer_thread, &value); - if( result != 0 ) - { + if (result != 0) { return HACKRF_ERROR_THREAD; } device->transfer_thread_started = false; - } /* @@ -1788,35 +1780,37 @@ static int kill_transfer_thread(hackrf_device* device) return HACKRF_SUCCESS; } -static int prepare_setup_transfers(hackrf_device* device, +static int prepare_setup_transfers( + hackrf_device* device, const uint8_t endpoint_address, - hackrf_sample_block_cb_fn callback) + hackrf_sample_block_cb_fn callback) { - if( device->transfers_setup == true ) - { + if (device->transfers_setup == true) { return HACKRF_ERROR_BUSY; } device->callback = callback; return prepare_transfers( - device, endpoint_address, - hackrf_libusb_transfer_callback - ); + device, + endpoint_address, + hackrf_libusb_transfer_callback); } static int create_transfer_thread(hackrf_device* device) { int result; - if( device->transfer_thread_started == false ) - { + if (device->transfer_thread_started == false) { device->streaming = false; device->do_exit = false; - result = pthread_create(&device->transfer_thread, 0, transfer_threadproc, device); - if( result == 0 ) - { + result = pthread_create( + &device->transfer_thread, + 0, + transfer_threadproc, + device); + if (result == 0) { device->transfer_thread_started = true; - }else { + } else { return HACKRF_ERROR_THREAD; } } else { @@ -1830,20 +1824,15 @@ int ADDCALL hackrf_is_streaming(hackrf_device* device) { /* return hackrf is streaming only when streaming, transfer_thread_started are true and do_exit equal false */ - if( (device->transfer_thread_started == true) && - (device->streaming == true) && - (device->do_exit == false) ) - { + if ((device->transfer_thread_started == true) && (device->streaming == true) && + (device->do_exit == false)) { return HACKRF_TRUE; } else { - - if(device->transfer_thread_started == false) - { + if (device->transfer_thread_started == false) { return HACKRF_ERROR_STREAMING_THREAD_ERR; } - if(device->streaming == false) - { + if (device->streaming == false) { return HACKRF_ERROR_STREAMING_STOPPED; } @@ -1851,14 +1840,16 @@ int ADDCALL hackrf_is_streaming(hackrf_device* device) } } -int ADDCALL hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx) +int ADDCALL hackrf_start_rx( + hackrf_device* device, + hackrf_sample_block_cb_fn callback, + void* rx_ctx) { int result; const uint8_t endpoint_address = LIBUSB_ENDPOINT_IN | 1; device->rx_ctx = rx_ctx; result = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_RECEIVE); - if( result == HACKRF_SUCCESS ) - { + if (result == HACKRF_SUCCESS) { result = prepare_setup_transfers(device, endpoint_address, callback); } return result; @@ -1884,21 +1875,22 @@ int ADDCALL hackrf_stop_rx(hackrf_device* device) int result; result = cancel_transfers(device); - if (result != HACKRF_SUCCESS) - { + if (result != HACKRF_SUCCESS) { return result; } return hackrf_stop_cmd(device); } -int ADDCALL hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* tx_ctx) +int ADDCALL hackrf_start_tx( + hackrf_device* device, + hackrf_sample_block_cb_fn callback, + void* tx_ctx) { int result; const uint8_t endpoint_address = LIBUSB_ENDPOINT_OUT | 2; result = hackrf_set_transceiver_mode(device, HACKRF_TRANSCEIVER_MODE_TRANSMIT); - if( result == HACKRF_SUCCESS ) - { + if (result == HACKRF_SUCCESS) { device->tx_ctx = tx_ctx; result = prepare_setup_transfers(device, endpoint_address, callback); } @@ -1917,8 +1909,7 @@ int ADDCALL hackrf_stop_tx(hackrf_device* device) { int result; result = cancel_transfers(device); - if (result != HACKRF_SUCCESS) - { + if (result != HACKRF_SUCCESS) { return result; } @@ -1932,8 +1923,7 @@ int ADDCALL hackrf_close(hackrf_device* device) result1 = HACKRF_SUCCESS; result2 = HACKRF_SUCCESS; - if( device != NULL ) - { + if (device != NULL) { result1 = hackrf_stop_cmd(device); /* @@ -1941,8 +1931,7 @@ int ADDCALL hackrf_close(hackrf_device* device) * also cancel any pending transmit/receive transfers. */ result2 = kill_transfer_thread(device); - if( device->usb_device != NULL ) - { + if (device->usb_device != NULL) { libusb_release_interface(device->usb_device, 0); libusb_close(device->usb_device); device->usb_device = NULL; @@ -1958,8 +1947,7 @@ int ADDCALL hackrf_close(hackrf_device* device) } open_devices--; - if (result2 != HACKRF_SUCCESS) - { + if (result2 != HACKRF_SUCCESS) { return result2; } return result1; @@ -1967,8 +1955,7 @@ int ADDCALL hackrf_close(hackrf_device* device) const char* ADDCALL hackrf_error_name(enum hackrf_error errcode) { - switch(errcode) - { + switch (errcode) { case HACKRF_SUCCESS: return "HACKRF_SUCCESS"; @@ -1989,7 +1976,7 @@ const char* ADDCALL hackrf_error_name(enum hackrf_error errcode) case HACKRF_ERROR_LIBUSB: #if defined(LIBUSB_API_VERSION) && (LIBUSB_API_VERSION >= 0x01000103) - if(last_libusb_error != LIBUSB_SUCCESS) + if (last_libusb_error != LIBUSB_SUCCESS) return libusb_strerror(last_libusb_error); #endif return "USB error"; @@ -2022,8 +2009,7 @@ const char* ADDCALL hackrf_error_name(enum hackrf_error errcode) const char* ADDCALL hackrf_board_id_name(enum hackrf_board_id board_id) { - switch(board_id) - { + switch (board_id) { case BOARD_ID_JELLYBEAN: return "Jellybean"; @@ -2044,10 +2030,10 @@ const char* ADDCALL hackrf_board_id_name(enum hackrf_board_id board_id) } } -extern ADDAPI const char* ADDCALL hackrf_usb_board_id_name(enum hackrf_usb_board_id usb_board_id) +extern ADDAPI const char* ADDCALL hackrf_usb_board_id_name( + enum hackrf_usb_board_id usb_board_id) { - switch(usb_board_id) - { + switch (usb_board_id) { case USB_BOARD_ID_JAWBREAKER: return "Jawbreaker"; @@ -2067,7 +2053,7 @@ extern ADDAPI const char* ADDCALL hackrf_usb_board_id_name(enum hackrf_usb_board const char* ADDCALL hackrf_filter_path_name(const enum rf_path_filter path) { - switch(path) { + switch (path) { case RF_PATH_FILTER_BYPASS: return "mixer bypass"; case RF_PATH_FILTER_LOW_PASS: @@ -2080,20 +2066,18 @@ const char* ADDCALL hackrf_filter_path_name(const enum rf_path_filter path) } /* Return final bw round down and less than expected bw. */ -uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt(const uint32_t bandwidth_hz) +uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt( + const uint32_t bandwidth_hz) { const max2837_ft_t* p = max2837_ft; - while( p->bandwidth_hz != 0 ) - { - if( p->bandwidth_hz >= bandwidth_hz ) - { + while (p->bandwidth_hz != 0) { + if (p->bandwidth_hz >= bandwidth_hz) { break; } p++; } /* Round down (if no equal to first entry) */ - if(p != max2837_ft) - { + if (p != max2837_ft) { p--; } return p->bandwidth_hz; @@ -2103,19 +2087,16 @@ uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt(const uint32_t uint32_t ADDCALL hackrf_compute_baseband_filter_bw(const uint32_t bandwidth_hz) { const max2837_ft_t* p = max2837_ft; - while( p->bandwidth_hz != 0 ) - { - if( p->bandwidth_hz >= bandwidth_hz ) - { + while (p->bandwidth_hz != 0) { + if (p->bandwidth_hz >= bandwidth_hz) { break; } p++; } /* Round down (if no equal to first entry) and if > bandwidth_hz */ - if(p != max2837_ft) - { - if(p->bandwidth_hz > bandwidth_hz) + if (p != max2837_ft) { + if (p->bandwidth_hz > bandwidth_hz) p--; } @@ -2124,21 +2105,21 @@ uint32_t ADDCALL hackrf_compute_baseband_filter_bw(const uint32_t bandwidth_hz) /* All features below require USB API version 0x0102 or higher) */ -int ADDCALL hackrf_set_hw_sync_mode(hackrf_device* device, const uint8_t value) { +int ADDCALL hackrf_set_hw_sync_mode(hackrf_device* device, const uint8_t value) +{ USB_API_REQUIRED(device, 0x0102) int result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_SET_HW_SYNC_MODE, value, 0, NULL, 0, - 0 - ); + 0); - if( result != 0 ) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2160,32 +2141,37 @@ int ADDCALL hackrf_set_hw_sync_mode(hackrf_device* device, const uint8_t value) * interleaved sub-steps, allowing the host to select the best portions * of the FFT of each sub-step and discard the rest. */ -int ADDCALL hackrf_init_sweep(hackrf_device* device, - const uint16_t* frequency_list, const int num_ranges, - const uint32_t num_bytes, const uint32_t step_width, - const uint32_t offset, const enum sweep_style style) { +int ADDCALL hackrf_init_sweep( + hackrf_device* device, + const uint16_t* frequency_list, + const int num_ranges, + const uint32_t num_bytes, + const uint32_t step_width, + const uint32_t offset, + const enum sweep_style style) +{ USB_API_REQUIRED(device, 0x0102) int result, i; unsigned char data[9 + MAX_SWEEP_RANGES * 2 * sizeof(frequency_list[0])]; int size = 9 + num_ranges * 2 * sizeof(frequency_list[0]); - if((num_ranges < 1) || (num_ranges > MAX_SWEEP_RANGES)){ + if ((num_ranges < 1) || (num_ranges > MAX_SWEEP_RANGES)) { return HACKRF_ERROR_INVALID_PARAM; } - if(num_bytes % BYTES_PER_BLOCK) { + if (num_bytes % BYTES_PER_BLOCK) { return HACKRF_ERROR_INVALID_PARAM; } - if(BYTES_PER_BLOCK > num_bytes) { + if (BYTES_PER_BLOCK > num_bytes) { return HACKRF_ERROR_INVALID_PARAM; } - if(1 > step_width) { + if (1 > step_width) { return HACKRF_ERROR_INVALID_PARAM; } - if(INTERLEAVED < style) { + if (INTERLEAVED < style) { return HACKRF_ERROR_INVALID_PARAM; } @@ -2198,21 +2184,21 @@ int ADDCALL hackrf_init_sweep(hackrf_device* device, data[6] = (offset >> 16) & 0xff; data[7] = (offset >> 24) & 0xff; data[8] = style; - for(i=0; i<(num_ranges*2); i++) { - data[9+i*2] = frequency_list[i] & 0xff; - data[10+i*2] = (frequency_list[i] >> 8) & 0xff; + for (i = 0; i < (num_ranges * 2); i++) { + data[9 + i * 2] = frequency_list[i] & 0xff; + data[10 + i * 2] = (frequency_list[i] >> 8) & 0xff; } result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_INIT_SWEEP, num_bytes & 0xffff, (num_bytes >> 16) & 0xffff, data, size, - 0 - ); + 0); if (result < size) { last_libusb_error = result; @@ -2222,7 +2208,8 @@ int ADDCALL hackrf_init_sweep(hackrf_device* device, } } -bool hackrf_operacake_valid_address(uint8_t address) { +bool hackrf_operacake_valid_address(uint8_t address) +{ return address < HACKRF_OPERACAKE_MAX_BOARDS; } @@ -2245,11 +2232,9 @@ int ADDCALL hackrf_get_operacake_boards(hackrf_device* device, uint8_t* boards) 0, boards, 8, - 0 - ); + 0); - if (result < 8) - { + if (result < 8) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2265,7 +2250,10 @@ int ADDCALL hackrf_get_operacake_boards(hackrf_device* device, uint8_t* boards) * @return @ref HACKRF_SUCCESS * @return @ref HACKRF_ERROR_LIBUSB */ -int ADDCALL hackrf_set_operacake_mode(hackrf_device* device, uint8_t address, enum operacake_switching_mode mode) +int ADDCALL hackrf_set_operacake_mode( + hackrf_device* device, + uint8_t address, + enum operacake_switching_mode mode) { USB_API_REQUIRED(device, 0x0105) @@ -2276,17 +2264,16 @@ int ADDCALL hackrf_set_operacake_mode(hackrf_device* device, uint8_t address, en int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_OPERACAKE_SET_MODE, address, - (uint8_t)mode, + (uint8_t) mode, NULL, 0, - 0 - ); + 0); - if (result != 0) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2302,7 +2289,10 @@ int ADDCALL hackrf_set_operacake_mode(hackrf_device* device, uint8_t address, en * @return @ref HACKRF_SUCCESS * @return @ref HACKRF_ERROR_LIBUSB */ -int ADDCALL hackrf_get_operacake_mode(hackrf_device* device, uint8_t address, enum operacake_switching_mode *mode) +int ADDCALL hackrf_get_operacake_mode( + hackrf_device* device, + uint8_t address, + enum operacake_switching_mode* mode) { USB_API_REQUIRED(device, 0x0105) @@ -2320,11 +2310,9 @@ int ADDCALL hackrf_get_operacake_mode(hackrf_device* device, uint8_t address, en 0, &buf, 1, - 0 - ); + 0); - if (result < 1) - { + if (result < 1) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2334,10 +2322,11 @@ int ADDCALL hackrf_get_operacake_mode(hackrf_device* device, uint8_t address, en } /* Set Operacake manual mode ports. */ -int ADDCALL hackrf_set_operacake_ports(hackrf_device* device, - uint8_t address, - uint8_t port_a, - uint8_t port_b) +int ADDCALL hackrf_set_operacake_ports( + hackrf_device* device, + uint8_t address, + uint8_t port_a, + uint8_t port_b) { USB_API_REQUIRED(device, 0x0102) @@ -2347,24 +2336,24 @@ int ADDCALL hackrf_set_operacake_ports(hackrf_device* device, int result; /* Error checking */ - if((port_a > OPERACAKE_PB4) || (port_b > OPERACAKE_PB4)) { + if ((port_a > OPERACAKE_PB4) || (port_b > OPERACAKE_PB4)) { return HACKRF_ERROR_INVALID_PARAM; } /* Check which side PA and PB are on */ - if(((port_a <= OPERACAKE_PA4) && (port_b <= OPERACAKE_PA4)) - || ((port_a > OPERACAKE_PA4) && (port_b > OPERACAKE_PA4))) { + if (((port_a <= OPERACAKE_PA4) && (port_b <= OPERACAKE_PA4)) || + ((port_a > OPERACAKE_PA4) && (port_b > OPERACAKE_PA4))) { return HACKRF_ERROR_INVALID_PARAM; } result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_OPERACAKE_SET_PORTS, address, - port_a | (port_b<<8), + port_a | (port_b << 8), NULL, 0, - 0 - ); + 0); if (result != 0) { last_libusb_error = result; @@ -2374,20 +2363,21 @@ int ADDCALL hackrf_set_operacake_ports(hackrf_device* device, } } -int ADDCALL hackrf_reset(hackrf_device* device) { +int ADDCALL hackrf_reset(hackrf_device* device) +{ USB_API_REQUIRED(device, 0x0102) int result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_RESET, 0, 0, NULL, 0, - 0 - ); + 0); - if( result != 0 ) { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2398,21 +2388,24 @@ int ADDCALL hackrf_reset(hackrf_device* device) { /** * @deprecated This has been replaced by @ref hackrf_set_operacake_freq_ranges */ -int ADDCALL hackrf_set_operacake_ranges(hackrf_device* device, uint8_t* ranges, uint8_t len_ranges) +int ADDCALL hackrf_set_operacake_ranges( + hackrf_device* device, + uint8_t* ranges, + uint8_t len_ranges) { USB_API_REQUIRED(device, 0x0103) int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_OPERACAKE_SET_RANGES, 0, 0, ranges, len_ranges, - 0 - ); + 0); if (result < len_ranges) { last_libusb_error = result; @@ -2422,34 +2415,38 @@ int ADDCALL hackrf_set_operacake_ranges(hackrf_device* device, uint8_t* ranges, } } -int ADDCALL hackrf_set_operacake_freq_ranges(hackrf_device* device, hackrf_operacake_freq_range* freq_ranges, uint8_t count) +int ADDCALL hackrf_set_operacake_freq_ranges( + hackrf_device* device, + hackrf_operacake_freq_range* freq_ranges, + uint8_t count) { USB_API_REQUIRED(device, 0x0103) - uint8_t range_bytes[HACKRF_OPERACAKE_MAX_FREQ_RANGES * sizeof(hackrf_operacake_freq_range)]; + uint8_t range_bytes + [HACKRF_OPERACAKE_MAX_FREQ_RANGES * sizeof(hackrf_operacake_freq_range)]; uint8_t ptr; int i; for (i = 0; i < count; i++) { - ptr = 5*i; - range_bytes[ptr] = freq_ranges[i].freq_min >> 8; - range_bytes[ptr+1] = freq_ranges[i].freq_min & 0xFF; - range_bytes[ptr+2] = freq_ranges[i].freq_max >> 8; - range_bytes[ptr+3] = freq_ranges[i].freq_max & 0xFF; - range_bytes[ptr+4] = freq_ranges[i].port; + ptr = 5 * i; + range_bytes[ptr] = freq_ranges[i].freq_min >> 8; + range_bytes[ptr + 1] = freq_ranges[i].freq_min & 0xFF; + range_bytes[ptr + 2] = freq_ranges[i].freq_max >> 8; + range_bytes[ptr + 3] = freq_ranges[i].freq_max & 0xFF; + range_bytes[ptr + 4] = freq_ranges[i].port; } int result; - int len_ranges = count*5; + int len_ranges = count * 5; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_OPERACAKE_SET_RANGES, 0, 0, range_bytes, len_ranges, - 0 - ); + 0); if (result < len_ranges) { last_libusb_error = result; @@ -2460,8 +2457,12 @@ int ADDCALL hackrf_set_operacake_freq_ranges(hackrf_device* device, hackrf_opera } #define DWELL_TIME_SIZE 5 -static uint8_t dwell_data[DWELL_TIME_SIZE*HACKRF_OPERACAKE_MAX_DWELL_TIMES]; -int ADDCALL hackrf_set_operacake_dwell_times(hackrf_device* device, hackrf_operacake_dwell_time *dwell_times, uint8_t count) +static uint8_t dwell_data[DWELL_TIME_SIZE * HACKRF_OPERACAKE_MAX_DWELL_TIMES]; + +int ADDCALL hackrf_set_operacake_dwell_times( + hackrf_device* device, + hackrf_operacake_dwell_time* dwell_times, + uint8_t count) { USB_API_REQUIRED(device, 0x0105) @@ -2471,22 +2472,23 @@ int ADDCALL hackrf_set_operacake_dwell_times(hackrf_device* device, hackrf_opera int i; for (i = 0; i < count; i++) { - *(uint32_t*)&dwell_data[i*DWELL_TIME_SIZE] = TO_LE(dwell_times[i].dwell); - dwell_data[(i*DWELL_TIME_SIZE)+4] = dwell_times[i].port; + *(uint32_t*) &dwell_data[i * DWELL_TIME_SIZE] = + TO_LE(dwell_times[i].dwell); + dwell_data[(i * DWELL_TIME_SIZE) + 4] = dwell_times[i].port; } int data_len = count * DWELL_TIME_SIZE; int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_OPERACAKE_SET_DWELL_TIMES, 0, 0, dwell_data, data_len, - 0 - ); + 0); if (result < data_len) { last_libusb_error = result; @@ -2502,17 +2504,16 @@ int ADDCALL hackrf_set_clkout_enable(hackrf_device* device, const uint8_t value) int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_CLKOUT_ENABLE, value, 0, NULL, 0, - 0 - ); + 0); - if (result != 0) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2520,8 +2521,10 @@ int ADDCALL hackrf_set_clkout_enable(hackrf_device* device, const uint8_t value) } } -int ADDCALL hackrf_operacake_gpio_test(hackrf_device* device, const uint8_t address, - uint16_t* test_result) +int ADDCALL hackrf_operacake_gpio_test( + hackrf_device* device, + const uint8_t address, + uint16_t* test_result) { USB_API_REQUIRED(device, 0x0103) @@ -2536,10 +2539,9 @@ int ADDCALL hackrf_operacake_gpio_test(hackrf_device* device, const uint8_t addr HACKRF_VENDOR_REQUEST_OPERACAKE_GPIO_TEST, address, 0, - (unsigned char*)test_result, + (unsigned char*) test_result, 2, - 0 - ); + 0); if (result < 1) { last_libusb_error = result; @@ -2550,13 +2552,12 @@ int ADDCALL hackrf_operacake_gpio_test(hackrf_device* device, const uint8_t addr } #ifdef HACKRF_ISSUE_609_IS_FIXED -int ADDCALL hackrf_cpld_checksum(hackrf_device* device, - uint32_t* crc) +int ADDCALL hackrf_cpld_checksum(hackrf_device* device, uint32_t* crc) { USB_API_REQUIRED(device, 0x0103) uint8_t length; int result; - + length = sizeof(*crc); result = libusb_control_transfer( device->usb_device, @@ -2564,13 +2565,11 @@ int ADDCALL hackrf_cpld_checksum(hackrf_device* device, HACKRF_VENDOR_REQUEST_CPLD_CHECKSUM, 0, 0, - (unsigned char*)crc, + (unsigned char*) crc, length, - 0 - ); + 0); - if (result < length) - { + if (result < length) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2586,17 +2585,16 @@ int ADDCALL hackrf_set_ui_enable(hackrf_device* device, const uint8_t value) int result; result = libusb_control_transfer( device->usb_device, - LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_RECIPIENT_DEVICE, + LIBUSB_ENDPOINT_OUT | LIBUSB_REQUEST_TYPE_VENDOR | + LIBUSB_RECIPIENT_DEVICE, HACKRF_VENDOR_REQUEST_UI_ENABLE, value, 0, NULL, 0, - 0 - ); + 0); - if (result != 0) - { + if (result != 0) { last_libusb_error = result; return HACKRF_ERROR_LIBUSB; } else { @@ -2604,14 +2602,16 @@ int ADDCALL hackrf_set_ui_enable(hackrf_device* device, const uint8_t value) } } -int ADDCALL hackrf_start_rx_sweep(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx) +int ADDCALL hackrf_start_rx_sweep( + hackrf_device* device, + hackrf_sample_block_cb_fn callback, + void* rx_ctx) { USB_API_REQUIRED(device, 0x0104) int result; const uint8_t endpoint_address = LIBUSB_ENDPOINT_IN | 1; result = hackrf_set_transceiver_mode(device, TRANSCEIVER_MODE_RX_SWEEP); - if (HACKRF_SUCCESS == result) - { + if (HACKRF_SUCCESS == result) { device->rx_ctx = rx_ctx; result = prepare_setup_transfers(device, endpoint_address, callback); } @@ -2621,4 +2621,3 @@ int ADDCALL hackrf_start_rx_sweep(hackrf_device* device, hackrf_sample_block_cb_ #ifdef __cplusplus } // __cplusplus defined. #endif - diff --git a/host/libhackrf/src/hackrf.h b/host/libhackrf/src/hackrf.h index dd46097b..301c0c54 100644 --- a/host/libhackrf/src/hackrf.h +++ b/host/libhackrf/src/hackrf.h @@ -27,32 +27,32 @@ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSI #include #ifdef _WIN32 - #define ADD_EXPORTS - - /* You should define ADD_EXPORTS *only* when building the DLL. */ - #ifdef ADD_EXPORTS - #define ADDAPI __declspec(dllexport) - #else - #define ADDAPI __declspec(dllimport) - #endif + #define ADD_EXPORTS - /* Define calling convention in one place, for convenience. */ - #define ADDCALL __cdecl + /* You should define ADD_EXPORTS *only* when building the DLL. */ + #ifdef ADD_EXPORTS + #define ADDAPI __declspec(dllexport) + #else + #define ADDAPI __declspec(dllimport) + #endif + + /* Define calling convention in one place, for convenience. */ + #define ADDCALL __cdecl #else /* _WIN32 not defined. */ - /* Define with no value on non-Windows OSes. */ - #define ADDAPI - #define ADDCALL + /* Define with no value on non-Windows OSes. */ + #define ADDAPI + #define ADDCALL #endif #define SAMPLES_PER_BLOCK 8192 -#define BYTES_PER_BLOCK 16384 -#define MAX_SWEEP_RANGES 10 +#define BYTES_PER_BLOCK 16384 +#define MAX_SWEEP_RANGES 10 #define HACKRF_OPERACAKE_ADDRESS_INVALID 0xFF -#define HACKRF_OPERACAKE_MAX_BOARDS 8 +#define HACKRF_OPERACAKE_MAX_BOARDS 8 #define HACKRF_OPERACAKE_MAX_DWELL_TIMES 16 #define HACKRF_OPERACAKE_MAX_FREQ_RANGES 8 @@ -74,7 +74,7 @@ enum hackrf_error { }; enum hackrf_board_id { - BOARD_ID_JELLYBEAN = 0, + BOARD_ID_JELLYBEAN = 0, BOARD_ID_JAWBREAKER = 1, BOARD_ID_HACKRF_ONE = 2, BOARD_ID_RAD1O = 3, @@ -183,12 +183,12 @@ typedef struct { } hackrf_m0_state; struct hackrf_device_list { - char **serial_numbers; - enum hackrf_usb_board_id *usb_board_ids; - int *usb_device_index; + char** serial_numbers; + enum hackrf_usb_board_id* usb_board_ids; + int* usb_device_index; int devicecount; - - void **usb_devices; + + void** usb_devices; int usb_devicecount; }; typedef struct hackrf_device_list hackrf_device_list_t; @@ -196,8 +196,7 @@ typedef struct hackrf_device_list hackrf_device_list_t; typedef int (*hackrf_sample_block_cb_fn)(hackrf_transfer* transfer); #ifdef __cplusplus -extern "C" -{ +extern "C" { #endif extern ADDAPI int ADDCALL hackrf_init(); @@ -207,64 +206,127 @@ extern ADDAPI const char* ADDCALL hackrf_library_version(); extern ADDAPI const char* ADDCALL hackrf_library_release(); extern ADDAPI hackrf_device_list_t* ADDCALL hackrf_device_list(); -extern ADDAPI int ADDCALL hackrf_device_list_open(hackrf_device_list_t *list, int idx, hackrf_device** device); -extern ADDAPI void ADDCALL hackrf_device_list_free(hackrf_device_list_t *list); - +extern ADDAPI int ADDCALL hackrf_device_list_open( + hackrf_device_list_t* list, + int idx, + hackrf_device** device); +extern ADDAPI void ADDCALL hackrf_device_list_free(hackrf_device_list_t* list); + extern ADDAPI int ADDCALL hackrf_open(hackrf_device** device); -extern ADDAPI int ADDCALL hackrf_open_by_serial(const char* const desired_serial_number, hackrf_device** device); +extern ADDAPI int ADDCALL hackrf_open_by_serial( + const char* const desired_serial_number, + hackrf_device** device); extern ADDAPI int ADDCALL hackrf_close(hackrf_device* device); - -extern ADDAPI int ADDCALL hackrf_start_rx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx); + +extern ADDAPI int ADDCALL hackrf_start_rx( + hackrf_device* device, + hackrf_sample_block_cb_fn callback, + void* rx_ctx); extern ADDAPI int ADDCALL hackrf_stop_rx(hackrf_device* device); - -extern ADDAPI int ADDCALL hackrf_start_tx(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* tx_ctx); + +extern ADDAPI int ADDCALL hackrf_start_tx( + hackrf_device* device, + hackrf_sample_block_cb_fn callback, + void* tx_ctx); extern ADDAPI int ADDCALL hackrf_stop_tx(hackrf_device* device); -extern ADDAPI int ADDCALL hackrf_get_m0_state(hackrf_device* device, hackrf_m0_state* value); -extern ADDAPI int ADDCALL hackrf_set_tx_underrun_limit(hackrf_device* device, uint32_t value); -extern ADDAPI int ADDCALL hackrf_set_rx_overrun_limit(hackrf_device* device, uint32_t value); +extern ADDAPI int ADDCALL hackrf_get_m0_state( + hackrf_device* device, + hackrf_m0_state* value); +extern ADDAPI int ADDCALL hackrf_set_tx_underrun_limit( + hackrf_device* device, + uint32_t value); +extern ADDAPI int ADDCALL hackrf_set_rx_overrun_limit( + hackrf_device* device, + uint32_t value); /* return HACKRF_TRUE if success */ extern ADDAPI int ADDCALL hackrf_is_streaming(hackrf_device* device); - -extern ADDAPI int ADDCALL hackrf_max2837_read(hackrf_device* device, uint8_t register_number, uint16_t* value); -extern ADDAPI int ADDCALL hackrf_max2837_write(hackrf_device* device, uint8_t register_number, uint16_t value); - -extern ADDAPI int ADDCALL hackrf_si5351c_read(hackrf_device* device, uint16_t register_number, uint16_t* value); -extern ADDAPI int ADDCALL hackrf_si5351c_write(hackrf_device* device, uint16_t register_number, uint16_t value); - -extern ADDAPI int ADDCALL hackrf_set_baseband_filter_bandwidth(hackrf_device* device, const uint32_t bandwidth_hz); - -extern ADDAPI int ADDCALL hackrf_rffc5071_read(hackrf_device* device, uint8_t register_number, uint16_t* value); -extern ADDAPI int ADDCALL hackrf_rffc5071_write(hackrf_device* device, uint8_t register_number, uint16_t value); - + +extern ADDAPI int ADDCALL hackrf_max2837_read( + hackrf_device* device, + uint8_t register_number, + uint16_t* value); +extern ADDAPI int ADDCALL hackrf_max2837_write( + hackrf_device* device, + uint8_t register_number, + uint16_t value); + +extern ADDAPI int ADDCALL hackrf_si5351c_read( + hackrf_device* device, + uint16_t register_number, + uint16_t* value); +extern ADDAPI int ADDCALL hackrf_si5351c_write( + hackrf_device* device, + uint16_t register_number, + uint16_t value); + +extern ADDAPI int ADDCALL hackrf_set_baseband_filter_bandwidth( + hackrf_device* device, + const uint32_t bandwidth_hz); + +extern ADDAPI int ADDCALL hackrf_rffc5071_read( + hackrf_device* device, + uint8_t register_number, + uint16_t* value); +extern ADDAPI int ADDCALL hackrf_rffc5071_write( + hackrf_device* device, + uint8_t register_number, + uint16_t value); + extern ADDAPI int ADDCALL hackrf_spiflash_erase(hackrf_device* device); -extern ADDAPI int ADDCALL hackrf_spiflash_write(hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* const data); -extern ADDAPI int ADDCALL hackrf_spiflash_read(hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* data); +extern ADDAPI int ADDCALL hackrf_spiflash_write( + hackrf_device* device, + const uint32_t address, + const uint16_t length, + unsigned char* const data); +extern ADDAPI int ADDCALL hackrf_spiflash_read( + hackrf_device* device, + const uint32_t address, + const uint16_t length, + unsigned char* data); extern ADDAPI int ADDCALL hackrf_spiflash_status(hackrf_device* device, uint8_t* data); extern ADDAPI int ADDCALL hackrf_spiflash_clear_status(hackrf_device* device); /* device will need to be reset after hackrf_cpld_write */ -extern ADDAPI int ADDCALL hackrf_cpld_write(hackrf_device* device, - unsigned char* const data, const unsigned int total_length); - +extern ADDAPI int ADDCALL hackrf_cpld_write( + hackrf_device* device, + unsigned char* const data, + const unsigned int total_length); + extern ADDAPI int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value); -extern ADDAPI int ADDCALL hackrf_version_string_read(hackrf_device* device, char* version, uint8_t length); -extern ADDAPI int ADDCALL hackrf_usb_api_version_read(hackrf_device* device, uint16_t* version); +extern ADDAPI int ADDCALL hackrf_version_string_read( + hackrf_device* device, + char* version, + uint8_t length); +extern ADDAPI int ADDCALL hackrf_usb_api_version_read( + hackrf_device* device, + uint16_t* version); extern ADDAPI int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz); -extern ADDAPI int ADDCALL hackrf_set_freq_explicit(hackrf_device* device, - const uint64_t if_freq_hz, const uint64_t lo_freq_hz, - const enum rf_path_filter path); +extern ADDAPI int ADDCALL hackrf_set_freq_explicit( + hackrf_device* device, + const uint64_t if_freq_hz, + const uint64_t lo_freq_hz, + const enum rf_path_filter path); /* 2-20Mhz - either as a fraction, i.e. freq 20000000hz divider 2 -> 10Mhz or as plain old 10000000hz (double) */ -extern ADDAPI int ADDCALL hackrf_set_sample_rate_manual(hackrf_device* device, const uint32_t freq_hz, const uint32_t divider); -extern ADDAPI int ADDCALL hackrf_set_sample_rate(hackrf_device* device, const double freq_hz); +extern ADDAPI int ADDCALL hackrf_set_sample_rate_manual( + hackrf_device* device, + const uint32_t freq_hz, + const uint32_t divider); +extern ADDAPI int ADDCALL hackrf_set_sample_rate( + hackrf_device* device, + const double freq_hz); /* external amp, bool on/off */ -extern ADDAPI int ADDCALL hackrf_set_amp_enable(hackrf_device* device, const uint8_t value); +extern ADDAPI int ADDCALL hackrf_set_amp_enable( + hackrf_device* device, + const uint8_t value); -extern ADDAPI int ADDCALL hackrf_board_partid_serialno_read(hackrf_device* device, read_partid_serialno_t* read_partid_serialno); +extern ADDAPI int ADDCALL hackrf_board_partid_serialno_read( + hackrf_device* device, + read_partid_serialno_t* read_partid_serialno); /* range 0-40 step 8d, IF gain in osmosdr */ extern ADDAPI int ADDCALL hackrf_set_lna_gain(hackrf_device* device, uint32_t value); @@ -276,58 +338,90 @@ extern ADDAPI int ADDCALL hackrf_set_vga_gain(hackrf_device* device, uint32_t va extern ADDAPI int ADDCALL hackrf_set_txvga_gain(hackrf_device* device, uint32_t value); /* antenna port power control */ -extern ADDAPI int ADDCALL hackrf_set_antenna_enable(hackrf_device* device, const uint8_t value); +extern ADDAPI int ADDCALL hackrf_set_antenna_enable( + hackrf_device* device, + const uint8_t value); extern ADDAPI const char* ADDCALL hackrf_error_name(enum hackrf_error errcode); extern ADDAPI const char* ADDCALL hackrf_board_id_name(enum hackrf_board_id board_id); -extern ADDAPI const char* ADDCALL hackrf_usb_board_id_name(enum hackrf_usb_board_id usb_board_id); +extern ADDAPI const char* ADDCALL hackrf_usb_board_id_name( + enum hackrf_usb_board_id usb_board_id); extern ADDAPI const char* ADDCALL hackrf_filter_path_name(const enum rf_path_filter path); /* Compute nearest freq for bw filter (manual filter) */ -extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt(const uint32_t bandwidth_hz); +extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt( + const uint32_t bandwidth_hz); /* Compute best default value depending on sample rate (auto filter) */ -extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw(const uint32_t bandwidth_hz); +extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw( + const uint32_t bandwidth_hz); /* All features below require USB API version 0x1002 or higher) */ /* set hardware sync mode */ -extern ADDAPI int ADDCALL hackrf_set_hw_sync_mode(hackrf_device* device, const uint8_t value); +extern ADDAPI int ADDCALL hackrf_set_hw_sync_mode( + hackrf_device* device, + const uint8_t value); /* Start sweep mode */ -extern ADDAPI int ADDCALL hackrf_init_sweep(hackrf_device* device, - const uint16_t* frequency_list, const int num_ranges, - const uint32_t num_bytes, const uint32_t step_width, - const uint32_t offset, const enum sweep_style style); +extern ADDAPI int ADDCALL hackrf_init_sweep( + hackrf_device* device, + const uint16_t* frequency_list, + const int num_ranges, + const uint32_t num_bytes, + const uint32_t step_width, + const uint32_t offset, + const enum sweep_style style); /* Operacake functions */ -extern ADDAPI int ADDCALL hackrf_get_operacake_boards(hackrf_device* device, uint8_t* boards); -extern ADDAPI int ADDCALL hackrf_set_operacake_mode(hackrf_device* device, uint8_t address, enum operacake_switching_mode mode); -extern ADDAPI int ADDCALL hackrf_get_operacake_mode(hackrf_device* device, uint8_t address, enum operacake_switching_mode *mode); -extern ADDAPI int ADDCALL hackrf_set_operacake_ports(hackrf_device* device, - uint8_t address, - uint8_t port_a, - uint8_t port_b); -extern ADDAPI int ADDCALL hackrf_set_operacake_dwell_times(hackrf_device* device, hackrf_operacake_dwell_time *dwell_times, uint8_t count); -extern ADDAPI int ADDCALL hackrf_set_operacake_freq_ranges(hackrf_device* device, hackrf_operacake_freq_range *freq_ranges, uint8_t count); +extern ADDAPI int ADDCALL hackrf_get_operacake_boards( + hackrf_device* device, + uint8_t* boards); +extern ADDAPI int ADDCALL hackrf_set_operacake_mode( + hackrf_device* device, + uint8_t address, + enum operacake_switching_mode mode); +extern ADDAPI int ADDCALL hackrf_get_operacake_mode( + hackrf_device* device, + uint8_t address, + enum operacake_switching_mode* mode); +extern ADDAPI int ADDCALL hackrf_set_operacake_ports( + hackrf_device* device, + uint8_t address, + uint8_t port_a, + uint8_t port_b); +extern ADDAPI int ADDCALL hackrf_set_operacake_dwell_times( + hackrf_device* device, + hackrf_operacake_dwell_time* dwell_times, + uint8_t count); +extern ADDAPI int ADDCALL hackrf_set_operacake_freq_ranges( + hackrf_device* device, + hackrf_operacake_freq_range* freq_ranges, + uint8_t count); extern ADDAPI int ADDCALL hackrf_reset(hackrf_device* device); -extern ADDAPI int ADDCALL hackrf_set_operacake_ranges(hackrf_device* device, - uint8_t* ranges, - uint8_t num_ranges); +extern ADDAPI int ADDCALL hackrf_set_operacake_ranges( + hackrf_device* device, + uint8_t* ranges, + uint8_t num_ranges); -extern ADDAPI int ADDCALL hackrf_set_clkout_enable(hackrf_device* device, const uint8_t value); +extern ADDAPI int ADDCALL hackrf_set_clkout_enable( + hackrf_device* device, + const uint8_t value); -extern ADDAPI int ADDCALL hackrf_operacake_gpio_test(hackrf_device* device, - uint8_t address, - uint16_t* test_result); +extern ADDAPI int ADDCALL hackrf_operacake_gpio_test( + hackrf_device* device, + uint8_t address, + uint16_t* test_result); #ifdef HACKRF_ISSUE_609_IS_FIXED -extern ADDAPI int ADDCALL hackrf_cpld_checksum(hackrf_device* device, - uint32_t* crc); +extern ADDAPI int ADDCALL hackrf_cpld_checksum(hackrf_device* device, uint32_t* crc); #endif /* HACKRF_ISSUE_609_IS_FIXED */ extern ADDAPI int ADDCALL hackrf_set_ui_enable(hackrf_device* device, const uint8_t value); -extern ADDAPI int ADDCALL hackrf_start_rx_sweep(hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx); +extern ADDAPI int ADDCALL hackrf_start_rx_sweep( + hackrf_device* device, + hackrf_sample_block_cb_fn callback, + void* rx_ctx); #ifdef __cplusplus } // __cplusplus defined. From 44ebd5a6fff0e85c91cfa70971c0f7333b98766f Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Tue, 28 Jun 2022 12:48:19 +0100 Subject: [PATCH 17/22] Add clang-format check to Github actions. --- .github/workflows/clang-format-check.yml | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 .github/workflows/clang-format-check.yml diff --git a/.github/workflows/clang-format-check.yml b/.github/workflows/clang-format-check.yml new file mode 100644 index 00000000..18a53d44 --- /dev/null +++ b/.github/workflows/clang-format-check.yml @@ -0,0 +1,25 @@ +name: Check code style +on: [push, pull_request] +jobs: + formatting-check: + name: clang-format + runs-on: ubuntu-latest + strategy: + matrix: + path: + - check: 'host/libhackrf/src' + exclude: '' + - check: 'host/hackrf-tools/src' + exclude: '' + - check: 'firmware/common' + exclude: 'firmware/common/xapp058' + - check: 'firmware/hackrf_usb' + exclude: '' + steps: + - uses: actions/checkout@v2 + - name: Run clang-format-action + uses: jidicula/clang-format-action@v4.6.2 + with: + clang-format-version: '14' + check-path: ${{ matrix.path['check'] }} + exclude-regex: ${{ matrix.path['exclude'] }} From 55bea828eac1b717ad44907e008ed717b68f5d9e Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Thu, 7 Jul 2022 10:43:49 +0100 Subject: [PATCH 18/22] Add missing stdbool.h include to rom_iap.h. Fixes a clang-tidy error. --- firmware/common/rom_iap.h | 1 + 1 file changed, 1 insertion(+) diff --git a/firmware/common/rom_iap.h b/firmware/common/rom_iap.h index 57eb4515..250d9d2c 100644 --- a/firmware/common/rom_iap.h +++ b/firmware/common/rom_iap.h @@ -23,6 +23,7 @@ #define __ROM_IAP__ #include +#include typedef enum { /* TODO define other commands */ From 0de4c7ad2390c69904829aa8c3210cfd40e9d46a Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Thu, 7 Jul 2022 10:47:38 +0100 Subject: [PATCH 19/22] Add helper script to add missing braces using clang-tidy. --- tools/add-braces.sh | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100755 tools/add-braces.sh diff --git a/tools/add-braces.sh b/tools/add-braces.sh new file mode 100755 index 00000000..e9c9f92a --- /dev/null +++ b/tools/add-braces.sh @@ -0,0 +1,33 @@ +#!/bin/bash + +CMAKE='cmake -DCMAKE_EXPORT_COMPILE_COMMANDS=ON' + +CLANG_TIDY='clang-tidy + -checks=-*,readability-braces-around-statements + --warnings-as-errors=-*,readability-braces-around-statements + --fix-errors + --format-style=file + -p' + +BUILD=build/host +mkdir -p $BUILD +$CMAKE -S host -B $BUILD +make -j4 -C $BUILD +$CLANG_TIDY $BUILD host/libhackrf/src/*.{c,h} host/hackrf-tools/src/*.c + +for board in HACKRF_ONE JAWBREAKER RAD1O; do + BUILD=build/firmware/$BOARD + mkdir -p $BUILD + $CMAKE -S firmware/hackrf_usb -B $BUILD + make -j4 $BUILD + if [ $BOARD == RAD1O ]; then + FILES=`ls firmware/{common,hackrf_usb}/*.{c,h} | grep -v rffc5071` + else + FILES=`ls firmware/{common,hackrf_usb}/*.{c,h} | grep -v max2871` + fi + $CLANG_TIDY $BUILD \ + --extra-arg=-Ifirmware/common \ + --extra-arg=-Ifirmware/libopencm3/include \ + --extra-arg=-I/usr/arm-none-eabi/include \ + $FILES +done From c0d13de598f29750705229c59bb0374e390eb2ae Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Thu, 7 Jul 2022 10:48:32 +0100 Subject: [PATCH 20/22] Add braces to all control statements without them. --- firmware/common/hackrf_core.c | 20 ++++++++----- firmware/common/max2837.c | 3 +- firmware/common/operacake.c | 18 ++++++++---- firmware/common/operacake_sctimer.c | 3 +- firmware/common/rf_path.c | 6 ++-- firmware/common/rffc5071.c | 3 +- firmware/common/si5351c.c | 15 ++++++---- firmware/common/usb_queue.c | 24 ++++++++++------ firmware/common/usb_standard_request.c | 3 +- firmware/common/w25q80bv.c | 15 ++++++---- firmware/hackrf_usb/usb_api_board_info.c | 6 ++-- firmware/hackrf_usb/usb_api_sweep.c | 12 +++++--- firmware/hackrf_usb/usb_api_transceiver.c | 9 ++++-- host/hackrf-tools/src/hackrf_clock.c | 28 +++++++++++-------- host/hackrf-tools/src/hackrf_debug.c | 34 ++++++++++++++--------- host/hackrf-tools/src/hackrf_info.c | 9 ++++-- host/hackrf-tools/src/hackrf_operacake.c | 18 ++++++++---- host/hackrf-tools/src/hackrf_spiflash.c | 18 ++++++++---- host/hackrf-tools/src/hackrf_sweep.c | 18 ++++++++---- 19 files changed, 170 insertions(+), 92 deletions(-) diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c index 20afc4f3..46bc8f23 100644 --- a/firmware/common/hackrf_core.c +++ b/firmware/common/hackrf_core.c @@ -296,8 +296,9 @@ void delay(uint32_t duration) { uint32_t i; - for (i = 0; i < duration; i++) + for (i = 0; i < duration; i++) { __asm__("nop"); + } } void delay_us_at_mhz(uint32_t us, uint32_t mhz) @@ -317,20 +318,23 @@ static uint32_t gcd(uint32_t u, uint32_t v) { int s; - if (!u || !v) + if (!u || !v) { return u | v; + } for (s = 0; !((u | v) & 1); s++) { u >>= 1; v >>= 1; } - while (!(u & 1)) + while (!(u & 1)) { u >>= 1; + } do { - while (!(v & 1)) + while (!(v & 1)) { v >>= 1; + } if (u > v) { uint32_t t; @@ -391,10 +395,11 @@ bool sample_rate_frac_set(uint32_t rate_num, uint32_t rate_denom) } /* Can we enable integer mode ? */ - if (a & 0x1 || b) + if (a & 0x1 || b) { si5351c_set_int_mode(&clock_gen, 0, 0); - else + } else { si5351c_set_int_mode(&clock_gen, 0, 1); + } /* Final MS values */ MSx_P1 = 128 * a + (128 * b / c) - 512; @@ -485,8 +490,9 @@ bool baseband_filter_bandwidth_set(const uint32_t bandwidth_hz) { uint32_t bandwidth_hz_real = max2837_set_lpf_bandwidth(&max2837, bandwidth_hz); - if (bandwidth_hz_real) + if (bandwidth_hz_real) { hackrf_ui()->set_filter_bw(bandwidth_hz_real); + } return bandwidth_hz_real != 0; } diff --git a/firmware/common/max2837.c b/firmware/common/max2837.c index e8f5b9cb..de8c2c8e 100644 --- a/firmware/common/max2837.c +++ b/firmware/common/max2837.c @@ -329,8 +329,9 @@ bool max2837_set_lna_gain(max2837_driver_t* const drv, const uint32_t gain_db) { } bool max2837_set_vga_gain(max2837_driver_t* const drv, const uint32_t gain_db) { - if( (gain_db & 0x1) || gain_db > 62)/* 0b11111*2 */ + if( (gain_db & 0x1) || gain_db > 62) {/* 0b11111*2 */ return false; +} set_MAX2837_VGA(drv, 31-(gain_db >> 1) ); max2837_reg_commit(drv, 5); diff --git a/firmware/common/operacake.c b/firmware/common/operacake.c index 7526354f..46480df0 100644 --- a/firmware/common/operacake.c +++ b/firmware/common/operacake.c @@ -147,8 +147,9 @@ uint8_t operacake_init(bool allow_gpio) bool operacake_is_board_present(uint8_t address) { - if (address >= OPERACAKE_MAX_BOARDS) + if (address >= OPERACAKE_MAX_BOARDS) { return false; + } return operacake_boards[address].present; } @@ -160,8 +161,9 @@ void operacake_get_boards(uint8_t* addresses) addresses[i] = OPERACAKE_ADDRESS_INVALID; } for (int i = 0; i < OPERACAKE_MAX_BOARDS; i++) { - if (operacake_is_board_present(i)) + if (operacake_is_board_present(i)) { addresses[count++] = i; + } } } @@ -221,8 +223,9 @@ uint8_t operacake_activate_ports(uint8_t address, uint8_t PA, uint8_t PB) void operacake_set_mode(uint8_t address, uint8_t mode) { - if (address >= OPERACAKE_MAX_BOARDS) + if (address >= OPERACAKE_MAX_BOARDS) { return; + } operacake_boards[address].mode = mode; current_range = INVALID_RANGE; @@ -253,16 +256,18 @@ void operacake_set_mode(uint8_t address, uint8_t mode) // If any boards are in MODE_TIME, enable the sctimer events. bool enable_sctimer = false; for (int i = 0; i < OPERACAKE_MAX_BOARDS; i++) { - if (operacake_boards[i].mode == MODE_TIME) + if (operacake_boards[i].mode == MODE_TIME) { enable_sctimer = true; + } } operacake_sctimer_enable(enable_sctimer); } uint8_t operacake_get_mode(uint8_t address) { - if (address >= OPERACAKE_MAX_BOARDS) + if (address >= OPERACAKE_MAX_BOARDS) { return 0; + } return operacake_boards[address].mode; } @@ -372,8 +377,9 @@ uint16_t gpio_test(uint8_t address) { uint8_t i, reg, bit_mask, gpio_mask = 0x1F; uint16_t result = 0; - if (!allow_gpio_mode) + if (!allow_gpio_mode) { return 0xFFFF; + } scu_pinmux(SCU_PINMUX_GPIO3_8, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); scu_pinmux(SCU_PINMUX_GPIO3_12, SCU_GPIO_FAST | SCU_CONF_FUNCTION0); diff --git a/firmware/common/operacake_sctimer.c b/firmware/common/operacake_sctimer.c index 043d490d..e9c2b02c 100644 --- a/firmware/common/operacake_sctimer.c +++ b/firmware/common/operacake_sctimer.c @@ -148,8 +148,9 @@ void operacake_sctimer_set_dwell_times(struct operacake_dwell_times* times, int // Wrapping from SCT_LIMIT seems to add an extra cycle, // so we reduce the counter value for the first event. - if (i == 0) + if (i == 0) { counter -= 1; + } SCT_MATCHn(i) = counter; SCT_MATCHRELn(i) = counter; diff --git a/firmware/common/rf_path.c b/firmware/common/rf_path.c index 08ab4fcc..30fc9809 100644 --- a/firmware/common/rf_path.c +++ b/firmware/common/rf_path.c @@ -150,10 +150,12 @@ static void switchctrl_set_hackrf_one(rf_path_t* const rf_path, uint8_t ctrl) * used to explicitly turn off power to the amplifiers while AMP_BYPASS * is unset: */ - if (ctrl & SWITCHCTRL_NO_TX_AMP_PWR) + if (ctrl & SWITCHCTRL_NO_TX_AMP_PWR) { gpio_set(rf_path->gpio_no_tx_amp_pwr); - if (ctrl & SWITCHCTRL_NO_RX_AMP_PWR) + } + if (ctrl & SWITCHCTRL_NO_RX_AMP_PWR) { gpio_set(rf_path->gpio_no_rx_amp_pwr); + } if (ctrl & SWITCHCTRL_ANT_PWR) { mixer_set_gpo(&mixer, 0x00); /* turn on antenna power by clearing GPO1 */ diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index 6166c6d3..e775e50b 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -141,8 +141,9 @@ static void rffc5071_spi_write(rffc5071_driver_t* const drv, uint8_t r, uint16_t uint16_t rffc5071_reg_read(rffc5071_driver_t* const drv, uint8_t r) { /* Readback register is not cached. */ - if (r == RFFC5071_READBACK_REG) + if (r == RFFC5071_READBACK_REG) { return rffc5071_spi_read(drv, r); + } /* Discard uncommited write when reading. This shouldn't * happen, and probably has not been tested. */ diff --git a/firmware/common/si5351c.c b/firmware/common/si5351c.c index 7b023ea0..a929fe5e 100644 --- a/firmware/common/si5351c.c +++ b/firmware/common/si5351c.c @@ -252,10 +252,11 @@ void si5351c_set_int_mode( data[0] = 16 + ms_number; data[1] = si5351c_read_single(drv, data[0]); - if (on) + if (on) { data[1] |= SI5351C_CLK_INT_MODE; - else + } else { data[1] &= ~(SI5351C_CLK_INT_MODE); + } si5351c_write(drv, data, 2); } @@ -279,10 +280,11 @@ void si5351c_clkout_enable(si5351c_driver_t* const drv, uint8_t enable) /* Set optput in output enable register */ uint8_t output_enable = si5351c_read_single(drv, 3); output_enable = output_enable & !SI5351C_CLK_DISABLE(3); - if (enable) + if (enable) { output_enable = output_enable | SI5351C_CLK_ENABLE(3); - else + } else { output_enable = output_enable | SI5351C_CLK_DISABLE(3); + } uint8_t oe_data[] = {SI5351C_REG_OUTPUT_EN, output_enable}; si5351c_write(drv, oe_data, 2); @@ -305,12 +307,13 @@ void si5351c_clkout_enable(si5351c_driver_t* const drv, uint8_t enable) pll = SI5351C_CLK_PLL_SRC_A; } #endif - if (enable) + if (enable) { clk3_ctrl = SI5351C_CLK_INT_MODE | SI5351C_CLK_PLL_SRC(pll) | SI5351C_CLK_SRC(SI5351C_CLK_SRC_MULTISYNTH_SELF) | SI5351C_CLK_IDRV(SI5351C_CLK_IDRV_8MA); - else + } else { clk3_ctrl = SI5351C_CLK_POWERDOWN | SI5351C_CLK_INT_MODE; + } uint8_t clk3_data[] = {SI5351C_REG_CLK3_CTRL, clk3_ctrl}; si5351c_write(drv, clk3_data, 2); } diff --git a/firmware/common/usb_queue.c b/firmware/common/usb_queue.c index ad7f8c71..a518eaef 100644 --- a/firmware/common/usb_queue.c +++ b/firmware/common/usb_queue.c @@ -39,16 +39,18 @@ usb_queue_t* endpoint_queues[12] = {}; static usb_queue_t* endpoint_queue(const usb_endpoint_t* const endpoint) { uint32_t index = USB_ENDPOINT_INDEX(endpoint->address); - if (endpoint_queues[index] == NULL) + if (endpoint_queues[index] == NULL) { while (1) {} + } return endpoint_queues[index]; } void usb_queue_init(usb_queue_t* const queue) { uint32_t index = USB_ENDPOINT_INDEX(queue->endpoint->address); - if (endpoint_queues[index] != NULL) + if (endpoint_queues[index] != NULL) { while (1) {} + } endpoint_queues[index] = queue; usb_transfer_t* t = queue->free_transfers; @@ -65,8 +67,9 @@ static usb_transfer_t* allocate_transfer(usb_queue_t* const queue) { bool aborted; usb_transfer_t* transfer; - if (queue->free_transfers == NULL) + if (queue->free_transfers == NULL) { return NULL; + } do { transfer = (void*) __ldrex((uint32_t*) &queue->free_transfers); @@ -99,8 +102,9 @@ static usb_transfer_t* endpoint_queue_transfer(usb_transfer_t* const transfer) transfer->next = NULL; if (queue->active != NULL) { usb_transfer_t* t = queue->active; - while (t->next != NULL) + while (t->next != NULL) { t = t->next; + } t->next = transfer; return t; } else { @@ -134,8 +138,9 @@ int usb_transfer_schedule( { usb_queue_t* const queue = endpoint_queue(endpoint); usb_transfer_t* const transfer = allocate_transfer(queue); - if (transfer == NULL) + if (transfer == NULL) { return -1; + } usb_transfer_descriptor_t* const td = &transfer->td; // Configure the transfer descriptor @@ -195,8 +200,9 @@ int usb_transfer_schedule_ack(const usb_endpoint_t* const endpoint) void usb_queue_transfer_complete(usb_endpoint_t* const endpoint) { usb_queue_t* const queue = endpoint_queue(endpoint); - if (queue == NULL) + if (queue == NULL) { while (1) {} // Uh oh + } usb_transfer_t* transfer = queue->active; while (transfer != NULL) { @@ -211,8 +217,9 @@ void usb_queue_transfer_complete(usb_endpoint_t* const endpoint) } // Still not finished - if (status & USB_TD_DTD_TOKEN_STATUS_ACTIVE) + if (status & USB_TD_DTD_TOKEN_STATUS_ACTIVE) { break; + } // Advance the head. We need to do this before invoking the completion // callback as it might attempt to schedule a new transfer @@ -224,8 +231,9 @@ void usb_queue_transfer_complete(usb_endpoint_t* const endpoint) (transfer->td.total_bytes & USB_TD_DTD_TOKEN_TOTAL_BYTES_MASK) >> USB_TD_DTD_TOKEN_TOTAL_BYTES_SHIFT; unsigned int transferred = transfer->maximum_length - total_bytes; - if (transfer->completion_cb) + if (transfer->completion_cb) { transfer->completion_cb(transfer->user_data, transferred); + } // Advance head and free transfer free_transfer(transfer); diff --git a/firmware/common/usb_standard_request.c b/firmware/common/usb_standard_request.c index 4e77486a..6dbf74ef 100644 --- a/firmware/common/usb_standard_request.c +++ b/firmware/common/usb_standard_request.c @@ -97,8 +97,9 @@ bool usb_set_configuration( device->configuration = new_configuration; } - if (usb_configuration_changed_cb) + if (usb_configuration_changed_cb) { usb_configuration_changed_cb(device); + } return true; } diff --git a/firmware/common/w25q80bv.c b/firmware/common/w25q80bv.c index 914c8cbb..d6c236da 100644 --- a/firmware/common/w25q80bv.c +++ b/firmware/common/w25q80bv.c @@ -146,12 +146,14 @@ static void w25q80bv_page_program( uint8_t* data) { /* do nothing if asked to write beyond a page boundary */ - if (((addr & 0xFF) + len) > drv->page_len) + if (((addr & 0xFF) + len) > drv->page_len) { return; + } /* do nothing if we would overflow the flash */ - if (addr > (drv->num_bytes - len)) + if (addr > (drv->num_bytes - len)) { return; + } w25q80bv_wait_while_busy(drv); w25q80bv_write_enable(drv); @@ -184,13 +186,15 @@ void w25q80bv_program( /* do nothing if we would overflow the flash */ if ((len > drv->num_bytes) || (addr > drv->num_bytes) || - ((addr + len) > drv->num_bytes)) + ((addr + len) > drv->num_bytes)) { return; + } /* handle start not at page boundary */ first_block_len = drv->page_len - (addr % drv->page_len); - if (len < first_block_len) + if (len < first_block_len) { first_block_len = len; + } if (first_block_len) { w25q80bv_page_program(drv, addr, first_block_len, data); addr += first_block_len; @@ -221,8 +225,9 @@ void w25q80bv_read( { /* do nothing if we would overflow the flash */ if ((len > drv->num_bytes) || (addr > drv->num_bytes) || - ((addr + len) > drv->num_bytes)) + ((addr + len) > drv->num_bytes)) { return; + } w25q80bv_wait_while_busy(drv); diff --git a/firmware/hackrf_usb/usb_api_board_info.c b/firmware/hackrf_usb/usb_api_board_info.c index 7383493c..e8c4f5ad 100644 --- a/firmware/hackrf_usb/usb_api_board_info.c +++ b/firmware/hackrf_usb/usb_api_board_info.c @@ -81,8 +81,9 @@ usb_request_status_t usb_vendor_request_read_partid_serialno( /* Read IAP Part Number Identification */ iap_cmd_res.cmd_param.command_code = IAP_CMD_READ_PART_ID_NO; iap_cmd_call(&iap_cmd_res); - if (iap_cmd_res.status_res.status_ret != CMD_SUCCESS) + if (iap_cmd_res.status_res.status_ret != CMD_SUCCESS) { return USB_REQUEST_STATUS_STALL; + } read_partid_serialno.part_id[0] = iap_cmd_res.status_res.iap_result[0]; read_partid_serialno.part_id[1] = iap_cmd_res.status_res.iap_result[1]; @@ -90,8 +91,9 @@ usb_request_status_t usb_vendor_request_read_partid_serialno( /* Read IAP Serial Number Identification */ iap_cmd_res.cmd_param.command_code = IAP_CMD_READ_SERIAL_NO; iap_cmd_call(&iap_cmd_res); - if (iap_cmd_res.status_res.status_ret != CMD_SUCCESS) + if (iap_cmd_res.status_res.status_ret != CMD_SUCCESS) { return USB_REQUEST_STATUS_STALL; + } read_partid_serialno.serial_no[0] = iap_cmd_res.status_res.iap_result[0]; read_partid_serialno.serial_no[1] = iap_cmd_res.status_res.iap_result[1]; diff --git a/firmware/hackrf_usb/usb_api_sweep.c b/firmware/hackrf_usb/usb_api_sweep.c index a6b40846..12775d64 100644 --- a/firmware/hackrf_usb/usb_api_sweep.c +++ b/firmware/hackrf_usb/usb_api_sweep.c @@ -145,9 +145,11 @@ void sweep_mode(uint32_t seq) while (transceiver_request.seq == seq) { // Wait for M0 to finish receiving a buffer. - while (m0_state.active_mode != M0_MODE_WAIT) - if (transceiver_request.seq != seq) + while (m0_state.active_mode != M0_MODE_WAIT) { + if (transceiver_request.seq != seq) { goto end; + } + } // Set M0 to switch back to RX after two more buffers. m0_state.threshold += 0x8000; @@ -214,9 +216,11 @@ void sweep_mode(uint32_t seq) } // Wait for M0 to resume RX. - while (m0_state.active_mode != M0_MODE_RX) - if (transceiver_request.seq != seq) + while (m0_state.active_mode != M0_MODE_RX) { + if (transceiver_request.seq != seq) { goto end; + } + } // Set M0 to switch back to WAIT after filling next buffer. m0_state.threshold += 0x4000; diff --git a/firmware/hackrf_usb/usb_api_transceiver.c b/firmware/hackrf_usb/usb_api_transceiver.c index 6ed0aaae..0ae52077 100644 --- a/firmware/hackrf_usb/usb_api_transceiver.c +++ b/firmware/hackrf_usb/usb_api_transceiver.c @@ -165,8 +165,9 @@ usb_request_status_t usb_vendor_request_set_lna_gain( const uint8_t value = max2837_set_lna_gain(&max2837, endpoint->setup.index); endpoint->buffer[0] = value; - if (value) + if (value) { hackrf_ui()->set_bb_lna_gain(endpoint->setup.index); + } usb_transfer_schedule_block( endpoint->in, &endpoint->buffer, @@ -187,8 +188,9 @@ usb_request_status_t usb_vendor_request_set_vga_gain( const uint8_t value = max2837_set_vga_gain(&max2837, endpoint->setup.index); endpoint->buffer[0] = value; - if (value) + if (value) { hackrf_ui()->set_bb_vga_gain(endpoint->setup.index); + } usb_transfer_schedule_block( endpoint->in, &endpoint->buffer, @@ -209,8 +211,9 @@ usb_request_status_t usb_vendor_request_set_txvga_gain( const uint8_t value = max2837_set_txvga_gain(&max2837, endpoint->setup.index); endpoint->buffer[0] = value; - if (value) + if (value) { hackrf_ui()->set_bb_tx_vga_gain(endpoint->setup.index); + } usb_transfer_schedule_block( endpoint->in, &endpoint->buffer, diff --git a/host/hackrf-tools/src/hackrf_clock.c b/host/hackrf-tools/src/hackrf_clock.c index e4935caf..c41ef767 100644 --- a/host/hackrf-tools/src/hackrf_clock.c +++ b/host/hackrf-tools/src/hackrf_clock.c @@ -111,20 +111,24 @@ void print_clk_control(uint16_t clk_ctrl) { uint8_t clk_src, clk_pwr; printf("\tclock control = "); - if (clk_ctrl & SI5351C_CLK_POWERDOWN) + if (clk_ctrl & SI5351C_CLK_POWERDOWN) { printf("Down, "); - else + } else { printf("Up, "); - if (clk_ctrl & SI5351C_CLK_INT_MODE) + } + if (clk_ctrl & SI5351C_CLK_INT_MODE) { printf("Int Mode, "); - else + } else { printf("Frac Mode, "); - if (clk_ctrl & SI5351C_CLK_PLL_SRC) + } + if (clk_ctrl & SI5351C_CLK_PLL_SRC) { printf("PLL src B, "); - else + } else { printf("PLL src A, "); - if (clk_ctrl & SI5351C_CLK_INV) + } + if (clk_ctrl & SI5351C_CLK_INV) { printf("Inverted, "); + } clk_src = (clk_ctrl >> 2) & 0x3; switch (clk_src) { case 0: @@ -192,11 +196,12 @@ int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_ printf("\tp1 = %u\n", p1); printf("\tp2 = %u\n", p2); printf("\tp3 = %u\n", p3); - if (p3) + if (p3) { printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", ((double) 800 / (double) (((double) p1 * p3 + p2 + 512 * p3) / (double) (128 * p3))) / div_lut[r_div]); + } } else { // MS6 and 7 are integer only unsigned int parms; @@ -214,9 +219,10 @@ int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_ (parameters[2] & 0x70) >> 4; parms = (ms_number == 6) ? parameters[0] : parameters[1]; printf("\tp1_int = %u\n", parms); - if (parms) + if (parms) { printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", (800.0f / parms) / div_lut[r_div]); + } } printf("\toutput divider = %u\n", div_lut[r_div]); return HACKRF_SUCCESS; @@ -342,9 +348,9 @@ int main(int argc, char** argv) } if (read) { - if (clock == CLOCK_UNDEFINED) + if (clock == CLOCK_UNDEFINED) { si5351c_read_configuration(device); - else { + } else { printf("%d\n", clock); si5351c_read_multisynth_config(device, clock); } diff --git a/host/hackrf-tools/src/hackrf_debug.c b/host/hackrf-tools/src/hackrf_debug.c index 138556e9..bf3177cc 100644 --- a/host/hackrf-tools/src/hackrf_debug.c +++ b/host/hackrf-tools/src/hackrf_debug.c @@ -175,20 +175,24 @@ void print_clk_control(uint16_t clk_ctrl) { uint8_t clk_src, clk_pwr; printf("\tclock control = \n"); - if (clk_ctrl & SI5351C_CLK_POWERDOWN) + if (clk_ctrl & SI5351C_CLK_POWERDOWN) { printf("\t\tPower Down\n"); - else + } else { printf("\t\tPower Up\n"); - if (clk_ctrl & SI5351C_CLK_INT_MODE) + } + if (clk_ctrl & SI5351C_CLK_INT_MODE) { printf("\t\tInt Mode\n"); - else + } else { printf("\t\tFrac Mode\n"); - if (clk_ctrl & SI5351C_CLK_PLL_SRC) + } + if (clk_ctrl & SI5351C_CLK_PLL_SRC) { printf("\t\tPLL src B\n"); - else + } else { printf("\t\tPLL src A\n"); - if (clk_ctrl & SI5351C_CLK_INV) + } + if (clk_ctrl & SI5351C_CLK_INV) { printf("\t\tInverted\n"); + } clk_src = (clk_ctrl >> 2) & 0x3; switch (clk_src) { case 0: @@ -256,11 +260,12 @@ int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_ printf("\tp1 = %u\n", p1); printf("\tp2 = %u\n", p2); printf("\tp3 = %u\n", p3); - if (p3) + if (p3) { printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", ((double) 800 / (double) (((double) p1 * p3 + p2 + 512 * p3) / (double) (128 * p3))) / div_lut[r_div]); + } } else { // MS6 and 7 are integer only unsigned int parms; @@ -278,9 +283,10 @@ int si5351c_read_multisynth_config(hackrf_device* device, const uint_fast8_t ms_ (parameters[2] & 0x70) >> 4; parms = (ms_number == 6) ? parameters[0] : parameters[1]; printf("\tp1_int = %u\n", parms); - if (parms) + if (parms) { printf("\tOutput (800Mhz PLL): %#.10f Mhz\n", (800.0f / parms) / div_lut[r_div]); + } } printf("\toutput divider = %u\n", div_lut[r_div]); return HACKRF_SUCCESS; @@ -412,20 +418,22 @@ static const char* mode_name(uint32_t mode) { const char* mode_names[] = {"IDLE", "WAIT", "RX", "TX_START", "TX_RUN"}; const uint32_t num_modes = sizeof(mode_names) / sizeof(mode_names[0]); - if (mode < num_modes) + if (mode < num_modes) { return mode_names[mode]; - else + } else { return "UNKNOWN"; + } } static const char* error_name(uint32_t error) { const char* error_names[] = {"NONE", "RX_TIMEOUT", "TX_TIMEOUT"}; const uint32_t num_errors = sizeof(error_names) / sizeof(error_names[0]); - if (error < num_errors) + if (error < num_errors) { return error_names[error]; - else + } else { return "UNKNOWN"; + } } static void print_state(hackrf_m0_state* state) diff --git a/host/hackrf-tools/src/hackrf_info.c b/host/hackrf-tools/src/hackrf_info.c index e726c014..a682a529 100644 --- a/host/hackrf-tools/src/hackrf_info.c +++ b/host/hackrf-tools/src/hackrf_info.c @@ -60,14 +60,16 @@ int main(void) } for (i = 0; i < list->devicecount; i++) { - if (i > 0) + if (i > 0) { printf("\n"); + } printf("Found HackRF\n"); printf("Index: %d\n", i); - if (list->serial_numbers[i]) + if (list->serial_numbers[i]) { printf("Serial number: %s\n", list->serial_numbers[i]); + } device = NULL; result = hackrf_device_list_open(list, i, &device); @@ -139,8 +141,9 @@ int main(void) } if (result == HACKRF_SUCCESS) { for (j = 0; j < 8; j++) { - if (operacakes[j] == HACKRF_OPERACAKE_ADDRESS_INVALID) + if (operacakes[j] == HACKRF_OPERACAKE_ADDRESS_INVALID) { break; + } printf("Opera Cake found, address: %d\n", operacakes[j]); } } diff --git a/host/hackrf-tools/src/hackrf_operacake.c b/host/hackrf-tools/src/hackrf_operacake.c index 7da90a70..2c668121 100644 --- a/host/hackrf-tools/src/hackrf_operacake.c +++ b/host/hackrf-tools/src/hackrf_operacake.c @@ -99,8 +99,9 @@ int parse_port(char* str, uint8_t* port) if (str[0] == 'A' || str[0] == 'B') { // The port was specified as a side and number eg. A1 or B3 result = parse_uint16(str + 1, &tmp_port); - if (result != HACKRF_SUCCESS) + if (result != HACKRF_SUCCESS) { return result; + } if (tmp_port >= 5 || tmp_port <= 0) { fprintf(stderr, "invalid port: %s\n", str); @@ -118,8 +119,9 @@ int parse_port(char* str, uint8_t* port) } } else { result = parse_uint16(str, &tmp_port); - if (result != HACKRF_SUCCESS) + if (result != HACKRF_SUCCESS) { return result; + } } *port = tmp_port & 0xFF; // printf("Port: %d\n", *port); @@ -136,8 +138,9 @@ int parse_range(char* s, hackrf_operacake_freq_range* range) // Read frequency as a float here to support scientific notation (e.g: 1e6) if (sscanf(s, "%15[^:]:%f:%f", port, &min, &max) == 3) { result = parse_port(port, &(range->port)); - if (result != HACKRF_SUCCESS) + if (result != HACKRF_SUCCESS) { return result; + } range->freq_min = min; range->freq_max = max; @@ -155,8 +158,9 @@ int parse_dwell(char* s, hackrf_operacake_dwell_time* dwell_time) // Read dwell as a float here to support scientific notation (e.g: 1e6) if (sscanf(s, "%15[^:]:%f", port, &dwell) == 2) { result = parse_port(port, &dwell_time->port); - if (result != HACKRF_SUCCESS) + if (result != HACKRF_SUCCESS) { return result; + } if (dwell == 0) { fprintf(stderr, "dwell time cannot be 0\n"); @@ -166,8 +170,9 @@ int parse_dwell(char* s, hackrf_operacake_dwell_time* dwell_time) return HACKRF_SUCCESS; } else if (sscanf(s, "%15[^:]", port) == 1) { result = parse_port(port, &dwell_time->port); - if (result != HACKRF_SUCCESS) + if (result != HACKRF_SUCCESS) { return result; + } // This will be replaced with the default dwell time later. dwell_time->dwell = 0; @@ -385,8 +390,9 @@ int main(int argc, char** argv) operacake_count++; } } - if (!operacake_count) + if (!operacake_count) { printf("None"); + } printf("\n"); } diff --git a/host/hackrf-tools/src/hackrf_spiflash.c b/host/hackrf-tools/src/hackrf_spiflash.c index 105f2211..6020491b 100644 --- a/host/hackrf-tools/src/hackrf_spiflash.c +++ b/host/hackrf-tools/src/hackrf_spiflash.c @@ -101,8 +101,9 @@ int compatibility_check(uint8_t* data, int length, hackrf_device* device) break; } } - if (match) + if (match) { return 0; + } } } return 1; @@ -277,8 +278,9 @@ int main(int argc, char** argv) if (length == 0) { fprintf(stderr, "Requested transfer of zero bytes.\n"); - if (infile != NULL) + if (infile != NULL) { fclose(infile); + } usage(); return EXIT_FAILURE; } @@ -286,8 +288,9 @@ int main(int argc, char** argv) if ((length > MAX_LENGTH) || (address > MAX_LENGTH) || ((address + length) > MAX_LENGTH)) { fprintf(stderr, "Request exceeds size of flash memory.\n"); - if (infile != NULL) + if (infile != NULL) { fclose(infile); + } usage(); return EXIT_FAILURE; } @@ -363,10 +366,11 @@ int main(int argc, char** argv) tmp_length = length; while (tmp_length) { xfer_len = (tmp_length > 256) ? 256 : tmp_length; - if (verbose) + if (verbose) { printf("Reading %d bytes from 0x%06x.\n", xfer_len, address); + } result = hackrf_spiflash_read(device, address, xfer_len, pdata); if (result != HACKRF_SUCCESS) { fprintf(stderr, @@ -423,14 +427,16 @@ int main(int argc, char** argv) infile = NULL; return EXIT_FAILURE; } - if (!verbose) + if (!verbose) { printf("Writing %d bytes at 0x%06x.\n", length, address); + } while (length) { xfer_len = (length > 256) ? 256 : length; - if (verbose) + if (verbose) { printf("Writing %d bytes at 0x%06x.\n", xfer_len, address); + } result = hackrf_spiflash_write(device, address, xfer_len, pdata); if (result != HACKRF_SUCCESS) { fprintf(stderr, diff --git a/host/hackrf-tools/src/hackrf_sweep.c b/host/hackrf-tools/src/hackrf_sweep.c index 5574112b..d130578d 100644 --- a/host/hackrf-tools/src/hackrf_sweep.c +++ b/host/hackrf-tools/src/hackrf_sweep.c @@ -151,17 +151,20 @@ int parse_u32_range(char* s, uint32_t* const value_min, uint32_t* const value_ma int result; char* sep = strchr(s, ':'); - if (!sep) + if (!sep) { return HACKRF_ERROR_INVALID_PARAM; + } *sep = 0; result = parse_u32(s, value_min); - if (result != HACKRF_SUCCESS) + if (result != HACKRF_SUCCESS) { return result; + } result = parse_u32(sep + 1, value_max); - if (result != HACKRF_SUCCESS) + if (result != HACKRF_SUCCESS) { return result; + } return HACKRF_SUCCESS; } @@ -527,11 +530,13 @@ int main(int argc, char** argv) } } - if (lna_gain % 8) + if (lna_gain % 8) { fprintf(stderr, "warning: lna_gain (-l) must be a multiple of 8\n"); + } - if (vga_gain % 2) + if (vga_gain % 2) { fprintf(stderr, "warning: vga_gain (-g) must be a multiple of 2\n"); + } if (amp) { if (amp_enable > 1) { @@ -820,8 +825,9 @@ int main(int argc, char** argv) gettimeofday(&time_now, NULL); time_diff = TimevalDiff(&time_now, &t_start); - if ((sweep_rate == 0) && (time_diff > 0)) + if ((sweep_rate == 0) && (time_diff > 0)) { sweep_rate = sweep_count / time_diff; + } fprintf(stderr, "Total sweeps: %" PRIu64 " in %.5f seconds (%.2f sweeps/second)\n", sweep_count, From e8e67848815f9144fba661992228ff83e85f1ebe Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Thu, 7 Jul 2022 10:53:35 +0100 Subject: [PATCH 21/22] Add spacing lines between declarations in hackrf.h. --- host/libhackrf/src/hackrf.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/host/libhackrf/src/hackrf.h b/host/libhackrf/src/hackrf.h index 301c0c54..60fb5729 100644 --- a/host/libhackrf/src/hackrf.h +++ b/host/libhackrf/src/hackrf.h @@ -191,6 +191,7 @@ struct hackrf_device_list { void** usb_devices; int usb_devicecount; }; + typedef struct hackrf_device_list hackrf_device_list_t; typedef int (*hackrf_sample_block_cb_fn)(hackrf_transfer* transfer); @@ -200,42 +201,52 @@ extern "C" { #endif extern ADDAPI int ADDCALL hackrf_init(); + extern ADDAPI int ADDCALL hackrf_exit(); extern ADDAPI const char* ADDCALL hackrf_library_version(); + extern ADDAPI const char* ADDCALL hackrf_library_release(); extern ADDAPI hackrf_device_list_t* ADDCALL hackrf_device_list(); + extern ADDAPI int ADDCALL hackrf_device_list_open( hackrf_device_list_t* list, int idx, hackrf_device** device); + extern ADDAPI void ADDCALL hackrf_device_list_free(hackrf_device_list_t* list); extern ADDAPI int ADDCALL hackrf_open(hackrf_device** device); + extern ADDAPI int ADDCALL hackrf_open_by_serial( const char* const desired_serial_number, hackrf_device** device); + extern ADDAPI int ADDCALL hackrf_close(hackrf_device* device); extern ADDAPI int ADDCALL hackrf_start_rx( hackrf_device* device, hackrf_sample_block_cb_fn callback, void* rx_ctx); + extern ADDAPI int ADDCALL hackrf_stop_rx(hackrf_device* device); extern ADDAPI int ADDCALL hackrf_start_tx( hackrf_device* device, hackrf_sample_block_cb_fn callback, void* tx_ctx); + extern ADDAPI int ADDCALL hackrf_stop_tx(hackrf_device* device); extern ADDAPI int ADDCALL hackrf_get_m0_state( hackrf_device* device, hackrf_m0_state* value); + extern ADDAPI int ADDCALL hackrf_set_tx_underrun_limit( hackrf_device* device, uint32_t value); + extern ADDAPI int ADDCALL hackrf_set_rx_overrun_limit( hackrf_device* device, uint32_t value); @@ -247,6 +258,7 @@ extern ADDAPI int ADDCALL hackrf_max2837_read( hackrf_device* device, uint8_t register_number, uint16_t* value); + extern ADDAPI int ADDCALL hackrf_max2837_write( hackrf_device* device, uint8_t register_number, @@ -256,6 +268,7 @@ extern ADDAPI int ADDCALL hackrf_si5351c_read( hackrf_device* device, uint16_t register_number, uint16_t* value); + extern ADDAPI int ADDCALL hackrf_si5351c_write( hackrf_device* device, uint16_t register_number, @@ -269,23 +282,28 @@ extern ADDAPI int ADDCALL hackrf_rffc5071_read( hackrf_device* device, uint8_t register_number, uint16_t* value); + extern ADDAPI int ADDCALL hackrf_rffc5071_write( hackrf_device* device, uint8_t register_number, uint16_t value); extern ADDAPI int ADDCALL hackrf_spiflash_erase(hackrf_device* device); + extern ADDAPI int ADDCALL hackrf_spiflash_write( hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* const data); + extern ADDAPI int ADDCALL hackrf_spiflash_read( hackrf_device* device, const uint32_t address, const uint16_t length, unsigned char* data); + extern ADDAPI int ADDCALL hackrf_spiflash_status(hackrf_device* device, uint8_t* data); + extern ADDAPI int ADDCALL hackrf_spiflash_clear_status(hackrf_device* device); /* device will need to be reset after hackrf_cpld_write */ @@ -295,15 +313,18 @@ extern ADDAPI int ADDCALL hackrf_cpld_write( const unsigned int total_length); extern ADDAPI int ADDCALL hackrf_board_id_read(hackrf_device* device, uint8_t* value); + extern ADDAPI int ADDCALL hackrf_version_string_read( hackrf_device* device, char* version, uint8_t length); + extern ADDAPI int ADDCALL hackrf_usb_api_version_read( hackrf_device* device, uint16_t* version); extern ADDAPI int ADDCALL hackrf_set_freq(hackrf_device* device, const uint64_t freq_hz); + extern ADDAPI int ADDCALL hackrf_set_freq_explicit( hackrf_device* device, const uint64_t if_freq_hz, @@ -315,6 +336,7 @@ extern ADDAPI int ADDCALL hackrf_set_sample_rate_manual( hackrf_device* device, const uint32_t freq_hz, const uint32_t divider); + extern ADDAPI int ADDCALL hackrf_set_sample_rate( hackrf_device* device, const double freq_hz); @@ -343,14 +365,18 @@ extern ADDAPI int ADDCALL hackrf_set_antenna_enable( const uint8_t value); extern ADDAPI const char* ADDCALL hackrf_error_name(enum hackrf_error errcode); + extern ADDAPI const char* ADDCALL hackrf_board_id_name(enum hackrf_board_id board_id); + extern ADDAPI const char* ADDCALL hackrf_usb_board_id_name( enum hackrf_usb_board_id usb_board_id); + extern ADDAPI const char* ADDCALL hackrf_filter_path_name(const enum rf_path_filter path); /* Compute nearest freq for bw filter (manual filter) */ extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw_round_down_lt( const uint32_t bandwidth_hz); + /* Compute best default value depending on sample rate (auto filter) */ extern ADDAPI uint32_t ADDCALL hackrf_compute_baseband_filter_bw( const uint32_t bandwidth_hz); @@ -376,23 +402,28 @@ extern ADDAPI int ADDCALL hackrf_init_sweep( extern ADDAPI int ADDCALL hackrf_get_operacake_boards( hackrf_device* device, uint8_t* boards); + extern ADDAPI int ADDCALL hackrf_set_operacake_mode( hackrf_device* device, uint8_t address, enum operacake_switching_mode mode); + extern ADDAPI int ADDCALL hackrf_get_operacake_mode( hackrf_device* device, uint8_t address, enum operacake_switching_mode* mode); + extern ADDAPI int ADDCALL hackrf_set_operacake_ports( hackrf_device* device, uint8_t address, uint8_t port_a, uint8_t port_b); + extern ADDAPI int ADDCALL hackrf_set_operacake_dwell_times( hackrf_device* device, hackrf_operacake_dwell_time* dwell_times, uint8_t count); + extern ADDAPI int ADDCALL hackrf_set_operacake_freq_ranges( hackrf_device* device, hackrf_operacake_freq_range* freq_ranges, @@ -413,11 +444,13 @@ extern ADDAPI int ADDCALL hackrf_operacake_gpio_test( hackrf_device* device, uint8_t address, uint16_t* test_result); + #ifdef HACKRF_ISSUE_609_IS_FIXED extern ADDAPI int ADDCALL hackrf_cpld_checksum(hackrf_device* device, uint32_t* crc); #endif /* HACKRF_ISSUE_609_IS_FIXED */ extern ADDAPI int ADDCALL hackrf_set_ui_enable(hackrf_device* device, const uint8_t value); + extern ADDAPI int ADDCALL hackrf_start_rx_sweep( hackrf_device* device, hackrf_sample_block_cb_fn callback, From 01e070201392d419cc9142a204f850e19988aa1d Mon Sep 17 00:00:00 2001 From: Martin Ling Date: Thu, 7 Jul 2022 11:29:36 +0100 Subject: [PATCH 22/22] Print hackrf_sweep usage with a single fprintf call. --- host/hackrf-tools/src/hackrf_sweep.c | 35 +++++++++++++--------------- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git a/host/hackrf-tools/src/hackrf_sweep.c b/host/hackrf-tools/src/hackrf_sweep.c index d130578d..eb688cb2 100644 --- a/host/hackrf-tools/src/hackrf_sweep.c +++ b/host/hackrf-tools/src/hackrf_sweep.c @@ -371,26 +371,23 @@ int rx_callback(hackrf_transfer* transfer) static void usage() { - fprintf(stderr, "Usage:\n"); - fprintf(stderr, "\t[-h] # this help\n"); - fprintf(stderr, "\t[-d serial_number] # Serial number of desired HackRF\n"); - fprintf(stderr, "\t[-a amp_enable] # RX RF amplifier 1=Enable, 0=Disable\n"); - fprintf(stderr, - "\t[-f freq_min:freq_max] # minimum and maximum frequencies in MHz\n"); - fprintf(stderr, - "\t[-p antenna_enable] # Antenna port power, 1=Enable, 0=Disable\n"); - fprintf(stderr, "\t[-l gain_db] # RX LNA (IF) gain, 0-40dB, 8dB steps\n"); - fprintf(stderr, "\t[-g gain_db] # RX VGA (baseband) gain, 0-62dB, 2dB steps\n"); - fprintf(stderr, - "\t[-w bin_width] # FFT bin width (frequency resolution) in Hz, 2445-5000000\n"); - fprintf(stderr, "\t[-1] # one shot mode\n"); - fprintf(stderr, "\t[-N num_sweeps] # Number of sweeps to perform\n"); - fprintf(stderr, "\t[-B] # binary output\n"); - fprintf(stderr, "\t[-I] # binary inverse FFT output\n"); - fprintf(stderr, "\t-r filename # output file\n"); - fprintf(stderr, "\n"); - fprintf(stderr, "Output fields:\n"); fprintf(stderr, + "Usage:\n" + "\t[-h] # this help\n" + "\t[-d serial_number] # Serial number of desired HackRF\n" + "\t[-a amp_enable] # RX RF amplifier 1=Enable, 0=Disable\n" + "\t[-f freq_min:freq_max] # minimum and maximum frequencies in MHz\n" + "\t[-p antenna_enable] # Antenna port power, 1=Enable, 0=Disable\n" + "\t[-l gain_db] # RX LNA (IF) gain, 0-40dB, 8dB steps\n" + "\t[-g gain_db] # RX VGA (baseband) gain, 0-62dB, 2dB steps\n" + "\t[-w bin_width] # FFT bin width (frequency resolution) in Hz, 2445-5000000\n" + "\t[-1] # one shot mode\n" + "\t[-N num_sweeps] # Number of sweeps to perform\n" + "\t[-B] # binary output\n" + "\t[-I] # binary inverse FFT output\n" + "\t-r filename # output file\n" + "\n" + "Output fields:\n" "\tdate, time, hz_low, hz_high, hz_bin_width, num_samples, dB, dB, . . .\n"); }