SSP0: Extract SPI interface from W25Q80BV code.
This commit is contained in:
@ -23,6 +23,7 @@
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#include "hackrf_core.h"
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#include "hackrf_core.h"
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#include "si5351c.h"
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#include "si5351c.h"
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#include "spi_ssp0.h"
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#include "spi_ssp1.h"
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#include "spi_ssp1.h"
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#include "max2837.h"
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#include "max2837.h"
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#include "max2837_target.h"
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#include "max2837_target.h"
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@ -30,6 +31,8 @@
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#include "max5864_target.h"
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#include "max5864_target.h"
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#include "rffc5071.h"
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#include "rffc5071.h"
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#include "rffc5071_spi.h"
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#include "rffc5071_spi.h"
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#include "w25q80bv.h"
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#include "w25q80bv_target.h"
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#include "sgpio.h"
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#include "sgpio.h"
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#include "rf_path.h"
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#include "rf_path.h"
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#include <libopencm3/lpc43xx/i2c.h>
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#include <libopencm3/lpc43xx/i2c.h>
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@ -96,6 +99,25 @@ rffc5071_driver_t rffc5072 = {
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.spi = &rffc5071_spi,
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.spi = &rffc5071_spi,
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};
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};
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const ssp0_config_t ssp0_config_w25q80bv = {
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.data_bits = SSP_DATA_8BITS,
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.serial_clock_rate = 2,
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.clock_prescale_rate = 2,
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.select = w25q80bv_target_spi_select,
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.unselect = w25q80bv_target_spi_unselect,
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};
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spi_t spi_ssp0 = {
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.config = &ssp0_config_w25q80bv,
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.init = spi_ssp0_init,
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.transfer = spi_ssp0_transfer,
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.transfer_gather = spi_ssp0_transfer_gather,
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};
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w25q80bv_driver_t spi_flash = {
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.spi = &spi_ssp0,
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};
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void delay(uint32_t duration)
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void delay(uint32_t duration)
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{
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{
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uint32_t i;
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uint32_t i;
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@ -32,11 +32,13 @@ extern "C"
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include "spi_ssp0.h"
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#include "spi_ssp1.h"
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#include "spi_ssp1.h"
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#include "max2837.h"
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#include "max2837.h"
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#include "max5864.h"
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#include "max5864.h"
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#include "rffc5071.h"
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#include "rffc5071.h"
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#include "w25q80bv.h"
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/* hardware identification number */
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/* hardware identification number */
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#define BOARD_ID_JELLYBEAN 0
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#define BOARD_ID_JELLYBEAN 0
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@ -356,12 +358,15 @@ typedef enum {
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void delay(uint32_t duration);
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void delay(uint32_t duration);
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/* TODO: Hide these configurations */
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extern const ssp0_config_t ssp0_config_w25q80bv;
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extern const ssp1_config_t ssp1_config_max2837;
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extern const ssp1_config_t ssp1_config_max2837;
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extern const ssp1_config_t ssp1_config_max5864;
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extern const ssp1_config_t ssp1_config_max5864;
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extern max2837_driver_t max2837;
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extern max2837_driver_t max2837;
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extern max5864_driver_t max5864;
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extern max5864_driver_t max5864;
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extern rffc5071_driver_t rffc5072;
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extern rffc5071_driver_t rffc5072;
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extern w25q80bv_driver_t spi_flash;
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void cpu_clock_init(void);
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void cpu_clock_init(void);
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void cpu_clock_pll1_low_speed(void);
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void cpu_clock_pll1_low_speed(void);
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@ -21,7 +21,7 @@
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* Boston, MA 02110-1301, USA.
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* Boston, MA 02110-1301, USA.
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*/
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*/
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#include "w25q80bv_spi.h"
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#include "spi_ssp0.h"
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#include <libopencm3/lpc43xx/gpio.h>
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#include <libopencm3/lpc43xx/gpio.h>
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#include <libopencm3/lpc43xx/rgu.h>
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#include <libopencm3/lpc43xx/rgu.h>
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@ -30,26 +30,23 @@
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#include "hackrf_core.h"
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#include "hackrf_core.h"
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void w25q80bv_spi_init(spi_t* const spi, const void* const config) {
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void spi_ssp0_init(spi_t* const spi, const void* const _config) {
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(void)spi;
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(void)config;
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const uint8_t serial_clock_rate = 2;
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const uint8_t clock_prescale_rate = 2;
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/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
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/* Reset SPIFI peripheral before to Erase/Write SPIFI memory through SPI */
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RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
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RESET_CTRL1 = RESET_CTRL1_SPIFI_RST;
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/* initialize SSP0 */
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const ssp0_config_t* const config = _config;
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ssp_init(SSP0_NUM,
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ssp_init(SSP0_NUM,
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SSP_DATA_8BITS,
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config->data_bits,
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SSP_FRAME_SPI,
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SSP_FRAME_SPI,
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SSP_CPOL_0_CPHA_0,
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SSP_CPOL_0_CPHA_0,
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serial_clock_rate,
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config->serial_clock_rate,
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clock_prescale_rate,
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config->clock_prescale_rate,
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SSP_MODE_NORMAL,
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SSP_MODE_NORMAL,
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SSP_MASTER,
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SSP_MASTER,
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SSP_SLAVE_OUT_ENABLE);
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SSP_SLAVE_OUT_ENABLE);
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spi->config = config;
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/* Init SPIFI GPIO to Normal GPIO */
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/* Init SPIFI GPIO to Normal GPIO */
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scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_3 SPIFI_SCK => SSP0_SCK
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scu_pinmux(P3_3, (SCU_SSP_IO | SCU_CONF_FUNCTION2)); // P3_3 SPIFI_SCK => SSP0_SCK
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@ -67,37 +64,41 @@ void w25q80bv_spi_init(spi_t* const spi, const void* const config) {
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/* configure GPIO pins */
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/* configure GPIO pins */
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scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST);
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scu_pinmux(SCU_FLASH_HOLD, SCU_GPIO_FAST);
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scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST);
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scu_pinmux(SCU_FLASH_WP, SCU_GPIO_FAST);
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scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
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/* drive SSEL, HOLD, and WP pins high */
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/* drive SSEL, HOLD, and WP pins high */
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gpio_set(PORT_FLASH, (PIN_FLASH_HOLD | PIN_FLASH_WP));
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gpio_set(PORT_FLASH, (PIN_FLASH_HOLD | PIN_FLASH_WP));
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gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
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/* Set GPIO pins as outputs. */
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/* Set GPIO pins as outputs. */
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GPIO1_DIR |= (PIN_FLASH_HOLD | PIN_FLASH_WP);
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GPIO1_DIR |= (PIN_FLASH_HOLD | PIN_FLASH_WP);
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GPIO5_DIR |= PIN_SSP0_SSEL;
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}
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}
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void w25q80bv_spi_transfer_gather(
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void spi_ssp0_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count) {
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spi_t* const spi,
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const ssp0_config_t* const config = spi->config;
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const spi_transfer_t* const transfers,
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const size_t transfer_count
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) {
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(void)spi;
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gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
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const size_t word_size = (SSP0_CR0 & 0xf) + 1;
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for(size_t i=0; i<transfer_count; i++) {
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uint8_t* const p = transfers[i].data;
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config->select(spi);
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for(size_t j=0; j<transfers[i].count; j++) {
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for(size_t i=0; i<count; i++) {
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p[j] = ssp_transfer(SSP0_NUM, p[j]);
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const size_t data_count = transfers[i].count;
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if( word_size > 8 ) {
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uint16_t* const data = transfers[i].data;
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for(size_t j=0; j<data_count; j++) {
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data[j] = ssp_transfer(SSP0_NUM, data[j]);
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}
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} else {
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uint8_t* const data = transfers[i].data;
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for(size_t j=0; j<data_count; j++) {
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data[j] = ssp_transfer(SSP0_NUM, data[j]);
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}
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}
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}
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}
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}
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gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
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config->unselect(spi);
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}
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}
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void w25q80bv_spi_transfer(spi_t* const spi, void* const data, const size_t count) {
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void spi_ssp0_transfer(spi_t* const spi, void* const data, const size_t count) {
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const spi_transfer_t transfers[] = {
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const spi_transfer_t transfers[] = {
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{ data, count },
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{ data, count },
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};
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};
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w25q80bv_spi_transfer_gather(spi, transfers, 1);
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spi_ssp0_transfer_gather(spi, transfers, 1);
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}
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}
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44
firmware/common/spi_ssp0.h
Normal file
44
firmware/common/spi_ssp0.h
Normal file
@ -0,0 +1,44 @@
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/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#ifndef __SPI_SSP0_H__
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#define __SPI_SSP0_H__
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#include <stdint.h>
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#include <stddef.h>
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#include "spi.h"
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#include <libopencm3/lpc43xx/ssp.h>
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typedef struct ssp0_config_t {
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ssp_datasize_t data_bits;
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uint8_t serial_clock_rate;
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uint8_t clock_prescale_rate;
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void (*select)(spi_t* const spi);
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void (*unselect)(spi_t* const spi);
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} ssp0_config_t;
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void spi_ssp0_init(spi_t* const spi, const void* const config);
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void spi_ssp0_transfer(spi_t* const spi, void* const data, const size_t count);
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void spi_ssp0_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t count);
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#endif/*__SPI_SSP0_H__*/
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@ -30,7 +30,9 @@
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#include <stdint.h>
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#include <stdint.h>
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#include "w25q80bv.h"
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#include "w25q80bv.h"
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#include "w25q80bv_spi.h"
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#include "w25q80bv_target.h"
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#include "hackrf_core.h"
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
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@ -49,7 +51,6 @@
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* Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI.
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* Set up pins for GPIO and SPI control, configure SSP0 peripheral for SPI.
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* SSP0_SSEL is controlled by GPIO in order to handle various transfer lengths.
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* SSP0_SSEL is controlled by GPIO in order to handle various transfer lengths.
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*/
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*/
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void w25q80bv_setup(w25q80bv_driver_t* const drv)
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void w25q80bv_setup(w25q80bv_driver_t* const drv)
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{
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{
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uint8_t device_id;
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uint8_t device_id;
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@ -58,7 +59,8 @@ void w25q80bv_setup(w25q80bv_driver_t* const drv)
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drv->num_pages = 4096U;
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drv->num_pages = 4096U;
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drv->num_bytes = 1048576U;
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drv->num_bytes = 1048576U;
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spi_init(drv->spi, NULL);
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spi_init(drv->spi, &ssp0_config_w25q80bv);
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w25q80bv_target_init(drv);
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device_id = 0;
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device_id = 0;
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while(device_id != W25Q80BV_DEVICE_ID_RES)
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while(device_id != W25Q80BV_DEVICE_ID_RES)
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@ -199,14 +201,3 @@ void w25q80bv_program(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len,
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w25q80bv_page_program(drv, addr, len, data);
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w25q80bv_page_program(drv, addr, len, data);
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}
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}
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}
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}
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spi_t w25q80bv_spi = {
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.config = NULL,
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.init = w25q80bv_spi_init,
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.transfer = w25q80bv_spi_transfer,
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.transfer_gather = w25q80bv_spi_transfer_gather,
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};
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w25q80bv_driver_t spi_flash = {
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.spi = &w25q80bv_spi,
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};
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@ -49,6 +49,4 @@ void w25q80bv_program(w25q80bv_driver_t* const drv, uint32_t addr, uint32_t len,
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uint8_t w25q80bv_get_device_id(w25q80bv_driver_t* const drv);
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uint8_t w25q80bv_get_device_id(w25q80bv_driver_t* const drv);
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void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t* unique_id);
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void w25q80bv_get_unique_id(w25q80bv_driver_t* const drv, w25q80bv_unique_id_t* unique_id);
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extern w25q80bv_driver_t spi_flash;
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#endif//__W25Q80BV_H__
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#endif//__W25Q80BV_H__
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48
firmware/common/w25q80bv_target.c
Normal file
48
firmware/common/w25q80bv_target.c
Normal file
@ -0,0 +1,48 @@
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/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of HackRF.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2, or (at your option)
|
||||||
|
* any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; see the file COPYING. If not, write to
|
||||||
|
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||||
|
* Boston, MA 02110-1301, USA.
|
||||||
|
*/
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#include "w25q80bv_target.h"
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#include <libopencm3/lpc43xx/scu.h>
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#include <libopencm3/lpc43xx/gpio.h>
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#include "hackrf_core.h"
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/* TODO: Why is SSEL being controlled manually when SSP0 could do it
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* automatically?
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*/
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void w25q80bv_target_init(w25q80bv_driver_t* const drv) {
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(void)drv;
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scu_pinmux(SCU_SSP0_SSEL, (SCU_GPIO_FAST | SCU_CONF_FUNCTION4));
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gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
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GPIO5_DIR |= PIN_SSP0_SSEL;
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}
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|
||||||
|
void w25q80bv_target_spi_select(spi_t* const spi) {
|
||||||
|
(void)spi;
|
||||||
|
gpio_clear(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
|
||||||
|
}
|
||||||
|
|
||||||
|
void w25q80bv_target_spi_unselect(spi_t* const spi) {
|
||||||
|
(void)spi;
|
||||||
|
gpio_set(PORT_SSP0_SSEL, PIN_SSP0_SSEL);
|
||||||
|
}
|
@ -1,7 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright 2013 Michael Ossmann
|
* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
|
||||||
* Copyright 2013 Benjamin Vernoux
|
|
||||||
* Copyright 2014 Jared Boone, ShareBrained Technology
|
|
||||||
*
|
*
|
||||||
* This file is part of HackRF.
|
* This file is part of HackRF.
|
||||||
*
|
*
|
||||||
@ -21,15 +19,14 @@
|
|||||||
* Boston, MA 02110-1301, USA.
|
* Boston, MA 02110-1301, USA.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __W25Q80BV_SPI_H__
|
#ifndef __W25Q80BV_TARGET_H__
|
||||||
#define __W25Q80BV_SPI_H__
|
#define __W25Q80BV_TARGET_H__
|
||||||
|
|
||||||
#include <stddef.h>
|
|
||||||
|
|
||||||
|
#include "w25q80bv.h"
|
||||||
#include "spi.h"
|
#include "spi.h"
|
||||||
|
|
||||||
void w25q80bv_spi_init(spi_t* const spi, const void* const config);
|
void w25q80bv_target_init(w25q80bv_driver_t* const drv);
|
||||||
void w25q80bv_spi_transfer_gather(spi_t* const spi, const spi_transfer_t* const transfers, const size_t transfer_count);
|
void w25q80bv_target_spi_select(spi_t* const spi);
|
||||||
void w25q80bv_spi_transfer(spi_t* const spi, void* const data, const size_t count);
|
void w25q80bv_target_spi_unselect(spi_t* const spi);
|
||||||
|
|
||||||
#endif/*__W25Q80BV_SPI_H__*/
|
#endif/*__W25Q80BV_TARGET_H__*/
|
@ -140,7 +140,10 @@ macro(DeclareTargets)
|
|||||||
${PATH_HACKRF_FIRMWARE_COMMON}/max5864_target.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/max5864_target.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/rffc5071_spi.c
|
||||||
|
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv.c
|
||||||
|
${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_target.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/spi.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/spi.c
|
||||||
|
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp0.c
|
||||||
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp1.c
|
${PATH_HACKRF_FIRMWARE_COMMON}/spi_ssp1.c
|
||||||
m0_bin.s
|
m0_bin.s
|
||||||
)
|
)
|
||||||
|
@ -44,8 +44,6 @@ set(SRC_M4
|
|||||||
usb_api_transceiver.c
|
usb_api_transceiver.c
|
||||||
"${PATH_HACKRF_FIRMWARE_COMMON}/usb_queue.c"
|
"${PATH_HACKRF_FIRMWARE_COMMON}/usb_queue.c"
|
||||||
"${PATH_HACKRF_FIRMWARE_COMMON}/fault_handler.c"
|
"${PATH_HACKRF_FIRMWARE_COMMON}/fault_handler.c"
|
||||||
"${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv.c"
|
|
||||||
"${PATH_HACKRF_FIRMWARE_COMMON}/w25q80bv_spi.c"
|
|
||||||
"${PATH_HACKRF_FIRMWARE_COMMON}/cpld_jtag.c"
|
"${PATH_HACKRF_FIRMWARE_COMMON}/cpld_jtag.c"
|
||||||
"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/lenval.c"
|
"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/lenval.c"
|
||||||
"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/micro.c"
|
"${PATH_HACKRF_FIRMWARE_COMMON}/xapp058/micro.c"
|
||||||
|
Reference in New Issue
Block a user