Sojus07/hackrf
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Merge branch 'develop'

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This commit is contained in:
Jared Boone
2019-03-09 16:36:38 -08:00
parent 509c8f4c91 88dd1b2ad4
commit 1c7bf39bda
4 changed files with 17 additions and 2097 deletions
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16
firmware/common/cpld_xc2c.c
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@ -26,16 +26,6 @@
#include <stddef.h> #include <stddef.h>
#include <string.h> #include <string.h>
static const uint8_t cpld_xc2c64a_row_address[CPLD_XC2C64A_ROWS] = {
0x00, 0x40, 0x60, 0x20, 0x30, 0x70, 0x50, 0x10, 0x18, 0x58, 0x78, 0x38, 0x28, 0x68, 0x48, 0x08,
0x0c, 0x4c, 0x6c, 0x2c, 0x3c, 0x7c, 0x5c, 0x1c, 0x14, 0x54, 0x74, 0x34, 0x24, 0x64, 0x44, 0x04,
0x06, 0x46, 0x66, 0x26, 0x36, 0x76, 0x56, 0x16, 0x1e, 0x5e, 0x7e, 0x3e, 0x2e, 0x6e, 0x4e, 0x0e,
0x0a, 0x4a, 0x6a, 0x2a, 0x3a, 0x7a, 0x5a, 0x1a, 0x12, 0x52, 0x72, 0x32, 0x22, 0x62, 0x42, 0x02,
0x03, 0x43, 0x63, 0x23, 0x33, 0x73, 0x53, 0x13, 0x1b, 0x5b, 0x7b, 0x3b, 0x2b, 0x6b, 0x4b, 0x0b,
0x0f, 0x4f, 0x6f, 0x2f, 0x3f, 0x7f, 0x5f, 0x1f, 0x17, 0x57, 0x77, 0x37, 0x27, 0x67, 0x47, 0x07,
0x05, 0x45,
};
typedef enum { typedef enum {
CPLD_XC2C_IR_INTEST = 0b00000010, CPLD_XC2C_IR_INTEST = 0b00000010,
CPLD_XC2C_IR_BYPASS = 0b11111111, CPLD_XC2C_IR_BYPASS = 0b11111111,
@ -292,7 +282,7 @@ bool cpld_xc2c64a_jtag_checksum(
uint8_t dr[CPLD_XC2C64A_BYTES_IN_ROW]; uint8_t dr[CPLD_XC2C64A_BYTES_IN_ROW];
for(size_t row=0; row<CPLD_XC2C64A_ROWS; row++) { for(size_t row=0; row<CPLD_XC2C64A_ROWS; row++) {
const size_t address = cpld_xc2c64a_row_address[row]; const size_t address = cpld_hackrf_row_addresses.address[row];
cpld_xc2c64a_jtag_read_row(jtag, address, dr); cpld_xc2c64a_jtag_read_row(jtag, address, dr);
const size_t mask_index = verify->mask_index[row]; const size_t mask_index = verify->mask_index[row];
@ -388,7 +378,7 @@ void cpld_xc2c64a_jtag_sram_write(
cpld_xc2c_jtag_sram_write(jtag); cpld_xc2c_jtag_sram_write(jtag);
for(size_t row=0; row<CPLD_XC2C64A_ROWS; row++) { for(size_t row=0; row<CPLD_XC2C64A_ROWS; row++) {
const uint8_t address = cpld_xc2c64a_row_address[row]; const uint8_t address = cpld_hackrf_row_addresses.address[row];
cpld_xc2c64a_jtag_sram_write_row(jtag, address, &program->row[row].data[0]); cpld_xc2c64a_jtag_sram_write_row(jtag, address, &program->row[row].data[0]);
} }
@ -416,7 +406,7 @@ bool cpld_xc2c64a_jtag_sram_verify(
const size_t mask_index = (data_row >= 0) ? verify->mask_index[data_row] : 0; const size_t mask_index = (data_row >= 0) ? verify->mask_index[data_row] : 0;
const uint8_t* const expected = (data_row >= 0) ? &program->row[data_row].data[0] : NULL; const uint8_t* const expected = (data_row >= 0) ? &program->row[data_row].data[0] : NULL;
const uint8_t* const mask = (data_row >= 0) ? &verify->mask[mask_index].value[0] : NULL; const uint8_t* const mask = (data_row >= 0) ? &verify->mask[mask_index].value[0] : NULL;
const uint8_t next_address = (address_row < CPLD_XC2C64A_ROWS) ? cpld_xc2c64a_row_address[address_row] : 0; const uint8_t next_address = (address_row < CPLD_XC2C64A_ROWS) ? cpld_hackrf_row_addresses.address[address_row] : 0;
matched &= cpld_xc2c64a_jtag_sram_compare_row(jtag, expected, mask, next_address); matched &= cpld_xc2c64a_jtag_sram_compare_row(jtag, expected, mask, next_address);
} }

5
firmware/common/cpld_xc2c.h
View File

@ -49,6 +49,10 @@ typedef struct {
uint8_t mask_index[CPLD_XC2C64A_ROWS]; uint8_t mask_index[CPLD_XC2C64A_ROWS];
} cpld_xc2c64a_verify_t; } cpld_xc2c64a_verify_t;
typedef struct {
uint8_t address[CPLD_XC2C64A_ROWS];
} cpld_xc2c64a_row_addresses_t;
bool cpld_xc2c64a_jtag_checksum( bool cpld_xc2c64a_jtag_checksum(
const jtag_t* const jtag, const jtag_t* const jtag,
const cpld_xc2c64a_verify_t* const verify, const cpld_xc2c64a_verify_t* const verify,
@ -66,5 +70,6 @@ bool cpld_xc2c64a_jtag_sram_verify(
extern const cpld_xc2c64a_program_t cpld_hackrf_program_sram; extern const cpld_xc2c64a_program_t cpld_hackrf_program_sram;
extern const cpld_xc2c64a_verify_t cpld_hackrf_verify; extern const cpld_xc2c64a_verify_t cpld_hackrf_verify;
extern const cpld_xc2c64a_row_addresses_t cpld_hackrf_row_addresses;
#endif/*__CPLD_XC2C_H__*/ #endif/*__CPLD_XC2C_H__*/

2079
firmware/cpld/sgpio_if/default.svf
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File diff suppressed because it is too large Load Diff

14
firmware/tools/cpld_bitstream.py
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@ -6,6 +6,7 @@ bits_of_address = 7
bits_of_data = 274 bits_of_data = 274
bytes_of_data = (bits_of_data + 7) // 8 bytes_of_data = (bits_of_data + 7) // 8
bits_in_program_row = bits_of_address + bits_of_data bits_in_program_row = bits_of_address + bits_of_data
address_sequence = (0x00, 0x40, 0x60, 0x20, 0x30, 0x70, 0x50, 0x10, 0x18, 0x58, 0x78, 0x38, 0x28, 0x68, 0x48, 0x08, 0x0c, 0x4c, 0x6c, 0x2c, 0x3c, 0x7c, 0x5c, 0x1c, 0x14, 0x54, 0x74, 0x34, 0x24, 0x64, 0x44, 0x04, 0x06, 0x46, 0x66, 0x26, 0x36, 0x76, 0x56, 0x16, 0x1e, 0x5e, 0x7e, 0x3e, 0x2e, 0x6e, 0x4e, 0x0e, 0x0a, 0x4a, 0x6a, 0x2a, 0x3a, 0x7a, 0x5a, 0x1a, 0x12, 0x52, 0x72, 0x32, 0x22, 0x62, 0x42, 0x02, 0x03, 0x43, 0x63, 0x23, 0x33, 0x73, 0x53, 0x13, 0x1b, 0x5b, 0x7b, 0x3b, 0x2b, 0x6b, 0x4b, 0x0b, 0x0f, 0x4f, 0x6f, 0x2f, 0x3f, 0x7f, 0x5f, 0x1f, 0x17, 0x57, 0x77, 0x37, 0x27, 0x67, 0x47, 0x07, 0x05, 0x45,)
def values_list_line_wrap(values): def values_list_line_wrap(values):
line_length = 16 line_length = 16
@ -102,8 +103,6 @@ def extract_programming_data(commands):
} }
def validate_programming_data(programming_data): def validate_programming_data(programming_data):
expected_address_sequence = (0x00, 0x40, 0x60, 0x20, 0x30, 0x70, 0x50, 0x10, 0x18, 0x58, 0x78, 0x38, 0x28, 0x68, 0x48, 0x08, 0x0c, 0x4c, 0x6c, 0x2c, 0x3c, 0x7c, 0x5c, 0x1c, 0x14, 0x54, 0x74, 0x34, 0x24, 0x64, 0x44, 0x04, 0x06, 0x46, 0x66, 0x26, 0x36, 0x76, 0x56, 0x16, 0x1e, 0x5e, 0x7e, 0x3e, 0x2e, 0x6e, 0x4e, 0x0e, 0x0a, 0x4a, 0x6a, 0x2a, 0x3a, 0x7a, 0x5a, 0x1a, 0x12, 0x52, 0x72, 0x32, 0x22, 0x62, 0x42, 0x02, 0x03, 0x43, 0x63, 0x23, 0x33, 0x73, 0x53, 0x13, 0x1b, 0x5b, 0x7b, 0x3b, 0x2b, 0x6b, 0x4b, 0x0b, 0x0f, 0x4f, 0x6f, 0x2f, 0x3f, 0x7f, 0x5f, 0x1f, 0x17, 0x57, 0x77, 0x37, 0x27, 0x67, 0x47, 0x07, 0x05, 0x45,)
# Validate program blocks: # Validate program blocks:
# There should be two extracted program blocks. The first contains the # There should be two extracted program blocks. The first contains the
@ -113,7 +112,7 @@ def validate_programming_data(programming_data):
# First program phase writes the bitstream to flash (or SRAM) with # First program phase writes the bitstream to flash (or SRAM) with
# special bit(s) not asserted, so the bitstream is not yet valid. # special bit(s) not asserted, so the bitstream is not yet valid.
assert(extract_addresses(programming_data['program'][0]) == expected_address_sequence) assert(extract_addresses(programming_data['program'][0]) == address_sequence)
# Second program phase updates a single row to finish the programming # Second program phase updates a single row to finish the programming
# process. # process.
@ -129,8 +128,8 @@ def validate_programming_data(programming_data):
assert(programming_data['verify'][0] == programming_data['verify'][1]) assert(programming_data['verify'][0] == programming_data['verify'][1])
# Check the row address order of the second verify block. # Check the row address order of the second verify block.
assert(extract_addresses(programming_data['verify'][0]) == expected_address_sequence) assert(extract_addresses(programming_data['verify'][0]) == address_sequence)
assert(extract_addresses(programming_data['verify'][1]) == expected_address_sequence) assert(extract_addresses(programming_data['verify'][1]) == address_sequence)
# Checks across programming and verification: # Checks across programming and verification:
@ -237,5 +236,10 @@ if args.code:
'\t}', '\t}',
'};', '};',
'', '',
'const cpld_xc2c64a_row_addresses_t cpld_hackrf_row_addresses = { {',
))
result.extend(['\t%s' % line for line in hex_lines(address_sequence)])
result.extend((
'} };'
)) ))
print('\n'.join(result)) print('\n'.join(result))