Sojus07/hackrf
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Add code to control RXHP pin on MAX2837 (Jellybean only). I was hoping this would control the baseband DC offset problem, but no, it doesn't seem to help at all.

Browse Source
This commit is contained in:
Jared Boone
2012-10-17 21:48:41 -07:00
parent 2d79f6d69f
commit 143d845b05
2 changed files with 16 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
firmware/common/hackrf_core.h
View File

@ -97,6 +97,9 @@ extern "C"
#define SCU_PINMUX_SGPIO15 (P4_10) #define SCU_PINMUX_SGPIO15 (P4_10)
/* MAX2837 GPIO (XCVR_CTL) PinMux */ /* MAX2837 GPIO (XCVR_CTL) PinMux */
#ifdef JELLYBEAN
#define SCU_XCVR_RXHP (P4_0) /* GPIO2[0] on P4_0 */
#endif
#define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */ #define SCU_XCVR_ENABLE (P4_6) /* GPIO2[6] on P4_6 */
#define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */ #define SCU_XCVR_RXENABLE (P4_5) /* GPIO2[5] on P4_5 */
#define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */ #define SCU_XCVR_TXENABLE (P4_4) /* GPIO2[4] on P4_4 */
@ -145,6 +148,10 @@ extern "C"
#define PIN_XCVR_RXENABLE (BIT5) /* GPIO2[5] on P4_5 */ #define PIN_XCVR_RXENABLE (BIT5) /* GPIO2[5] on P4_5 */
#define PIN_XCVR_TXENABLE (BIT4) /* GPIO2[4] on P4_4 */ #define PIN_XCVR_TXENABLE (BIT4) /* GPIO2[4] on P4_4 */
#define PORT_XCVR_ENABLE (GPIO2) /* PORT for ENABLE, TXENABLE, RXENABLE */ #define PORT_XCVR_ENABLE (GPIO2) /* PORT for ENABLE, TXENABLE, RXENABLE */
#ifdef JELLYBEAN
#define PIN_XCVR_RXHP (BIT0) /* GPIO2[0] on P4_0 */
#define PORT_XCVR_RXHP (GPIO2)
#endif
#define PIN_AD_CS (BIT7) /* GPIO2[7] on P5_7 */ #define PIN_AD_CS (BIT7) /* GPIO2[7] on P5_7 */
#define PORT_AD_CS (GPIO2) /* PORT for AD_CS */ #define PORT_AD_CS (GPIO2) /* PORT for AD_CS */

9
firmware/common/max2837.c
View File

@ -87,16 +87,25 @@ void max2837_setup(void)
LOG("# max2837_setup\n"); LOG("# max2837_setup\n");
#if !defined TEST #if !defined TEST
/* Configure XCVR_CTL GPIO pins. */ /* Configure XCVR_CTL GPIO pins. */
#ifdef JELLYBEAN
scu_pinmux(SCU_XCVR_RXHP, SCU_GPIO_FAST);
#endif
scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST); scu_pinmux(SCU_XCVR_ENABLE, SCU_GPIO_FAST);
scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST); scu_pinmux(SCU_XCVR_RXENABLE, SCU_GPIO_FAST);
scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST); scu_pinmux(SCU_XCVR_TXENABLE, SCU_GPIO_FAST);
/* Set GPIO pins as outputs. */ /* Set GPIO pins as outputs. */
GPIO2_DIR |= (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE); GPIO2_DIR |= (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE);
#ifdef JELLYBEAN
GPIO2_DIR |= PIN_XCVR_RXHP;
#endif
/* disable everything */ /* disable everything */
gpio_clear(PORT_XCVR_ENABLE, gpio_clear(PORT_XCVR_ENABLE,
(PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE)); (PIN_XCVR_ENABLE | PIN_XCVR_RXENABLE | PIN_XCVR_TXENABLE));
#ifdef JELLYBEAN
gpio_set(PORT_XCVR_RXHP, PIN_XCVR_RXHP);
#endif
#endif #endif
max2837_init(); max2837_init();