From 0ddb4cb7f2c78c49bcf0f8b7b3e3ca56583ddadc Mon Sep 17 00:00:00 2001
From: Jared Boone <jboone@earfeast.com>
Date: Tue, 31 Dec 2013 20:07:11 -0800
Subject: [PATCH] Configure LPC43xx for GP_CLKIN input.

---
 firmware/common/hackrf_core.c | 2 +-
 firmware/common/hackrf_core.h | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/firmware/common/hackrf_core.c b/firmware/common/hackrf_core.c
index de6001a4..1441394f 100644
--- a/firmware/common/hackrf_core.c
+++ b/firmware/common/hackrf_core.c
@@ -614,7 +614,7 @@ void pin_setup(void) {
 	scu_pinmux(SCU_SSP1_SSEL, (SCU_SSP_IO | SCU_CONF_FUNCTION1));
 	
 	/* Configure external clock in */
-	//scu_pinmux(P4_7, SCU_CLK_IN | SCU_CONF_FUNCTION1);
+	scu_pinmux(SCU_PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
 
 	sgpio_configure_pin_functions();
 }
diff --git a/firmware/common/hackrf_core.h b/firmware/common/hackrf_core.h
index fff0fb14..b010cecf 100644
--- a/firmware/common/hackrf_core.h
+++ b/firmware/common/hackrf_core.h
@@ -198,6 +198,8 @@ extern "C"
 
 #define SCU_PINMUX_ISP      (P2_7)  /* GPIO0[7] */
 
+#define SCU_PINMUX_GP_CLKIN	(P4_7)
+
 /*
  * GPIO Pins
  */